Differential detector, differential focal plane array and method for determining differential signals
Patent Information
- Application Number
- CN202610955578.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-30
- Publication Date
- 2026-09-01
AI Technical Summary
[0005]但是上述的处理方法会导致探测器动态范围不足,探测精度不高,需要一种可在单个像素内集成差动背景消减功能的微分探测器
在连续成像过程中,利用探测结构获取第二光照条件下的微分电压信号,并利用读出电路按照预设读出时序对微分电压信号进行读出处理,以得到第二光照条件下的目标串行电压。
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Figure CN122670985A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of photoelectric detection technology, and in particular to a differential detector, a differential focal plane array, and a method for determining differential signals. Background Technology
[0002] In the traditional photon integration detection mode, the large number of photogenerated carriers generated by background radiation occupy most of the dynamic range of the readout circuit, causing weak target signals to be greatly compressed or even completely submerged. This inherent interference from strong background radiation has become a limiting factor restricting the development of long-wave infrared detection in the field of large dynamic range.
[0003] However, if a fundamental change can be made at the level of the detection mechanism, and the background radiation component can be directly eliminated or suppressed before the signal integration stage, the limited dynamic range of the readout circuit can be fully utilized for the acquisition of the target signal. This would not only greatly improve the temperature difference detection sensitivity of the system, but also highlight the dynamic target signal by reducing the background signal, thus significantly improving the signal-to-noise ratio of imaging detection.
[0004] Furthermore, related technologies have emerged that utilize integration mode to collect detection signals, such as mercury cadmium telluride, indium gallium arsenide, quantum well infrared photodetectors (QWIP), and gallium nitride-based detectors. They all adopt a "first integration, then difference" working mode, that is, each pixel independently converts the received photons into photogenerated charge carriers (such as electrons) and accumulates them on the integrating capacitor to form a voltage or charge signal. Then, the independent integrated signals output are subtracted by analog or digital circuits to achieve background suppression.
[0005] However, the above processing methods will result in insufficient dynamic range and low detection accuracy of the detector, and a differential detector that can integrate differential background reduction function within a single pixel is needed. Summary of the Invention
[0006] This application aims to at least partially solve one of the technical problems in related technologies. To this end, this application proposes a differential detector, a differential focal plane array, and a method for determining the differential signal. The main technical solutions adopted in this application include: In a first aspect, this application provides a differential detector, comprising: a photosensitive unit, a zero-adjustment control unit, and a signal readout unit; the photosensitive unit includes a first photosensitive device and a second photosensitive device; One end of the first photosensitive device is connected to a first bias voltage, and the other end of the first photosensitive device is connected to one end of the second photosensitive device, and they have a common connection point; the other end of the second photosensitive device is connected to a second bias voltage; the common connection point is connected to the first input terminal of the signal readout unit; the output terminal of the zeroing control unit is connected to the second input terminal of the signal readout unit; A photosensitive unit is used to generate a target differential current when a dynamic object appears; The zero-adjustment control unit is used to adjust the third bias voltage of the photosensitive unit using the target zero-adjustment voltage; wherein, the third bias voltage is used to change the operating point of the first photosensitive device and the second photosensitive device; the target zero-adjustment voltage is determined using the binary iterative method; The signal readout unit is used to integrate the target differential current output by the photosensitive unit to obtain the differential voltage signal of the dynamic object.
[0007] By employing a differential structure with dual photosensitive devices in series, combined with an integrated zero-adjustment control unit and signal readout unit within the pixel, effective suppression of background radiation can be achieved in the initial stage of photoelectric conversion. This fully utilizes the limited dynamic range of the readout circuit for target signal acquisition, significantly improving the system's detection sensitivity. Simultaneously, the use of a binary iterative method to determine the target zero-adjustment voltage enables rapid and accurate background cancellation across the entire array, adapting to background illumination conditions of varying intensities.
[0008] Optionally, both the first photosensitive device and the second photosensitive device are photoconductive structures, and the first photosensitive device and the second photosensitive device are selected differently.
[0009] By employing two different photoconductor structures, this differential detector can achieve spectral differentiation, that is, compare the response differences of two different bands within the same pixel, thereby obtaining the spectral characteristics of the target without relying on external filters, improving the detector's integration and information acquisition capabilities.
[0010] Optionally, both the first bias voltage and the second bias voltage are fixed voltages, and the first bias voltage is higher than the second bias voltage.
[0011] By setting two fixed bias voltages, it is possible to ensure that the photosensitive units of all pixels operate under a uniform electric field condition, eliminating the imaging non-uniformity caused by global bias fluctuations, while greatly simplifying the design complexity of the array-level power supply circuit.
[0012] Secondly, this application provides a differential focal plane array, which includes a detection structure and a readout circuit; the detection structure includes at least two of the above-mentioned differential detectors; the readout circuit includes a driving unit, a sampling output unit, and a voltage unit; the readout circuit is electrically connected to each differential detector. The voltage unit is used to generate the operating voltage required for the probe structure to operate; the operating voltage includes a first bias voltage, a second bias voltage, and a target zero-adjustment voltage; The driving unit is used to generate row and column gating signals, thereby controlling the writing timing of the target zero-adjustment voltage and the reading timing of the differential voltage signal in the detection structure; The sampling output unit is used to sample, hold, and output the differential voltage signal in the probe structure to obtain the target serial voltage of the dynamic object.
[0013] By integrating spectral differentiation and background suppression functions on-chip through a pixel-level differential detector and array-level readout circuitry, the system can directly output differential image signals containing only the spectral features of the target. Simultaneously, the use of unified global power supply and row / column timing control ensures the operational stability and imaging uniformity of the entire array, significantly improving the infrared imaging system's ability to detect weak targets under strong background radiation.
[0014] Optionally, the differential detectors in the detection structure are arranged in an M×N two-dimensional array.
[0015] The M×N two-dimensional array design enables area array imaging, simultaneously acquiring the light intensity variation information of each pixel in two-dimensional space to form a complete image frame, meeting the requirements of infrared thermal imaging for field of view and resolution. Meanwhile, the architecture where each pixel operates independently ensures the resolution and uniformity of the imaging, allowing for flexible adjustment of the array size and pixel dimensions to meet the needs of different application scenarios.
[0016] Optionally, the driving unit includes a row driving subunit and a column driving subunit; The row drive subunit is used to generate row gating signals to gating the differential detectors in the row-by-row gating detection structure. The column drive subunit is used to generate column gating signals, write the target zero-adjustment voltage required by the differential detector in the target column in a time-division multiplexing manner, and read the differential voltage signal output by the differential detector in the target column in a time-division multiplexing manner.
[0017] By employing the aforementioned row and column gating mechanism, control of large-scale pixel arrays can be achieved with minimal wiring, significantly reducing the number of chip pins and overall area. Simultaneously, independent write and read buses are used, responsible for zero-adjustment code writing and differential voltage reading respectively, avoiding timing conflicts in read / write operations, improving frame rate, and enhancing system integration and reliability.
[0018] Optionally, the sampling output unit includes a sampling subunit and an output subunit; The sampling subunit is used to synchronously sample, hold, and level-convert the differential voltage signals output in parallel by all differential detectors in the current row to obtain the target parallel voltage; The output subunit is used to amplify the target parallel voltage output by the sampling subunit and convert the target parallel voltage into a target serial voltage for output to an external load.
[0019] By employing a column-level shared sampling sub-unit design, the sampling synchronization of all pixel signals in the same row is ensured while significantly reducing the circuit area within each pixel. Furthermore, converting parallel signals into serial signals for output effectively reduces the number of output pins on the chip, thereby lowering the system's wiring complexity and overall cost.
[0020] Thirdly, this application also provides a method for determining a differential signal, applied to the aforementioned differential focal plane array, the method comprising: The target zero-adjustment voltage of the detection structure under the first illumination condition was determined using the binary iterative method. During continuous imaging, the differential voltage signal under the second illumination condition is acquired using the detection structure, and the differential voltage signal is read out using the readout circuit according to the preset readout timing to obtain the target serial voltage under the second illumination condition.
[0021] By employing a bisection iterative method to zero-adjust the entire array background against a pure background before performing dynamic target imaging, the interference from background radiation can be completely eliminated from the initial stage of photoelectric conversion. This allows the entire dynamic range of the readout circuit to be used for target signal acquisition, significantly improving the system's detection sensitivity and dynamic range. Simultaneously, the rapid convergence of the bisection iterative method ensures the high efficiency of the zero-adjustment process, enabling periodic real-time updates of the background and adapting to slowly changing background environments. Furthermore, the differential detection mechanism based on the spectral response difference of the dual photosensitive devices can directly extract the spectral feature information of the target, effectively improving the recognition accuracy of dynamic targets against complex backgrounds.
[0022] Optionally, the first lighting condition refers to a pure background lighting condition; the second lighting condition refers to a lighting condition in which a dynamic object appears in a pure background.
[0023] By dividing the imaging process into a zeroing stage under pure background and an imaging stage containing dynamic targets, it is possible to completely separate the background signal from the target signal, eliminate the interference of background radiation on target detection from the source, and ensure that the output signal only reflects the characteristic information of dynamic targets.
[0024] Optionally, under the first illumination condition, the target zero-adjustment voltage of the probe structure is determined using a binary iterative method, including: For each differential detector in the detection structure, determine the current zero-adjustment voltage within the current zero-adjustment range of the differential detector; Obtain the current differential current of the differentiating detector under the current zero-adjustment voltage; Based on the current differential current, update the current zero-adjustment range to obtain the updated zero-adjustment range, and determine the updated zero-adjustment voltage and the updated differential current; The updated zero-adjustment voltage is used as the new current zero-adjustment voltage. The steps of updating the current zero-adjustment range and determining the updated zero-adjustment voltage and the updated differential current are repeated until the updated zero-adjustment range meets the preset iteration termination condition. The updated zero-adjustment voltage is then used as the target zero-adjustment voltage.
[0025] The above method achieves logarithmic convergence, significantly reducing zero-adjustment time, and is independent of the specific parameters of the photoconductor structure (such as the specific resistance value of the photoresistor), making it suitable for independent and rapid optimization of each pixel in large-scale focal plane arrays. Furthermore, this method fully utilizes the hardware resolution of the zero-adjustment circuit to achieve high-precision background current cancellation. Attached Figure Description
[0026] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0027] Figure 1 This is a schematic diagram of the structure of a differential detector according to an embodiment of this application; Figure 2a This is a schematic diagram of the structure of a differential focal plane array according to an embodiment of this application; Figure 2b This is a schematic diagram of a detection structure provided according to an embodiment of this application; Figure 3 This is a flowchart of a differential signal determination method according to an embodiment of this application. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0029] It should be noted that, for the need to extract weak AC components from strong DC backgrounds, the circuit field has developed a variety of mature solutions, such as the Wheatstone bridge balancing method, the capacitor DC blocking method, and the lock-in amplification detection method, all of which utilize component characteristics to balance and reduce background signals. However, in the field of photoelectric detection, the industry still generally uses the traditional photon integration mode for signal acquisition and detection, and a pixel-level differential detection scheme based on a dual-photosensitive element structure and using differential output signal feedback to achieve background reduction has not yet emerged.
[0030] The reason for this is that after the optoelectronic device completes the linear photoelectric conversion, the large current generated by the background radiation has already filled the dynamic range of the detector and readout circuit. Any subsequent background suppression processing at the circuit level is essentially just cutting or compressing the saturated signal, and cannot physically expand the actual dynamic range of the system. The research results of related literature (Zhang Wukang, Chen Honglei, Ding Ruijun. Long-wave infrared readout circuit with background suppression function [J]. Infrared and Laser Engineering, 2021, 50(2): 20200266-1) also confirm this point: even if a long-wave infrared readout circuit with background suppression function is designed, after coupling with a traditional mercury cadmium telluride detector chip and activating the reduction function, the overall dynamic range of the system is still not effectively expanded.
[0031] In other words, the traditional integral detection mode has the following inherent technical bottlenecks: (1) The dynamic range of each pixel is first occupied by the strong background radiation signal, and the dynamic range for detecting useful small signals is severely compressed. (2) Background noise limiting (BLIP) directly limits detection sensitivity; (3) High-precision post-processing circuits are required, making the system complex.
[0032] Therefore, a completely new differential processing mechanism is needed to achieve differential function from the initial stage of photoelectric chip conversion, that is, at the pixel level, to realize the differential working mode of photoelectric signals, thereby breaking through the limitations of the traditional integral detection mechanism.
[0033] Based on this, according to embodiments of this application, a differential detector is provided, such as... Figure 1 As shown, the differential detector 100 includes: a photosensitive unit 110, a zeroing control unit 120, and a signal readout unit 130.
[0034] It should be noted that in practical imaging applications, a complete focal plane array typically contains tens of thousands of detector units arranged in rows and columns, with each detector unit corresponding to a pixel in the image. The differential detector described in this embodiment is the internal structure of a single pixel unit, and each pixel contains a detector unit such as... Figure 1The photosensitive unit 110, the zeroing control unit 120, and the signal readout unit 130 are shown.
[0035] Among them, the photosensitive unit can refer to a unit that can receive incident light signals and convert them into electrical signals, which is used to generate target differential current when a dynamic object appears.
[0036] Understandably, a dynamic object can refer to an object whose light intensity changes relative to the background, such as an airplane appearing against a cloud background or a vehicle moving against a road background. The target differential current refers to the difference in photocurrent generated by the two photosensitive devices within the photosensitive unit.
[0037] It should be noted that the differential current in the related technologies using the "integration-then-differentiation" method is a signal obtained by subtraction at the circuit level after two independent pixels have completed photoelectric conversion and integration, which includes background noise accumulated during the integration process. In contrast, the target differential current in this solution is the native differential current obtained within a single pixel unit through the direct physical cancellation of the photocurrents from two photosensitive devices. This native differential current is zero under pure background conditions and only exhibits a non-zero value when the light intensity changes; therefore, its amplitude is extremely small and it contains no integration noise.
[0038] Specifically, the photosensitive unit 110 includes a first photosensitive device 111 and a second photosensitive device 113. The first and second photosensitive devices can refer to photoelectric conversion devices capable of converting changes in incident light intensity into changes in their own resistance.
[0039] For example, both the first photosensitive device and the second photosensitive device can be photoconductive photosensitive structures, such as lead sulfide (PbS), lead selenide (PbSe), or mercury cadmium telluride (HgCdTe) thin film resistors, quantum well devices, etc.
[0040] It should be noted that the first photosensitive device and the second photosensitive device are selected differently.
[0041] The difference in selection refers to variations in composition, geometry, or spectral response range. Preferably, the spectral response range is different; for example, the first photosensitive device has a response center wavelength of 10 micrometers, while the second photosensitive device has a response center wavelength of 11 micrometers. If the two photosensitive devices are selected exactly the same, their rates of change under the same illumination will be identical, and they will be unable to generate a differential signal.
[0042] Furthermore, the two photosensitive devices in each pixel can be placed side by side, and are in the same spatial position in the detection field of view during imaging, thereby using the difference in radiation intensity of the same target by different bands to extract target information.
[0043] By employing two different photoconductor structures, this differential detector can achieve spectral differentiation, that is, compare the response differences of two different bands within the same pixel, thereby obtaining the spectral characteristics of the target without relying on external filters, improving the detector's integration and information acquisition capabilities.
[0044] It should be noted that the photosensitive device used in this application is not limited to resistive detectors. In practical implementations, the photosensitive device can be of various types, such as a quantum well infrared detector or a photovoltaic device. For ease of understanding and circuit analysis, this application describes the photosensitive device as an equivalent resistance model that changes with illumination, that is, using the resistance change of a photoconductive photoresistor to characterize the change in incident light intensity. This equivalent treatment does not constitute a limitation on the actual physical structure of the photosensitive device; any photoelectric conversion device that can convert optical signals into electrical signals and whose response characteristics can be linearly adjusted with bias voltage can be applied to this solution.
[0045] A zero-adjustment control unit refers to a circuit unit that receives digital zero-adjustment commands and converts them into analog voltage signals, thereby adjusting the operating state of the photosensitive unit. A signal readout unit, on the other hand, is a front-end circuit unit that converts the weak current signal output by the photosensitive unit into a measurable voltage signal and performs integration and amplification.
[0046] Specifically, one end of the first photosensitive device 111 is connected to a first bias voltage V1, and the other end of the first photosensitive device 111 is connected to one end of the second photosensitive device 113, and they have a common connection point 112; the other end of the second photosensitive device 113 is connected to a second bias voltage V2; the common connection point 112 is connected to the first input terminal 131 of the signal readout unit 130; and the output terminal of the zeroing control unit 120 is connected to the second input terminal 133 of the signal readout unit 130.
[0047] The first bias voltage and the second bias voltage can refer to the global power supply voltage that provides a stable operating electric field for the photosensitive unit. Specifically, both the first bias voltage and the second bias voltage are fixed voltages, and the first bias voltage is higher than the second bias voltage.
[0048] It should be noted that in a focal plane imaging system containing multiple photosensitive units, if each photosensitive unit is independently connected to a different bias voltage source, it will not only significantly increase the number of pins and power consumption of the chip, but also cause inconsistent pixel responses due to slight differences between the bias voltages, ultimately affecting the uniformity of the imaging. Therefore, a globally uniform first bias voltage and second bias voltage are usually used to power all photosensitive units simultaneously.
[0049] For example, the first bias voltage V1 can be a global positive voltage (such as 5V), which can provide a stable positive operating electric field for the photosensitive unit. Correspondingly, the second bias voltage V2 can be a global ground voltage (0V), thus serving as a potential reference for the entire circuit system.
[0050] By setting two fixed bias voltages, it is possible to ensure that the photosensitive units of all pixels operate under a uniform electric field condition, eliminating the imaging non-uniformity caused by global bias fluctuations, while greatly simplifying the design complexity of the array-level power supply circuit.
[0051] The common connection point can refer to the node where the first photosensitive device and the second photosensitive device are connected in series. The voltage of this node is determined by the voltage division of the two photosensitive devices by their resistors. It is also the injection point of the zero-adjustment voltage and the output point of the target differential current.
[0052] Specifically, the zero-adjustment control unit 120 is used to adjust the third bias voltage of the photosensitive unit using the target zero-adjustment voltage; The third bias voltage is used to change the operating points of the first and second photosensitive devices. It can be understood that the third bias voltage is actually the potential applied to the common connection point, which can simultaneously change the voltage across the first photosensitive device (the difference between V1 and the third bias voltage) and the voltage across the second photosensitive device (the difference between the third bias voltage and V2), thereby changing the operating bias and photoconductor gain of the two devices and achieving mutual cancellation of the background photogenerated current.
[0053] The target zero-adjustment voltage can be defined as the bias voltage value that makes the native differential current output at the point of common coupling zero under pure background light. Specifically, the target zero-adjustment voltage is determined using a binary iterative method.
[0054] For example, firstly, an adjustable range of zero-adjustment voltage is set for each pixel (determined based on experience or experimental data). Then, within this range, the midpoint of the interval is taken as the current zero-adjustment voltage and written. Next, the differential voltage signal output by the pixel is read, and the sign of the differential voltage signal is used to determine whether the current zero-adjustment voltage is too high or too low. This reduces the adjustable range by half. This process is repeated until the zero-adjustment range is less than the preset minimum adjustment step size, or the output differential voltage signal reaches the preset accuracy requirement. At this point, the current zero-adjustment voltage can be used as the target zero-adjustment voltage.
[0055] After obtaining the target zero-adjustment voltage, the back-end circuit can write the digital zero-adjustment code corresponding to the target zero-adjustment voltage into the zero-adjustment control unit of the corresponding detector through row and column gating signals. Then, the zero-adjustment control unit converts the digital zero-adjustment code into the corresponding analog target zero-adjustment voltage through its internal digital-to-analog converter and applies it to the second input terminal of the signal readout unit 130. Then, the potential of the common connection point 112 is stabilized at the target zero-adjustment voltage through the virtual short characteristic of the signal readout unit 130.
[0056] Furthermore, the signal readout unit 130 can also be used to integrate the target differential current output by the photosensitive unit to obtain the differential voltage signal of the dynamic object.
[0057] The differential voltage signal can refer to the voltage value obtained by integrating the target differential current over time. This voltage value is proportional to the change in light intensity, while the current corresponding to a constant background is zero. Therefore, the integration result does not include the background component ratio.
[0058] Specifically, the signal readout unit 130 may contain an integrating capacitor 135 and an operational amplifier 137. The inverting input of the operational amplifier 137 serves as the first input terminal 131, connected to the common connection point 112, and the non-inverting input serves as the second input terminal 133, connected to the output terminal of the zero-adjustment control unit 120. The integrating capacitor 135 is connected between the inverting input and the output terminal of the operational amplifier. The target differential current flows into the inverting input of the operational amplifier, charging the integrating capacitor, thereby accumulating charge across the integrating capacitor and generating an output voltage proportional to the integral amount of the current, which is output from the output terminal of the operational amplifier as a differential voltage signal.
[0059] In the above embodiments, by adopting a differential structure with dual photosensitive devices connected in series, combined with a zero-adjustment control unit and a signal readout unit integrated within the pixel, effective suppression of background radiation can be achieved in the initial stage of photoelectric conversion, and the limited dynamic range of the readout circuit can be fully utilized for target signal acquisition, greatly improving the detection sensitivity of the system; at the same time, the target zero-adjustment voltage is determined by the binary iterative method, which can quickly and accurately achieve background cancellation of the entire array and adapt to background illumination conditions of different intensities.
[0060] In some implementation methods, please refer to the appendix. Figure 2a This embodiment also provides a differential focal plane array 200.
[0061] It should be noted that the differential focal plane array 200 can refer to a complete infrared imaging chip that integrates a photosensitive array and a matching readout circuit. The photosensitive array is formed by multiple pixel units (i.e., differential detectors) arranged in rows and columns. When connected to a power supply and back-end processing circuit, the final detected differential image can be directly output.
[0062] Specifically, the differential focal plane array may include a probe structure 210 and a readout circuit 220.
[0063] The detection structure can refer to a photosensitive array composed of multiple independent photoelectric conversion units, and the readout circuit can refer to a supporting circuit structure that provides power supply, timing control and signal readout for the entire photosensitive array, and can orderly collect, process and output the weak electrical signals generated by each pixel to the back-end circuit section.
[0064] Furthermore, the detection structure 210 includes at least two of the aforementioned differential detectors 100, and each differential detector in the detection structure is an independent pixel unit, which independently performs photoelectric conversion, background cancellation and signal integration functions, and the operation of different pixels does not interfere with each other.
[0065] For example, please refer to the appendix. Figure 2b The differential detectors 100 in the detection structure 210 are arranged in an M×N two-dimensional array.
[0066] Specifically, M represents the number of rows in the array, N represents the number of columns in the array, and all differential detectors are neatly arranged in rows and columns into a rectangular grid.
[0067] Furthermore, each differential detector is connected to the readout circuit via independent row control lines and column data lines. By combining row and column gating signals, individual access and control of any single pixel can be achieved. During imaging, external incident light simultaneously illuminates all differential detectors, enabling each pixel to independently complete photoelectric conversion and differential current output.
[0068] The M×N two-dimensional array design enables area array imaging, simultaneously acquiring the light intensity variation information of each pixel in two-dimensional space to form a complete image frame, meeting the requirements of infrared thermal imaging for field of view and resolution. Meanwhile, the architecture where each pixel operates independently ensures the resolution and uniformity of the imaging, allowing for flexible adjustment of the array size and pixel dimensions to meet the needs of different application scenarios.
[0069] Furthermore, the readout circuit 220 includes a drive unit 221, a sampling output unit 223, and a voltage unit 225. The readout circuit 220 is electrically connected to each differential detector 100. That is, the readout circuit is connected to the zero-adjustment control unit and the signal readout unit of each differential detector through metal wiring, thereby realizing the issuance of zero-adjustment commands and the uploading of differential voltage signals.
[0070] The voltage unit 225 is used to generate the operating voltage required for the detection structure 210 to operate. This operating voltage includes a first bias voltage, a second bias voltage, and a target zeroing voltage.
[0071] Specifically, voltage unit 225 can be a power management module capable of generating various DC bias voltages and reference voltages. Internally, it can contain a bandgap reference source and a voltage regulator, which can convert external power supply into a stable global first bias voltage (such as 5V) and a global second bias voltage (0V), while generating multiple reference levels for the digital-to-analog converter inside the zero-adjustment control unit to generate the target zero-adjustment voltage.
[0072] The driving unit 221 is used to generate row and column gating signals, thereby controlling the writing timing of the target zero-adjustment voltage and the reading timing of the differential voltage signal in the detection structure 210.
[0073] The write timing can refer to the time sequence in which the calculated digital code value corresponding to the target zero-adjustment voltage is written to each pixel register through the column data bus, while the read timing can refer to the time sequence in which pixels are selected row by row, sampled and held column by column, and the voltage is output to the external chip after integration.
[0074] For example, the driving unit 221 can be a digital logic circuit module that can generate row strobe signals and column strobe signals to control the orderly writing and reading of each pixel in the detection structure.
[0075] Specifically, the driving unit 221 includes a row driving subunit 2211 and a column driving subunit 2213.
[0076] Among them, the row driving subunit 2211 can be used to generate row gating signals and differential detectors in the row-by-row gating detection structure.
[0077] Specifically, the row drive subunit can sequentially generate level selection pulses for the corresponding row based on the row address signal sent by the back-end circuit. For example, when a row is selected, the zero-adjustment write port and signal readout port of all differentiating detectors in that row are activated simultaneously, allowing zero-adjustment code writing or signal readout operations. Rows that are not selected are in a high-impedance state and do not participate in the current operation.
[0078] The column drive subunit can be used to generate column strobe signals, and through independent write and read buses, complete the writing of the target zero-adjustment voltage required by the differential detector in the target column, and the reading of the differential voltage signal of the differential detector in the target column, respectively.
[0079] Specifically, the column driver subunit can sequentially select the signal channels of the corresponding column via the write / read bus based on the column address signal sent by the back-end circuit. For example, during the zeroing phase, the column driver subunit can serially write the digital zeroing code transmitted from the back-end into all selected differential detectors of the corresponding column via the write bus. During the readout phase, the column driver subunit can transmit the differential voltage signal output by the differential detector of the corresponding column to the sampling output unit for processing via the readout bus.
[0080] For example, taking a 15×15 differential focal plane array as an example, during the zeroing phase, the row driving subunit sequentially generates gating signals for rows 1 to 15. When a row is selected, the column driving subunit sequentially selects columns 1 to 15 via the write bus, writing 15 digital zeroing codes to the 15 differential detectors in that row, thus completing the zeroing operation for that row. Similarly, during the readout phase, the column driving subunit sequentially selects columns 1 to 15 via the readout bus, sequentially reading out the differential voltage signals of these 15 detectors. It should be noted that the write bus and the readout bus are independent of each other and do not interfere with each other. They can work simultaneously to reduce control complexity, or they can work in a time-sharing manner to provide redundancy and safety. After completing all operations for the current row, the row driving subunit selects the next row and repeats the above zeroing and readout process until all 15 rows are completed, resulting in a complete frame of differential image data.
[0081] By employing the aforementioned row and column gating mechanism, control of large-scale pixel arrays can be achieved with minimal wiring, significantly reducing the number of chip pins and overall area. Simultaneously, independent write and read buses are used, responsible for zero-adjustment code writing and differential voltage reading respectively, avoiding timing conflicts in read / write operations, improving frame rate, and enhancing system integration and reliability.
[0082] Furthermore, the sampling output unit 223 in the readout circuit 220 can be used to sample, hold, and output the differential voltage signal in the probe structure to obtain the target serial voltage of the dynamic object.
[0083] For example, the sampling output unit 223 can be an analog circuit module that can synchronously acquire and level-convert the parallel differential voltage signal output by the probe structure, and finally output the target serial voltage of the dynamic object.
[0084] The target serial voltage can refer to a serial data stream containing differential voltage information of all pixels in the entire array, that is, a one-dimensional voltage signal output in a fixed time sequence, which can be restored into a two-dimensional digital image after being received and processed by the analog-to-digital converter and image processing circuit at the back end.
[0085] Specifically, the sampling output unit 223 may include a sampling subunit 2231 and an output subunit 2233.
[0086] Among them, the sampling subunit 2231 can refer to a column-level shared analog front-end sampling circuit, which can be used to synchronously sample, hold and level-convert the differential voltage signals output in parallel by all differential detectors in the current row in order to obtain the target parallel voltage.
[0087] For example, the sampling subunit 2231 may include a sampling switch, a holding capacitor, and a buffer amplifier. In operation, when a row is selected by the row driving subunit, the integrated voltage of all pixels in that row is simultaneously applied to their respective column buses. Each column sampling subunit momentarily closes its sampling switch, charging the holding capacitor to the voltage value of the pixels in that column. Then, it opens the sampling switch, and the voltage value is stored in the holding capacitor. Simultaneously, the level conversion circuit inside the sampling subunit adjusts the voltage swing to a standard level range suitable for subsequent circuits, thereby obtaining the target parallel voltage across multiple parallel paths.
[0088] The output subunit 2233 can refer to the output circuit that realizes signal format conversion and power amplification. It can be used to amplify the target parallel voltage output by the sampling subunit and convert the target parallel voltage into a target serial voltage for output to an external load.
[0089] For example, the output subunit can integrate a multiplexer and a buffer amplifier. During operation, the multiplexer sequentially selects one of the 15 target parallel voltages in column order, converting the 15 parallel voltage signals into a single continuous target serial voltage. The buffer amplifier then amplifies the power of this target serial voltage and outputs it off-chip to drive an external load for further processing.
[0090] By employing a column-level shared sampling sub-unit design, the sampling synchronization of all pixel signals in the same row is ensured while significantly reducing the circuit area within each pixel. Furthermore, converting parallel signals into serial signals for output effectively reduces the number of output pins on the chip, thereby lowering the system's wiring complexity and overall cost.
[0091] It should be noted that the differential focal plane array 200 in this embodiment can also be integrated from a detector chip and a readout circuit chip through hybrid interconnect technology in practical applications.
[0092] The detector chip has a photosensitive unit array (i.e., detector structure 210) for receiving incident light signals and generating photocurrent.
[0093] The readout circuit chip can be a silicon-based integrated circuit, which integrates a driving unit 221, a sampling output unit 223, a voltage unit 225, and a zero-adjustment control unit and a signal readout unit for each pixel. The readout circuit chip is responsible for providing bias voltage to the detection chip, generating row and column gating signals, performing binary iterative zero adjustment, integrating and amplifying the differential current, and serially outputting the signal.
[0094] Specifically, the two chips form a hybrid interconnect structure, ensuring a one-to-one connection between the photosensitive unit of each pixel and its corresponding readout circuit unit. This fully leverages the advantages of different material systems in photoelectric conversion and signal processing while achieving high-density pixel-level integration. In the above embodiment, on-chip integration of spectral differentiation and background suppression functions is achieved through a pixel-level differential detector and an array-level readout circuit, enabling direct output of differential image signals containing only the target's spectral features. Simultaneously, unified global power supply and row / column timing control ensure the operational stability and imaging uniformity of the entire array, significantly improving the infrared imaging system's ability to detect weak targets under strong background radiation.
[0095] This embodiment also provides a method for determining the differential signal, applied to the aforementioned differential focal plane array, such as... Figure 3 As shown, the method includes the following steps: S310. Use the binary iterative method to determine the target zero-adjustment voltage of the detection structure under the first illumination condition.
[0096] The first lighting condition can refer to a pure background lighting condition. That is, the lighting environment when there are dynamic targets, such as a scene with only clouds and no aircraft.
[0097] The reason why it is necessary to determine the zero-adjustment voltage under the first illumination condition is that the core objective of zero adjustment is to completely cancel the photocurrent generated by background radiation. Only in a pure background environment can the background current component of each pixel be accurately measured, and then the optimal zero-adjustment voltage that can completely cancel the background current can be calculated to ensure that when a dynamic target appears later, the output signal only contains the target's feature information.
[0098] Specifically, under the first illumination condition, the target zero-adjustment voltage of the detection structure is determined using a binary iterative method, including: for each differential detector in the detection structure, firstly, the current zero-adjustment voltage is determined within the current zero-adjustment range of the differential detector; then, the current differential current of the differential detector under the current zero-adjustment voltage is obtained; then, based on the current differential current, the current zero-adjustment range is updated to obtain the updated zero-adjustment range, and the updated zero-adjustment voltage and the updated differential current are determined; the updated zero-adjustment voltage is used as the new current zero-adjustment voltage, and the above steps of updating the current zero-adjustment range and determining the updated zero-adjustment voltage and the updated differential current are repeated until the updated zero-adjustment range meets the preset iteration termination condition, and the updated zero-adjustment voltage is used as the target zero-adjustment voltage.
[0099] The current zero-adjustment range can refer to the pre-set adjustable range of the zero-adjustment voltage, which can be determined by the hardware parameters of the zero-adjustment circuit. The current zero-adjustment voltage can refer to the temporary voltage value written to the zero-adjustment control unit during the current iteration, and the corresponding current differential current can refer to the differential current value output by the differential detector under the current zero-adjustment voltage.
[0100] For example, the initial zeroing range of a differential detector can first be determined as [V] based on experience and the hardware parameters of the circuit. min1 V max1 In the first zero-adjustment iteration for this differential detector, the initial zero-adjustment range can be used as the current zero-adjustment range, and the median value of the current zero-adjustment range can be used as the current zero-adjustment voltage V. mid1 That is, V mid1 =(V min1 +V max1 ) / 2.
[0101] The current zero-adjustment voltage V is then adjusted via the zero-adjustment control unit of the differentiating detector. mid1 When applied to their common connection point, the corresponding differential voltage V can be measured. out1 By using this differential voltage (for example, to perform circuit calculations), the current zero-adjustment voltage V can be obtained. mid1 The current differential current I under out1 .
[0102] It should be noted that, based on the physical characteristics of optical guide detectors, Figure 1 Taking the detector structure shown as an example, the current differential current I output by the photosensitive unit... out1 It will decrease monotonically as the zero-adjustment voltage increases, so the adjustment direction of the zero-adjustment voltage can be determined by judging the direction of the current differential current.
[0103] For example, if the current differential current I out1 The fact that the current is positive indicates that the first current flowing into the point of common coupling from the branch containing the first photosensitive device is greater than the second current flowing out of the point of common coupling from the branch containing the second photosensitive device. Therefore, a positive current I is generated between the two. out1 According to the operational amplifier principle, the current zero-adjustment voltage V is... mid1 If the voltage is below the target zero-adjustment voltage, the zero-adjustment voltage needs to be increased. Therefore, the current zero-adjustment range [V] can be adjusted. min1 V max1 The lower limit V min1 Updated to median V mid1 And maintain the upper limit V of the current zeroing range. max1 The zeroing range remains unchanged, thus obtaining the updated zeroing range [V]. mid1 V max1 ].
[0104] The zeroing range can then be adjusted after the update [V]. mid1 V max1 After confirming the updated zero-adjustment voltage, the median value (i.e., V) can also be taken. mid2 =(V mid1 +V max1 () / 2), and the updated differential current I was measured again. out2 Then utilize the updated differential current I out2 Make a judgment and repeat the above steps until the updated zeroing range meets the preset iteration termination condition.
[0105] Conversely, if the current differential current I out1 The fact that the current is negative indicates that the first current flowing into the point of common coupling from the branch containing the first photosensitive device is less than the second current flowing out of the point of common coupling from the branch containing the second photosensitive device. Therefore, a negative current I is generated between the two. out1 According to the operational amplifier principle, the current zero-adjustment voltage V is... mid1 If the voltage is higher than the target zero-adjustment voltage, the zero-adjustment voltage needs to be reduced. Therefore, the current zero-adjustment range [V] can be adjusted. min1 V max1 The upper limit of V max1 Updated to median V mid1 And maintain the lower limit V of the current zeroing range. min1 The zeroing range remains unchanged, thus obtaining the updated zeroing range [V]. min1 V mid1 Repeat the above steps until the updated zeroing range meets the preset iteration termination condition.
[0106] The preset iteration termination condition can be a minimum step size, such as when the difference between the upper and lower limits of the updated zeroing range is less than the voltage resolution of the DAC (e.g., 1mV). In this case, it can be considered that a sufficiently accurate target zeroing voltage has been found.
[0107] Under the condition of satisfying the preset iteration termination, the updated zero-adjustment voltage obtained in the last iteration can be used as the target zero-adjustment voltage of the pixel, and its corresponding differential voltage should theoretically be close to zero.
[0108] The above method achieves logarithmic convergence, significantly reducing zero-adjustment time, and is independent of the specific parameters of the photoconductor structure (such as the specific resistance value of the photoresistor), making it suitable for independent and rapid optimization of each pixel in large-scale focal plane arrays. Furthermore, this method fully utilizes the hardware resolution of the zero-adjustment circuit to achieve high-precision background current cancellation.
[0109] S320. During continuous imaging, the differential voltage signal under the second illumination condition is obtained by using the detection structure, and the differential voltage signal is read out by the readout circuit according to the preset readout timing to obtain the target serial voltage under the second illumination condition.
[0110] The second illumination condition refers to the illumination condition where a dynamic object appears against a pure background. For example, if an airplane appears against a cloud background, the light intensity illuminating the detection structure will include not only background radiation but also the radiation signal from the dynamic object.
[0111] By dividing the imaging process into a zeroing stage under pure background and an imaging stage containing dynamic targets, it is possible to completely separate the background signal from the target signal, eliminate the interference of background radiation on target detection from the source, and ensure that the output signal only reflects the characteristic information of dynamic targets.
[0112] The differential voltage signal can refer to the voltage signal obtained by integrating the differential current of the target by the differential detector. The preset readout timing refers to the time sequence in which the driving unit selects pixels row by row and column by column in order, and serially outputs the sampled and held voltage to the external chip.
[0113] Specifically, during continuous imaging, the target zero-adjustment voltage of each pixel remains constant (i.e., it remains the value determined under the first illumination condition). When a moving object enters the field of view, the incident light intensity changes, and the resistance values of the two photosensitive devices change. Since the background differential current was already zero under the first illumination condition, the output differential current after the appearance of the moving object is entirely determined by the difference in the rate of change of resistance. The signal readout unit integrates this differential current to obtain the differential voltage signal.
[0114] Subsequently, the readout circuit selects row by row according to the preset readout timing. Each row is selected, and the differential voltage signals of all pixels in that row enter the sampling subunit in parallel for synchronous sampling and holding. Then, the column driving subunit selects column by column, and the output subunit converts the parallel voltage into a serial voltage output, finally obtaining the target serial voltage.
[0115] For example, the above process will be explained in detail below with reference to the physical characteristics and specific formulas of the optical waveguide detector.
[0116] Taking a photoresistor where both the first and second photosensitive devices are photoconductive, the characteristic of this type of photoconductive photoresistor is that the photoconductive gain is strictly linearly proportional to the bias voltage across its terminals. The expression for the photoconductive gain G is: In the formula, τ is the carrier lifetime, and t tr V is the carrier transit time, μ is the mobility, V is the applied bias voltage, and L is the electrode spacing.
[0117] The corresponding responsivity R is proportional to the gain G, that is: In the formula, η is the quantum efficiency, q is the electron charge, λ is the wavelength, h is Planck's constant, and c is the speed of light.
[0118] Because under ohmic contact, V=I b ×R (or related to the bias current), the actual bias current I b It is proportional to the applied electric field V. Since the gain G∝V, therefore G∝I. b Therefore, R∝I b .
[0119] Therefore, at low bias (linear region), the responsivity of the photoconductive detector is linearly proportional to the bias current (i.e., G∝I). b The larger the bias current, the stronger the electric field, the shorter the carrier transit time, the higher the gain, and the greater the responsivity. Therefore, the device's response output can be directly and linearly adjusted by regulating the bias voltage.
[0120] Furthermore, for the structure of two photosensitive devices connected in series, a simplified analysis using a resistance model is performed. Assume the first bias voltage is a fixed positive bias voltage U, the second bias voltage is a fixed ground potential 0, the resistance of the first photosensitive device is R1, the resistance of the second photosensitive device is R2, and the bias voltage at the common connection point is U. x .
[0121] Under the first illumination condition (pure background), according to Kirchhoff's current law, the differential current I3 at the point of common coupling is: In the formula, It is the current flowing through the first photosensitive device under the first illumination condition; It is the current flowing through the second photosensitive device under the first illumination condition.
[0122] Among them are: In the formula, U is the first bias voltage; It is the bias voltage at the point of common coupling; The resistance value represents that of the first photosensitive device; This represents the resistance value of the second photosensitive device.
[0123] After zeroing is completed, the voltage at the point of common coupling is locked at the third bias voltage U. x0 ,at this time , The background photocurrent is completely canceled out, and the third bias voltage Ux0 satisfy: When a dynamic object appears, the second illumination condition is applied. It is assumed that two photosensitive devices with different selections will exhibit different rates of resistance change due to differences in their spectral responses. and And the resistance of the first photosensitive device from Become The resistance of the second photosensitive device is from Become At this point, the voltage at the point of common coupling remains at the third bias voltage U. x0 However, the current of the first photosensitive device becomes The current of the second photosensitive device becomes Substituting this into the expression for the third bias voltage above, we can obtain the changed differential current. for: In the formula, U represents the voltage difference between the first bias voltage and the second bias voltage; The rate of change of resistance of the first photosensitive device is represented by: = ; The resistance value of the first photosensitive device; Δ The resistance increment represents the first photosensitive device; The rate of change of resistance of the second photosensitive device is represented by: =Δ / ; The resistance value of the second photosensitive device; Δ This represents the resistance increment of the second photosensitive device.
[0124] However, the rate of change of the output current of a traditional detector is The resistance change rate is a finite value. When the resistance change rate is one ten-thousandth, the large current generated by the background light will occupy the entire dynamic range, and the weak target signal will be overwhelmed. However, the initial output current after zeroing of this scheme is 0, and the current change rate theoretically approaches infinity. Even a difference of only one ten-thousandth in the resistance change rate will generate a measurable net differential current, and the detection sensitivity is several orders of magnitude higher than that of traditional detectors.
[0125] For example, taking a scenario with clouds (first lighting condition) and an airplane (second lighting condition), in this scenario, assuming the background temperature of the clouds is -20℃ (253K) and the airplane temperature is 0℃ (273K), according to Planck's blackbody radiation formula, for the 8-12μm long-wavelength band, the number of photons radiated in half the space by the clouds is... The number of photons radiated in half the space of the aircraft is .
[0126] Under the first illumination condition (clouds only), the target zero-adjustment voltage for each pixel is determined using a binary iterative method, resulting in zero output current and complete cancellation of the cloud background. When the aircraft enters the field of view (second illumination condition), the two photosensitive devices generate different rates of resistance change due to differences in spectral response, outputting a net differential current corresponding to the aircraft's radiation characteristics. Subsequently, the drive unit selects the differential detector row by row according to a preset readout sequence, the column-level sampling subunit synchronously samples the differential voltage signals of all pixels in the current row, and the output subunit converts the parallel voltage into a serial data stream for output, ultimately obtaining the target serial voltage containing aircraft target information.
[0127] In the above implementation, the method of first performing full-array background zeroing using a binary iterative method against a pure background, followed by dynamic target imaging, completely eliminates background radiation interference from the initial stage of photoelectric conversion. This allows the entire dynamic range of the readout circuit to be used for target signal acquisition, significantly improving the system's detection sensitivity and dynamic range. Simultaneously, the rapid convergence of the binary iterative method ensures the high efficiency of the zeroing process, enabling periodic real-time background updates and adapting to slowly changing background environments. Furthermore, the differential detection mechanism based on the spectral response difference of the dual photosensitive devices directly extracts the target's spectral feature information, effectively improving the accuracy of dynamic target identification against complex backgrounds.
[0128] For specific limitations on the method for determining a differential signal, please refer to the limitations on a differential focal plane array mentioned above, which will not be repeated here.
[0129] It should be understood that although the steps in the flowchart above are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise explicitly stated in this document, there is no strict order requirement for the execution of these steps, and they can be executed in other orders.
[0130] Moreover, at least some steps in the above flowchart may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.
[0131] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and all such modifications and variations fall within the scope defined by the appended claims.
[0132] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.
[0133] Those skilled in the art will understand that embodiments of this application can be provided as methods, apparatus, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0134] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0135] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0136] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0137] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0138] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the method embodiments are basically similar to the apparatus embodiments, so the description is relatively simple; relevant parts can be referred to the description of the method embodiments.
[0139] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.
[0140] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and such modifications and variations all fall within the scope defined by the appended claims.
Claims
1. A differential detector, characterized in that, The differential detector includes: a photosensitive unit, a zero-adjustment control unit, and a signal readout unit; the photosensitive unit includes a first photosensitive device and a second photosensitive device. One end of the first photosensitive device is connected to a first bias voltage, and the other end of the first photosensitive device is connected to one end of the second photosensitive device, and they have a common connection point; the other end of the second photosensitive device is connected to a second bias voltage; the common connection point is connected to the first input terminal of the signal readout unit; the output terminal of the zeroing control unit is connected to the second input terminal of the signal readout unit. The photosensitive unit is used to generate a target differential current when a dynamic object appears; The zero-adjustment control unit is used to adjust the third bias voltage of the photosensitive unit using a target zero-adjustment voltage; wherein, the third bias voltage is used to change the operating points of the first photosensitive device and the second photosensitive device; the target zero-adjustment voltage is determined using a binary iterative method; The signal readout unit is used to integrate the target differential current output by the photosensitive unit to obtain the differential voltage signal of the dynamic object.
2. The differential detector according to claim 1, characterized in that, Both the first photosensitive device and the second photosensitive device are photoconductive structures, and the first photosensitive device and the second photosensitive device are selected differently.
3. The differential detector according to claim 1, characterized in that, Both the first bias voltage and the second bias voltage are fixed voltages, and the first bias voltage is higher than the second bias voltage.
4. A differential focal plane array, characterized in that, The differential focal plane array includes a detection structure and a readout circuit; the detection structure includes at least two differential detectors as described in any one of claims 1 or 2; the readout circuit includes a driving unit, a sampling output unit, and a voltage unit; the readout circuit is electrically connected to each of the differential detectors; The voltage unit is used to generate the operating voltage required for the detection structure to operate; the operating voltage includes the first bias voltage, the second bias voltage, and the target zero-adjustment voltage; The driving unit is used to generate row and column gating signals, thereby controlling the writing timing of the target zero-adjustment voltage and the reading timing of the differential voltage signal in the detection structure. The sampling output unit is used to sample, hold, and output the differential voltage signal in the detection structure to obtain the target serial voltage of the dynamic object.
5. The differential focal plane array according to claim 4, characterized in that, The differential detectors in the detection structure are arranged in an M×N two-dimensional array.
6. The differential focal plane array according to claim 4, characterized in that, The driving unit includes a row driving subunit and a column driving subunit; The row driving subunit is used to generate row gating signals to select the differential detectors in the detection structure row by row. The column drive subunit is used to generate a column strobe signal, write the target zero-adjustment voltage required by the differential detector in the target column in a time-division multiplexing manner, and read the differential voltage signal output by the differential detector in the target column in a time-division multiplexing manner.
7. The differential focal plane array according to claim 4, characterized in that, The sampling output unit includes a sampling subunit and an output subunit; The sampling subunit is used to synchronously sample, hold, and level-convert the differential voltage signals output in parallel by all differential detectors in the current row to obtain the target parallel voltage. The output subunit is used to amplify the target parallel voltage output by the sampling subunit and convert the target parallel voltage into the target serial voltage for output to an external load.
8. A method for determining a differential signal, applied to a differential focal plane array as described in any one of claims 4 to 7, characterized in that, include: The target zero-adjustment voltage of the detection structure under the first illumination condition is determined using the binary iterative method. During continuous imaging, the differential voltage signal under the second illumination condition is acquired using the detection structure, and the differential voltage signal is read out using the readout circuit according to a preset readout timing sequence to obtain the target serial voltage under the second illumination condition.
9. The method according to claim 8, characterized in that, The first lighting condition refers to a pure background lighting condition; the second lighting condition refers to a lighting condition in which a dynamic object appears in the pure background.
10. The method according to claim 8, characterized in that, The determination of the target zero-adjustment voltage of the detection structure using the binary iterative method under the first illumination condition includes: For each of the differential detectors in the detection structure, the current zero-adjustment voltage is determined within the current zero-adjustment range of the differential detector; Obtain the current differential current of the differential detector under the current zero-adjustment voltage condition; Based on the current differential current, update the current zero-adjustment range to obtain the updated zero-adjustment range, and determine the updated zero-adjustment voltage and the updated differential current; The updated zero-adjustment voltage is used as the new current zero-adjustment voltage. The steps of updating the current zero-adjustment range and determining the updated zero-adjustment voltage and the updated differential current are repeated until the updated zero-adjustment range meets the preset iteration termination condition. The updated zero-adjustment voltage is then used as the target zero-adjustment voltage.