A low quiescent current voltage limiting protection circuit, an adjustable pulse control circuit, and a voltage limiting protection method.

Abstract

This invention discloses a low quiescent current voltage limiting protection circuit, an adjustable pulse control circuit, and a voltage limiting protection method. The circuit is located in the feedback network of a power amplifier circuit and includes a first NPN type and a second PNP type transistor; their bases are connected to the output terminal, and their emitters are connected to the inverting input terminal. The base-emitter junction is reverse-biased and cut off during normal operation, with a quiescent leakage current ≤1μA; when the output voltage reaches a preset threshold, it conducts to form a voltage limiting path, clamping the output voltage. The adjustable pulse control circuit includes a square wave generator, a reference source and duty cycle adjustment unit, a power amplifier unit, and the voltage limiting protection circuit connected in sequence; fine calibration of the duty cycle is achieved by adjusting the negative voltage reference. This invention features low quiescent power consumption, does not affect amplification accuracy, has a rapid response, and is easy to integrate.

Description

Technical Field

[0001] This invention belongs to the field of analog circuits and inertial navigation control technology, specifically relating to a low static current voltage limiting protection circuit, an adjustable pulse control circuit, and a voltage limiting protection method. Background Technology

[0002] In inertial navigation systems, adjustable pulse control circuits are used to drive liquid-float gyroscopes and construct force feedback closed loops. The amplitude accuracy and stability of their output signals directly affect the system's measurement accuracy and linearity.

[0003] In existing technologies, to prevent overvoltage saturation in subsequent circuits, a voltage limiting protection circuit is typically installed at the power amplifier output. A common solution is to use a Zener diode for voltage clamping, such as... Figure 4 As shown. However, this type of solution has the following technical problems in practical applications: the Zener diode needs to maintain a certain regulated current (usually in the milliampere range), resulting in a large static power consumption of the circuit, which is not conducive to low power consumption design; the operating current of the Zener diode will interfere with the feedback network of the power amplifier, affecting the small signal amplification accuracy; in high-precision analog control systems, this type of voltage limiting circuit is prone to introducing nonlinear distortion, making it difficult to meet the requirements of high-precision application scenarios such as inertial navigation; existing solutions are not conducive to circuit miniaturization, low power consumption and high reliability integration.

[0004] Therefore, there is an urgent need to propose a voltage limiting protection scheme with lower static current, less impact on the main circuit, and easy integration to solve the above-mentioned technical problems. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a low static current voltage limiting protection circuit, an adjustable pulse control circuit, and a voltage limiting protection method to achieve reliable overvoltage clamping while ensuring normal amplification performance, and at the same time meet the requirements of low power consumption, high precision, high reliability, and miniaturization.

[0006] The specific technical solution of the present invention is as follows: In a first aspect, the present invention provides a low static current voltage limiting protection circuit for a power amplifier circuit, wherein the voltage limiting protection circuit is disposed in the feedback network of the power amplifier circuit and includes a first NPN transistor and a second PNP transistor. The base of the first NPN transistor is connected to the output terminal of the power amplifier circuit, the emitter is connected to the inverting input terminal of the power amplifier circuit, and the collector is left floating. The base of the second PNP transistor is connected to the output terminal of the power amplifier circuit, the emitter is connected to the inverting input terminal of the power amplifier circuit, and its collector is left floating. The base-emitter junctions of the first NPN transistor and the second PNP transistor are connected to the circuit in a reverse bias manner. When the output voltage does not reach the preset threshold, the base-emitter junction is in reverse cutoff state and the static leakage current is not greater than 1μA. When the output voltage reaches or exceeds a preset threshold, the base-emitter junction reverse breaks down and conducts, forming a shunt branch in parallel with the feedback resistor in the feedback network, reducing the feedback coefficient of the feedback network, thereby limiting the output voltage to within the preset threshold; the preset threshold is the reverse breakdown voltage value of the base-emitter junction of the first NPN transistor and the second PNP transistor.

[0007] Furthermore, the preset threshold is determined by the reverse breakdown voltage of the base-emitter junction, which is in the range of 6V to 8V, and the corresponding preset threshold range is ±6V to ±8V.

[0008] Furthermore, the voltage limiting protection circuit is connected in parallel or series between the output terminal and the inverting input terminal of the power amplifier circuit, and does not form a direct path to ground or power supply.

[0009] Furthermore, the first NPN transistor is used to limit the positive output voltage, and the second PNP transistor is used to limit the negative output voltage. Together, they form a bidirectional voltage limiting protection circuit.

[0010] Furthermore, the voltage limiting protection circuit also includes two or more base-emitter junctions connected in series to increase the preset threshold.

[0011] Furthermore, the first NPN transistor is 3DG130E, and the second PNP transistor is 3CG130B.

[0012] Secondly, the present invention provides an adjustable pulse control circuit, comprising the following components connected in sequence: A square wave signal generation unit, a reference source and duty cycle adjustment unit, at least one power amplification unit, and any one of the following low static current voltage limiting protection circuits; The square wave signal generating unit uses a hysteresis comparator and an RC network to form a self-excited oscillation circuit, and outputs a zero-crossing symmetrical square wave with adjustable frequency. The reference source and duty cycle adjustment unit includes a positive voltage reference source, a negative voltage generation circuit, and an adjustable resistor RV5 connected in series in the negative voltage generation circuit. By adjusting the resistance value of RV5, the amplitude of the negative voltage reference is finely adjusted, thereby changing the negative threshold of the hysteresis comparator, achieving fine calibration of the duty cycle, and stabilizing the output square wave duty cycle in the range of 49% to 51%. The power amplification unit uses a power operational amplifier to form a closed-loop amplification circuit, realizing signal amplitude amplification and high-current drive output.

[0013] Furthermore, the voltage amplification factor of the power amplifier unit is 2 times, and the output peak current is not less than 500mA.

[0014] Furthermore, the RC network in the square wave signal generating unit includes an adjustable resistor RP1, and the oscillation frequency can be continuously adjusted within the range of 100Hz to 1000Hz by adjusting the resistance value of RP1.

[0015] Thirdly, the present invention provides a method for implementing voltage limiting protection of the adjustable pulse control circuit, comprising the following steps: (1) When the absolute value of the output voltage of the power amplifier circuit is less than the preset threshold of 6V to 8V, the base-emitter junction of the transistor remains in reverse cutoff state, the static leakage current is not greater than 1μA, the feedback network parameters are not changed, and the power amplifier circuit works normally. (2) When the absolute value of the output voltage reaches or exceeds the preset threshold, the base-emitter junction breaks down and conducts in reverse, forming a voltage limiting path in the feedback network, clamping the output voltage within the preset threshold, and realizing overvoltage protection.

[0016] Compared with the prior art, the beneficial technical effects of this invention are reflected in: 1. Extremely low static power consumption. The transistor in the voltage limiting protection circuit is reverse-biased when not triggered, and the static leakage current is no more than 1μA, which is only one-thousandth of that of the traditional Zener diode solution, significantly reducing system power consumption.

[0017] 2. It does not affect amplification performance. The voltage limiting protection circuit is embedded in the feedback network of the power amplifier circuit. It presents a high impedance during normal operation and has no substantial impact on the gain and linearity of the power amplifier circuit, thus ensuring signal amplification accuracy.

[0018] 3. Reliable clamping and rapid response. When the output voltage exceeds the preset threshold, the base-emitter junction of the transistor breaks down in reverse and conducts, forming a voltage limiting path in the feedback network to achieve rapid clamping protection.

[0019] 4. The circuit structure is simple and easy to integrate. No additional bias circuit is required, and it can be directly embedded into existing feedback networks. It is suitable for thin-film hybrid integration processes and meets the requirements of miniaturization and high reliability applications.

[0020] 5. Fast dynamic response and high reliability; the transistor emitter junction switches quickly, making it suitable for high-frequency signal limiting; there is no soft breakdown effect of Zener diodes during the breakdown process; the transistor has a higher power margin than low-power Zener diodes, and has stronger resistance to overvoltage surges in the same volume. Attached Figure Description

[0021] Figure 1 This is a block diagram of the overall system structure. Figure 2 This is a schematic diagram of the overall structure of the adjustable pulse control circuit; Figure 3 This is a square wave generating circuit; Figure 4 This is a traditional Zener diode protection circuit; Figure 5 This is a schematic diagram of a low static current voltage limiting protection circuit. Detailed Implementation

[0022] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0023] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0024] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0025] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0026] Example 1 This embodiment provides an adjustable pulse control circuit for driving inertial devices, the overall structure of which is as follows: Figure 1 As shown, the system includes an adjustable square wave signal generation unit, a reference source and duty cycle adjustment unit, a power amplification unit, and an output protection unit. These units are connected sequentially to form a complete signal generation, conditioning, and output control chain. This embodiment employs a dual-channel parallel structure. The signal generated by the square wave signal generation unit is calibrated by the reference source and duty cycle adjustment unit, and then simultaneously fed into two independent power amplification units and corresponding voltage limiting protection circuits, outputting OUT1 and OUT2 respectively.

[0027] I. Square Wave Signal Generator In this embodiment, as shown in Figures 2 and 3, the square wave signal generation unit uses a hysteresis comparator N1 (TL081M) and an RC network to form a self-excited oscillation structure. The non-inverting input terminal (pin 3) of comparator N1 is connected to a voltage divider network composed of RP2 and RP3 to provide symmetrical high and low threshold voltages; the inverting input terminal (pin 2) is connected to capacitor CP1, and the other end of capacitor CP1 is grounded; the comparator output terminal (pin 6) is connected to the common node of the inverting input terminal (pin 2) and capacitor CP1 through feedback resistor RP1, forming an RC charging and discharging loop and a positive feedback path.

[0028] Its working principle is as follows: During the initial power-on phase, due to a slight imbalance at the comparator input, the output enters either positive or negative saturation. The output voltage acts on capacitor CP1 through resistor RP1, causing it to charge or discharge, and the voltage at the inverting input gradually changes. When this voltage reaches the threshold level set by RP2 and RP3 at the non-inverting input, the comparator output flips, changing the charging / discharging direction. This process repeats periodically, forming a stable self-oscillation. Because the comparator is powered by a ±5V symmetrical power supply, the output is a zero-crossing square wave signal with symmetrical amplitude.

[0029] In this embodiment, the feedback resistor RP1 is 100kΩ, and the capacitor CP1 is 0.1μF. RP2 and RP3 are adjustable voltage divider resistors. By adjusting the resistance values ​​of RP1 and RP2 and RP3, the oscillation frequency and threshold voltage can be adjusted, making the oscillation frequency continuously adjustable within the range of 100Hz to 1000Hz. This structure requires no crystal oscillator or digital logic devices and has high reliability.

[0030] II. Reference Source and Duty Cycle Adjustment Unit To ensure that the output square wave has zero-crossing characteristics and positive and negative amplitude symmetry, this embodiment sets up a reference source unit to provide symmetrical power supply for the comparator. Specifically, it includes a positive voltage reference source and a negative voltage generation circuit.

[0031] Among them, the positive voltage reference +5V voltage reference chip N5 (model REF02) has an output stability preferably better than ±2% (relative change relative to the nominal value); the negative voltage is generated by the positive +5V reference through the inverted voltage follower circuit composed of operational amplifier N2 (model LF156), so that the comparator can work under approximately symmetrical power supply conditions.

[0032] Due to the discreteness of components in actual circuits, positive and negative voltages are difficult to be perfectly consistent, causing the duty cycle of the output square wave to deviate by 50%. Therefore, this embodiment introduces a duty cycle adjustment unit into the negative voltage generation circuit, including... Figure 2 The adjustable resistor RV5 shown has a resistance of 10kΩ.

[0033] The duty cycle adjustment mechanism is as follows: the output high level is set to... The output low level is The positive threshold of the hysteresis comparator negative threshold Duty cycle is When the duty cycle When it is 50%, it needs to have Established. When , Duty cycle Deviation from 50% range. Adjusting RV5 allows for fine-tuning of the negative reference voltage. The absolute value of this changes the negative threshold. This allows for fine adjustment of the duty cycle of the output square wave. For example, when... +5.0V, At -5.4V, it is converted through RV5. When adjusted to -5.0V, the duty cycle improves to 50%. This structure allows the duty cycle to be stably controlled within the range of 50% ± 1%.

[0034] In practical applications, the adjustment unit can be initially calibrated using an external adjustable resistor, or it can be solidified using a thin-film resistor laser adjustment method to meet the consistency requirements of mass production.

[0035] III. Power Amplification Unit The power amplification unit is used to amplify the square wave signal and provide sufficient output current driving capability. In this embodiment, the power amplification unit uses a power operational amplifier N3 (model: OPA544) to form a closed-loop amplification circuit, and its input terminal receives the square wave signal output by the square wave signal generation unit.

[0036] A closed-loop amplification structure is formed by setting the input resistor and the feedback resistor, where the input resistor Rq7 is 10kΩ, the feedback resistor R8_1 is 20kΩ, and the voltage amplification factor is 2.

[0037] The power amplifier unit has an output voltage range of ±0.5V to ±5V and strong driving capability. The peak output current is preferably not less than 500mA, with a typical value of 1A, to meet the driving requirements of subsequent inductive loads or control circuits.

[0038] Compared to using discrete power devices, this implementation method achieves the driving function by integrating a power operational amplifier, which effectively reduces circuit complexity, size and design difficulty while meeting the current output capability.

[0039] IV. Low Static Current Limiting Protection Unit like Figure 5As shown, the voltage limiting protection circuit is located in the feedback network of the power operational amplifier N3. The specific connection method is as follows: The base of the first NPN transistor Q1 (model: 3DG130E) is connected to the base of the second PNP transistor Q2 (model: 3CG130B), and they are both connected to the output terminal (pin 6) of the power operational amplifier N3. The emitters of Q1 and Q2 are connected to each other and together connected to the inverting input terminal (pin 2) of N3. The collectors of both Q1 and Q2 are left floating; One end of the feedback resistor R8_1 is connected to the output terminal (pin 6) of N3, and the other end is connected to the inverting input terminal (pin 2) of N3, in parallel with the parallel branch formed by Q1 and Q2.

[0040] Under the above connection, the base-emitter junctions of Q1 and Q2 are both connected to the feedback network in a reverse bias manner.

[0041] Under normal operating conditions (absolute output voltage < set threshold), the BE junctions of Q1 and Q2 are in reverse cutoff, with only microampere-level leakage current. Actual measurements show that under power supply voltage ±12V, output voltage ±3V (protection not triggered), and load 1kΩ, the static leakage current is 0.6μA, equivalent to a high impedance (>> feedback resistor R8_1), having minimal impact on the feedback network. Connecting / disconnecting this protection circuit results in a power amplifier gain change of <0.5% and no significant change in output linearity.

[0042] Overvoltage protection state (absolute value of output voltage ≥ set threshold): In this embodiment, the reverse breakdown voltage characteristic of the BE junction of NPN / PNP (typical value 7.5V) is utilized to set the voltage limit threshold to ±7.5V.

[0043] Normal operating condition: When the output signal amplitude of the op-amp is small, the reverse voltage of the emitter junction of Q1 and Q2 is slightly close to the breakdown voltage, the reverse leakage current of the transistor is extremely small, and it is in an almost open circuit state. The feedback loop is unaffected, and the circuit is in a linear amplification state.

[0044] Overvoltage protection state: When the positive voltage Vout+ of the op-amp output exceeds VEB, the emitter junction of Q1 is reverse-broken down, and the current flows from pin 6 of N3 through the EB junction of Q1 and R8_1 to pin 2 of the inverting input terminal. The feedback current increases, and the voltage at the op-amp output terminal no longer continues to increase. It is clamped at VEB, exhibiting a positive limiting effect. When the output negative voltage Vout- of the op-amp exceeds VEB, the emitter junction of Q2 is reverse-broken down. Current flows from pin 6 of N3 through the EB junction of Q2 and R8_1 to pin 2 of the inverting input. The feedback current increases, and the output voltage of the op-amp no longer increases. It is clamped at VEB, exhibiting a negative limiting effect.

[0045] The measured clamping threshold consistency is better than ±0.1V, the response time is ≤100ns, and the output voltage waveform has no overshoot or oscillation.

[0046] It should be noted that because the transistor still has a certain equivalent conductor resistance (or voltage drop across the series resistor R8_1 in the feedback network) after reverse avalanche breakdown, the actual clamping voltage will be slightly higher than the reverse breakdown voltage (preset threshold). Tests show that this deviation is no greater than ±0.2V and is within an acceptable range.

[0047] Comparative test: Replace the voltage limiting circuit in this embodiment with a traditional Zener diode protection circuit (such as...) Figure 4 Using a 1N4735A regulated voltage of 6.2V and a 1kΩ series current-limiting resistor, under the same test conditions (power supply ±12V, output ±3V not triggered), the static current of the conventional circuit is 2.3mA, while that of this embodiment is only 0.6μA, reducing static power consumption by approximately 3800 times.

[0048] Compared to traditional voltage limiting circuits built with Zener diodes, in this embodiment, the transistor does not need to maintain a voltage regulator current when it is not conducting, and its static current is only in the microampere range, thereby significantly reducing the impact on the main circuit and improving the amplification accuracy.

[0049] In addition, to achieve symmetrical limiting, this embodiment preferably uses two transistors connected symmetrically, so that both positive and negative voltages are limited, thereby ensuring the safety and symmetry of the output signal throughout the entire dynamic range.

[0050] For applications requiring higher threshold voltages, a multi-stage cascaded structure can be used. For example, connecting the base-emitter junctions of two NPN transistors in series and then in reverse to the feedback circuit results in a total reverse breakdown voltage approximately equal to the sum of the reverse breakdown voltages of the two base-emitter junctions (typically around 12V). By adjusting the number of series stages, different threshold voltages can be flexibly set.

[0051] It should be noted that the correspondence between all the reference numerals and figures in this specification is as follows: RV5 is the adjustable resistor of the reference source unit, RP1 is the feedback resistor of the square wave generator unit, RP2 and RP3 are voltage divider networks, CP1 is the oscillation capacitor, N1 is the hysteresis comparator, N2 is the inverting follower, N3 is the power operational amplifier, Rq7 is the input resistor, R8_1 is the feedback resistor, Q1 is the NPN transistor, and Q2 is the PNP transistor.

[0052] V. Circuit Integration and Packaging Implementation In this embodiment, the entire circuit is implemented using a thin-film hybrid integration process. Specifically, components such as resistors, capacitors, and bare chips are integrated onto a ceramic substrate, conductive patterns are formed by photolithography, and electrical connections are achieved using soldering and gold wire bonding.

[0053] The resistors are thin-film resistors with a temperature coefficient of ±25ppm and an accuracy of 0.1% to ensure stable operation of the circuit within the range of -55℃ to 125℃. For packaging, a hermetically sealed metal structure is used to meet the stringent requirements of high-reliability applications for the internal atmosphere. A combination of processes such as eutectic bonding, reflow bonding, and gradient bonding is employed to control the bonding temperature profile and atmospheric conditions, thereby reducing the use of organic materials and avoiding the long-term impact of gas release on circuit performance.

[0054] This integration and packaging solution can effectively improve the circuit's resistance to shock, temperature cycling, and environmental corrosion, meeting the requirements of high-reliability applications.

[0055] VI. Overall Work Process When the circuit in this embodiment is working: ① The square wave signal generating unit generates a basic square wave signal with an adjustable frequency; ② The reference source and duty cycle adjustment unit perform symmetrical calibration on the signal to control its duty cycle at 50% ± 1%; ③ The power amplifier unit amplifies the signal by 2 times and provides a drive capability of ≥500mA; ④ The low static current voltage limiting protection unit monitors the output voltage in real time. When the absolute value exceeds ±7.5V, it starts clamping within ≤100ns, limiting the output voltage to within ±7.7V, thus protecting the downstream circuit.

[0056] The units work together to ensure that the output signal frequency, amplitude and duty cycle meet the requirements, while achieving a combination of low power consumption, high precision and high reliability.

[0057] In other embodiments, the above-mentioned voltage limiting structure can also be implemented by changing the transistor type (such as NPN or PNP), connection method or cascading method, or by replacing it with an equivalent device with similar low quiescent current characteristics. Without changing the core principle of the present invention, all of these should be considered within the scope of protection of the present invention.

[0058] It should be noted that the voltage limiting protection circuit described in this embodiment is not limited to use in combination with the square wave generating unit, duty cycle adjustment unit, etc. It can be used as an independent functional module in any power amplifier circuit that requires output voltage limiting protection.

[0059] The above detailed description is a specific description of one of the feasible embodiments of the present invention. This embodiment is not intended to limit the patent scope of the present invention. All equivalent implementations or modifications that do not depart from the present invention should be included within the scope of the technical solution of the present invention.

[0060] It should be particularly noted that the various embodiments listed in this specification and accompanying drawings are intended to illustrate the technical solutions and advantages of the present invention, and not to limit the scope of protection of the present invention. Without departing from the core ideas and technical effects of the present invention, those skilled in the art can make any form of improvement, substitution, combination, or modification to the structural arrangement, process parameters, material selection, control logic, etc., of the described embodiments; any obvious changes based on the same concept should be considered equivalent solutions of the present invention and should be included within the scope of protection defined by the claims of the present invention. The actual scope of protection of the present invention is determined by the appended claims and should be correctly understood in conjunction with the specification and accompanying drawings.

Claims

1. A low quiescent current limiting voltage protection circuit for power amplifier circuits, characterized in that: The voltage limiting protection circuit is set in the feedback network of the power amplifier circuit, and includes a first NPN transistor and a second PNP transistor; The base of the first NPN transistor is connected to the output terminal of the power amplifier circuit, the emitter is connected to the inverting input terminal of the power amplifier circuit, and the collector is left floating. The base of the second PNP transistor is connected to the output terminal of the power amplifier circuit, the emitter is connected to the inverting input terminal of the power amplifier circuit, and its collector is left floating. The base-emitter junctions of the first NPN transistor and the second PNP transistor are connected to the circuit in a reverse bias manner. When the output voltage does not reach the preset threshold, the base-emitter junction is in reverse cutoff state and the static leakage current is not greater than 1μA. When the output voltage reaches or exceeds a preset threshold, the base-emitter junction reverse breaks down and conducts, forming a shunt branch in parallel with the feedback resistor in the feedback network, reducing the feedback coefficient of the feedback network, thereby limiting the output voltage to within the preset threshold; the preset threshold is the reverse breakdown voltage value of the base-emitter junction of the first NPN transistor and the second PNP transistor.

2. The voltage limiting protection circuit according to claim 1, characterized in that: The preset threshold is determined by the reverse breakdown voltage of the base-emitter junction, which is in the range of 6V to 8V, and the corresponding preset threshold range is ±6V to ±8V.

3. The voltage limiting protection circuit of claim 1, wherein: The voltage limiting protection circuit is connected in parallel or series between the output terminal and the inverting input terminal of the power amplifier circuit, and does not form a direct path to ground or power supply.

4. The voltage limiting protection circuit according to claim 1, wherein The first NPN transistor is used to limit the positive output voltage, and the second PNP transistor is used to limit the negative output voltage. Together, they form a bidirectional voltage limiting protection circuit.

5. The voltage limiting protection circuit according to claim 1, characterized in that: The voltage limiting protection circuit also includes two or more base-emitter junctions connected in series to increase the preset threshold.

6. The voltage limiting protection circuit according to claim 1, characterized in that: The first NPN transistor is 3DG130E, and the second PNP transistor is 3CG130B.

7. An adjustable pulse control circuit, characterized in that, Including those connected sequentially: A square wave signal generating unit, a reference source and a duty cycle adjustment unit, at least one power amplification unit, and a low static current voltage limiting protection circuit as described in any one of claims 1 to 6; The square wave signal generating unit uses a hysteresis comparator and an RC network to form a self-excited oscillation circuit, and outputs a zero-crossing symmetrical square wave with adjustable frequency. The reference source and duty cycle adjustment unit includes a positive voltage reference source, a negative voltage generation circuit, and an adjustable resistor RV5 connected in series in the negative voltage generation circuit. By adjusting the resistance value of RV5, the amplitude of the negative voltage reference is finely adjusted, thereby changing the negative threshold of the hysteresis comparator, achieving fine calibration of the duty cycle, and stabilizing the output square wave duty cycle in the range of 49% to 51%. The power amplification unit uses a power operational amplifier to form a closed-loop amplification circuit, realizing signal amplitude amplification and high-current drive output.

8. The adjustable pulse control circuit according to claim 7, characterized in that: The power amplifier unit has a voltage amplification factor of 2 and an output peak current of not less than 500mA.

9. The adjustable pulse control circuit according to claim 7, characterized in that: The RC network in the square wave signal generating unit includes an adjustable resistor RP1, and the oscillation frequency can be continuously adjusted within the range of 100Hz to 1000Hz by adjusting the resistance value of RP1.

10. A method for implementing voltage limiting protection in the adjustable pulse control circuit of claim 7, characterized in that, Includes the following steps: (1) When the absolute value of the output voltage of the power amplifier circuit is less than the preset threshold of 6V to 8V, the base-emitter junction of the transistor remains in reverse cutoff state, the static leakage current is not greater than 1μA, the feedback network parameters are not changed, and the power amplifier circuit works normally. (2) When the absolute value of the output voltage reaches or exceeds the preset threshold, the base-emitter junction breaks down and conducts in reverse, forming a voltage limiting path in the feedback network, clamping the output voltage within the preset threshold, and realizing overvoltage protection.

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