A chip control method for multiple communication modes

Abstract

The application relates to the field of chip control and discloses a chip control method of multiple communication modes, which is used for realizing multi-dimensional closed-loop dynamic regulation and control of chip communication modes. Channel gain, same-frequency interference power and average data packet arrival rate are collected, smooth parameters are obtained through sliding average filtering, a comprehensive target function containing throughput satisfaction, delay satisfaction and power consumption satisfaction is constructed, weights are dynamically calculated according to the variance proportion of each satisfaction in candidate solutions, optimization is automatically focused on the current bottleneck target, candidate solutions of continuous control parameters are initialized, iteration is updated, dynamic weights are refreshed according to fitness distribution after each iteration, boundary reflection processing is combined to avoid out-of-bound, and optimal continuous parameters are output. The application adopts a double-layer mechanism of immediate triggering of parameter out-of-bound and fixed-period timing triggering, and fuses factory calibration data and temperature compensation correction mapping coefficients, so that the configuration precision and individual adaptability are improved.

Description

Technical Field

[0001] This invention relates to the field of chip control, and more particularly to a chip control method with multiple communication modes. Background Technology

[0002] As wireless communication systems evolve towards multi-mode and multi-frequency operation, chips need to flexibly switch between various communication modes such as Wi-Fi, Bluetooth, and cellular networks, and dynamically adjust RF and baseband parameters based on real-time channel conditions and service load. The combination space for these parameters is vast, and there are strong coupling relationships between them: increasing the modulation order can improve throughput but increases the requirements for channel quality; increasing transmit power can improve coverage but increases power consumption and interference; increasing the baseband processing frequency can reduce latency but also consumes more energy.

[0003] Therefore, the core issue of intelligent control for multi-mode communication chips is how to automatically search for an optimal hardware configuration that balances throughput, latency, and power consumption based on real-time information such as current channel gain, co-channel interference power, and service arrival rate during chip operation. This problem is essentially a multi-objective continuous optimization problem, and the optimization result needs to be mapped to discrete hardware configuration values ​​that can be written to registers, requiring the mapping to be monotonic, continuous, and robust.

[0004] Existing adaptive control schemes for chips often employ preset fixed weights or static weights based on simple rules when balancing throughput, latency, and power consumption. The fundamental flaw of these schemes is that the weights are unrelated to the currently searched candidate solution group. When, in a certain iteration, candidate solutions generally have high throughput but generally poor latency, fixed weights will still assign the same level of importance to latency as throughput, causing the optimization direction to deviate from the actual bottleneck. In other words, existing technologies lack a mechanism to dynamically adjust weights based on the actual dispersion of satisfaction indicators among candidate solutions, failing to allow the optimization process to automatically focus on the most pressing objective.

[0005] Most existing solutions, after obtaining the optimal continuous parameters, directly round or perform simple quantization and write the data to a register. This approach has two problems: First, the rounding operation disrupts the monotonicity guaranteed during the optimization process, which may lead to the contradiction that the optimization result A is better than B, but the hardware configuration of A after quantization is worse than B. Second, parameters such as the modulation order are discrete constellation points, and non-integer optimization results cannot be used directly. Existing solutions lack a logarithmic field mapping and interpolation mechanism from normalized continuous values ​​to pointers in the actual constellation mapping table, and also do not consider the impact of manufacturing deviations and temperature drift on mapping accuracy.

[0006] Due to manufacturing variations, chips exhibit individual differences in power-register value mapping and frequency-register value mapping at the RF front end. Changes in chip operating temperature can cause power amplifier output power drift. Existing solutions mostly use uniform mapping coefficients, failing to read factory calibration data for personalized correction during power-on initialization or introducing temperature compensation mechanisms. This results in discrepancies between the actual and expected effects of the same optimization result when written to registers on different chips or at different temperatures, reducing the effectiveness of optimization.

[0007] Therefore, we propose a chip control method with multiple communication modes to solve the above problems. Summary of the Invention

[0008] This invention provides a chip control method with multiple communication modes, which is used to realize multi-dimensional closed-loop dynamic control of chip communication modes.

[0009] The first aspect of this invention provides a chip control method with multiple communication modes. The method includes: acquiring channel parameters and service parameters within the current control cycle; constructing a multi-index comprehensive objective function based on the channel parameters and service parameters, and determining the dynamic weights of the satisfaction levels of each index in the multi-index comprehensive objective function to obtain an optimization objective; using the optimization objective as a fitness function to initialize candidate solutions, iteratively updating the candidate solutions and the dynamic weights through a preset optimization algorithm to obtain optimal control parameters; converting the optimal control parameters into hardware configuration values ​​through a preset mapping rule; applying the hardware configuration values ​​to the target hardware, enabling the chip to operate in the communication state corresponding to the hardware configuration values, and re-executing optimization when a preset trigger condition is met.

[0010] Optionally, in a first implementation of the first aspect of the present invention, the acquisition of channel parameters and service parameters within the current control period includes: acquiring the interference power and channel gain of the current frequency band as the channel parameters; acquiring the average arrival rate of data packets as the service parameters; and performing smoothing filtering on the channel parameters and the service parameters to construct a multi-index comprehensive objective function.

[0011] Optionally, in a second implementation of the first aspect of the present invention, the satisfaction of the indicators in the multi-indicator comprehensive objective function includes at least throughput satisfaction, latency satisfaction, and power consumption satisfaction; determining the dynamic weight of the satisfaction of each indicator in the multi-indicator comprehensive objective function includes: calculating the gap between the average satisfaction of each indicator in all current candidate solutions and the theoretical optimal satisfaction; and using the proportion of the gap of each indicator satisfaction in the sum of all gaps as the dynamic weight of the corresponding indicator.

[0012] Optionally, in a third implementation of the first aspect of the present invention, the step of initializing candidate solutions using the optimization objective as the fitness function, and iteratively updating the candidate solutions and the dynamic weights through a preset optimization algorithm to obtain optimal control parameters includes: generating a set of initial candidate solutions using chaotic mapping; calculating the fitness value of each candidate solution using the optimization objective as the fitness function, and assigning a gravitational mass to the corresponding candidate solution based on the fitness value; calculating the acceleration of each candidate solution under the gravitational influence of other candidate solutions based on the gravitational mass, and updating the velocity and position of the candidate solutions based on the acceleration; recalculating and updating the dynamic weights based on the dispersion of satisfaction of each indicator among all current candidate solutions after each iteration, for use in the next iteration; and taking the candidate solution with the highest fitness value after reaching a preset number of iterations as the optimal control parameter.

[0013] Optionally, in a fourth implementation of the first aspect of the present invention, the step of converting the optimal control parameters into hardware configuration values ​​through a preset mapping rule includes: converting the optimal control parameters as normalized values ​​into hardware configuration values ​​through a monotonic continuous mapping function; the hardware configuration values ​​include actual physical configuration values ​​corresponding to at least one of the following: transmit power, center frequency, signal bandwidth, modulation order, coding rate, and baseband processing operating frequency.

[0014] Optionally, in a fifth implementation of the first aspect of the present invention, the target hardware includes a radio frequency front-end register and a baseband processor control register; the step of re-executing optimization when a preset trigger condition is met includes at least one of the following situations: when the change in the channel parameter or the service parameter is continuously monitored to exceed the corresponding preset threshold, a trigger signal is generated to re-execute optimization; when the duration of the absence of the trigger signal reaches a preset time interval, a timed trigger signal is generated to re-execute optimization.

[0015] Optionally, in a sixth implementation of the first aspect of the present invention, the method further includes: during initialization, reading factory calibration data containing multiple mapping parameters; fusing the factory calibration data with the monotonic continuous mapping function to obtain a corrected monotonic continuous mapping function; and replacing the original monotonic continuous mapping function with the corrected monotonic continuous mapping function to convert the optimal control parameters into hardware configuration values.

[0016] Optionally, in a seventh implementation of the first aspect of the present invention, the factory calibration data includes power linear mapping coefficients; an on-chip temperature sensor is used to measure and obtain temperature compensation values, and the power linear mapping coefficients are corrected to obtain temperature-compensated power linear mapping coefficients for use in the conversion of transmission power.

[0017] Optionally, in an eighth implementation of the first aspect of the present invention, the method further includes: performing boundary reflection processing on the candidate solutions that exceed the normalized numerical range boundary to obtain candidate solutions that are still within the boundary after reflection; and using the candidate solutions that are still within the boundary after reflection as candidate solutions for the next iteration.

[0018] Optionally, in a ninth implementation of the first aspect of the present invention, the acceleration of each candidate solution under the gravitational influence of other candidate solutions is calculated based on the gravitational mass, and the acceleration of candidate solution i in the d-th dimension attracted by other candidate solutions is calculated using a multidimensional state transition acceleration formula. The formula for the multidimensional state transition acceleration is as follows: ; Where G(t) is the gravitational constant in the t-th iteration; S is the set containing all candidate solutions; and Let be the fitness values ​​of candidate solution j and candidate solution i in the t-th iteration, respectively; The spatial distance between candidate solution i and candidate solution j; This is a preset constant; and Let be the position coordinates of candidate solutions j and i in the d-th dimension during the t-th iteration, respectively. represents the dynamic weight of the d-th dimension.

[0019] The mechanism of this invention is as follows: It constitutes an adaptive control framework that can quickly trigger re-optimization with changes in channel and service, effectively solving the technical problem that traditional fixed weight or discrete switching modes are difficult to simultaneously take into account transmission efficiency, delay constraints and energy consumption balance in complex dynamic environments. Beneficial effects: Linking the weights to the actual variance of the satisfaction levels of each candidate solution allows the optimization process to automatically identify the current bottleneck without manual intervention. When the delay satisfaction levels of all candidate solutions are low and vary greatly, the delay weights automatically increase, guiding the search to focus on improving the delay. Without increasing any manual parameter tuning costs, the optimization direction always targets the most important goal, significantly improving the search efficiency within a limited control period. Using chaotic mapping instead of random initialization, and leveraging the uniformity and aperiodicity of the chaotic sequence, the initial candidate solutions more evenly cover the entire continuous parameter space. Then, iterative processing is performed using a mass-gravity mechanism of gravity search, combining local fine-grained search with global jump capabilities. Combined with boundary reflection processing, this avoids out-of-bounds loss while preserving search information near the boundary, achieving higher-quality optimal solutions with the same number of iterations, and demonstrating stronger robustness to multi-objective scenarios with complex Pareto front morphologies. A set of monotonic continuous mapping functions was designed: power, frequency, and bandwidth are guaranteed to be monotonic by linear mapping; the modulation order is converted into constellation points by logarithmic field mapping, and non-integer results are processed by lookup table interpolation; the coding rate is limited to the continuous range of 0.5 to 1.0, and the superior-inferior relationship in the optimization space is maintained in the hardware configuration space, ensuring that the optimal solution found by the algorithm is still optimal after being written to the actual register, thus eliminating the performance loss introduced by quantization; Combining parameter out-of-bounds triggering with fixed-interval timed triggering: under normal conditions, it executes according to a fixed period, reducing triggering overhead; when any parameter such as channel gain, interference power, or arrival rate changes beyond the threshold, the current period is immediately interrupted and a new round of optimization is started, which avoids both response delay when the channel changes drastically and invalid calculations under stable conditions. Upon power-up, the system reads the factory calibration data, integrates the individualized mapping coefficients into the monotonic mapping function, and uses on-chip temperature sensor data to compensate the power mapping coefficients in real time. The same optimization algorithm can output accurate hardware configurations on different chips and at different temperatures, eliminating the need for individual parameter tuning for each chip, which significantly reduces mass production deployment costs, while maintaining the accuracy of power output under high-temperature conditions. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of an embodiment of the chip control method with multiple communication modes according to the present invention; Figure 2 This is a schematic diagram of another embodiment of the chip control method with multiple communication modes in this invention; Figure 3 This is a schematic diagram illustrating the collection and processing of parameters such as channel gain, co-channel interference power, and data packet arrival rate in an embodiment of the present invention to obtain smoothed channel parameters and service parameters. Figure 4 This is a schematic diagram of one embodiment of a chip control device with multiple communication modes according to the present invention. Detailed Implementation

[0021] This invention provides a chip control method with multiple communication modes, enabling multi-dimensional closed-loop dynamic control of chip communication modes. The terms first, second, third, fourth, etc. (if present) in the specification, claims, and accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms include or have, and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0022] For ease of understanding, the specific process of the embodiments of the present invention is described below. Please refer to [link / reference]. Figure 1 One embodiment of the chip control method with multiple communication modes in this invention includes: 101. Collect the channel gain, co-channel interference power, and average data packet arrival rate during the current control period to obtain channel parameters and service parameters.

[0023] It is understood that the executing entity of this invention can be a chip control device with multiple communication modes, or it can be a terminal or a server; no specific limitation is made here. This embodiment of the invention will be described using a server as an example.

[0024] It should be noted that the macroscopic control cycle of the current cognitive radio chip system is set to 100ms. When the system enters the current control cycle, the parameter acquisition process inside the chip is triggered synchronously.

[0025] The chip's physical layer measurement module (PMT) acquires channel parameters, controlling the RF transceiver to receive a reference signal from the peer device. In this embodiment, the known transmit power of the reference signal transmitted by the peer device is 0 dBm, and the PMT measures the actual received power of the reference signal reaching the receiver as -75 dBm. The PMT calculates the channel gain for the current control period as -75 dB by taking the difference between the received power and the known transmit power. Simultaneously, the PMT performs energy detection on specific idle time slots or silent resource blocks in the current communication frequency band to assess the background noise and the strength of co-channel transmitted signals from other devices. After RF front-end sampling and digital baseband processing, the co-channel interference power for the current period is measured to be -92 dBm. The channel parameters for the current period are constituted by the channel gain of -75 dBm and the co-channel interference power of -92 dBm.

[0026] The chip's Media Access Control (Media Access Control) layer module has a built-in hardware counter for real-time monitoring and counting of pending data packets sent from the upper-layer network protocol stack to the baseband transmit buffer. Within the 100ms time window of the current cycle, the hardware counter records a total of 1200 newly entered data packets. The Media Access Control (Media Access Control) layer module divides this total number of data packets by the duration of the control cycle to calculate the current average data packet arrival rate, which is 12000 packets / second. This value constitutes the service parameters for the current control cycle.

[0027] After the data acquisition is completed, the chip's control core reads the constructed channel parameters and service parameters through the internal bus and writes them into the specified address segment of the static random access memory.

[0028] 102. Based on channel parameters and service parameters, establish a comprehensive objective function that includes throughput satisfaction, delay satisfaction and power consumption satisfaction, and determine dynamic weights according to the dispersion of the three satisfactions in the current candidate solutions to obtain a weighted continuous optimization objective.

[0029] It should be noted that in this step, the chip's microcontroller extracts the channel parameters (-75dB channel gain, -92dBm co-channel interference power) and service parameters (12,000 packets / s arrival rate) from the memory and inputs them into the underlying state assessment calculation module.

[0030] The candidate solution for a given continuous control parameter is substituted into the channel capacity and queuing theory evaluation model, transforming it into a satisfaction score ranging from 0 to 1. The system calculates the average of the three satisfaction scores for all candidate solutions in the current population. The calculated average throughput satisfaction score is 0.85; the average delay satisfaction score is 0.90; and the average power consumption satisfaction score is 0.65. The microcontroller calculates the performance gap between these three average satisfaction scores and the theoretical optimal value (1.0). The throughput gap is 0.15 (1.0-0.85), the delay gap is 0.10 (1.0-0.90), and the power consumption gap is 0.35 (1.0-0.65). The sum of the gaps across the three dimensions is 0.60. The data indicates that the candidate solution's satisfaction score for power consumption control is significantly lower than the other dimensions, leading to an imbalance in overall performance.

[0031] The algorithm is guided to focus on the weakest link dimension, and the system allocates weights according to the proportion of the gap: the weight of power consumption is dynamically increased to about 0.58 (0.35 / 0.60), the weight of throughput is set to 0.25 (0.15 / 0.60), and the weight of latency is set to about 0.17 (0.10 / 0.60), ensuring that the sum of the weight values ​​of the three dimensions is equal to 1.

[0032] The microcontroller multiplies the satisfaction scores of a candidate solution across its three dimensions by their corresponding dynamic weights and then sums them: multiplying 0.85 by 0.25, 0.90 by 0.17, and 0.65 by 0.58, and then adding the products together (i.e., 0.85). 0.25 + 0.90 0.17 + 0.65 (0.58 = 0.7425) are combined into a single value, and the sum is the weighted comprehensive objective function value.

[0033] 103. Using a weighted continuous optimization objective as the fitness function, a set of candidate solutions for continuous control parameters is initialized using a chaotic mapping. The candidate solutions are iteratively updated using a gravity search rule. After each iteration, the dynamic weights are updated according to the fitness distribution of the current candidate solutions to obtain a set of optimal continuous control parameters. These parameters include at least one normalized value for adjusting the radio frequency transceiver or baseband processor.

[0034] It should be noted that, considering the computing power constraints of embedded chips, this step is executed as an asynchronous background process, relying on the chip's built-in floating-point unit (FPU) and dedicated optimization accelerator, to perform continuous spatial optimization without blocking regular foreground communication. The measured time for a single iteration is less than 1.5ms, and the total time for 50 iterations is less than 75ms, meeting the real-time requirement of a 100ms control cycle. The microcontroller unit is configured with six independent normalized control parameters within a continuous value range of 0 to 1, corresponding to the subsequent six hardware configurations. The system uses chaotic mapping initialization to generate 20 initial candidate solutions. The first candidate solution group contains six independent values: 0.42, 0.30, 0.65, 0.70, 0.55, and 0.60. These 20 candidate solutions constitute the initial population for optimization.

[0035] The weighted comprehensive objective function established in step 102 is used as the evaluation criterion. The algorithm assigns a virtual gravitational mass to each candidate solution based on its fitness score. Higher-scoring candidate solutions have greater mass, while lower-scoring solutions have smaller mass. During the iteration process, the 20 candidate solutions interact based on the law of gravity in a continuous six-dimensional parameter space. High-mass, high-quality solutions exert a strong attraction on low-mass, low-quality solutions, causing the parameter coordinates of low-quality solutions to shift towards the coordinate orientation of high-quality solutions.

[0036] After each iteration of the gravity search, the system re-evaluates the fitness distribution of the current 20 candidate solutions. If statistics show that the population generally meets the requirements in terms of power consumption, but the average fitness value in the throughput dimension shows a statistically significant decrease compared to the previous generation, the system dynamically increases the weight of throughput satisfaction while decreasing the weight of power consumption. The gravitational mass of each candidate solution is recalculated using the updated weights, triggering a new round of spatial position shifts.

[0037] The background gravity search process terminates after 50 iterations. The system extracts the candidate solutions with the highest fitness scores from the last generation of the population. In this embodiment, the optimal normalized numerical combination locked by the system is precisely the aforementioned six independent values: coefficient 1 0.42, coefficient 2 0.30, coefficient 3 0.65, coefficient 4 0.70, coefficient 5 0.55, and coefficient 6 0.60.

[0038] The system compared different schemes under identical channel parameters (channel gain -75dB, interference power -92dBm): Using the traditional fixed-weight scheme (each accounting for 1 / 3), after 50 iterations, the optimal solution achieved a comprehensive fitness score of 0.68; while the dynamic weight allocation scheme of this invention improved the optimal comprehensive fitness score to 0.75 after convergence. After mapping to physical entities, the measured throughput fluctuation was reduced by approximately 15% compared to the fixed-weight scheme, and the average transmit power consumption was reduced by approximately 8%, verifying the effectiveness of this scheme in handling multi-dimensional bottlenecks.

[0039] 104. The optimal continuous control parameters are converted into hardware configuration values ​​through a monotonic continuous mapping function. The hardware configuration values ​​correspond to the transmit power, center frequency, signal bandwidth, modulation order, coding rate, and baseband processing operating frequency.

[0040] It should be noted that the six decoupled normalized parameters output in step 103 are converted into six specific physical configuration values ​​through an independent monotonic continuous mapping function, thus avoiding physical state lock-up caused by parameter coupling.

[0041] Coefficient 1 (0.42) maps the transmit power. The hardware supports a physical range of -10dBm to 23dBm. The mapping logic multiplies the input value 0.42 by the total range of 33dB and adds the result to the baseline value of -10dBm to obtain a transmit power configuration value of 3.86dBm.

[0042] Coefficient 2 (0.30) maps the baseband processing operating frequency. The hardware can be set from 100MHz to 500MHz. The mapping logic multiplies 0.30 by the 400MHz range and adds a base value of 100MHz to obtain a baseband processing operating frequency configuration of 220MHz.

[0043] Coefficient 3 (0.65) maps the center frequency. A linear mapping is performed within the unlicensed band of 2400MHz to 2480MHz. Multiplying 0.65 by the span of 80MHz and superimposing the reference value of 2400MHz, the center frequency configuration value is obtained as 2452MHz.

[0044] The coefficient four (0.70) maps to the signal bandwidth. The underlying hardware only supports four discrete bandwidths: 20, 40, 80, and 160MHz. A piecewise monotonic step function is used to determine the bandwidth: 0 to 0.25 corresponds to 20MHz, 0.25 to 0.5 to 40MHz, 0.5 to 0.75 to 80MHz, and 0.75 to 1.0 to 160MHz. The coefficient 0.70 falls into the third interval, thus the signal bandwidth is determined to be 80MHz.

[0045] The coefficient 5 (0.55) maps to the modulation order. 0 to 0.25 is order 2, 0.25 to 0.5 is order 4, 0.5 to 0.75 is order 16, and 0.75 to 1.0 is order 64. The coefficient 0.55 falls into the order 16 range, so the modulation order is configured to be order 16.

[0046] Coefficient six (0.60) maps to the coding rate. 0 to 0.33 is 1 / 2, 0.33 to 0.66 is 2 / 3, and 0.66 to 1.0 is 3 / 4. Coefficient 0.60 falls into the 2 / 3 range, so the coding rate configuration value is determined to be 2 / 3.

[0047] Numerical values ​​are converted into parameter sets through six independent mapping channels.

[0048] 105. Write the hardware configuration value into the RF front-end register and the baseband processor control register to make the chip work in the communication state determined by the configuration value, and repeat all the above operations in subsequent control cycles. When the change of channel parameters or service parameters exceeds the preset threshold, a new round of optimization is immediately triggered.

[0049] It should be noted that the chip's microcontroller unit converts the six hardware physical configuration values ​​obtained in step 104 into binary control words via its internal high-performance bus, and writes them in parallel to the control registers corresponding to the RF front-end and baseband processor. After writing, the state machine triggers hardware phase-locked loop locking and bias current adjustment, enabling the cognitive radio chip to officially operate in the new state.

[0050] After the hardware configuration takes effect, macroscopic monitoring is performed at 100ms intervals. The system uses the data collected in step 101 as the benchmark value for dynamic triggering and sets the relative change threshold for initiating a new round of optimization. During the fifth control cycle (500ms), the external environmental noise level fluctuates normally, and the upper-layer data transmission volume increases significantly. The physical layer and media access control layer modules compare the real-time parameters with the benchmark value.

[0051] The specific data monitoring and judgment logic is shown in Table 1: Table 1

[0052] According to the decision logic, in the 5th control cycle, the change in co-channel interference power (2dB) was considered a normal fluctuation and did not reach the threshold; however, the change in channel gain (7dB) exceeded the 6dB threshold, and the change in packet arrival rate (37.5%) exceeded the 30% threshold. The system determined that the current physical layer configuration was no longer compatible with the existing attenuation and surge in service demands.

[0053] The hardware interrupt controller of the microcontroller detects the out-of-bounds signal, immediately interrupts the current normal sleep monitoring process, uses the real-time acquisition data of the 5th cycle as the new input, wakes up the background algorithm processor, and restarts the continuous space optimization calculation process from step 102 to step 104.

[0054] Please see Figure 2 and Figure 3 Another embodiment of the chip control method with multiple communication modes in this invention includes: 201. Collect the channel gain, co-channel interference power, and average data packet arrival rate during the current control period to obtain channel parameters and service parameters.

[0055] Specifically, the received signal strength on the current frequency band is measured by spectrum sensing to separate the co-channel interference power; the channel gain is obtained by measuring the received power of the reference signal; the average arrival rate of data packets is obtained by statistics from the media access control layer; the co-channel interference power, channel gain, and average arrival rate of data packets are respectively subjected to moving average filtering to eliminate instantaneous fluctuations and obtain smoothed channel parameters and service parameters; the smoothed channel parameters and service parameters are used to construct the comprehensive objective function.

[0056] It should be noted that the chip's current operating communication frequency is set to 2.4GHz, and the system's control cycle is set to 50ms. When a new control cycle begins, the chip's hardware monitoring module synchronously starts data acquisition.

[0057] The chip controls the RF front-end to perform spectrum sensing during idle time slots in the current frequency band (i.e., time periods when no legitimate nodes in the network are transmitting data). The measurement module records the total received signal strength during this time slot, which represents the level of co-channel interference in the environment. Within the current 50ms period, the instantaneous co-channel interference power measured by the RF front-end in a single instance is -88dBm.

[0058] The chip's physical layer measures the received reference signal power (RSRP) by analyzing the pilot reference signal transmitted from the peer device. In this embodiment, the system knows that the peer device's transmitted reference signal power is 10 dBm, and the actual received reference signal power measured at the local end is -70 dBm. Based on this, the physical layer calculates the instantaneous channel gain due to spatial path loss to be -80 dB.

[0059] The chip's media access control layer uses an internal hardware counter to count the number of data packets pushed into the baseband transmission buffer by the upper-layer network protocol stack within the current 50ms control cycle. The statistics show that a total of 250 data packets arrived within this cycle. Converting this to an instantaneous average data packet arrival rate, the result is 5000 packets / second.

[0060] To eliminate the fast fading of the wireless channel and the instantaneous parameter fluctuations caused by sudden traffic, the control unit retrieves historical data saved in the past four control cycles from the internal register, and together with the data measured in the current cycle, forms a sliding window of length 5 for arithmetic average calculation.

[0061] The historical interference data for the past four cycles were -89, -87, -88, and -90 dBm, respectively. Averaging these values ​​with the current instantaneous value of -88 dBm, the smoothed co-channel interference power is -88.4 dBm.

[0062] The historical gain data for the past four cycles were -81, -79, -82, and -80 dB, respectively. Averaging these values ​​with the current instantaneous value of -80 dB, the smoothed channel gain is -80.4 dB.

[0063] The historical arrival rates for the past four periods were 4800, 5100, 4900, and 5200 packets / s, respectively. Averaging these rates with the current instantaneous value of 5000 packets / s, the smoothed average arrival rate of data packets is 5000 packets / s.

[0064] Stable channel parameters are formed by smoothed co-channel interference power (-88.4dBm) and channel gain (-80.4dB), and stable service parameters are formed by average data packet arrival rate (5000 packets / s), which are then output to internal memory.

[0065] 202. Based on channel parameters and service parameters, establish a comprehensive objective function that includes throughput satisfaction, delay satisfaction and power consumption satisfaction, and determine dynamic weights according to the dispersion of the three satisfactions in the current candidate solutions to obtain a weighted continuous optimization objective.

[0066] Specifically, based on channel parameters and service parameters, the achievable data transmission rate, queuing delay, and total power consumption under the parameter configuration corresponding to the candidate solution are calculated respectively. The ratio of the data transmission rate to the maximum possible rate is taken as the throughput satisfaction, the exponential decay function value of the queuing delay to the maximum allowable delay is taken as the delay satisfaction, and the ratio of the difference between the total power consumption and the maximum allowable power consumption is taken as the power consumption satisfaction. The throughput satisfaction, delay satisfaction, and power consumption satisfaction are weighted and summed to obtain the comprehensive objective function. Among them, the dynamic weight is calculated by calculating the variance of the three satisfactions in the current candidate solution, and the proportion of the variance of each satisfaction in the sum of all variances is taken as the weight of that satisfaction. The dynamic weight is recalculated according to the fitness distribution of the current candidate solution after each iteration to obtain the updated weight, which is used to update the weighted continuous optimization objective.

[0067] Furthermore, after each iteration of the current candidate solution population, the current numerical distribution of the three satisfaction levels is statistically analyzed, and the variance of each satisfaction level is calculated. The variance of each satisfaction level is divided by the sum of the three variances to obtain the dynamic weight of that satisfaction level. The three dynamic weights are used as the weighting coefficients of the comprehensive objective function in the next iteration to update the weighted continuous optimization objective.

[0068] It should be noted that, based on the smoothing parameters output in step 201 (channel gain -80.4dB, interference power -88.4dBm, arrival rate 5000 / s), the system performs calculations on the population of 20 generated candidate solutions in the first iteration of the current optimization round. Taking candidate solution number 1 as an example: Throughput dimension: The system calculates the actual data transmission rate under this configuration to be 54Mbps. The maximum possible rate currently supported by the system is 72Mbps. Dividing 54 by 72, the system obtains a throughput satisfaction value of 0.75 for this candidate solution.

[0069] Latency dimension: Under a packet load of 5000 packets / s, the queuing latency was calculated to be 4ms. The maximum allowable latency of the system is 20ms. The system calculates the exponential decay function value of the ratio of queuing latency to maximum latency, resulting in a latency satisfaction value of 0.82.

[0070] Power consumption: The total power consumption was measured to be 120mW. The maximum allowable power consumption set by the system is 300mW. The difference between the maximum allowable power consumption and the total power consumption (180mW) was calculated and divided by the maximum allowable power consumption, resulting in a power consumption satisfaction score of 0.60.

[0071] The system sequentially calculates the satisfaction level of all 20 candidate solutions.

[0072] Calculate the difference between the average satisfaction level of each metric in the current population and the theoretical optimum (1.0). Statistical calculations show that the average throughput satisfaction level is 0.70 (difference 0.30); the average latency satisfaction level is 0.88 (difference 0.12); and the average power consumption satisfaction level is 0.82 (difference 0.18). The sum of the differences across the three dimensions is 0.60. Dividing the throughput difference of 0.30 by the sum of 0.60, the dynamic weight for throughput satisfaction is determined to be 0.50; similarly, the dynamic weight for latency satisfaction is determined to be 0.20; and the dynamic weight for power consumption satisfaction is determined to be 0.30.

[0073] Calculate the comprehensive objective function value of candidate solution #1: Multiply throughput satisfaction (0.75) by weight (0.50), delay satisfaction (0.82) by weight (0.20), and power consumption satisfaction (0.60) by weight (0.30). Sum these three values ​​to obtain 0.719. This value of 0.719 is the comprehensive fitness value of candidate solution #1 in the current iteration.

[0074] After each iteration, all candidate solutions update their parameters. The system recalculates the variance distribution of the next generation population and calculates the dynamic weights of the next generation based on the new variance proportions. This aims to guide the population search direction to prioritize covering the current weakest performance dimension, thereby statistically improving the overall fitness.

[0075] 203. Using a weighted continuous optimization objective as the fitness function, a set of candidate solutions for continuous control parameters is initialized using a chaotic mapping. The candidate solutions are iteratively updated using a gravity search rule. After each iteration, the dynamic weights are updated according to the fitness distribution of the current candidate solutions to obtain a set of optimal continuous control parameters. These parameters include at least one normalized value for adjusting the radio frequency transceiver or baseband processor.

[0076] Specifically, a set of initial continuous control parameter candidate solutions is generated using chaotic mapping. Each candidate solution contains normalized values ​​of transmit power, center frequency, signal bandwidth, modulation order, coding rate, and baseband processing operating frequency. A weighted continuous optimization objective is used as the fitness function to calculate the fitness value of each candidate solution, and each candidate solution is assigned a corresponding gravitational mass based on its fitness value. The acceleration of each candidate solution under the gravitational influence of other candidate solutions is calculated based on its gravitational mass, and the velocity and position of the candidate solutions are updated according to the acceleration, resulting in an updated candidate solution population. After each iteration, the dynamic weights are recalculated based on the dispersion of the three satisfaction levels in the current candidate solution population, and the updated weights are substituted into the fitness function for the fitness calculation in the next iteration. This iteration is repeated until a preset number of iterations is reached. The candidate solution with the highest fitness value during the iteration process is output as the optimal continuous control parameter for hardware configuration value conversion.

[0077] Furthermore, after updating the velocity and position of the candidate solutions in each iteration, the candidate solutions that exceed the normalized numerical range boundary are subjected to boundary reflection processing to obtain candidate solutions that are still within the boundary after reflection. The reflected candidate solutions are used as candidate solutions for the next iteration, and at the end of the last iteration, the reflected candidate solution with the highest fitness value is selected as the optimal continuous control parameter for hardware configuration value conversion.

[0078] It should be noted that swarm intelligence optimization algorithms are used to find the optimal combination of hardware parameters within the solution space. The maximum number of iterations is set to 50, and the population size is 20.

[0079] The control unit sets six independent normalized control parameter dimensions within a continuous value range of 0 to 1. The system uses a Logistic chaotic mapping to generate 20 initial candidate solutions. Taking the first candidate solution as an example, its initial normalized coordinate sequence is: 0.45 (power), 0.35 (frequency), 0.60 (bandwidth), 0.75 (modulation), 0.50 (encoding), and 0.65 (baseband frequency).

[0080] In the first iteration, the overall fitness score of candidate solution 1 is 0.719. Assume the fitness score of candidate solution 2 is 0.850. The system uses a multidimensional state transition acceleration formula that satisfies the physical dimensions to calculate the attractive acceleration of solution 2 on solution 1 in the d-th dimension: ; In a normalized continuous space The incremental coefficient is updated for the dimensionless position of the i-th candidate solution in the d-th dimension. Its magnitude only represents the movement trend and step size of the candidate solution in the solution space; G(t) is the gravity coefficient (dimensionless real number) that decays with the number of iterations. It constitutes the direction scaling factor.

[0081] The first solution is subject to the second solution in the transmit power dimension (d=1, current dynamic weight). Take gravity as an example: Known fitness difference Spatial distance Coordinate difference ;constant .

[0082] Substitute into the formula: .

[0083] The calculation yields: Weighted multipliers The single acceleration increment in this dimension is: .

[0084] The power normalization value of the first candidate solution after superposition and update is assumed to be 1.12. Since it exceeds the boundary of [0,1], the system performs boundary reflection processing: 1.0 - (1.12 - 1.0) = 0.88. This parameter is corrected to 0.88, and the velocity vector is reversed to ensure that the candidate solution does not deviate from the physical mapping range.

[0085] After 50 cycles of search, position update, boundary reflection, and weight adjustment, the algorithm terminates. The system extracts the candidate solution with the highest fitness as the optimal continuous control parameters: 0.38 (transmit power), 0.42 (center frequency), 0.55 (signal bandwidth), 0.80 (modulation order), 0.60 (coding rate), and 0.50 (baseband frequency).

[0086] 204. The optimal continuous control parameters are converted into hardware configuration values ​​through a monotonic continuous mapping function. The hardware configuration values ​​correspond to the transmit power, center frequency, signal bandwidth, modulation order, coding rate, and baseband processing operating frequency.

[0087] Specifically, the normalized transmit power value in the optimal continuous control parameters is converted into an actual transmit power value in milliwatts through a preset power linear mapping relationship; the normalized center frequency value in the optimal continuous control parameters is converted into an actual center frequency value in megahertz through a preset frequency linear mapping relationship; the normalized signal bandwidth value in the optimal continuous control parameters is converted into an actual signal bandwidth value in kilohertz through a preset bandwidth linear mapping relationship; the normalized modulation order value in the optimal continuous control parameters is converted into an actual constellation point number through a logarithmic domain mapping function, and the non-integer constellation point number is interpolated into a continuous constellation mapping table through a lookup table; the normalized coding rate value in the optimal continuous control parameters is converted into an actual coding rate value between 0.5 and 1.0 through linear mapping; the normalized baseband processing operating frequency value in the optimal continuous control parameters is converted into an actual operating frequency value in megahertz through linear mapping; the obtained actual transmit power value, actual center frequency value, actual signal bandwidth value, actual constellation mapping table pointer, actual coding rate value, and actual operating frequency value are combined into a hardware configuration value for register writing.

[0088] Furthermore, converting the normalized signal bandwidth value into the actual signal bandwidth value includes: pre-storing a bandwidth mapping table within the chip, the bandwidth mapping table containing multiple discrete bandwidth reference points and the register configuration codeword corresponding to each reference point; locating two adjacent bandwidth reference points in the bandwidth mapping table based on the normalized signal bandwidth value, and calculating the corresponding actual signal bandwidth value and its hardware configuration codeword through linear interpolation, the hardware configuration codeword being used for register writing.

[0089] It should be noted that the normalized value is 0.38. Hardware support ranges from 1mW to 101mW, spanning 100mW. System calculations... The actual transmission power was found to be 39mW.

[0090] Normalized value: 0.42. Effective communication frequency band: 2400MHz to 2480MHz, spanning 80MHz. System calculations. The actual center frequency was found to be 2433.6MHz.

[0091] The normalized value is 0.55. To conform to the standard range of RF analog filters, the underlying hardware only supports four discrete steps: 10MHz, 20MHz, 40MHz, and 80MHz. The system defines the mapping intervals: [0, 0.25) is mapped to 10MHz, [0.25, 0.5) to 20MHz, [0.5, 0.75) to 40MHz, and [0.75, 1.0] to 80MHz. The value 0.55 falls into the third interval, and the system directly locates the corresponding actual signal bandwidth value of 40000kHz (40MHz) in the pre-stored table and extracts its corresponding register configuration codeword 40.

[0092] The normalized value is 0.80. In digital communication, the number of constellation points must be an integer power of 2. The system uses a logarithmic field mapping, and the hardware supports an exponent range from 1 (2-QAM / BPSK) to 8 (256-QAM), with a span of 7. The system calculates the theoretical exponent: The system follows physical laws to round the result to the nearest integer, resulting in an exponent of 7. Then, it calculates 2^7 = 128, determining the actual number of standard physical constellation points to be 128 (i.e., 128-QAM), and generates the corresponding standard constellation mapping table pointers.

[0093] Normalized value: 0.60. Hardware coding rate range: 0.5 to 1.0. System calculation: 0.60. 0.5 + 0.5 equals an actual coding rate of 0.8.

[0094] Normalized value 0.50. Baseband clock range 100MHz to 300MHz. System calculations. The actual operating frequency was found to be 200MHz.

[0095] The 39mW transmit power, 2433.6MHz center frequency, 40 codewords bandwidth, 128-QAM constellation pointer, 0.8 coding rate, and 200MHz baseband frequency are packaged into a hardware configuration value combination, waiting to be written.

[0096] 205. Write the hardware configuration value into the RF front-end register and the baseband processor control register to make the chip work in the communication state determined by the configuration value, and repeat all the above operations in subsequent control cycles. When the change of channel parameters or service parameters exceeds the preset threshold, a new round of optimization is immediately triggered.

[0097] Specifically, the hardware configuration values ​​are written to the frequency control register, gain control register, and bandwidth control register of the RF front-end, as well as the constellation mapping register, coding rate control register, and clock divider register of the baseband processor. After reading the state of the registers after writing, and confirming that the configuration is effective, the chip enters the communication state determined by the hardware configuration value. During chip operation, channel parameters and service parameters are continuously monitored. When the change in channel gain exceeds the first preset threshold, or the change in co-channel interference power exceeds the second preset threshold, or the change in average data packet arrival rate exceeds the third preset threshold, a trigger signal is immediately generated. During the period when no trigger signal is generated, a timed trigger signal is generated every preset fixed time interval. The trigger signal or the timed trigger signal is used as the start instruction for a new round of optimization, and the entire process is repeated.

[0098] It should be noted that step 205 implements the configuration distribution of hardware registers and the closed-loop monitoring and judgment of system operating status.

[0099] The microcontroller writes the configuration values ​​obtained in step 204 into the target register in parallel. The center frequency of 2433.6MHz is written to the frequency control register; the bias control word corresponding to the transmit power of 39mW is written to the gain control register; the bandwidth codeword 40 is written to the bandwidth control register; the 128-QAM mapping table pointer is written to the constellation mapping register; the coding rate of 0.8 is written to the coding rate register; and the frequency divider word corresponding to 200MHz is written to the clock divider register. After the control unit verifies the readback values ​​and confirms the enable lock, the chip officially starts operating in the new state.

[0100] The smoothing parameters output in step 201 are used as the monitoring benchmark for subsequent cycles. Trigger thresholds are set for three dimensions: the first threshold (absolute value of channel gain change) is 5.0 dB; the second threshold (absolute value of interference power change) is 6.0 dB; and the third threshold (proportional change in service arrival rate) is 25.0%. At the same time, a fixed timed trigger period of 2000 ms is set.

[0101] During the 8th control cycle (400ms), the terminal experienced physical displacement. The monitoring module re-acquired the smoothing parameters and compared them with the baseline values. The results are shown in Table 2 below: Table 2

[0102] According to the table, both interference power and traffic volume are within safe fluctuation ranges. However, the change in channel gain (6.4dB) significantly exceeds the set 5.0dB threshold. The underlying hardware interrupt module, based on OR logic, immediately generates an over-limit trigger signal without waiting for the remaining timing trigger cycle.

[0103] Using the real-time smoothing parameters of the 8th cycle (gain -86.8dB, interference -89.2dBm, arrival rate 5300 / s) as a new input source, jump back to step 201 to start a new round of multi-objective optimization calculation, thereby forming a real-time adaptive closed loop of chip communication status.

[0104] 206. During each power-on initialization, the factory calibration data stored internally in the chip is read. The factory calibration data includes the power linear mapping coefficient, frequency linear mapping coefficient, bandwidth linear mapping coefficient, constellation mapping lookup table offset of the baseband processor, and clock division coefficient. The power linear mapping coefficient, frequency linear mapping coefficient, bandwidth linear mapping coefficient, constellation mapping lookup table offset, and clock division coefficient are fused with the linear mapping relationship and lookup table in the monotonic continuous mapping function to obtain the corrected monotonic continuous mapping function. The corrected monotonic continuous mapping function replaces the original monotonic continuous mapping function and is used to convert the optimal continuous control parameters into hardware configuration values.

[0105] Furthermore, the power linear mapping coefficient in the factory calibration data is corrected by the temperature compensation value measured by the on-chip temperature sensor to obtain the temperature-compensated power linear mapping coefficient. The temperature-compensated power linear mapping coefficient is used to convert the normalized transmit power value into the actual transmit power value to offset the power output deviation caused by the change in chip operating temperature.

[0106] It should be noted that step 206 introduces non-volatile calibration data from the underlying hardware when the system is powered on, in order to offset the impact of individual integrated circuit manufacturing process differences and thermodynamic fluctuations on communication indicators.

[0107] After power-on reset, the system extracts the chip's factory physical calibration characteristics from the on-chip single-programmable read-only memory (OTPROM): power linear mapping coefficient 1.02; frequency linear mapping coefficient +0.05MHz; bandwidth adjustment fine-tuning coefficient 1.01 (this coefficient is used to fine-tune the capacitor array of the analog low-pass filter, making the high-frequency roll-off point of the standard bandwidth filter more accurate); constellation mapping lookup table offset +2; clock division compensation coefficient 0.999.

[0108] During operation, the on-chip analog-to-digital converter reads the current core operating temperature of the chip as 65℃. Compared to the standard calibration temperature of 25℃, the temperature difference is 40℃. Based on the physical model of gain drop in RF power amplifiers at high temperatures, the system rule is: for every 10℃ deviation in temperature, the power compensation coefficient increases by 0.005. Therefore, the calculated temperature compensation value is 0.02.

[0109] The factory power factor (1.02) is superimposed with the temperature compensation value (0.02) to obtain the actual compensated power factor of 1.04.

[0110] The above correction coefficients are then fused with the standard hardware configuration values ​​output in step 204. The logic and results are shown in Table 3 below: Table 3

[0111] Through step 206, while maintaining the absolute discrete standardization of the upper-level logic of the algorithm, the system injects fine-tuning compensation variables into the lower-level hardware control, and the output bolded correction value will be directly used to drive the hardware.

[0112] Figure 4 This is a schematic diagram of a multi-communication mode chip control device provided in an embodiment of the present invention. The device 300 can vary considerably due to differences in configuration or performance. The device 300 includes a transmitter 301, a receiver 302, and a processor 303. The processor 303 can also be a controller. Figure 4 The controller / processor is 303. Optionally, the device 300 may also include a modem processor 305, which may include an encoder 306, a modulator 307, a decoder 308, and a demodulator 309.

[0113] In one example, transmitter 301 modulates (e.g., analog-to-analog conversion, filtering, amplification, and up-conversion, etc.) the output sample and generates an uplink signal, which is transmitted via an antenna to an access network device. On the downlink, the antenna receives the downlink signal transmitted by the access network device. Receiver 302 modulates (e.g., filtering, amplification, down-conversion, and digitization, etc.) the signal received from the antenna and provides an input sample. In modem processor 305, encoder 306 receives service data and signaling messages to be transmitted on the uplink and processes (e.g., formatting, encoding, and interleaving) the service data and signaling messages. Modulator 307 further processes (e.g., symbol mapping and modulation) the encoded service data and signaling messages and provides an output sample. Demodulator 309 processes (e.g., demodulates) the input sample and provides a symbol estimate. Decoder 308 processes (e.g., deinterleaving and decoding) the symbol estimate and provides decoded data and signaling messages to device 300. Encoder 306, modulator 307, demodulator 309, and decoder 308 can be implemented by a combined modem processor 305. These units perform processing according to the radio access technology adopted by the radio access network (e.g., LTE and other evolved systems access technologies). It should be noted that when device 300 does not include modem processor 305, the above-mentioned functions of modem processor 305 can also be performed by processor 303.

[0114] The processor 303 controls and manages the operation of the device 300, and is used to execute the processing procedures performed by the device 300 in the above embodiments of this disclosure. For example, the processor 303 is also used to execute various steps of the transmitting or receiving device in the above method embodiments, and / or other steps of the technical solutions described in the embodiments of this disclosure.

[0115] Furthermore, the device 300 may also include a memory 304 for storing program code and data for the device 300.

[0116] Understandable Figure 4 Only a simplified design of device 300 is shown. In practical applications, device 300 can include any number of transmitters, receivers, processors, modem processors, memory, etc., and all devices that can implement the embodiments of this disclosure are within the protection scope of the embodiments of this disclosure.

[0117] The present invention also provides a chip control device with multiple communication modes, the chip control device with multiple communication modes includes a memory and a processor, the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the processor performs the steps of the chip control method with multiple communication modes in the above embodiments.

[0118] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium, wherein the computer-readable storage medium stores instructions that, when the instructions are executed on a computer, cause the computer to perform the steps of the multi-communication mode chip control method.

[0119] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0120] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0121] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip control method with multiple communication modes, characterized in that, include: Collect channel parameters and service parameters within the current control cycle; Based on the channel parameters and service parameters, a multi-index comprehensive objective function is constructed, and the dynamic weights of the satisfaction of each index in the multi-index comprehensive objective function are determined to obtain the optimization objective. The satisfaction of each index in the multi-index comprehensive objective function includes at least throughput satisfaction, latency satisfaction, and power consumption satisfaction. The step of determining the dynamic weight of the satisfaction of each indicator in the multi-indicator comprehensive objective function includes: calculating the gap between the average satisfaction of each indicator in all current candidate solutions and the theoretical optimal satisfaction; and taking the proportion of the gap of each indicator satisfaction in the sum of all gaps as the dynamic weight of the corresponding indicator. Using the optimization objective as the fitness function, candidate solutions are initialized, and the candidate solutions and dynamic weights are iteratively updated through a preset optimization algorithm to obtain the optimal control parameters, including: A set of initial candidate solutions is generated using chaotic mapping; the fitness value of each candidate solution is calculated using the optimization objective as the fitness function, and a gravitational mass is assigned to the corresponding candidate solution based on the fitness value; the acceleration of each candidate solution under the gravitational influence of other candidate solutions is calculated based on the gravitational mass, and the velocity and position of the candidate solutions are updated based on the acceleration; after each iteration, the dynamic weights are recalculated and updated based on the dispersion of satisfaction of each indicator among all current candidate solutions for the next iteration; the candidate solution with the highest fitness value after reaching a preset number of iterations is taken as the optimal control parameter. The optimal control parameters are converted into hardware configuration values ​​using a preset mapping rule; The hardware configuration values ​​are applied to the target hardware, causing the chip to operate in the communication state corresponding to the hardware configuration values, and optimization is re-executed when preset trigger conditions are met.

2. The chip control method with multiple communication modes according to claim 1, characterized in that, The acquisition of channel parameters and service parameters within the current control period includes: The interference power and channel gain of the current frequency band are obtained as the channel parameters; The average arrival rate of data packets is obtained as the service parameter. The channel parameters and the service parameters are subjected to smoothing filtering to construct a multi-index comprehensive objective function.

3. The chip control method with multiple communication modes according to claim 1, characterized in that, The step of converting the optimal control parameters into hardware configuration values ​​through a preset mapping rule includes: The optimal control parameters are used as normalized values ​​and converted into hardware configuration values ​​through a monotonic continuous mapping function. The hardware configuration values ​​include the actual physical configuration values ​​corresponding to at least one of the following: transmit power, center frequency, signal bandwidth, modulation order, coding rate, and baseband processing operating frequency.

4. The chip control method with multiple communication modes according to claim 1, characterized in that, The target hardware includes a radio frequency front-end register and a baseband processor control register; The condition of re-executing optimization when a preset trigger condition is met includes at least one of the following situations: When the change in the channel parameters or service parameters is continuously detected to exceed the corresponding preset threshold, a trigger signal is generated to re-execute the optimization. When the duration of the absence of the trigger signal reaches a preset time interval, a timed trigger signal is generated to re-execute the optimization.

5. The chip control method with multiple communication modes according to claim 3, characterized in that, Also includes: During initialization, factory calibration data containing multiple mapping parameters is read; The factory calibration data is fused with the monotonically continuous mapping function to obtain the corrected monotonically continuous mapping function. The corrected monotonic continuous mapping function is used to replace the original monotonic continuous mapping function, which is then used to convert the optimal control parameters into hardware configuration values.

6. The chip control method with multiple communication modes according to claim 5, characterized in that, The factory calibration data includes power linear mapping coefficients; Temperature compensation values ​​are obtained by measuring with an on-chip temperature sensor, and the power linear mapping coefficients are corrected to obtain temperature-compensated power linear mapping coefficients for use in the conversion of transmit power.

7. The chip control method with multiple communication modes according to claim 1, characterized in that, Also includes: The candidate solutions that exceed the normalized numerical range boundary are subjected to boundary reflection processing to obtain candidate solutions that are still within the boundary after reflection; The candidate solution that remains within the boundary after reflection is used as the candidate solution for the next iteration.

8. The chip control method with multiple communication modes according to claim 1, characterized in that, The acceleration of each candidate solution under the gravitational influence of other candidate solutions is calculated based on the gravitational mass. The acceleration of candidate solution i in the d-th dimension due to the attraction of other candidate solutions is then calculated using the multidimensional state transition acceleration formula. The formula for the multidimensional state transition acceleration is as follows: ； Where G(t) is the gravitational constant in the t-th iteration; S is the set containing all candidate solutions; and Let be the fitness values ​​of candidate solution j and candidate solution i in the t-th iteration, respectively; The spatial distance between candidate solution i and candidate solution j; This is a preset constant; and Let be the position coordinates of candidate solutions j and i in the d-th dimension during the t-th iteration, respectively. represents the dynamic weight of the d-th dimension.

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