Triggering method of distributed power supply, electronic device and storage medium

Abstract

This invention provides a method, electronic device, and storage medium for triggering distributed power sources, belonging to the field of particle acceleration technology. The method includes: acquiring a system reference time and independent delay trigger time parameters for each distributed power source controller; determining the original trigger time based on the system reference time; obtaining the final trigger timestamp based on the original trigger time and each independent delay trigger time parameter; generating a time synchronization protocol frame containing synchronization interaction information; encapsulating each final trigger timestamp into the time synchronization protocol frame to obtain each target protocol frame and sending it to the corresponding distributed power source controller. This invention achieves independent calculation and transmission of trigger time control information for each channel by acquiring the independent delay trigger time parameters corresponding to each distributed power source controller to calculate the final trigger timestamp, accurately encapsulating it into the corresponding time synchronization protocol frame, and sending it down. This enables flexible control of the delay trigger time of each power source.

Description

Technical Field

[0001] This invention relates to the field of particle acceleration technology, and more particularly to a method for triggering a distributed power source, an electronic device, and a storage medium. Background Technology

[0002] A particle accelerator is a device that accelerates charged particles. Its core components include distributed magnets and their associated excitation power supply. During the operation of a particle accelerator, flexibly controlling the current output by the distributed excitation power supply is a crucial step in ensuring that the trajectory of the charged particles always precisely matches the accelerator's circular orbit.

[0003] Currently, existing distributed power triggering schemes mainly use synchronous triggering mechanisms, meaning all power supplies can only be triggered simultaneously. However, this method cannot flexibly control the delay triggering time of each power supply, resulting in insufficient system flexibility. Summary of the Invention

[0004] This invention provides a method for triggering a distributed power source, an electronic device, and a storage medium to address the shortcomings of existing technologies that cannot flexibly control the delayed trigger time of each power source, resulting in insufficient system flexibility, and to achieve flexible control over the delayed trigger time of each power source.

[0005] This invention provides a method for triggering a distributed power source, applied to a time synchronization master controller, comprising the following steps: Obtain the system reference time and the independent delay trigger time parameters corresponding to each distributed power controller; The original trigger time is determined based on the system reference time, and the final trigger timestamp corresponding to each of the distributed power controllers is obtained according to the original trigger time and each of the independent delay trigger time parameters. Generate a time synchronization protocol frame corresponding to each of the distributed power controllers, the time synchronization protocol frame containing time synchronization interaction information; encapsulate each of the final trigger timestamps into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each of the distributed power controllers; Each of the target protocol frames is sent to the corresponding distributed power controller, so that the distributed power controller can generate a trigger pulse based on the target protocol frame.

[0006] According to a method for triggering a distributed power source provided by the present invention, the step of obtaining the final trigger timestamp corresponding to each of the distributed power source controllers based on the original trigger time and each of the independent delayed trigger time parameters includes: Obtain the original millisecond and original nanosecond time values ​​of the original trigger time; The original nanosecond time value is summed with the corresponding independent delay trigger time parameter to obtain the nanosecond time summation value; If the sum of the nanosecond times is greater than or equal to the carry threshold, then the original millisecond time value is increased by the target carry value to obtain the final millisecond time value, and the sum of the nanosecond times is subtracted from the carry threshold to obtain the final nanosecond time value. If the sum of the nanosecond times is less than the carry threshold, then the original millisecond time value is determined as the final millisecond time value, and the sum of the nanosecond times is also determined as the final nanosecond time value. Based on the final millisecond time value and the final nanosecond time value, the final trigger timestamp corresponding to each of the distributed power controllers is obtained.

[0007] According to a method for triggering a distributed power source provided by the present invention, the time synchronization interaction information includes a time-marking pulse and a host timestamp of the time synchronization master controller; the step of encapsulating each of the final trigger timestamps into a corresponding time synchronization protocol frame to obtain a target protocol frame corresponding to each of the distributed power source controllers includes: The time synchronization interaction information and the final trigger timestamp corresponding to each of the distributed power controllers are encapsulated together into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each of the distributed power controllers.

[0008] According to the distributed power source triggering method provided by the present invention, the independent delay triggering time parameters corresponding to each distributed power source controller are obtained based on the following steps: Receive parameter data packets sent by the configuration terminal; The parameter data packet is parsed to extract multiple delay time variables; The plurality of delay time variables are respectively determined as the independent delay trigger time parameters corresponding to each of the distributed power controllers.

[0009] According to a method for triggering a distributed power source provided by the present invention, before obtaining the final trigger timestamp corresponding to each of the distributed power source controllers based on the original trigger time and each of the independent delayed trigger time parameters, the method further includes: Using a preset high-frequency clock signal, multi-level clock synchronization processing is performed on each of the independent delay trigger time parameters to obtain the synchronization delay parameters corresponding to each of the distributed power controllers. Based on the original trigger time and each of the synchronization delay parameters, the final trigger timestamp corresponding to each of the distributed power controllers is obtained.

[0010] According to a method for triggering a distributed power source provided by the present invention, after sending each of the target protocol frames to the corresponding distributed power source controller, the method further includes: Receive a delay request frame sent by any of the distributed power controllers and record the receiving timestamp corresponding to the delay request frame; The timestamps of the target protocol frame, the delay request frame, and the reception timestamps corresponding to the distributed power controller are encapsulated together into the delay response frame corresponding to the distributed power controller. The delayed response frame is sent to the corresponding distributed power controller.

[0011] This invention provides a method for triggering a distributed power source, applied to a distributed power source controller, comprising the following steps: The system receives a target protocol frame sent by the time synchronization master controller. The target protocol frame contains time synchronization interaction information and encapsulates the final trigger timestamp corresponding to the distributed power controller. The final trigger timestamp is parsed from the target protocol frame; Based on the time synchronization interaction information, the local time is calibrated to obtain the calibrated local time; The calibration local time is compared with the final trigger timestamp. If the calibration local time matches the final trigger timestamp, a trigger pulse is generated.

[0012] According to a method for triggering a distributed power source provided by the present invention, the step of calibrating the local time based on the time synchronization interaction information to obtain a calibrated local time includes: Extract the transmission timestamp of the target protocol frame from the time synchronization interaction information, and record the reception timestamp of the target protocol frame; Send a delay request frame to the time synchronization master controller and record the timestamp of the delay request frame. Receive the delay response frame returned by the time synchronization master controller, and extract the received timestamp of the delay request frame from the delay response frame; The master-slave time difference is calculated based on the sending timestamp of the target protocol frame, the receiving timestamp of the target protocol frame, the sending timestamp of the delay request frame, and the receiving timestamp of the delay request frame. The local time is calibrated based on the master-slave time difference to obtain the calibrated local time.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a distributed power supply triggering method as described above.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the triggering method of the distributed power source as described above.

[0015] The distributed power supply triggering method, electronic device, and storage medium provided by this invention obtain the independent delay trigger time parameters corresponding to each distributed power supply controller to calculate the final trigger timestamp, accurately encapsulate it into the corresponding time synchronization protocol frame, and send it down. This realizes the independent calculation and transmission of the trigger time control information of each channel, thereby enabling flexible control of the delay trigger time of each power supply. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is one of the flowcharts illustrating the triggering method for distributed power sources provided by this invention.

[0018] Figure 2 This is a schematic diagram of the process for determining the final trigger timestamp corresponding to the distributed power controller provided by the present invention.

[0019] Figure 3 This is a schematic diagram of the process of responding to a delay request frame sent by a distributed power controller, as provided by the present invention.

[0020] Figure 4 This is the second flowchart illustrating the triggering method for distributed power sources provided by this invention.

[0021] Figure 5 This is a schematic diagram of the process for calibrating local time provided by the present invention.

[0022] Figure 6 This is a connection diagram of the distributed power triggering device provided by the present invention.

[0023] Figure 7 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0025] It should be noted that, in the description of this invention, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0026] Unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0027] To facilitate a full understanding of the technical solution of this application, the following content is hereby introduced: Particle accelerators are devices that accelerate charged particles. Distributed magnets and their associated excitation power supplies are the core components of these accelerators. The output of the excitation power supply is connected to the excitation coil of the magnet, providing an adjustable current to drive the magnet to generate a controllable magnetic field, thereby deflecting and manipulating the moving charged particles. Synchrotron accelerators are a branch of particle accelerators. A key characteristic of these accelerators is that the particle path is a fixed, elongated circular track. Particles must maintain a uniform speed along this track under the electromagnetic constraint of the accelerator, or undergo an acceleration process. During this process, charged particles gain energy through the electric field generated by the high-frequency cavity, while simultaneously changing their direction of motion through the magnetic field of the magnet.

[0028] For fast-cycle cyclotron accelerators, the energy of charged particles rapidly increases during the acceleration phase, requiring the magnetic field strength provided by the magnets to maintain a high rate of ascent. Simultaneously, flexible control of the current output from distributed power sources is crucial to ensure that the trajectory of charged particles precisely matches the accelerator's circular orbit. However, while existing solutions can achieve high-precision synchronous triggering, they have significant limitations: all distributed power sources can only trigger simultaneously, lacking the flexibility to independently control the trigger delay time of each source. In practical applications, such as during particle accelerator commissioning or operational optimization, it is often necessary to adjust the trigger time of specific power sources to adapt to changes in the magnetic field or particle energy curves. However, existing solutions lack control support for the independent trigger delay time of each distributed power source, resulting in insufficient system flexibility.

[0029] Therefore, this application provides a method for triggering distributed power sources, an electronic device, and a storage medium to solve the problem of insufficient system flexibility caused by the inability to flexibly control the delayed triggering time of each distributed power source in the prior art, and to achieve independent and flexible control over the triggering time of each distributed power source.

[0030] The following is combined with Figures 1-7 This invention describes the triggering method, electronic device, and storage medium for a distributed power source.

[0031] Figure 1 This is one of the flowcharts illustrating the triggering method for distributed power sources provided by this invention, such as... Figure 1 As shown, the execution subject of the distributed power supply triggering method provided by the present invention can be a time synchronization master controller. Unless otherwise specified, the time synchronization master controller will be used as an example in the following embodiments.

[0032] As an optional embodiment, the triggering method of this distributed power source mainly includes, but is not limited to, the following steps: Step 110: Obtain the system reference time and the independent delay trigger time parameters corresponding to each distributed power controller.

[0033] System reference time refers to the global reference clock information used to provide a time base for the entire distributed power system. For example, the system reference time can be obtained through an external high-precision clock source connected to the time synchronization master controller, or it can be obtained through a high-precision crystal oscillator inside the time synchronization master controller.

[0034] Independent delay trigger time parameters refer to the specific amount of time required for each distributed power controller to delay relative to a reference trigger time. For example, independent delay trigger time parameters can be values ​​input by the user according to actual commissioning requirements, representing the individual delay durations of multiple power supplies. The time synchronization master controller can communicate with an external power commissioning interface to receive the independent delay trigger time parameters corresponding to each distributed power controller from that interface.

[0035] Step 120: Determine the original trigger time based on the system reference time, and obtain the final trigger timestamp corresponding to each distributed power controller based on the original trigger time and each independent delay trigger time parameter.

[0036] The original trigger time refers to the initial reference trigger moment before any set delay time is added, that is, the moment corresponding to the reference pulse without a set delay time. For example, the original trigger time can be the basic time reference calculated by the control core of the time synchronization master controller based on the system reference time. This original trigger time can be determined by calculation using internal hardware logic modules in conjunction with the system reference time.

[0037] The final trigger timestamp refers to the exact moment when each distributed power controller actually generates a trigger pulse and executes a control action. For example, the final trigger timestamp can be a composite timestamp containing both millisecond and nanosecond time components. The final trigger timestamp for each distributed power controller can be determined by summing the original trigger time with the independent delay trigger time parameter corresponding to each distributed power controller.

[0038] Step 130: Generate time synchronization protocol frames corresponding to each distributed power controller. The time synchronization protocol frames contain time synchronization interaction information. Encapsulate each final trigger timestamp into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each distributed power controller.

[0039] A time synchronization protocol frame refers to a data message exchanged between the time synchronization master controller and the distributed power controller to achieve high-precision time base alignment. For example, a time synchronization protocol frame can be a synchronization frame and a follower frame built based on an improved IEEE-1588v2 protocol. It can be generated by the logic control core within the time synchronization master controller according to a preset communication protocol format.

[0040] It should be noted that the improved IEEE-1588v2 protocol refers to a communication protocol used between a time synchronization master controller and a distributed power controller. This protocol is used not only for high-precision time calibration but also to carry independent delay control information for each channel. For example, this improved protocol extends the functionality of the traditional protocol frame structure. The exchanged time synchronization protocol frames not only contain standard time synchronization interaction data such as the information exchange time for calculating the master-slave time difference, but also additionally embed the final trigger timestamp information calculated by the time synchronization master controller. Through this improved protocol, the master and slave can exchange protocol frames, for example, at a period of 1 millisecond, ensuring a trigger accuracy better than ±10 nanoseconds while accurately sending specific trigger control information to the corresponding distributed power controller.

[0041] Time synchronization interaction information refers to the core data used to calculate time deviations and perform local clock calibration between master and slave devices. For example, time synchronization interaction information may include time stamp pulses, host timestamps of the time synchronization master controller, and information exchange times.

[0042] A target protocol frame refers to a final data packet that further embeds instructions for controlling the independent delayed triggering of a specific power channel within the basic time synchronization message. For example, a target protocol frame can be a communication frame whose internal data payload carries both a final trigger millisecond timestamp and a final trigger nanosecond timestamp. This can be obtained by packaging and encapsulating the time synchronization interaction information and the final trigger timestamps corresponding to each distributed power controller into a corresponding modified IEEE-1588v2 protocol frame.

[0043] Step 140: Send each target protocol frame to the corresponding distributed power controller so that the distributed power controller can generate trigger pulses based on the target protocol frames.

[0044] Each target protocol frame can be sent to the corresponding distributed power controller via an independent physical communication link. For example, the time synchronization master controller can connect to an optical transceiver through its configured transmit port, using multimode optical fiber as the transmission medium, to send each target protocol frame to the receive port of each distributed power controller at a preset period, thereby realizing multi-channel parallel independent delay control information transmission.

[0045] The distributed power triggering method provided by this invention obtains the independent delay trigger time parameters corresponding to each distributed power controller to calculate the final trigger timestamp, accurately encapsulates it into the corresponding time synchronization protocol frame, and sends it down, thereby realizing the independent calculation and transmission of the trigger time control information of each channel, so as to flexibly control the delay trigger time of each power supply.

[0046] Figure 2 This is a schematic diagram of the process for determining the final trigger timestamp corresponding to the distributed power controller provided by the present invention, as shown below. Figure 2 As shown, as another optional embodiment provided by the present invention, the final trigger timestamp corresponding to each distributed power controller is obtained based on the original trigger time and each independent delay trigger time parameter, including but not limited to the following steps: Step 210: Obtain the original millisecond time value and the original nanosecond time value of the original trigger time.

[0047] Specifically, after calculating the original trigger time through its internal control core, the time synchronization master controller decomposes the original trigger time into millisecond and nanosecond values ​​to facilitate high-precision delay calculations. For example, the time synchronization master controller obtains the millisecond portion of the original trigger time as the original millisecond time value and the nanosecond portion as the original nanosecond time value.

[0048] Step 220: Sum the original nanosecond time value with the corresponding independent delay trigger time parameter to obtain the nanosecond time sum value.

[0049] Specifically, the independent delay time, represented in nanoseconds, is added to the decomposed nanosecond-level base trigger time to calculate the overall nanosecond time span under that delay setting. For example, the calculation module adds the original nanosecond time value to the independent delay trigger time parameter of a certain distributed power controller to obtain the corresponding nanosecond time sum.

[0050] Step 230: If the sum of nanosecond times is greater than or equal to the carry threshold, then the original millisecond time value is increased by the target carry value to obtain the final millisecond time value, and the sum of nanosecond times is subtracted from the carry threshold to obtain the final nanosecond time value.

[0051] For example, the carry threshold could be 1,000,000 nanoseconds, or 1 millisecond, and the target carry value could be 1.

[0052] Specifically, it is determined whether the nanosecond time span obtained by the summation exceeds the boundary order of carrying over to milliseconds. If it does, a carry operation needs to be performed on the millisecond portion, and the nanosecond time corresponding to the carry is subtracted from the nanosecond summation. For example, if the nanosecond time summation value is greater than or equal to 1,000,000, then 1 is added to the original millisecond time value to obtain the final millisecond time value. At this time, the final nanosecond time value is equal to the nanosecond time summation value minus 1,000,000.

[0053] Step 240: If the sum of nanosecond times is less than the carry threshold, then the original millisecond time value is determined as the final millisecond time value, and the sum of nanosecond times is determined as the final nanosecond time value.

[0054] Specifically, if the calculated sum of nanosecond times has not yet reached the numerical standard for generating a carry-over to milliseconds, the original millisecond time span does not need to be changed, and the sum of nanosecond times is directly used as the final nanosecond-level trigger time value. For example, if the sum of nanosecond times is less than 1,000,000, it means that no carry-over is generated, the final millisecond time value is equal to the original millisecond time value, and the final nanosecond time value is equal to the sum of nanosecond times.

[0055] Step 250: Based on the final millisecond time value and the final nanosecond time value, obtain the final trigger timestamp corresponding to each distributed power controller.

[0056] Specifically, the millisecond and nanosecond portions obtained after carry logic processing are reassembled to generate complete composite timestamp data that can be used for time synchronization control. For example, the time synchronization master controller integrates the final millisecond and final nanosecond time values ​​to generate a final trigger timestamp used to embed time synchronization protocol frames and send them to the corresponding slave devices to control their precise delayed triggering.

[0057] The distributed power supply triggering method provided by this invention obtains the original millisecond time value and the original nanosecond time value of the original trigger time respectively, and performs precise carry judgment and processing after summing the original nanosecond time value with the independent delay trigger time parameter, thereby obtaining the final millisecond time value and the final nanosecond time value. This enables precise delay calculation and adjustment at the nanosecond level for each channel, effectively avoiding data overflow and precision loss during high-precision time superposition. Thus, while ensuring independent control of each distributed power supply, it further ensures the high precision of delay triggering for each power supply.

[0058] In another embodiment provided by the present invention, the time synchronization interaction information includes a time-marking pulse and a host timestamp of the time synchronization master controller; each final trigger timestamp is encapsulated into a corresponding time synchronization protocol frame to obtain a target protocol frame corresponding to each distributed power controller, including: encapsulating the time synchronization interaction information and the final trigger timestamps corresponding to each distributed power controller into a corresponding time synchronization protocol frame to obtain a target protocol frame corresponding to each distributed power controller.

[0059] A time-marking pulse refers to a reference pulse signal used to indicate the starting point of high-precision time alignment. For example, a time-marking pulse can be a synchronization pulse included in the frame header of a time synchronization protocol frame to mark the precise transmission time of a data packet.

[0060] The host timestamp refers to the high-precision local time value recorded by the time synchronization master controller when generating and sending the protocol frame. For example, the host timestamp can be the specific absolute time value of the system reference time obtained by the high-precision clock inside the time synchronization master controller at the current sending moment.

[0061] Specifically, when communicating with the distributed power controller, the time synchronization master controller integrates the data used for reference time alignment and the data used to control the independent delay triggering of each channel into a single message for transmission. For example, the time synchronization master controller can send a data message containing synchronization and follow frames every 1 millisecond, and include a time stamp pulse and a host timestamp in the frame header of the data message. At the same time, the final trigger timestamp calculated for the specific distributed power controller is encapsulated into the time synchronization protocol frame, thus obtaining the target protocol frame to be sent to the corresponding distributed power controller.

[0062] The distributed power supply triggering method provided by this invention encapsulates the time synchronization interaction information, including time-marked pulses and the host timestamp of the time synchronization master controller, and the final trigger timestamp of each distributed power supply controller into the corresponding time synchronization protocol frame. This enables the integrated transmission of time calibration reference data and channel-independent delay control commands within the same frame. While simplifying the communication interaction process between master and slave devices and improving data communication efficiency, it ensures efficient coordination between the time synchronization process and delay control operation, thereby further guaranteeing the stability and reliability of high-precision triggering of multi-channel distributed power supplies.

[0063] In another embodiment of the present invention, the independent delay trigger time parameters corresponding to each distributed power controller are obtained based on the following steps: receiving parameter data packets sent by the configuration terminal; parsing the parameter data packets to extract multiple delay time variables; and determining the multiple delay time variables as the independent delay trigger time parameters corresponding to each distributed power controller.

[0064] A configuration terminal refers to an external device or operating platform through which users configure and distribute power delay time parameters. For example, a configuration terminal can be an external power debugging interface that can establish a communication connection with the time synchronization master controller via User Datagram Protocol (UDP).

[0065] A parameter data packet refers to a communication data message that contains the independent delay trigger time information of multiple power supplies. For example, a parameter data packet can be a data set generated and sent after the user inputs the delay trigger time parameters of multiple power supplies into the corresponding delay trigger time parameter module of the configuration terminal.

[0066] The delay time variable refers to the specific delay time value corresponding to each distributed power controller, which is parsed from the parameter data packet. For example, a series of variables such as writea0, writea1, and writea2 can be obtained by parsing the parameter data packet according to the corresponding transmit and receive protocol through the parsing module inside the time synchronization master controller.

[0067] Specifically, the time synchronization master controller receives a parameter data packet containing power delay information sent by the configuration terminal, and uses the parsing module to parse the parameter data packet, extracting multiple delay time variables corresponding to multiple power supplies such as power supply 1 and power supply 2, and then converting these variables into a form that the calculation module can receive. For example, the parsed delay time variables such as writea0 and writea1 are assigned to write[0], write[1] to write[i] respectively, and write[0], write[1] to write[i] are used as the independent delay trigger time parameters corresponding to each distributed power controller in the delay calculation module, thereby realizing the flexible configuration and distribution of the delay trigger time of each power supply.

[0068] The distributed power triggering method provided by this invention receives parameter data packets sent by a configuration terminal and parses the parameter data packets to extract multiple delay time variables corresponding to each distributed power controller. This enables centralized distribution and convenient configuration of delay time parameters for multiple distributed power sources, thereby effectively improving the flexibility of parameter settings and the efficiency of on-site debugging for large-scale distributed power systems.

[0069] In another embodiment of the present invention, before obtaining the final trigger timestamp corresponding to each distributed power controller based on the original trigger time and each independent delay trigger time parameter, the method further includes: using a preset high-frequency clock signal to perform multi-level clock synchronization processing on each independent delay trigger time parameter to obtain the synchronization delay parameter corresponding to each distributed power controller; and obtaining the final trigger timestamp corresponding to each distributed power controller based on the original trigger time and each synchronization delay parameter.

[0070] The preset high-frequency clock signal refers to the digital clock signal that provides the basic operation cycle and high-precision time resolution for the internal logic circuit modules of the system. For example, the preset high-frequency clock signal can be a 200MHz clock signal provided for the digital circuit of the module.

[0071] Multi-level clock synchronization processing refers to multiple register pausing operations performed to eliminate metastability that may be caused by cross-clock domain transmission or external input signals. For example, the stability of data in high-speed logic operations can be ensured by continuously performing three-level synchronization operations on each input delay variable.

[0072] The synchronization delay parameter refers to the stable and reliable delay time value output after multi-level clock synchronization processing. For example, the synchronization delay parameter write_sync3[i] can be obtained by the calculation module after processing the input independent delay trigger time parameter through internal clock synchronization.

[0073] Specifically, before incorporating the externally input independent delay trigger time parameters into the timestamp accumulation calculation, in order to prevent asynchronous signals from causing errors in the logic judgment inside the field-programmable gate array, a high-frequency clock is used as a reference to synchronize these parameters. For example, when the calculation module performs corresponding calculations for the input independent delay trigger time parameters such as write[0], write[1] to write[i], it first performs a three-level synchronization operation on write[0], write[1] to write[i] to ensure stability, thereby obtaining the corresponding synchronization delay parameter write_sync3[i]. Then, the nanosecond part of the original trigger time is added to the synchronization delay parameter write_sync3[i] to perform subsequent carry judgment and accurate generation of the final trigger timestamp.

[0074] The distributed power triggering method provided by this invention utilizes a preset high-frequency clock signal to perform multi-level clock synchronization processing on each independent delayed trigger time parameter before calculating the final trigger timestamp to obtain the synchronization delay parameters corresponding to each distributed power controller. This effectively eliminates unstable factors such as metastability that may be introduced by external input signals, ensures the stability of input delay time data during underlying logic calculations, and further ensures the absolute accuracy of the final nanosecond-level trigger timestamp calculation, avoiding high-precision trigger timing deviations caused by asynchronous signals.

[0075] Figure 3 This is a flowchart illustrating the process of responding to a delay request frame sent by a distributed power controller, as provided by the present invention. Figure 3 As shown, in another optional embodiment provided by the present invention, after sending each target protocol frame to the corresponding distributed power controller, the following steps are included, but are not limited to: Step 310: Receive a delay request frame sent by any distributed power controller and record the receiving timestamp corresponding to the delay request frame.

[0076] Specifically, after sending the target protocol frame, the time synchronization master controller waits to receive request messages from each slave device to measure network latency, and records the precise arrival time of the request message the instant it is received. For example, the time synchronization master controller receives a delay request frame (Delay_Request frame) sent by a distributed power controller, and records the timestamp of the delay request frame's arrival at the master, i.e., time t4, with the help of an internal high-precision clock.

[0077] Step 320: Encapsulate the sending timestamp of the target protocol frame, the sending timestamp of the delay request frame, and the receiving timestamp of the receiver into the delay response frame corresponding to the distributed power controller.

[0078] Specifically, the time synchronization master controller summarizes and packages the key time node data generated during this round of communication interaction between the master and slave devices, so as to send it to the slave device for closed-loop calculation of clock deviation. For example, the time synchronization master controller encapsulates the master timestamp of sending the target protocol frame (i.e., the sending timestamp t1 of the target protocol frame), the receiving timestamp t2 of the target protocol frame, the sending timestamp t3 of the delay request frame sent by the slave device, and the receiving timestamp t4 of the delay request frame recorded by the time synchronization master controller itself into the corresponding delay response frame of the distributed power controller, namely the Delay_Response frame.

[0079] Step 330: Send the delayed response frame to the corresponding distributed power controller.

[0080] Specifically, the time synchronization master controller sends a packaged response message containing various interaction timestamps back to the distributed power controller that issued the request via a physical communication channel. For example, the time synchronization master controller sends a delayed response frame containing various timestamp information to the corresponding distributed power controller via an optoelectronic communication channel, so that the controller can parse these timestamp data and calculate the master-slave time difference.

[0081] Considering that high-precision triggering depends on the absolute consistency of the time base between master and slave devices, and that there is inevitably a signal transmission delay in the physical communication link, this invention dynamically measures and compensates for master-slave communication delay by bidirectionally interacting with time synchronization protocol frames between master and slave devices and accurately recording the send and receive timestamps. This enables nanosecond-level master-slave time synchronization calibration, providing a solid and reliable high-precision time foundation for the accurate execution of subsequent independent delay control commands for each channel.

[0082] The distributed power triggering method provided by this invention receives a delay request frame sent by any distributed power controller and records the corresponding receiving timestamp. Then, it encapsulates the sending timestamp of the target protocol frame, the sending timestamp of the delay request frame, and the receiving timestamp into a delay response frame and sends it to the corresponding distributed power controller. This provides complete and accurate time reference data for the distributed power controller to accurately calculate the master-slave time difference and calibrate the local time. This effectively measures and dynamically compensates for the physical communication delay between master and slave devices. Based on the independent delay control of each channel, it further ensures the nanosecond-level high precision and high reliability of the system's underlying time synchronization.

[0083] Figure 4 This is a second flowchart illustrating the triggering method for distributed power sources provided by this invention, as shown below. Figure 4 As shown, the execution entity of the distributed power source triggering method provided by the present invention can be a distributed power source controller. As an optional embodiment, the distributed power source triggering method mainly includes, but is not limited to, the following steps: Step 410: Receive the target protocol frame sent by the time synchronization master controller. The target protocol frame contains time synchronization interaction information and encapsulates the final trigger timestamp corresponding to the distributed power controller.

[0084] Specifically, the distributed power controller listens for and receives data packets sent by the host through a communication receiving channel. For example, the distributed power controller receives a target protocol frame containing a synchronization frame and a follow frame sent by the time synchronization master controller at a preset period. The header of the target protocol frame contains time synchronization interaction information such as time stamp pulses and host timestamps, and carries the final trigger timestamp sent by the host.

[0085] Step 420: Parse the final trigger timestamp from the target protocol frame.

[0086] Specifically, after receiving a data packet, the logic control module inside the distributed power controller parses the packet content according to the improved protocol format and extracts the trigger control data specifically for that particular channel. For example, the field-programmable gate array of the distributed power controller parses the target protocol frame, obtains the final trigger timestamp contained therein, and saves it in a local register for later use.

[0087] Step 430: Based on the time synchronization interaction information, calibrate the local time to obtain the calibrated local time.

[0088] Specifically, the distributed power controller uses key transmission and reception time nodes recorded when master and slave devices exchange messages to calculate the latency difference caused by the physical communication link, and uses this difference to compensate for the local high-precision clock. For example, the distributed power controller uses the timestamp information of message transmission and reception to calculate the master-slave time difference, and calibrates its own local time according to the master-slave time difference, thereby achieving high-precision time synchronization at the nanosecond level and obtaining the calibrated local time.

[0089] Step 440: Compare the calibrated local time with the final trigger timestamp. If the calibrated local time matches the final trigger timestamp, a trigger pulse is generated.

[0090] Specifically, the time synchronization logic unit in the distributed power controller monitors the local absolute time value after compensation and calibration in real time, and accurately compares it with the previously parsed delay trigger target time. When the time reaches the set consistency node, the corresponding action is triggered immediately. For example, the distributed power controller compares the calibrated local time with the final trigger timestamp. When the two match perfectly, a trigger pulse with an independent and controllable delay is generated, and then the distributed power closed-loop output of the preset current waveform is controlled after the rising edge of the trigger pulse.

[0091] The distributed power supply triggering method provided by this invention receives and parses a target protocol frame containing a final trigger timestamp and time synchronization interaction information sent by a time synchronization master controller. Then, it calibrates the local time based on the time synchronization interaction information and generates a trigger pulse when the calibrated local time matches the final trigger timestamp. This method can accurately receive and execute independent delayed trigger commands at the distributed power supply controller. While ensuring nanosecond-level high-precision time synchronization, it realizes the independent physical execution of trigger actions for each channel. In conjunction with the time synchronization master controller, it effectively solves the defect that all power supplies can only be triggered simultaneously, thereby greatly improving the system flexibility of delayed trigger control for each distributed power supply.

[0092] Figure 5 This is a schematic diagram of the process for calibrating local time provided by the present invention, as shown below. Figure 5 As shown, as another optional embodiment provided by the present invention, the local time is calibrated based on time synchronization interaction information to obtain a calibrated local time, including but not limited to the following steps: Step 510: Extract the sending timestamp of the target protocol frame from the time synchronization interaction information, and record the receiving timestamp of the target protocol frame.

[0093] Specifically, when the distributed power controller receives a data packet containing synchronization interaction information, it parses out the exact time when the host sent the frame and simultaneously records the exact time when the frame arrived at the slave device using its own underlying hardware. For example, the distributed power controller extracts the host's timestamp from the received target protocol frame as the target protocol frame's sending timestamp t1, and records its local receiving timestamp t2 when receiving the target protocol frame.

[0094] Step 520: Send a delay request frame to the time synchronization master controller and record the sending timestamp of the delay request frame.

[0095] Specifically, in order to measure the round-trip delay of signal transmission between master and slave devices, the distributed power controller proactively sends a time measurement request packet to the time synchronization master controller and accurately records the moment when the request packet leaves the local network interface. For example, the distributed power controller sends a delay request frame, namely the Delay_Request frame, to the time synchronization master controller and records the transmission timestamp t3 when the delay request frame leaves the slave device.

[0096] Step 530: Receive the delay response frame returned by the time synchronization master controller, and extract the received timestamp of the delay request frame from the delay response frame.

[0097] Specifically, the distributed power controller receives the acknowledgment message returned by the time synchronization master controller in response to the aforementioned request packet, and parses it to extract the precise recorded time when the host received the request packet. For example, the distributed power controller receives the delay response frame, i.e., the Delay_Response frame, from the time synchronization master controller, and extracts the timestamp t4 recorded by the host when the delayed request frame arrived at the host.

[0098] Step 540: Calculate the master-slave time difference based on the sending timestamp of the target protocol frame, the receiving timestamp of the target protocol frame, the sending timestamp of the delay request frame, and the receiving timestamp of the delay request frame.

[0099] Specifically, the distributed power controller utilizes the four key time points collected during the aforementioned communication interaction process to eliminate the symmetrical delay caused by physical line transmission through a time compensation algorithm, thereby determining the true deviation between the local clock and the system reference clock. For example, based on the extracted and recorded timestamps t1 (send), t2 (receive), t3 (send), and t4 (receive) of the target protocol frame, the distributed power controller calculates the master-slave time difference Δt = 0.5 × (t2 + t3 - t1 - t4).

[0100] Step 550: The local time is calibrated based on the master-slave time difference to obtain the calibrated local time.

[0101] Specifically, the distributed power controller compensates and adjusts its internally maintained high-precision clock based on the calculated clock deviation, ensuring that the local time base is perfectly aligned with the host system reference time. For example, the distributed power controller uses the calculated master-slave time difference to dynamically compensate for and calibrate the local clock, avoiding accumulated crystal oscillator errors and ensuring system time accuracy, thereby obtaining nanosecond-level high-precision calibrated local time.

[0102] As an optional embodiment, this application adopts an FPGA hardware multiplier and divider optimization design in the process of performing time deviation calculation, clock synchronization processing and final trigger timestamp calculation, thereby effectively solving the timing violations and accuracy loss problems that may be caused by complex floating-point operations in traditional solutions.

[0103] The distributed power triggering method provided by this invention extracts the transmission timestamp of the target protocol frame from the time synchronization interaction information and records the reception timestamp of the target protocol frame. It then sends a delay request frame to the time synchronization master controller and records the transmission timestamp of the delay request frame. The method receives the delay response frame returned by the time synchronization master controller and extracts the reception timestamp of the delay request frame from the delay response frame. Based on the above four transmission and reception timestamps, the master-slave time difference is calculated, and the local time is calibrated based on the master-slave time difference to obtain the calibrated local time. This method can accurately measure and dynamically compensate for the round-trip transmission delay of the communication link between the master and slave devices, effectively eliminating the time error caused by the communication process. This achieves high-precision time synchronization at the nanosecond level at the slave end, providing a solid and reliable underlying time reference for the independent and controllable precise delay triggering of each distributed power source.

[0104] Figure 6 This is a connection diagram of the distributed power supply triggering device provided by the present invention, as shown below. Figure 6 As shown, the distributed power triggering device adopts a master-slave control architecture, mainly including a time synchronizer (master) and multiple power controllers (slave) that are connected to it in communication.

[0105] At the input end, the time synchronizer (master) is connected to both an external clock source and a host computer configuration terminal. The master obtains a high-precision system reference time by receiving signals from the external clock source; simultaneously, it receives user-defined multi-channel power delay time parameters (i.e., independent delay trigger time parameters corresponding to each slave device). The time synchronizer (master) integrates a Field Programmable Gate Array (FPGA) control core. This FPGA control core is used to independently calculate the final trigger timestamp for each channel based on the aforementioned system reference time and power delay time, and is responsible for generating and encapsulating time synchronization protocol frames.

[0106] Regarding communication connectivity, the time synchronizer (host) is equipped with multi-channel fiber optic transceiver interfaces. Figure 6 The diagram shows the master's receive pins RX1, RX2, RX3 and transmit pins TX1, TX2, TX3. Correspondingly, each power controller (slave) also has a corresponding transceiver interface (e.g., Figure 6 The slave devices are TX1 / RX1, TX2 / RX2, and TX3 / RX3. The master's transmit pin is connected to the corresponding slave's receive pin, and the master's receive pin is connected to the corresponding slave's transmit pin, thus establishing an independent bidirectional communication channel between the master and each slave for transmitting target protocol frames containing time synchronization interaction information and the final trigger timestamp. The ellipsis (...) indicates that this distributed power triggering device supports flexible expansion with multiple channels; the number of photoelectric channels of the master determines the upper limit of controllable slaves.

[0107] It should be noted that when the time synchronization master controller communicates with each distributed power controller by establishing a bidirectional communication channel using multimode optical fiber, the type and length of the multimode optical fiber used for receiving and transmitting are the same.

[0108] At the output execution end, each power controller (slave) has an independent built-in slave FPGA control core. The slave FPGA is responsible for parsing the received protocol frames, calibrating the local time, and generating a high-precision trigger pulse when the calibrated local time matches the final trigger timestamp. The output of each power controller (slave) is connected to its corresponding underlying physical power supply (e.g., ...). Figure 6 (Power supply 1, power supply 2, and power supply 3 in the system). When the slave FPGA generates a trigger pulse, it can drive the corresponding power supply 1, power supply 2, or power supply 3 to output a preset current waveform, thereby realizing multi-channel independent controllable delay triggering of the entire distributed power system.

[0109] As an optional embodiment, each independent power supply corresponds to a timing calibration logic circuit module (i.e., the master module) in the time synchronization master controller and a timing calibration logic circuit module (i.e., the slave module) in the distributed power controller. The FPGA of the time synchronization master controller contains multiple identical and independently operating master modules, while the FPGA of the distributed power controller contains only one slave module. It should be noted that while the FPGA of the distributed power controller generates trigger pulses, it also performs current closed-loop control on the distributed power supply. These two parts are completed by two separate logic circuits within the FPGA, and are relatively independent in design. Furthermore, the input signals for the aforementioned master and slave modules also include a reset signal, which is used to reset the logic circuits.

[0110] Figure 7 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 7 As shown, the electronic device may include a processor 710, a communications interface 720, a memory 730, and a communication bus 740. The processor 710, communications interface 720, and memory 730 communicate with each other via the communication bus 740. The processor 710 can call logic instructions in the memory 730 to execute a distributed power supply triggering method. This method includes: obtaining the system reference time and the independent delay triggering time parameters corresponding to each distributed power supply controller; determining the original triggering time based on the system reference time; obtaining the final triggering timestamp corresponding to each distributed power supply controller based on the original triggering time and the independent delay triggering time parameters; generating a time synchronization protocol frame corresponding to each distributed power supply controller, the time synchronization protocol frame containing time synchronization interaction information; encapsulating each final triggering timestamp into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each distributed power supply controller; and sending each target protocol frame to the corresponding distributed power supply controller.

[0111] Furthermore, the logical instructions in the aforementioned memory 730 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0112] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the distributed power triggering method provided by the above methods. The method includes: obtaining a system reference time and independent delay triggering time parameters corresponding to each distributed power controller; determining an original triggering time based on the system reference time; obtaining a final triggering timestamp corresponding to each distributed power controller based on the original triggering time and each independent delay triggering time parameter; generating a time synchronization protocol frame corresponding to each distributed power controller, the time synchronization protocol frame containing time synchronization interaction information; encapsulating each final triggering timestamp into the corresponding time synchronization protocol frame to obtain a target protocol frame corresponding to each distributed power controller; and sending each target protocol frame to the corresponding distributed power controller.

[0113] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements a method for triggering a distributed power source provided by the methods described above. The method includes: obtaining a system reference time and independent delay trigger time parameters corresponding to each distributed power source controller; determining an original trigger time based on the system reference time; obtaining a final trigger timestamp corresponding to each distributed power source controller based on the original trigger time and each independent delay trigger time parameter; generating a time synchronization protocol frame corresponding to each distributed power source controller, the time synchronization protocol frame containing time synchronization interaction information; encapsulating each final trigger timestamp into a corresponding time synchronization protocol frame to obtain a target protocol frame corresponding to each distributed power source controller; and sending each target protocol frame to its corresponding distributed power source controller.

[0114] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0115] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0116] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for triggering a distributed power source, characterized in that, Applications to time synchronization master controllers include: Obtain the system reference time and the independent delay trigger time parameters corresponding to each distributed power controller; The original trigger time is determined based on the system reference time, and the final trigger timestamp corresponding to each of the distributed power controllers is obtained according to the original trigger time and each of the independent delay trigger time parameters. Generate a time synchronization protocol frame corresponding to each of the distributed power controllers, the time synchronization protocol frame containing time synchronization interaction information; encapsulate each of the final trigger timestamps into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each of the distributed power controllers; Each of the target protocol frames is sent to the corresponding distributed power controller, so that the distributed power controller can generate a trigger pulse based on the target protocol frame.

2. The method for triggering a distributed power source according to claim 1, characterized in that, The step of obtaining the final trigger timestamp corresponding to each of the distributed power controllers based on the original trigger time and each of the independent delay trigger time parameters includes: Obtain the original millisecond and original nanosecond time values ​​of the original trigger time; The original nanosecond time value is summed with the corresponding independent delay trigger time parameter to obtain the nanosecond time summation value; If the sum of the nanosecond times is greater than or equal to the carry threshold, then the original millisecond time value is increased by the target carry value to obtain the final millisecond time value, and the sum of the nanosecond times is subtracted from the carry threshold to obtain the final nanosecond time value. If the sum of the nanosecond times is less than the carry threshold, then the original millisecond time value is determined as the final millisecond time value, and the sum of the nanosecond times is also determined as the final nanosecond time value. Based on the final millisecond time value and the final nanosecond time value, the final trigger timestamp corresponding to each of the distributed power controllers is obtained.

3. The method for triggering a distributed power source according to claim 1, characterized in that, The time synchronization interaction information includes a time-marking pulse and a host timestamp of the time synchronization master controller; the step of encapsulating each of the final trigger timestamps into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each of the distributed power controllers includes: The time synchronization interaction information and the final trigger timestamp corresponding to each of the distributed power controllers are encapsulated together into the corresponding time synchronization protocol frame to obtain the target protocol frame corresponding to each of the distributed power controllers.

4. The method for triggering a distributed power source according to claim 1, characterized in that, The independent delay trigger time parameters for each distributed power controller are obtained based on the following steps: Receive parameter data packets sent by the configuration terminal; The parameter data packet is parsed to extract multiple delay time variables; The plurality of delay time variables are respectively determined as the independent delay trigger time parameters corresponding to each of the distributed power controllers.

5. The method for triggering a distributed power source according to claim 1, characterized in that, Before obtaining the final trigger timestamp corresponding to each of the distributed power controllers based on the original trigger time and each of the independent delay trigger time parameters, the method further includes: Using a preset high-frequency clock signal, multi-level clock synchronization processing is performed on each of the independent delay trigger time parameters to obtain the synchronization delay parameters corresponding to each of the distributed power controllers. Based on the original trigger time and each of the synchronization delay parameters, the final trigger timestamp corresponding to each of the distributed power controllers is obtained.

6. The method for triggering a distributed power source according to claim 1, characterized in that, After sending each of the target protocol frames to the corresponding distributed power controller, the method further includes: Receive a delay request frame sent by any of the distributed power controllers and record the receiving timestamp corresponding to the delay request frame; The timestamps of the target protocol frame, the delay request frame, and the reception timestamps corresponding to the distributed power controller are encapsulated together into the delay response frame corresponding to the distributed power controller. The delayed response frame is sent to the corresponding distributed power controller.

7. A method for triggering a distributed power source, characterized in that, Applications in distributed power controllers include: The system receives a target protocol frame sent by the time synchronization master controller. The target protocol frame contains time synchronization interaction information and encapsulates the final trigger timestamp corresponding to the distributed power controller. The final trigger timestamp is parsed from the target protocol frame; Based on the time synchronization interaction information, the local time is calibrated to obtain the calibrated local time; The calibration local time is compared with the final trigger timestamp. If the calibration local time matches the final trigger timestamp, a trigger pulse is generated.

8. The method for triggering a distributed power source according to claim 7, characterized in that, The step of calibrating the local time based on the time synchronization interaction information to obtain a calibrated local time includes: Extract the transmission timestamp of the target protocol frame from the time synchronization interaction information, and record the reception timestamp of the target protocol frame; Send a delay request frame to the time synchronization master controller and record the timestamp of the delay request frame. Receive the delay response frame returned by the time synchronization master controller, and extract the received timestamp of the delay request frame from the delay response frame; The master-slave time difference is calculated based on the sending timestamp of the target protocol frame, the receiving timestamp of the target protocol frame, the sending timestamp of the delay request frame, and the receiving timestamp of the delay request frame. The local time is calibrated based on the master-slave time difference to obtain the calibrated local time.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the triggering method of the distributed power source as described in any one of claims 1 to 6, or implements the triggering method of the distributed power source as described in any one of claims 7 to 8.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the triggering method of the distributed power source as described in any one of claims 1 to 6, or implements the triggering method of the distributed power source as described in any one of claims 7 to 8.

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