Structure for improving ferroelectric characteristics of hzo memory device and manufacturing method thereof

Abstract

The application discloses a structure for improving ferroelectric characteristics of an HZO memory device and a manufacturing method thereof. The structure for improving ferroelectric characteristics of the HZO memory device comprises a substrate, a bottom electrode W formed on the substrate, a WO x interface layer formed on the upper portion of the bottom electrode W, an HZO ferroelectric layer formed on the WOx interface layer, and a top electrode W formed on the HZO ferroelectric layer in a spaced manner. x The WOx interface layer serves as a buffer and sacrifice layer for oxygen diffusion and inhibits oxygen scavenging effect of the bottom electrode on the HZO ferroelectric layer.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit manufacturing technology, and specifically to a structure and its fabrication method for improving the ferroelectric properties of HZO memory devices. Background Technology

[0002] As integrated circuit technology advances towards the nanoscale, ferroelectric memories and transistors based on novel ferroelectric materials (such as HZO) have become core candidates for next-generation non-volatile memory and logic devices due to their compatibility with standard CMOS processes, high read / write speeds, low power consumption, and excellent miniaturization potential. Constructing high-performance HZO ferroelectric devices is fundamental to realizing high-density storage and neuromorphic computing. However, the actual performance of such devices is severely limited by the characteristics at their electrode interfaces. Obtaining HZO thin films with high remanent polarization, high reliability, and uniform performance is a critical problem that urgently needs to be solved in this field.

[0003] In typical stacked structures of ferroelectric devices with HZO electrodes, tungsten is commonly used as the bottom electrode. However, research has revealed a strong "oxygen scavenging effect": during the deposition and subsequent annealing and crystallization of the HZO thin film, tungsten removes oxygen atoms from adjacent HZO layers, forming an oxygen-deficient, non-ferroelectric interface layer at the interface, and potentially introducing defects such as oxygen vacancies within the HZO. This directly leads to severe degradation of ferroelectric performance, manifested as decreased remanent polarization, device fatigue, and degraded retention characteristics. This oxygen scavenging effect has become a fundamental bottleneck restricting the performance and reliability of HZO devices using tungsten electrodes. Summary of the Invention

[0004] This invention relates to an HZO ferroelectric memory structure based on MFM. To mitigate the oxygen scavenging effect of the electrodes, a simple method is proposed to effectively suppress the oxygen scavenging effect of the W electrode without significantly altering the existing process framework or introducing heterogeneous complex interfaces. Through a pretreatment process of the electrodes, a WOx interface buffer layer is obtained, which significantly enhances the remanent polarization, fatigue, and retention characteristics of the HZO ferroelectric memory device.

[0005] Specifically, this invention discloses a structure for improving the ferroelectric properties of HZO memory devices, comprising: a substrate; a bottom electrode W formed on the substrate; and WO. x An interface layer is formed on the upper part of the bottom electrode W; an HZO ferroelectric layer is formed on the WOx interface layer; and a top electrode W is formed at intervals on the HZO ferroelectric layer; wherein, the WOx... x The interface layer acts as a buffer and sacrificial layer for oxygen diffusion, suppressing the oxygen removal effect of the bottom electrode on the upper HZO ferroelectric layer.

[0006] In the structure for improving the ferroelectric properties of HZO memory devices of the present invention, preferably, the WO xThe thickness of the interface layer is 28.5nm~272nm.

[0007] In the structure for improving the ferroelectric properties of HZO memory devices of the present invention, preferably, the thickness of the HZO ferroelectric layer is 10 nm.

[0008] This invention also discloses a method for fabricating a structure to improve the ferroelectric properties of HZO memory devices, comprising the following steps: growing a bottom electrode W on a substrate; and performing rapid thermal annealing on the bottom electrode W in an oxygen atmosphere to thermally oxidize the upper part of the bottom electrode W to form WO. x An interface layer; an HZO ferroelectric layer is grown on the bottom electrode W; a spaced-out top electrode W is formed on the HZO ferroelectric layer; rapid thermal annealing is performed in a nitrogen atmosphere, wherein the WO x The interface layer acts as a buffer and sacrificial layer for oxygen diffusion, suppressing the oxygen removal effect of the bottom electrode on the upper HZO ferroelectric layer.

[0009] In the method for fabricating the structure that improves the ferroelectric properties of HZO memory devices according to the present invention, it is preferable that the annealing temperature for rapidly thermally annealing the bottom electrode W in an oxygen atmosphere is 400°C to 600°C.

[0010] In the method for fabricating a structure to improve the ferroelectric properties of HZO memory devices according to the present invention, preferably, the thickness of the HZO ferroelectric layer is 10 nm. Attached Figure Description

[0011] Figure 1 This is a flowchart of a method for fabricating a structure that improves the ferroelectric properties of HZO memory devices through a tungsten oxide interface layer.

[0012] Figures 2-6 This is a schematic diagram of the various stages of the fabrication method for improving the ferroelectric properties of HZO memory devices through a tungsten oxide interface layer. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining this invention and are not intended to limit this invention. The described embodiments are merely some embodiments of this invention, not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0014] In the description of this invention, it should be noted that the terms "upper," "lower," "vertical," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0015] Furthermore, many specific details of the invention, such as the structure, materials, dimensions, processing techniques, and methods of the device, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without adhering to these specific details. Unless specifically indicated below, various parts of the device may be made of materials known to those skilled in the art, or may employ materials with similar functionality developed in the future.

[0016] Figure 1 This is a method for fabricating structures that improve the ferroelectric properties of HZO memory devices through a tungsten oxide interface layer. For example... Figure 1 As shown, the fabrication method of the structure for improving the ferroelectric properties of HZO memory devices includes the following steps:

[0017] Step S1, as follows Figure 2 As shown, a silicon wafer 100 with a surface covered by 300nm thick SiO2101 was used as a substrate, and the substrate was ultrasonically cleaned.

[0018] Step S2: A bottom electrode W102 with a thickness of 70-80 nm is grown by PVD, and the resulting structure is as follows. Figure 3 As shown.

[0019] Step S3: Pre-treat the bottom electrode W102 in an oxygen atmosphere in a rapid thermal annealing furnace to obtain WO x Interface layer 103, the resulting structure is as follows Figure 4 As shown. The formed WO x The thickness of the interface layer ranges from 28.5 nm to 272 nm, and x ranges from 2 to 3.

[0020] The thermal oxidation temperature was between 400℃ and 600℃, and the time was 100 seconds. Controllable WO3 was obtained by changing the temperature. x Interface layer 103; Too low an oxidation temperature is insufficient to cause interface oxidation, while too high an oxidation temperature will cause the bottom interface to be completely oxidized into non-conductive WO3.

[0021] In step S4, an approximately 10 nm thick HZO ferroelectric layer 104 is grown using ALD, resulting in the structure shown below. Figure 5 As shown.

[0022] Step S5: A 70-80 nm thick top electrode W105 is physically vapor-deposited on the HZO ferroelectric layer 104 using a lift-off process. The top electrodes W are spaced apart on the HZO ferroelectric layer 104, resulting in the structure shown below. Figure 6 As shown.

[0023] Step S6: Annealing is performed in a rapid thermal annealing furnace under a nitrogen atmosphere at a temperature of 500°C for 30 seconds.

[0024] like Figure 6 As shown, the structure for improving the ferroelectric properties of HZO memory devices includes: a silicon wafer 100 with a SiO2 layer 101 formed thereon; a bottom electrode W102 formed on the substrate; and WO x Interface layer 103, obtained by pretreatment thermal oxidation of bottom electrode W102, with x ranging from 2 to 3, is formed on the upper part of bottom electrode W102; HZO ferroelectric layer 104 is formed on WO x On interface layer 103; top electrode W105, formed on HZO ferroelectric layer 104; wherein, WO x The interface layer 103 serves as a buffer and sacrificial layer for oxygen diffusion, suppressing the oxygen removal effect of the bottom electrode on the upper HZO ferroelectric layer.

[0025] The electrode pretreatment process proposed in this invention involves controlling the thermal oxidation of the bottom tungsten electrode to pre-form a WO3 layer on its surface. x Buffer layer. This layer acts as a buffer and sacrificial layer for oxygen diffusion, fundamentally weakening the oxygen removal effect of the bottom tungsten electrode on the upper HZO film, thereby significantly improving the ferroelectric properties of HZO and the reliability of the device.

[0026] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A structure for improving the ferroelectric properties of HZO storage devices, characterized in that, include: Substrate; A bottom electrode W is formed on the substrate; WO x An interface layer is formed on the upper part of the bottom electrode W; An HZO ferroelectric layer is formed on the WOx interface layer; The top electrode W is formed at intervals on the HZO ferroelectric layer; Wherein, the WO x The interface layer acts as a buffer and sacrificial layer for oxygen diffusion, suppressing the oxygen removal effect of the bottom electrode on the upper HZO ferroelectric layer.

2. The structure for improving the ferroelectric properties of HZO storage devices according to claim 1, characterized in that, The WO x The thickness of the interface layer is 28.5nm~272nm.

3. The structure for improving the ferroelectric properties of HZO storage devices according to claim 1, characterized in that, The thickness of the HZO ferroelectric layer is 10 nm.

4. A method for fabricating a structure to improve the ferroelectric properties of HZO storage devices, characterized in that, Includes the following steps: A bottom electrode W is grown on the substrate; The bottom electrode W is subjected to rapid thermal annealing in an oxygen atmosphere, causing the upper part of the bottom electrode W to be thermally oxidized to form WO. x Interface layer; in WO x An HZO ferroelectric layer is grown on the interface layer; A spaced-out top electrode W is formed on the HZO ferroelectric layer; Rapid thermal annealing was performed under a nitrogen atmosphere. Wherein, the WO x The interface layer acts as a buffer and sacrificial layer for oxygen diffusion, suppressing the oxygen removal effect of the bottom electrode on the upper HZO ferroelectric layer.

5. The method for fabricating a structure to improve the ferroelectric properties of HZO storage devices according to claim 4, characterized in that, The annealing temperature for rapid thermal annealing of the bottom electrode W in an oxygen atmosphere is 400℃~600℃.

6. The method for fabricating a structure to improve the ferroelectric properties of HZO storage devices according to claim 4, characterized in that, The thickness of the HZO ferroelectric layer is 10 nm.

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