An apparatus and method for large scale panel level packaging deposition

Abstract

The application discloses a kind of methods for large size board level package deposition, belong to semiconductor processing technical field, including the following steps: control manipulator to take out large size board level substrate in piece cavity, then large size board level substrate is sequentially placed in degassing cavity, pre-cleaning cavity and is treated, after completion, large size board level substrate is placed into Ti cavity and Ti seed layer deposition is carried out, after completion, it is moved into first Cu cavity and deposits first Cu seed layer, then it is placed into cooling cavity and rapidly cooled, then it is placed into second Cu cavity and deposits second Cu seed layer, after completion, large size board level substrate is sent into piece cavity.The whole process of the application is simple, combined with specially designed processing device, large size board level substrate can be processed quickly, and Cu deposition is set as two steps, which can ensure the quality of deposition on the one hand, and improve the overall work efficiency on the other hand.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor processing technology, and specifically relates to an apparatus and method for large-size board-level packaging deposition. Background Technology

[0002] In recent years, fan-out chip-level packaging (FO-WLP) and fan-out panel-level packaging (FO-PLP) have gained widespread attention in the IC packaging technology field due to their high heterogeneous integration capabilities, small form factor, and reduced total system cost. With the widespread adoption of TSMC's "InFO" (Integrated Fan-Out) FO-WLP solution, fan-out packaging has shifted from core fan-out applications (such as baseband, power management, and RF transceivers) to more advanced high-density fan-out applications.

[0003] FOPLP (Fan Out Panel Level Package) is considered a breakthrough technology that extends FOWLP and enables highly integrated IC packaging. FOPLP changes the circular wafer carrier to a larger square carrier (glass or PCB), resulting in higher utilization and lower cost.

[0004] For large-area (≥510mm*515mm) rectangular substrates, the sheet resistivity must be artificially reduced by significantly thickening the PVD seed layer to overcome the catastrophic ohmic voltage drop caused by the excessively long current path. Otherwise, the electroplating process cannot achieve uniform and effective copper layer coverage across the entire board. Since advanced packaging substrates are coated with organic materials, the process temperature requirements are very strict, generally requiring a process temperature <150℃. In conventional PVD processes, if the deposited film layer is thickened, a cooling step must be added in the middle to lower the substrate temperature, thus significantly reducing PVD deposition efficiency. Therefore, the market needs a method suitable for efficiently processing large-area rectangular substrates. Summary of the Invention

[0005] To address the aforementioned issues, this invention provides an apparatus for large-size board-level packaging deposition, comprising a transfer chamber, a robotic arm disposed within the transfer chamber, and sequentially arranged on the outer periphery of the transfer chamber a wafer entry chamber, a degassing chamber, a pre-cleaning chamber, a Ti chamber, a Cu chamber, a cooling chamber, and a wafer exit chamber; the Cu chamber is configured as two, specifically a first Cu chamber and a second Cu chamber, respectively disposed on both sides of the cooling chamber.

[0006] Furthermore, the robotic arm is capable of gripping large-size board-level substrates and moving them within various chambers.

[0007] Furthermore, the wafer loading chamber is used to store and provide large-size board-level substrates; the degassing chamber is used to remove residual moisture and gas on the large-size board-level substrates; and the pre-cleaning chamber is used to remove the oxide layer on the large-size board-level substrates and activate their surface.

[0008] Furthermore, the Ti cavity is used for PVD deposition of a Ti layer on a large-size board-level substrate.

[0009] Furthermore, the Cu cavity is used for PVD deposition of a Cu layer on a large-size board-level substrate.

[0010] Furthermore, the cooling chamber is used for rapid cooling of large-size board-level substrates.

[0011] Furthermore, the ejection cavity is used to eject the processed large-size board-level substrate.

[0012] A method for deposition of large-size board-level packaging includes the following steps: The specific steps are as follows: a robot arm is controlled to remove the large-size board-level substrate from the wafer entry cavity, and then the large-size board-level substrate is sequentially placed in a degassing cavity and a pre-cleaning cavity for processing. After processing, the large-size board-level substrate is placed in a Ti cavity for Ti seed layer deposition. After processing, it is moved into a first Cu cavity for deposition of a first Cu seed layer. Then, it is placed in a cooling cavity for rapid cooling. Next, it is placed in a second Cu cavity for deposition of a second Cu seed layer. Finally, the large-size board-level substrate is sent into the wafer exit cavity.

[0013] Furthermore, nitrogen gas is used for cooling within the cooling chamber.

[0014] The present invention has the following advantages over the prior art:

[0015] This invention features a simple overall process and, combined with a specially designed processing device, enables rapid processing of large-size board-level substrates. The Cu deposition is performed in two steps, ensuring deposition quality while simultaneously improving overall efficiency. This method is suitable for processing large-size board-level substrates and is highly competitive in the market. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the overall structure of the device of the present invention.

[0017] Figure 2 This is a flowchart illustrating the method of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions in the embodiments of this invention will be clearly and completely described below in conjunction with the embodiments of this invention. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of the embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0019] In the embodiments, it should be noted that any processes not specifically described below are those that can be implemented or understood by those skilled in the art by referring to existing technology. Reagents or instruments whose manufacturers are not specified are considered to be conventional products that can be purchased commercially.

[0020] Example 1

[0021] A method for deposition of large-size board-level packages, specifically:

[0022] Select a suitable advanced packaging substrate. In this embodiment, the substrate size is 600mm*600mm. It first enters the equipment through the wafer entry cavity 3, and then undergoes the degas process in the degassing cavity 4. The degas process can process multiple substrates simultaneously at a temperature of 120℃ for 50 minutes.

[0023] Then, the robot arm 2 is used to place it in the pre-cleaning chamber 5 for a pre-cleaning process. The exposed metal oxide layer on the substrate is removed by bombarding the substrate surface with pure Ar plasma. The processing time is 80 seconds.

[0024] The film was then transferred to Ti cavity 6 to deposit a PVD Ti film. The Ti film was designed to be 100 nm thick, which was thin enough to be deposited continuously in one go.

[0025] The substrate is then transferred to the first Cu cavity 7, where half of the pre-designed Cu film thickness is deposited. In this embodiment, the thickness is 250 nm. The deposition is performed in one continuous cycle, and the substrate temperature is approximately 120°C.

[0026] The substrate is then transferred to cooling chamber 8 for cooling. High-pressure N2 at 20000Pa is introduced into the cooling chamber to form strong convection, which transfers the temperature of the substrate surface to the side walls of the chamber and other low-temperature components. The cooling time is 90 seconds, which allows the substrate to be cooled down to <50°C quickly.

[0027] The substrate is then transferred to the second Cu cavity 9, where a 250nm Cu film is deposited under the same process conditions, resulting in a total Cu film thickness of 500nm. Finally, it is ejected from the wafer exit cavity 10.

[0028] Example 2

[0029] A method for deposition of large-size board-level packages, specifically:

[0030] Select a high-quality advanced packaging substrate with dimensions of 510mm*515mm. It first enters the equipment through the wafer entry chamber 3, and then undergoes the degas process in the degassing chamber 4. The degas process can process multiple substrates simultaneously at a temperature of 150℃ for 40 minutes.

[0031] Then, the robot arm 2 is used to place it in the pre-cleaning chamber 5 for a pre-cleaning process. The exposed metal oxide layer on the substrate is removed by bombarding the substrate surface with pure Ar plasma. The processing time is 60 seconds.

[0032] The deposition process then proceeds to Ti cavity 6 to deposit a PVD Ti film. The Ti film is designed to be 120 nm thick, which is thin enough to allow for continuous deposition in a single pass.

[0033] The substrate is then transferred to the first Cu cavity 7, where half of the pre-designed Cu film thickness is deposited. In this embodiment, the thickness is 300 nm. The deposition is performed in one continuous cycle, and the substrate temperature is approximately 140°C.

[0034] Next, the substrate is transferred to cooling chamber 8 for cooling. High pressure N2 30000Pa is filled into the cooling chamber to form strong convection, which transfers the heat on the surface of the substrate to the side wall of the chamber and other low-temperature components. The cooling time is 90s, which allows the substrate to be cooled down to no more than 50°C.

[0035] The substrate is then transferred to the second Cu cavity 9, where a 300nm Cu film is deposited under the same process conditions, resulting in a total Cu film thickness of 600nm. Finally, it is ejected from the wafer exit cavity 10.

[0036] According to the process conditions of Example 1: Cu 500nm is deposited, Cu 250nm is deposited in the first Cu cavity 7, taking 120s, N2 is introduced into the cooling cavity to 30000Pa for 60s to cool the substrate from 120°C to 45°C, and the total time for exchanging wafers and gas filling and evacuation is about 100s. Then the remaining 250nm is deposited in the second Cu cavity 9, taking 120s. Thus, the hourly production capacity reaches 30 wafers.

[0037] Comparative Example 1: Only a single Cu chamber was set up, and everything else was the same as in Example 1. Cu 500nm was deposited in two steps, with cooling in between. Because the sputtering Cu chamber generates a lot of heat during the deposition process, the temperature inside the chamber is high except for the substrate stage which is circulated with cooling water. Moreover, the chamber volume is large, so the cooling efficiency is low. It takes about 3 minutes to cool the substrate from 120°C to 45°C. The time to complete one Cu 500nm wafer is about 6 minutes, and the production capacity is about 10 wafers per hour.

[0038] Comparative Example 2: Two Cu cavities were designed without separate cooling cavities. The rest was the same as in Example 1. Each of the two Cu cavities deposited 250nm, and each was cooled for 1.5 minutes. The process time to complete one Cu 500nm wafer was 3.5 minutes, and the hourly production capacity was about 17 wafers.

[0039] In summary, the method of the present invention can significantly improve overall production efficiency, and due to the reasonable process settings, the yield and quality of the products are also effectively improved, making it highly valuable for promotion and application.

[0040] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. An apparatus for large-size board-level packaging deposition, comprising a transfer cavity (1), characterized in that, The conveying cavity (1) is equipped with a robotic arm (2), and the outer periphery of the conveying cavity (1) is provided with a wafer inlet cavity (3), a degassing cavity (4), a pre-cleaning cavity (5), a Ti cavity (6), a Cu cavity, a cooling cavity (8), and a wafer outlet cavity (10) in sequence; the Cu cavity is configured as two, specifically a first Cu cavity (7) and a second Cu cavity (9), which are respectively located on both sides of the cooling cavity (8).

2. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The robotic arm (2) is capable of gripping large-size board-level substrates and moving them within each cavity.

3. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The wafer loading chamber (3) is used to store and provide large-size board-level substrates; the degassing chamber (4) is used to remove residual water vapor and gas on the large-size board-level substrates; the pre-cleaning chamber (5) is used to remove the oxide layer on the large-size board-level substrates and activate their surface.

4. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The Ti cavity (6) is used for PVD deposition of a Ti layer on a large-size board-level substrate.

5. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The Cu cavity is used for PVD deposition of Cu layers on large-size board-level substrates.

6. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The cooling chamber (8) is used for rapid cooling of large-size board-level substrates.

7. The apparatus for large-size board-level packaging deposition according to claim 1, characterized in that, The output cavity (10) is used to export the processed large-size board-level substrate.

8. A method for deposition of large-size board-level packages, characterized in that, The process includes the following steps: using the device described in any one of claims 1-7, specifically: controlling the robot (2) to take out the large-size board-level substrate from the wafer entry cavity (3), then placing the large-size board-level substrate in the degassing cavity (4) and the pre-cleaning cavity (5) for processing, and then placing the large-size board-level substrate into the Ti cavity (6) for Ti seed layer deposition, and then moving it into the first Cu cavity (7) to deposit the first Cu seed layer, and then placing it into the cooling cavity (8) for rapid cooling, and then placing it into the second Cu cavity (9) to deposit the second Cu seed layer, and finally sending the large-size board-level substrate into the wafer exit cavity (10).

9. A method for deposition of large-size board-level packaging according to claim 8, characterized in that, The cooling chamber (8) uses nitrogen cooling.

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