Optical time wavelength division multiplexing / demultiplexing device

Abstract

The application discloses an optical time delay wavelength division multiplexing / demultiplexing device, and belongs to the technical field of microwave optical time delay. The application comprises a chip input waveguide, an on-chip optical circulator, a chip output waveguide, an on-chip wavelength division multiplexing / demultiplexing device, an on-chip tunable optical delay line array and a beam folding device, and can complete accurate time delay of a multi-wavelength optical signal. The beam folding device is arranged to realize 180-degree folding of an optical path, and a mirror image folding structure is constructed. The structure can repeatedly use a wavelength division multiplexing device and a tunable optical delay line, and combines the on-chip optical circulator to realize directional propagation of the chip input and output signals, so that the number of devices is halved and the integration degree is improved. The application does not need matching of the wavelength division multiplexing device and the wavelength division demultiplexing device, enhances channel consistency, realizes accurate matching of each wavelength, and doubles the time delay amount. The application is a novel wavelength division multiplexing optical time delay chip solution scheme which is simple in structure, excellent in performance and high in integration degree.

Description

Technical Field

[0001] This invention relates to the field of microwave optical delay technology, and more particularly to an optical delay wavelength division multiplexing / demultiplexing device. Background Technology

[0002] Microwave optical delay is a fundamental technology in microwave photonics. Its core lies in using photonic methods to provide precise and tunable time delays for microwave signals, playing a crucial role in applications such as phased array antenna beamforming, high-precision microwave signal measurement, microwave signal processing, and radar target simulation. In these applications, the accuracy of the signal's time delay often determines the system's performance limits. Traditional electrical delay lines are limited by electromagnetic interference, bandwidth bottlenecks, and size constraints, making it difficult to meet the high precision and stability requirements of modern technology. Microwave optical delay lines achieve precise delay control "controlled by light." The essence of a delay link is to adjust the optical path of an optical signal using the length of the optical fiber or the performance of the optical device. The combination of microwave optical delay and wavelength division multiplexing (WDM) systems represents a very important evolutionary direction in microwave photonics. WDM technology allows the parallel transmission of multiple optical carriers of different wavelengths in the same optical fiber, bringing parallel processing and multi-dimensional multiplexing capabilities to microwave optical delay lines that originally only processed single signals, thus giving rise to new system architectures and functions.

[0003] Currently, the complex system structure, low integration, and difficulties in controlling inter-channel consistency and delay errors severely restrict the development of optically controlled true delay networks towards multi-channel and large-scale applications. In large-scale true delay wavelength division multiplexing (WDM) networks, inter-channel consistency deviation and relative delay error are the core challenges limiting system performance. Current solutions are limited by the inherent non-uniformity between channels, making precise control of multi-channel delay extremely difficult. At the same time, the adjustable range and resolution of delay are often constrained by the physical size of the devices, further exacerbating the trade-off between system integration and performance. Addressing the technical challenges of complex structures, poor channel consistency, and difficulty in large-scale scaling of existing optically controlled true delay WDM networks, researching multi-channel true delay solutions with simple structures, precise delays, consistent channels, and multi-functional integration on a single chip is a key breakthrough for realizing high-performance microwave optical delay devices. Summary of the Invention

[0004] The purpose of this invention is to provide an optical delay wavelength division multiplexing / demultiplexing device, which aims to provide a multi-wavelength microwave optical delay integrated chip device with simple structure, high integration, strong channel consistency, and the ability to simultaneously realize wavelength division multiplexing / demultiplexing and precise control of optical signal delay.

[0005] The technical solution adopted in this invention is: an optical delay wavelength division multiplexing / demultiplexing device, comprising a chip input waveguide, an on-chip optical circulator, a chip output waveguide, an on-chip wavelength division multiplexer / demultiplexer, an on-chip tunable optical delay line array, and a beam deflector integrated on the same chip;

[0006] The first port of the on-chip optical circulator is connected to the chip input waveguide, the second port of the on-chip optical circulator is connected to the common port of the on-chip wavelength division multiplexer / demultiplexer, and the third port of the on-chip optical circulator is connected to the chip output waveguide.

[0007] The wavelength port of the on-chip wavelength division multiplexer / demultiplexer is connected to the input of the on-chip tunable optical delay line array, and the output of the on-chip tunable optical delay line array is equipped with a beam deflector.

[0008] The on-chip wavelength division multiplexer / demultiplexer is used to demultiplex the multi-wavelength optical signal input from the second port of the on-chip optical circulator into N single-path optical signals of different wavelengths, and transmit them to the corresponding on-chip tunable optical delay line arrays respectively; and to combine the N optical signals reflected back from the beam deflector into multi-wavelength optical signals, and output them to the on-chip optical circulator through a common port; wherein, N is greater than 1;

[0009] The on-chip tunable optical delay line array is used to delay the input optical signal for the first time and transmit the delayed optical signal to the beam deflector; the beam deflector is used to reflect the received optical signal 180° so that it returns to the on-chip tunable optical delay line array along the original path for the second delay.

[0010] The on-chip optical circulator is used to unidirectionally transmit the optical signal input from the chip input waveguide to the second port, and unidirectionally transmit the optical signal returned from the common port of the on-chip wavelength division multiplexer / demultiplexer to the third port, and then output it through the chip output waveguide.

[0011] Furthermore, the on-chip optical circulator includes: an asymmetric multimode interferometer, a first flex waveguide, a second flex waveguide, a third flex waveguide, a first microring resonator, and a second microring resonator;

[0012] The input port of the asymmetric multimode interferometer is connected to the first port of the on-chip optical circulator;

[0013] The first curved waveguide is L-shaped, with one end connected to the upper output port of the asymmetric multimode interferometer, and the other end serving as the input end of the first micro-ring resonator. The straight waveguide corresponding to this input end is the input optical waveguide of the first micro-ring resonator.

[0014] The second bend waveguide is S-shaped, and the first microring resonator is located between the first bend waveguide and the second bend waveguide. The straight waveguide in the second bend waveguide that is parallel to the input optical waveguide of the first microring resonator is the output optical waveguide of the first microring resonator. One end of the second bend waveguide is connected to the second port of the on-chip optical circulator, and the other end extends between the first microring resonator and the second microring resonator. The straight waveguide in the second bend waveguide located between the first microring resonator and the second microring resonator is the input optical waveguide of the second microring resonator.

[0015] The third bend waveguide is Z-shaped, with one end connected to the lower output port of the asymmetric multimode interferometer and the other end connected to the third port of the on-chip optical circulator. The straight waveguide in the third bend waveguide that is parallel to the input optical waveguide of the second micro-ring resonator is the output optical waveguide of the second micro-ring resonator.

[0016] The spacings between the first microring resonator and its input and output optical waveguides are respectively... and The spacing between the second microring resonator and its input and output optical waveguides are respectively... and Furthermore, the distance between the input optical waveguide of the second micro-ring resonator and the end of the first curved waveguide is... The spacing between the input optical waveguide of the second microring resonator and the first microring resonator is... ;in, , , , Greater than , Greater than .

[0017] Furthermore, the asymmetric multimode interferometer is used to distribute the optical power of the input optical signal based on a preset non-equal splitting ratio; wherein, the output power of the upper output port of the asymmetric multimode interferometer is greater than the output power of the lower output port.

[0018] Furthermore, the multimode region of the asymmetric multimode interferometer has a rectangular main body, and a chamfered portion is formed at the lower corner of the rectangular main body near its longitudinal axis. This chamfered portion is either a triangular chamfered portion or a rectangular chamfered portion.

[0019] Furthermore, one end of the input port of the asymmetric multimode interferometer is connected to the first port of the on-chip optical circulator, and the other end is connected to the input end face of the multimode region of the asymmetric multimode interferometer, coinciding with the longitudinal axis of the rectangular main body of the multimode region; the upper output port and the lower output port of the asymmetric multimode interferometer are respectively connected to the output end face of the multimode region of the asymmetric multimode interferometer, and the upper output port and the lower output port are respectively perpendicular to the transverse axis of the rectangular main body of the multimode region; and the upper output port and the lower output port are symmetrically distributed about the longitudinal axis of the rectangular main body of the multimode region.

[0020] Furthermore, the first curved waveguide is a single-mode waveguide, which includes a cascaded first straight waveguide, a first 90° waveguide bend, and a second straight waveguide; wherein, one end of the first straight waveguide is connected to the upper output port of the asymmetric multimode interferometer, and the other end is connected to the first 90° waveguide bend; the second straight waveguide is used as the input optical waveguide of the first microring resonator.

[0021] Furthermore, the second flexed waveguide is a single-mode waveguide segment, comprising a cascaded second 90° waveguide bend, a third straight waveguide, a third 90° waveguide bend, and a fourth straight waveguide; wherein, one end of the second 90° waveguide bend is connected to the second port of the on-chip optical circulator, and the other end is connected to the third straight waveguide, and the fourth straight waveguide is perpendicular to the input optical waveguide of the first microring resonator; the third straight waveguide serves as the output optical waveguide of the first microring resonator, and the fourth straight waveguide serves as the input optical waveguide of the second microring resonator.

[0022] Furthermore, the third waveguide is a single-mode waveguide segment comprising a cascaded fifth straight waveguide, a fourth 90° waveguide bend, a sixth straight waveguide, a fifth 90° waveguide bend, a seventh straight waveguide, and a sixth 90° waveguide bend. One end of the fifth straight waveguide is connected to the lower output port of the asymmetric multimode interferometer, and the other end is connected to the fourth 90° waveguide bend. One end of the sixth 90° waveguide bend is connected to the seventh straight waveguide, and the other end is connected to the third port of the on-chip optical circulator. The seventh straight waveguide serves as the output waveguide of the second microring resonator, and the sixth straight waveguide is parallel to the input waveguide of the first microring resonator. The spacing between the sixth straight waveguide and the input waveguide of the second microring resonator is [missing information]. The spacing between the sixth straight waveguide and the second microring resonator is ,in .

[0023] Furthermore, the on-chip wavelength division multiplexing / demultiplexing unit employs a cascaded unbalanced Mach-Zehnder interferometer wavelength division multiplexing / demultiplexing unit, with the following number of stages: Each stage consists of a Mach-Zehnder interferometer-type comb filter;

[0024] The order of a Mach-Zehnder interferometer comb filter is defined as M, which is composed of M unbalanced Mach-Zehnder interferometers cascaded together. Each unbalanced Mach-Zehnder interferometer consists of M+1 directional couplers and M sets of waveguide pairs with unequal arm lengths.

[0025] Furthermore, the on-chip tunable optical delay line array includes N parallel tunable optical delay lines, each tunable optical delay line corresponding to a set of input ports and output ports;

[0026] Among them, the tunable optical delay line is a Mach-Zehnder interferometer optical switch type delay line, which achieves the adjustment of the optical delay of the discrete stepping by selecting rectangular spiral waveguide delay lines of different lengths through the Mach-Zehnder interferometer optical switch.

[0027] Furthermore, the rectangular spiral waveguide delay line has a multi-turn structure, with each turn consisting of two straight transverse waveguides and a straight longitudinal waveguide of equal length. The turns are numbered sequentially from the inside out. The structure of the first turn is as follows: two straight transverse waveguides are connected by an S-shaped bend waveguide, and each straight transverse waveguide is connected to a straight longitudinal waveguide by a 90° bend waveguide. The structures of the remaining turns are as follows: two straight transverse waveguides are connected to the corresponding straight longitudinal waveguide of the previous turn by 90° bend waveguides, and each straight transverse waveguide of the current turn is then connected to a straight longitudinal waveguide of the current turn by a 90° bend waveguide.

[0028] Furthermore, the beam deflector is a 180° optical path deflection structure based on end-face reflection. The optical path deflection structure is formed at the output end of the on-chip tunable optical delay line array. The optical path deflection structure is formed by etching trenches at the end of the output waveguide of the on-chip tunable optical delay line array and then depositing metal; or by extending the output waveguide of the tunable optical delay line array to the chip end face and then depositing a metal reflective film or a dielectric reflective film on the chip side end face after grinding and polishing.

[0029] The technical solution provided by this invention brings at least the following beneficial effects:

[0030] This invention provides an optical delay wavelength division multiplexing / demultiplexing device, which is an integrated chip integrating an on-chip wavelength division multiplexer / demultiplexer, an on-chip tunable optical delay line array, and an on-chip optical circulator. It can achieve precise delay of multi-wavelength optical signals. A beam deflector enables 180-degree optical path reversal. A mirror-folded structure is constructed based on the beam deflector, which can reuse the wavelength division multiplexer and tunable optical delay line. Combined with the on-chip optical circulator, it achieves directional propagation of the chip's input and output signals, halving the number of components and increasing integration density. Simultaneously, in this structure, the on-chip wavelength division multiplexer / demultiplexer performs wavelength division multiplexing and demultiplexing without the need for matching between the wavelength division multiplexer and demultiplexer, enhancing channel consistency, achieving precise matching of wavelengths, and doubling the delay. The integrated chip provided by this invention is a novel wavelength division multiplexing optical delay chip solution with a simplified structure, excellent performance, and high integration density. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of the structure of an optical delay wavelength division multiplexing / demultiplexing device provided in an embodiment of the present invention;

[0033] Among them, (1a) and (1b) are two deployment diagrams of beam deflectors. In (1a), the beam deflector is set at the end of the output waveguide of the tunable optical delay line array, and the beam deflector corresponds one-to-one with each output port of the tunable optical delay line array. In (1b), the beam deflector is set on the chip side end face, the output waveguide of the on-chip tunable optical delay line array extends to the chip side end face, and a beam deflector is set as a whole on the chip side end face.

[0034] Figure 2 This is a schematic diagram of the structure of an on-chip optical circulator;

[0035] Figure 3 This is a schematic diagram of an on-chip wavelength division multiplexer / demultiplexer;

[0036] Figure 4 A schematic diagram of a Mach-Zehnder interferometer-type comb filter;

[0037] Figure 5 This is a schematic diagram of an asymmetric Mach-Zehnder interferometer.

[0038] Figure 6Schematic diagram of a two-stage cascaded Mach-Zehnder interferometer (MZI) wavelength division multiplexing / demultiplexing unit;

[0039] Figure 7 This is a schematic diagram of a tunable optical delay line array structure.

[0040] Figure 8 This is a schematic diagram of a tunable delay line structure;

[0041] Figure 9 This is a schematic diagram of a rectangular spiral waveguide delay line structure.

[0042] Figure 10 A schematic diagram of a long rectangular spiral waveguide delay line structure;

[0043] Figure 11 This is a schematic diagram illustrating the implementation of an N-wavelength optical true delay signal using an optical delay wavelength division multiplexing / demultiplexing device provided in an embodiment of the present invention.

[0044] Figure label:

[0045] 1—Input waveguide of the chip; 2—On-chip optical circulator; 3—Output waveguide of the chip; 4—On-chip wavelength division multiplexer / demultiplexer; 5—On-chip tunable optical delay line array; 6—Beam deflector; 7—Integrated wavelength division multiplexing / demultiplexing tunable delay timer chip; 2-1—Input port of asymmetric multimode interferometer; 2-2—Multimode region of asymmetric multimode interferometer; 2-3—Upper output port of asymmetric multimode interferometer; 2-4—Lower output port of asymmetric multimode interferometer; 2-5—First microring resonator; 2-6—Second microring resonator; 2-7—First bend waveguide of optical circulator; 2-8—Second bend waveguide of optical circulator; 2-9—Third bend waveguide of optical circulator; 2-10—First port of on-chip optical circulator; 2 -11—Second port of on-chip optical circulator; 2-12—Third port of on-chip optical circulator; 4-1—Common port of cascaded MZI wavelength division multiplexer / demultiplexer; 4-2—Wavelength port of cascaded MZI wavelength division multiplexer / demultiplexer; 4-3—Directional coupler; 4-4—MZI long waveguide; 4-5—MZI short waveguide; 4-100—Unbalanced Mach-Zehnder interferometer (AMZI); 4-101—Mach-Zehnder interferometer comb filter; 5-1—Input of on-chip tunable optical delay line array; 5-2—Output of on-chip tunable optical delay line array; 5-3—Tunable optical delay line; 5-301—Mach-Zehnder interferometer (MZI) optical switch; 5-302—Rectangular spiral waveguide delay line. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be described in detail and completely below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Generally, the components of the embodiments of the present invention described and shown in the accompanying drawings can be arranged and designed using different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the present invention.

[0047] In one embodiment, the present invention provides an optical delay wavelength division multiplexing / demultiplexing device, the structure of which is as follows: Figure 1 As shown, the device includes a chip input waveguide 1, an on-chip optical circulator 2, a chip output waveguide 3, an on-chip wavelength division multiplexer / demultiplexer 4, an on-chip tunable optical delay line array 5, and a beam deflector 6, all integrated on the same chip. This device integrates input and output signal direction control, wavelength division multiplexing / demultiplexing, and tunable optical true delay functions onto a single chip. In other words, the overall structure of this device constitutes an integrated wavelength division multiplexing / demultiplexing tunable delay chip 7. The on-chip optical circulator 2 includes three ports. The first port 2-10 of the on-chip optical circulator is connected to the chip input waveguide 1 via a single-mode waveguide. The second port 2-11 of the on-chip optical circulator is connected to the common port of the on-chip wavelength division multiplexer / demultiplexer 4. The wavelength port of the on-chip wavelength division multiplexer / demultiplexer 4 is connected to the input terminal of the on-chip tunable optical delay line array 5. The output terminal of the on-chip tunable optical delay line array 5 is equipped with a beam deflector 6. The third port 2-12 of the on-chip optical circulator is connected to the chip output waveguide 3, which is used to receive the multiplexed signal output from the on-chip wavelength division multiplexer / demultiplexer 4. The output is sent to the outside of the chip; wherein, the on-chip wavelength division multiplexing / demultiplexing unit 4 is a 1×N wavelength division multiplexing / demultiplexing unit, where N is the number of wavelength division multiplexing / demultiplexing channels set; the on-chip wavelength division multiplexing / demultiplexing unit 4 is used to demultiplex the optical signal output from the second port 2-11 of the on-chip optical circulator, or to multiplex the optical signal returned to the on-chip tunable optical delay line array 5 via the beam deflector 6; the on-chip tunable optical delay line array 5 is used to control the propagation delay of the optical signal; the beam deflector 6 is used to reflect the output optical signal of the on-chip tunable optical delay line array 5, so that it is returned to the same on-chip tunable optical delay line array 5. Specifically, the output 5-2 of the on-chip tunable optical delay line array extends to the beam deflector 6; wherein, the beam deflector 6 can be set in the etched trench at the end of the waveguide of the output 5-2 of the on-chip tunable optical delay line array, such as Figure 1 As shown in (1a); it can also be placed on the chip-side end face of the waveguide end of the on-chip tunable optical delay line array output 5-2, as shown in Figure (1a); Figure 1As shown in (1b). The present invention achieves a mirror folding structure of the on-chip wavelength division multiplexer / demultiplexer 4 and the on-chip tunable optical delay line array 5 by setting the beam folder 6, so as to double the delay amount and at the same time reduce one wavelength division multiplexer and one delayer, and halve the device area, thereby obtaining the highly integrated integrated wavelength division multiplexer / demultiplexer tunable delay chip 7 of the present invention.

[0048] Specifically, the on-chip optical circulator 2, such as Figure 2 As shown, the system specifically includes: an asymmetric multimode interferometer, an optical circulator with a first bend waveguide 2-7, an optical circulator with a second bend waveguide 2-8, an optical circulator with a third bend waveguide 2-9, a first micro-ring resonator 2-5, and a second micro-ring resonator 2-6. The output port 2-3 of the asymmetric multimode interferometer is connected to the input port of the first micro-ring resonator 2-5 via the first bend waveguide 2-7. The first bend waveguide 2-7 is a single-mode waveguide, L-shaped, comprising a cascaded first straight waveguide, a first 90° waveguide bend, and a second straight waveguide. One end of the first straight waveguide is connected to the output port 2-3 of the asymmetric multimode interferometer, and the other end is connected to the first 90° waveguide bend. The second straight waveguide serves as the input optical waveguide for the first micro-ring resonator 2-5, and the distance between the second straight waveguide and the first micro-ring resonator 2-5 is [missing information]. .

[0049] The second bend waveguide 2-8 of the optical circulator is a single-mode waveguide in an S-shape, comprising a cascaded second 90° waveguide bend, a third straight waveguide, a third 90° waveguide bend, and a fourth straight waveguide. One end of the second 90° waveguide bend connects to the second port 2-11 of the on-chip optical circulator, and the other end connects to the third straight waveguide. The fourth straight waveguide is perpendicular to the input waveguide of the first micro-ring resonator 2-5. The third straight waveguide serves as the output waveguide of the first micro-ring resonator 2-5, and the fourth straight waveguide serves as the input waveguide of the second micro-ring resonator 2-6. That is, the first micro-ring resonator 2-5 is located between the second and third straight waveguides, and the second and third straight waveguides are parallel. The fourth straight waveguide is located between the first micro-ring resonator 2-5 and the second micro-ring resonator 2-6. The distance between the third straight waveguide and the first micro-ring resonator 2-5 is... The distance between the ends of the fourth straight waveguide and the second straight waveguide is The spacing between the fourth straight waveguide and the first micro-ring resonator 2-5 is .

[0050] The third bend waveguide 2-9 of the optical circulator is a single-mode waveguide in a Z-shape, comprising a cascaded fifth straight waveguide, a fourth 90° waveguide bend, a sixth straight waveguide, a fifth 90° waveguide bend, a seventh straight waveguide, and a sixth 90° waveguide bend. One end of the fifth straight waveguide connects to the lower output port 2-4 of the asymmetric multimode interferometer, and the other end connects to the fourth 90° waveguide bend. One end of the sixth 90° waveguide bend connects to the seventh straight waveguide, and the other end connects to the third port 2-12 of the on-chip optical circulator. The seventh straight waveguide serves as the output optical waveguide of the second micro-ring resonator 2-6, and its spacing from the second micro-ring resonator 2-6 is [missing information]. That is, the second micro-ring resonator 2-6 is located between the fourth and seventh straight waveguides, and the fourth and seventh straight waveguides are parallel; the sixth straight waveguide is parallel to the second straight waveguide, and the distance between the ends of the sixth straight waveguide and the fourth straight waveguide is... The spacing between the sixth straight waveguide and the second micro-ring resonator 2-6 is Furthermore, the spacing between the sixth straight waveguide and the second straight waveguide is greater than... In this embodiment, , , Greater than , Greater than .

[0051] In this embodiment, the spacing Greater than the spacing To prevent coupling between the input optical waveguides of the first micro-ring resonator 2-5 and the second micro-ring resonator 2-6, the spacing... Greater than the spacing To prevent coupling between the second micro-ring resonator 2-6 and the sixth straight waveguide, the spacing... ,spacing Used to avoid contact between vertical straight waveguides.

[0052] Specifically, in this embodiment, the asymmetric multimode interferometer of the on-chip optical circulator 2 includes: an asymmetric multimode interferometer input port 2-1, an asymmetric multimode interferometer multimode region 2-2, an asymmetric multimode interferometer upper output port 2-3, and an asymmetric multimode interferometer lower output port 2-4; wherein, the asymmetric multimode interferometer is a 1×2 asymmetric multimode interferometer, which is used to perform power distribution on the optical signal input from the asymmetric multimode interferometer input port 2-1. The multimode region 2-2 of the asymmetric multimode interferometer has a rectangular structure, i.e., it has a rectangular main body. The axis extending along the length of the rectangular main body and passing through the center of the width of the rectangular main body is defined as the longitudinal axis; and the axis extending along the width of the rectangular main body and passing through the center of the length of the rectangular main body is defined as the transverse axis. A chamfer is formed at the lower corner of the main body of the multimode region 2-2 of the asymmetric multimode interferometer near the longitudinal axis. The chamfer is triangular and forms a slanted edge; or the chamfer is rectangular and forms a stepped notch.

[0053] The asymmetric multimode interferometer distributes the input optical power to the upper output port 2-3 and the lower output port 2-4 of the asymmetric multimode interferometer at a predetermined non-equal splitting ratio, with the output power of the upper output port 2-3 being greater than that of the lower output port 2-4. The input port 2-1 of the asymmetric multimode interferometer is connected to the input end face of the multimode region 2-2 of the asymmetric multimode interferometer and coincides with the longitudinal axis. The upper output port 2-3 and the lower output port 2-4 of the asymmetric multimode interferometer are connected to the output end face of the multimode region 2-2 of the asymmetric multimode interferometer, with the upper output port 2-3 perpendicular to the transverse axis of the multimode region 2-2, and the lower output port 2-4 perpendicular to the transverse axis of the multimode region 2-2. The central axes of the upper output port 2-3 and the lower output port 2-4 of the asymmetric multimode interferometer are symmetrically distributed about the longitudinal axis of the multimode region 2-2 of the asymmetric multimode interferometer.

[0054] In this embodiment of the invention, the on-chip optical circulator 2 utilizes the thermo-optical effect of the first micro-ring resonator 2-5 and the second micro-ring resonator 2-6 to adjust the resonant wavelength. Light enters from the input waveguide of the first micro-ring resonator 2-5, due to... Greater than At this time, the first micro-ring resonator 2-5 is a cold cavity and cannot achieve thermal tuning. The light entering from the input waveguide of the first micro-ring resonator 2-5 is output to the second port 2-11 of the on-chip optical circulator via the output waveguide of the first micro-ring resonator 2-5.

[0055] When light enters from port 2-11 of the on-chip optical circulator, due to... Less than This creates a strong coupling. At this time, the first micro-ring resonator 2-5 is a hot cavity, causing a shift in the transmission spectrum. Therefore, the light input from the second port 2-11 of the on-chip optical circulator cannot reach the input optical waveguide of the first micro-ring resonator 2-5, blocking the reverse transmission of the signal to the first port 2-10 of the on-chip optical circulator. This realizes the unidirectional transmission of light from the first port 2-10 of the on-chip optical circulator to the second port 2-11 of the on-chip optical circulator.

[0056] Among them, the output optical waveguide of the first micro-ring resonator 2-5 and the input optical waveguide of the second micro-ring resonator 2-6 are the same waveguide (the second curved waveguide 2-8 of the optical circulator), and Less than At this time, the first micro-ring resonator 2-5 is a hot cavity and the second micro-ring resonator 2-6 is a cold cavity. Therefore, the light entering from the second port 2-11 of the on-chip optical circulator is completely coupled to the second micro-ring resonator 2-6 and output from the third port 2-12 of the on-chip optical circulator.

[0057] When light enters the output waveguide of the second micro-ring resonator 2-6 from the third port 2-12 of the on-chip optical circulator, due to Less than At this time, the second microring resonator 2-6 is a hot cavity, and the transmission spectrum is shifted. Therefore, light cannot be coupled to the second microring resonator 2-6, thereby blocking the output of light from the second port 2-11 of the on-chip optical circulator. Instead, the light is transmitted to the lower output port 2-4 of the asymmetric multimode interferometer and then output to the first port 2-10 of the on-chip optical circulator, so as to realize the unidirectional transmission of light from the third port 2-12 of the on-chip optical circulator to the first port 2-10 of the on-chip optical circulator.

[0058] It should be noted that, in implementing the N-wavelength optical true delay signal based on the provided device, this embodiment does not involve the unidirectional transmission of light from the third port 2-12 of the on-chip optical circulator to the first port 2-10 of the on-chip optical circulator.

[0059] The specific structure of the on-chip optical circulator 2 provided in this embodiment of the invention can ultimately realize unidirectional transmission of light from the first port 2-10 of the on-chip optical circulator to the second port 2-11 of the on-chip optical circulator, from the second port 2-11 of the on-chip optical circulator to the third port 2-12 of the on-chip optical circulator, and from the third port 2-12 of the on-chip optical circulator to the first port 2-10 of the on-chip optical circulator.

[0060] Specifically, the on-chip wavelength division multiplexing / demultiplexing unit 4 used in this embodiment is a 1×N planar optical waveguide wavelength division multiplexing / demultiplexing unit, used to realize the multiplexing (combining) or demultiplexing (demultiplexing) of N optical signals of different wavelengths. The common port 4-1 of the cascaded MZI wavelength division multiplexing / demultiplexing unit is connected to the single-mode waveguide to form the input channel of the optical signal. The on-chip wavelength division multiplexing / demultiplexing unit 4 selects a cascaded unbalanced Mach-Zehnder interferometer (MZI) wavelength division multiplexing unit, with the structure as shown below. Figure 3 As shown. Each stage of the cascaded MZI wavelength division multiplexer consists of a Mach-Zehnder interferometer-type comb filter 4-101, and the number of MZI filter stages is... The Mach-Zehnder interferometer-type comb filter 4-101 has an order of M and consists of M unbalanced Mach-Zehnder interferometers (AMZI) 4-100, as shown in the figure. Figure 4 As shown. The larger the order M of the Mach-Zehnder interferometer-type comb filter 4-101, the flatter the passband and the better the isolation. However, the larger the filter structure, the more these two factors interact and limit each other. Therefore, the order M of the Mach-Zehnder interferometer-type comb filter 4-101 can be adjusted as needed. Each unbalanced Mach-Zehnder interferometer (AMZI) 4-100 consists of M+1 directional couplers 4-3 and M sets of waveguides with unequal arm lengths, as shown. Figure 5 As shown. The unequal arm length waveguides are MZI long waveguide 4-4 and MZI short waveguide 4-5, respectively, and the MZI long waveguide 4-4 and MZI short waveguide 4-5 can be interchanged. The light input from the common port 4-1 of the cascaded MZI wavelength division multiplexer / demultiplexer is bisected step by step by the Mach-Zehnder interferometer-type comb filter 4-101 until the wavelength is bisected at the 1st step. The stage completely separates N wavelengths, and finally outputs them from wavelength port 4-2 of the cascaded MZI wavelength division multiplexer / demultiplexer. The on-chip wavelength division multiplexer / demultiplexer 4 is a reciprocal device; the wavelengths input from wavelength port 4-2 of the cascaded MZI wavelength division multiplexer / demultiplexer are... The 4-101 comb filter, a Mach-Zehnder interferometer type, performs optical multiplexing. The combined output is then routed through the common port 4-1 of a cascaded MZI wavelength division multiplexing / demultiplexer, enabling optical multiplexing. Low-loss curved waveguides such as Euler bends and Bloss bends can be used to replace conventional waveguide bends, thereby reducing the bending loss of the long MZI waveguide 4-4.

[0061] Figure 6 This is a schematic diagram of a two-stage cascaded Mach-Zehnder interferometer (MZI) wavelength division multiplexing / demultiplexing unit. The first stage is a third-order Mach-Zehnder interferometer-type comb filter 4-101, and the second stage consists of two parallel second-order Mach-Zehnder interferometer-type comb filters 4-101 with different center wavelengths. Together, they form a 1×4 planar optical waveguide wavelength division multiplexing / demultiplexing unit.

[0062] Figure 7This is a schematic diagram of a four-channel (N=4) parallel on-chip tunable optical delay line array 5. The on-chip tunable optical delay line array 5 can be composed of N on-chip tunable optical delay line array inputs 5-1, N on-chip tunable optical delay line array outputs 5-2, and N tunable optical delay lines 5-3. Each tunable optical delay line 5-3 corresponds to a set of on-chip tunable optical delay line array inputs 5-1 and on-chip tunable optical delay line array outputs 5-2. Each on-chip tunable optical delay line array input 5-1 is connected to the corresponding cascaded MZI wavelength division multiplexer / demultiplexer wavelength port 4-2, and the on-chip tunable optical delay line array output 5-2 at the opposite end extends to the beam deflector 6. In this embodiment, the on-chip wavelength division multiplexing / demultiplexing unit 4 is structurally similar to the tunable optical delay line 5-3 using a Mach-Zehnder interferometer (MZI) optical switch 5-301, facilitating device arrangement and efficient use of chip space. Specifically, the tunable optical delay line 5-3 is an on-chip integrated switch-path type optical delay line. Different physical paths of varying lengths are selected using the Mach-Zehnder interferometer (MZI) optical switch 5-301 to achieve precise optical delay adjustment via discrete stepping. The physical path is implemented by a rectangular spiral waveguide delay line 5-302. The Mach-Zehnder interferometer (MZI) optical switch 5-301 integrates electrodes on one arm of the balanced MZI, allowing for voltage control based on electro-optic tuning principles to switch between optical paths. The rectangular spiral waveguide delay line 5-302 consists of a straight waveguide and discrete 90-degree curved waveguides, forming a rectangular profile, as shown below. Figure 8 As shown, the 90-degree bend waveguide at the corner can be constructed using low-loss bend waveguides such as Euler bends and Blossom bends to reduce bending loss. Appropriate spacing should be maintained between parallel straight waveguides to avoid crosstalk between channels. The length of the transverse straight waveguide, from the center of the spiral to the outermost ring of the helical waveguide, is as follows: to The length of the longitudinal straight waveguide from the center of the spiral to the outermost ring of the helical waveguide is as follows: to , This refers to the number of turns in the rectangular helical waveguide. Traditional Archimedean spiral delay lines have a circular profile, making it impossible to adjust their shape according to device structure. In contrast, the lateral length in the rectangular helical waveguide delay line 5-302... With longitudinal length The specific value can be adjusted according to the design. Figure 9 The tunable optical delay lines 5-3 shown are arranged in parallel. In the schematic diagram of this structure, H in the same circle i Greater than W i To make the structure compact, the parallel distance needs to be minimized. Figure 9A schematic structure of a 3-turn rectangular helical waveguide is given. The innermost layer consists of two transverse straight waveguides (the central structure) connected by an S-shaped bend waveguide. Further out are transverse straight waveguides and longitudinal straight waveguides connected by 90° bend waveguides. In a single turn, the two longitudinal straight waveguides are located on the left and right sides of the central structure, and the two transverse straight waveguides are located on the top and bottom sides of the central structure.

[0063] Additionally, the rectangular spiral waveguide delay line 5-302 can be adjusted as follows: Figure 10 The structure shown is that for any _th Circle, its longitudinal length Less than horizontal length To make the most of the space between adjacent rectangular helical waveguide delay lines 5-302, so as to occupy the smallest possible area. Figure 10 A schematic structure of a 3-turn rectangular helical waveguide is given. The innermost layer consists of two transverse straight waveguides connected by an S-shaped bend waveguide. Further out are transverse and longitudinal straight waveguides connected by 90° bend waveguides. In a single turn, the two longitudinal straight waveguides are located on the left and right sides of the central structure, and the two transverse straight waveguides are located on the top and bottom sides of the central structure.

[0064] In this invention, the on-chip tunable optical delay line array 5 is a reciprocal device. Therefore, a signal can enter from the on-chip tunable optical delay line array input 5-1 to the tunable optical delay line 5-3 and then to the on-chip tunable optical delay line array output 5-2, or enter from the on-chip tunable optical delay line array output 5-2 to the tunable optical delay line 5-3 and then to the on-chip tunable optical delay line array input 5-1. The on-chip tunable optical delay line array output 5-2 is connected to the beam deflector 6.

[0065] In this invention, the beam deflector 6 is a 180° optical path deflection structure based on end-face reflection. The beam deflector 6 functions as a reflector and can be fabricated by etching trenches at the waveguide end of the on-chip tunable optical delay line array output 5-2 using an etching method, followed by electron beam evaporation deposition of metal, ultimately forming a structure as shown. Figure 1 As shown in (1a) of the diagram; in this fabrication method, the chip waveguide material can be silicon dioxide or a polymer. Furthermore, the beam deflector 6 can also use an end-face mirror with simple processing and high reflection efficiency. This scheme extends the waveguide end of the on-chip tunable delay line array output 5-2 to the chip end face, grinds and polishes the chip end face, and then deposits a metal reflective film or a dielectric reflective film, ultimately forming a structure as shown in the diagram. Figure 1As shown in (1b), the beam deflector 6 is used to reflect the light output after delay by the on-chip tunable optical delay line array 5. By combining the on-chip wavelength division multiplexer / demultiplexer 4 and the on-chip tunable optical delay line array 5, two reciprocal devices (i.e., their transmission characteristics remain unchanged when the input and output ports are interchanged), a mirror-fold structure is constructed in which the on-chip wavelength division multiplexer / demultiplexer 4 and the on-chip tunable optical delay line array 5 are integrated, thereby halving the number of devices. At the same time, since the optical signal is reflected by the beam deflector 6, it passes through the on-chip tunable optical delay line array 5 once before and after reflection, thus doubling the delay amount while using the same number of on-chip tunable optical delay line arrays 5, and reducing one wavelength division multiplexer and delayer, halving the device area.

[0066] Traditional wavelength division multiplexing (WDM) network delay systems typically use a pair of WDM multiplexers to implement WDM multiplexing and demultiplexing respectively. To improve performance, matching devices are required. The device proposed in this invention utilizes the reciprocity of the on-chip WDM multiplexer / demultiplexer 4 to eliminate the error of using two WDM multiplexers, reduce the difficulty of device design, and achieve precise matching of forward and reverse wavelengths.

[0067] In this embodiment, the specific working process of an optical delay wavelength division multiplexing / demultiplexing device for realizing an N-wavelength optical true delay signal is as follows:

[0068] For multi-wavelength optical signals input from the integrated wavelength division multiplexing / demultiplexing tunable delay chip 7, the signals are transmitted through the chip input waveguide 1 to the first port 2-10 of the on-chip optical circulator, then output from the second port 2-11 of the on-chip optical circulator, and then transmitted to the common port 4-1 of the cascaded MZI wavelength division multiplexing / demultiplexing unit. The signals then enter the on-chip wavelength division multiplexing / demultiplexing unit 4 to complete the demultiplexing of the multi-wavelength signals. After wavelength division, the signals of different wavelengths are transmitted in parallel to the on-chip tunable optical delay line array 5. After the signal is delayed for the first time by each tunable optical delay line 5-3 corresponding to the tunable optical delay line array 5, it reaches the beam deflector 6 to achieve 180° reflection of the light. Then it returns to each tunable optical delay line 5-3 corresponding to the on-chip tunable optical delay line array 5 for a second delay. The signals after the two delays are multiplexed (combined) by the on-chip wavelength division multiplexer / demultiplexer 4, and then enter the on-chip optical circulator 2 from the common port 4-1 of the cascaded MZI wavelength division multiplexer / demultiplexer. Utilizing the directional routing characteristics of the on-chip optical circulator 2, it is output to the outside of the integrated wavelength division multiplexing / demultiplexing tunable delay chip 7 through the chip output waveguide 3 connected to the third port 2-12 of the on-chip optical circulator.

[0069] See Figure 11 In this embodiment, the specific process of realizing an N-wavelength optical true delay signal using an optical delay wavelength division multiplexing / demultiplexing device provided by the present invention includes:

[0070] The signal light source is generated by a multi-wavelength laser source. Optical signals of several wavelengths, with the center wavelengths of the signals arranged from shortest to longest (or from longest to shortest) as follows: to The corresponding optical signals (input signals) are respectively to , Corresponding to the number of channels in the wavelength division multiplexing / demultiplexing unit (WDM / demultiplexer), the center wavelength of the signal is consistent with the working center wavelength of the 4 channels of the on-chip WDM / demultiplexer. The input signal is electro-optically modulated and then input to the chip's input waveguide 1.

[0071] The optical signal enters the chip's input waveguide 1 and reaches the first port 2-10 of the on-chip optical circulator. It then passes through the on-chip optical circulator 2 and exits from the second port 2-11 to the common port 4-1 of the cascaded MZI wavelength division multiplexer / demultiplexer. The on-chip wavelength division multiplexer / demultiplexer 4... The center wavelengths are respectively to input signal to Wavelengths are split and transmitted to the corresponding cascaded MZI wavelength demultiplexer wavelength port 4-2.

[0072] The wavelength-division multiplexed optical signal is input from the wavelength port 4-2 of the cascaded MZI wavelength division multiplexer / demultiplexer via the on-chip tunable optical delay line array input 5-1 to the corresponding tunable optical delay line 5-3. The required delay is adjusted by controlling the Mach-Zehnder interferometer (MZI) optical switch 5-301 to form... The time delay difference of the optical signal between the parallel channels, with a wavelength of to The corresponding delay amounts are as follows: to The delayed signal is to .

[0073] The center wavelengths after the delay are as follows: to N optical signals to After being reflected by beam deflector 6, the beam enters the on-chip tunable optical delay line array 5 through its original path, corresponding to each tunable optical delay line 5-3 for a second delay. After the second delay, the center wavelength is... to The corresponding delay amounts are as follows: to The optical signal after the second delay is to .

[0074] Optical signal after double delay to The wavelength port 4-2 of the cascaded MZI wavelength division multiplexer / demultiplexer 4, corresponding to the on-chip wavelength division multiplexer / demultiplexer 4, performs multiplexing. The multiplexed signal is then output through the common port 4-1 of the cascaded MZI wavelength division multiplexer / demultiplexer to the third port 2-12 of the on-chip optical circulator; the output is a multi-wavelength delayed signal (i.e., the output signal). to The signal is output to the outside of the chip via waveguide 3 to achieve individual delay control of N wavelength signals.

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the foregoing embodiments have described the present invention in detail, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the embodiments of the present invention.

[0076] The above descriptions are merely some embodiments of the present invention. Those skilled in the art can make various modifications and improvements without departing from the inventive concept of the present invention, and these all fall within the scope of protection of the present invention.

Claims

1. An optical delay wavelength division multiplexing / demultiplexing device, characterized in that, This includes chip input waveguides, on-chip optical circulators, chip output waveguides, on-chip wavelength division multiplexers / demultiplexers, on-chip tunable optical delay line arrays, and beam deflectors integrated on the same chip. The first port of the on-chip optical circulator is connected to the chip input waveguide, the second port of the on-chip optical circulator is connected to the common port of the on-chip wavelength division multiplexer / demultiplexer, and the third port of the on-chip optical circulator is connected to the chip output waveguide. The wavelength port of the on-chip wavelength division multiplexer / demultiplexer is connected to the input of the on-chip tunable optical delay line array, and the output of the on-chip tunable optical delay line array is equipped with a beam deflector. The on-chip wavelength division multiplexer / demultiplexer is used to demultiplex the multi-wavelength optical signal input from the second port of the on-chip optical circulator into N single-path optical signals of different wavelengths, and transmit them to the corresponding on-chip tunable optical delay line arrays respectively; and to combine the N optical signals reflected back from the beam deflector into multi-wavelength optical signals, and output them to the on-chip optical circulator through a common port; wherein, N is greater than 1; The on-chip tunable optical delay line array is used to delay the input optical signal for the first time and transmit the delayed optical signal to the beam deflector; the beam deflector is used to reflect the received optical signal 180° so that it returns to the on-chip tunable optical delay line array along the original path for the second delay. The on-chip optical circulator is used to unidirectionally transmit the optical signal input from the chip input waveguide to the second port, and unidirectionally transmit the optical signal returned from the common port of the on-chip wavelength division multiplexer / demultiplexer to the third port, and then output it through the chip output waveguide. The on-chip optical circulator includes: an asymmetric multimode interferometer, a first flex waveguide, a second flex waveguide, a third flex waveguide, a first microring resonator, and a second microring resonator. The input port of the asymmetric multimode interferometer is connected to the first port of the on-chip optical circulator; The first curved waveguide is L-shaped, with one end connected to the upper output port of the asymmetric multimode interferometer, and the other end serving as the input end of the first micro-ring resonator. The straight waveguide corresponding to this input end is the input optical waveguide of the first micro-ring resonator. The second bend waveguide is S-shaped, and the first microring resonator is located between the first bend waveguide and the second bend waveguide. The straight waveguide in the second bend waveguide that is parallel to the input optical waveguide of the first microring resonator is the output optical waveguide of the first microring resonator. One end of the second bend waveguide is connected to the second port of the on-chip optical circulator, and the other end extends between the first microring resonator and the second microring resonator. The straight waveguide in the second bend waveguide located between the first microring resonator and the second microring resonator is the input optical waveguide of the second microring resonator. The third bend waveguide is Z-shaped, with one end connected to the lower output port of the asymmetric multimode interferometer and the other end connected to the third port of the on-chip optical circulator. The straight waveguide in the third bend waveguide that is parallel to the input optical waveguide of the second micro-ring resonator is the output optical waveguide of the second micro-ring resonator. The spacings between the first microring resonator and its input and output optical waveguides are respectively... and The spacing between the second microring resonator and its input and output optical waveguides are respectively... and Furthermore, the distance between the input optical waveguide of the second micro-ring resonator and the end of the first curved waveguide is... The spacing between the input optical waveguide of the second microring resonator and the first microring resonator is... ;in, , , , Greater than , Greater than .

2. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, The first curved waveguide is a single-mode waveguide, which includes a cascaded first straight waveguide, a first 90° waveguide bend, and a second straight waveguide; wherein, one end of the first straight waveguide is connected to the upper output port of the asymmetric multimode interferometer, and the other end is connected to the first 90° waveguide bend; the second straight waveguide is used as the input optical waveguide of the first micro-ring resonator.

3. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, The second bend waveguide is a single-mode waveguide segment comprising a cascaded second 90° waveguide bend, a third straight waveguide, a third 90° waveguide bend, and a fourth straight waveguide. One end of the second 90° waveguide bend is connected to the second port of the on-chip optical circulator, and the other end is connected to the third straight waveguide. The fourth straight waveguide is perpendicular to the input optical waveguide of the first microring resonator. The third straight waveguide serves as the output optical waveguide of the first microring resonator, and the fourth straight waveguide serves as the input optical waveguide of the second microring resonator.

4. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, The third waveguide is a single-mode waveguide segment comprising a cascaded fifth straight waveguide, a fourth 90° waveguide bend, a sixth straight waveguide, a fifth 90° waveguide bend, a seventh straight waveguide, and a sixth 90° waveguide bend. One end of the fifth straight waveguide is connected to the lower output port of the asymmetric multimode interferometer, and the other end is connected to the fourth 90° waveguide bend. One end of the sixth 90° waveguide bend is connected to the seventh straight waveguide, and the other end is connected to the third port of the on-chip optical circulator. The seventh straight waveguide serves as the output waveguide of the second microring resonator, and the sixth straight waveguide is parallel to the input waveguide of the first microring resonator. The distance between the ends of the sixth straight waveguide and the input waveguide of the second microring resonator is [missing information]. The spacing between the sixth straight waveguide and the second microring resonator is ,in .

5. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, An asymmetric multimode interferometer is used to distribute the optical power of an input optical signal based on a preset non-equal splitting ratio; wherein, the output power of the upper output port of the asymmetric multimode interferometer is greater than the output power of the lower output port.

6. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 5, characterized in that, The multimode region of the asymmetric multimode interferometer has a rectangular main body; a chamfered part is formed at the lower corner of the rectangular main body near its longitudinal axis, which can be a triangular chamfered part or a rectangular chamfered part.

7. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 6, characterized in that, One end of the input port of the asymmetric multimode interferometer is connected to the first port of the on-chip optical circulator, and the other end is connected to the input end face of the multimode region of the asymmetric multimode interferometer, coinciding with the longitudinal axis of the rectangular main body of the multimode region; the upper output port and the lower output port of the asymmetric multimode interferometer are respectively connected to the output end face of the multimode region of the asymmetric multimode interferometer, and the upper output port and the lower output port are respectively perpendicular to the transverse axis of the rectangular main body of the multimode region; and the upper output port and the lower output port are symmetrically distributed about the longitudinal axis of the rectangular main body of the multimode region.

8. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, The on-chip wavelength division multiplexer / demultiplexer employs a cascaded unbalanced Mach-Zehnder interferometer wavelength division multiplexer / demultiplexer, with the following number of stages: Each stage consists of a Mach-Zehnder interferometer-type comb filter; the order of the Mach-Zehnder interferometer-type comb filter is defined as M, which is composed of M unbalanced Mach-Zehnder interferometers cascaded together. Each unbalanced Mach-Zehnder interferometer consists of M+1 directional couplers and M sets of waveguide pairs with unequal arm lengths.

9. The optical delay wavelength division multiplexing / demultiplexing device as described in claim 1, characterized in that, The beam deflector is a 180° optical path deflection structure based on end-face reflection. The optical path deflection structure is formed at the output end of the on-chip tunable optical delay line array. The optical path deflection structure is formed by etching trenches at the end of the output waveguide of the on-chip tunable optical delay line array and then depositing metal. Alternatively, the output waveguide of the tunable optical delay line array can be extended to the chip end face, and a metal reflective film or dielectric reflective film can be deposited after grinding and polishing the chip side end face.

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