A non-parallel heterogeneous inverter classification aggregation method, device, equipment and medium

CN122692702APending Publication Date: 2026-09-04HUAZHONG UNIV OF SCI & TECH
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Patent Information

Application Number
CN202611185407.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-06
Publication Date
2026-09-04

AI Technical Summary

Technical Problem

[0005]针对现有技术的缺陷,本申请的目的在于提供一种非并联异质变流器分类聚合方法、装置、设备和介质,旨在解决:当前缺乏对非并联异质变流器的有效分类聚合手段,难以降低多变流器系统的阶数的问题

Benefits of technology

本申请通过步骤S10基于电气距离将电力系统节点空间划分为多个局部区域,从而将大规模系统分解为若干子区域,大幅缩减了后续同调识别的计算规模;接着在步骤S20中,针对每一局部区域,基于预设的同调判据对区域内不同类型变流器进行同调分类,解决了多台变流器之间动态相似性难以准确定义和识别的问题,确保了同类变流器满足聚合条件。

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Abstract

The application belongs to the technical field of power systems, and specifically discloses a non-parallel heterogeneous converter classification and aggregation method, device, equipment and medium. The application divides the node space of the power system into multiple local areas, greatly reducing the calculation scale of subsequent coherent identification; then, the coherent classification is carried out for different types of converters in each local area, ensuring that the same type of converter meets the aggregation condition; then, a virtual bus is constructed for each coherent class, and the originally scattered nodes are transferred to the same virtual bus, so that the non-parallel relationship is converted into a parallel relationship without changing the original structure, overcoming the limitation that the existing aggregation method is only applicable to parallel converters; finally, the state is aggregated based on the parallel relationship, and the parameters of the equivalent converter are solved, thereby obtaining a simplified equivalent model highly consistent with the dynamic response of the original system. Finally, the technical effects of high aggregation accuracy, fast calculation speed and strong interpretability are realized.
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Description

Technical Field

[0001] This application belongs to the field of power system technology, specifically relating to a method, apparatus, equipment, and medium for classifying and aggregating non-parallel heterogeneous converters. Background Technology

[0002] In the construction of new power systems based on renewable energy, the number of power electronic converters, as the core interface for grid connection of renewable energy, is increasing dramatically. To accurately characterize the control dynamics of each converter, the order of the system model will grow rapidly. Therefore, it is necessary to establish a simplified equivalent model to reduce the order of multi-converter systems.

[0003] Dynamic aggregation can reduce the system model order by converting a large number of converters within a specific region into a single converter (single-machine aggregation) or a few converters (multi-machine aggregation). Currently, converter aggregation typically employs multi-machine dynamic aggregation, which includes two steps: classification and aggregation. Classification refers to dividing the converters in the system into different categories based on their dynamic characteristics, ensuring that converters within the same category meet the aggregation conditions; this process is also known as homology identification. Aggregation involves replacing converters of the same type with an equivalent converter while maintaining approximately unchanged system output, and this equivalent converter has the same physical structure as the original converter.

[0004] However, current multi-machine aggregation methods have the following problems: On the one hand, the homology identification method can identify the similarity between two converters, but for the dynamic similarity between multiple converters, there is usually a lack of good definition and identification methods; on the other hand, the aggregation method can only aggregate converters connected in parallel at the same node, and for non-parallel converters distributed in different nodes of the system, there is a lack of effective aggregation means without changing the network structure. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a method, apparatus, device and medium for classifying and aggregating non-parallel heterogeneous converters, aiming to solve the problem that there is currently no effective means for classifying and aggregating non-parallel heterogeneous converters, making it difficult to reduce the order of multi-converter systems.

[0006] The first aspect of this application relates to a classification and aggregation method for non-parallel heterogeneous converters, comprising: step S10, dividing the node space of the power system into multiple local regions based on the electrical distance between nodes in the power system; step S20, for each local region, classifying different types of converters in the local region according to a preset homology criterion to obtain multiple homology classes; step S30, constructing a virtual bus for each homology class, and transferring all converters in the homology class to the virtual bus through a virtual transformer; step S40, aggregating the states of the converters based on the parallel relationship between converters on the same virtual bus, and solving for the parameters of the equivalent converter based on the aggregated states as aggregation rules.

[0007] In one embodiment, step S10 is preceded by: establishing a power grid model in the complex frequency domain under transient conditions to obtain a node impedance matrix; performing matrix decomposition on the imaginary part of the node impedance matrix, and using the row vectors of the obtained decomposed matrix as the coordinates of each node; and calculating the distance between any two nodes as the electrical distance based on the coordinates of each node.

[0008] In one embodiment, step S10 includes: randomly selecting multiple nodes as initial region centers; assigning each node to the region where the region center with the closest electrical distance is located, and updating the region center based on the average coordinates of all nodes in the region; repeating the node assignment and region center update steps until the region center meets the preset convergence condition, thus completing the partitioning of the node space.

[0009] In one embodiment, step S20 includes: constructing a homology matrix characterizing the dynamic similarity between converters within a region; and using a hierarchical clustering method to divide the converters into multiple classes based on the homology matrix, wherein the dynamic similarity between converters within a class satisfies the homology criterion, while the dynamic similarity between converters between classes does not satisfy the homology criterion.

[0010] In one embodiment, based on the homology matrix, a hierarchical clustering method is used to divide the converter into multiple classes, including: initializing each converter as an independent class; calculating the inter-class distance between all class pairs, where the inter-class distance is defined as the maximum value of the corresponding elements of any two converters in the homology matrix; merging the two classes with the smallest inter-class distance that is less than a preset threshold; and repeating the steps of calculating the inter-class distance and merging until all inter-class distances are greater than the preset threshold, thus completing the homology classification of the converters.

[0011] In one embodiment, step S30 includes: calculating the voltage of the virtual bus based on the rated power of each converter in the same class; determining the turns ratio of the virtual transformer corresponding to each converter according to the ratio of the output voltage of each converter to the voltage of the virtual bus; and using the turns ratio of the virtual transformer to convert the output voltage and output current of each converter to the virtual bus side to realize the transfer of the converter.

[0012] In one embodiment, step S40 includes: determining the weight of each converter in the aggregation process based on the rated power of each converter; weighted summing of the current, voltage, power of the converter and the internal state variables of the controller based on the parallel relationship of the parallel circuit and in combination with the weights to obtain the aggregation state of the equivalent converter; substituting the converter's own model into the calculation rules of the aggregation state, and obtaining the filter parameters, controller parameters and synchronization link parameters of the equivalent converter through algebraic operations.

[0013] The second aspect of this application relates to a non-parallel heterogeneous converter classification and aggregation device, comprising: a region division module, used to divide the node space of the power system into multiple local regions based on the electrical distance between nodes in the power system; a homology classification module, used to classify different types of converters in each local region according to a preset homology criterion to obtain multiple homology classes; a virtual bus construction module, used to construct a virtual bus for each homology class and transfer all converters in the homology class to the virtual bus through a virtual transformer; and a parameter aggregation and solution module, used to aggregate the states of the converters based on the parallel relationship between converters on the same virtual bus and solve the parameters of the equivalent converter based on the aggregated states.

[0014] Thirdly, this application provides an electronic device, comprising: at least one memory for storing a program; and at least one processor for executing the program stored in the memory, wherein when the program stored in the memory is executed, the processor is configured to execute the method described in the first aspect or any possible implementation thereof.

[0015] Fourthly, this application provides a computer-readable storage medium storing a computer program that, when run on a processor, causes the processor to perform the method described in the first aspect or any possible implementation thereof.

[0016] Fifthly, this application provides a computer program product that, when run on a processor, causes the processor to perform the method described in the first aspect or any possible implementation thereof.

[0017] It is understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here.

[0018] Overall, the technical solutions conceived in this application have the following beneficial effects compared with the prior art: This application divides the power system node space into multiple local regions based on electrical distance in step S10, thereby decomposing a large-scale system into several sub-regions and significantly reducing the computational scale of subsequent coherence identification. Then, in step S20, for each local region, different types of converters in the region are classified according to a preset coherence criterion, which solves the problem that the dynamic similarity between multiple converters is difficult to define and identify accurately, and ensures that converters of the same type meet the aggregation conditions.

[0019] Then, in step S30, a virtual bus is constructed for each homogeneous class and a virtual transformer is introduced to transfer the non-parallel converters that were originally distributed and connected to different nodes to the same virtual bus. This transforms the non-parallel relationship into a parallel relationship without changing the original network structure, overcoming the limitation that the existing aggregation method is only applicable to parallel converters. Finally, in step S40, the states of the converters on the same virtual bus are aggregated based on their parallel relationship, and the aggregated state is used as the aggregation rule to solve the parameters of the equivalent converter, thereby obtaining a simplified equivalent model that is highly consistent with the dynamic response of the original system.

[0020] Therefore, this application effectively solves the problem of the lack of effective classification and aggregation methods for non-parallel heterogeneous converters and the difficulty in reducing the order of multi-converter systems by using a series of technical means such as region pre-division, heterogeneous converter homogeneity classification, virtual bus conversion and weighted aggregation. Compared with the existing technology, it achieves the technical effects of high aggregation accuracy, fast calculation speed and strong interpretability, and is particularly suitable for the rapid analysis of power systems with a high proportion of power electronics. Attached Figure Description

[0021] Figure 1 This is a flowchart illustrating the classification and aggregation method for non-parallel heterogeneous converters provided in the embodiments of this application; Figure 2(a) is a schematic diagram of the original multi-converter system provided in the embodiment of this application; Figure 2(b) is a schematic diagram of the homology classification of the multi-converter system provided in the embodiment of this application; Figure 2(c) is a schematic diagram of constructing a virtual bus provided in the embodiment of this application; Figure 2(d) is a schematic diagram of aggregating similar converters provided in the embodiment of this application. Figure 3 This is a topology diagram of the converter main circuit provided in the embodiments of this application; Figure 4 A schematic diagram of the IEEE 33-node system topology provided for embodiments of this application; Figure 5 A diagram showing the region partitioning results of the IEEE 33-node system provided in this application embodiment; Figure 6(a) is a comparison of the active power at the balance node before and after aggregation in the embodiment of this application; Figure 6(b) is a comparison of the reactive power at the balance node before and after aggregation in the embodiment of this application; Figure 6(c) is a comparison of the power deviation at the balance node before and after aggregation in the embodiment of this application. Figure 7(a) is a comparison of the active power at the balance node before and after aggregation under short-circuit fault provided in the embodiment of this application; Figure 7(b) is a comparison of the reactive power at the balance node before and after aggregation under short-circuit fault provided in the embodiment of this application; Figure 7(c) is a comparison of the power deviation at the balance node before and after aggregation under short-circuit fault provided in the embodiment of this application. Figure 8(a) is a comparison of active power at the equilibrium node under load disturbance before and after aggregation provided in the embodiment of this application; Figure 8(b) is a comparison of reactive power at the equilibrium node under load disturbance before and after aggregation provided in the embodiment of this application; Figure 8(c) is a comparison of power deviation at the equilibrium node under load disturbance before and after aggregation provided in the embodiment of this application. Figure 9 The simulation efficiency comparison results of the system before and after aggregation are shown in the embodiment of this application; Figure 10 This is a schematic diagram of the structure of the non-parallel heterogeneous converter classification and aggregation device provided in the embodiments of this application; Figure 11 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0023] In this application, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A existing alone, A and B existing simultaneously, and B existing alone. In this application, the symbol " / " indicates that the related objects are in an "or" relationship, for example, A / B means A or B.

[0024] In this application, the terms "first" and "second," etc., are used to distinguish different objects, not to describe a specific order of objects. For example, "first response message" and "second response message," etc., are used to distinguish different response messages, not to describe a specific order of response messages.

[0025] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0026] In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more, for example, multiple processing units means two or more processing units, multiple elements means two or more elements, etc.

[0027] Currently, multi-machine aggregation methods have the following problems: the homology identification method can identify the similarity between two converters, but for the dynamic similarity between multiple converters, there is usually a lack of good definition and identification methods; the aggregation method can only aggregate converters connected in parallel at the same node, but for non-parallel converters distributed on different nodes in the system, there is a lack of effective aggregation means without changing the network structure.

[0028] Based on this, this application proposes an embodiment of a classification and aggregation method for non-parallel heterogeneous converters. Please refer to... Figure 1 , Figure 1 This is a flowchart illustrating the non-parallel heterogeneous converter classification and aggregation method provided in the embodiments of this application.

[0029] In this embodiment, the method includes: Step S10: Based on the electrical distance between nodes in the power system, divide the node space of the power system into multiple local regions.

[0030] It should be noted that in a power system, each node typically refers to an endpoint in the power network topology used to connect transmission lines, transformers, loads, generators, and converters. However, in this application, it specifically refers to the grid connection point of each converter or the electrical node where the AC side port of the converter is located. When the system consists of multiple converters, the node set may also include a small number of common connection buses, filter capacitor midpoints, or load connection points, but the main component is the converter port. The advantage of this definition is that the number of nodes is of the same order as the number of converters, avoiding the interference of a large number of converter-less nodes in traditional transmission networks on the partitioning results, and allowing the electrical distance calculation to directly reflect the dynamic coupling between converters.

[0031] It should be noted that electrical distance refers to the degree of electrical connection between two nodes, and is usually defined as a function of the impedance magnitude, voltage sensitivity, or power flow transfer ratio between nodes. It can be obtained through the impedance matrix elements obtained by inverting the node admittance matrix, the voltage-reactive power sensitivity coefficient based on the power flow Jacobian matrix, or the active power transmission distribution factor.

[0032] It should be noted that the node space refers to the mathematical space defined by the set of all nodes in a power system and their electrical relationships. In this space, node coordinates can be obtained from the eigenvectors or spectral embeddings of the electrical distance matrix. The construction of the node space depends on the system topology data and operating parameters, and can be constructed using methods such as Laplace mapping, multidimensional scaling (MDS), or self-organizing mapping (SOM). Its role is to provide the geometric basis for subsequent clustering operations.

[0033] It should be noted that partitioning refers to the process of dividing the node space into several disjoint subsets based on the similarity or difference in electrical distances between nodes. Applicable partitioning algorithms include K-means clustering, spectral clustering, hierarchical clustering, or fast clustering based on density peaks. The partitioning criterion can be set to minimize the sum of electrical distances within subsets while maximizing the electrical distances between subsets. The partitioning result directly affects the accuracy and aggregation efficiency of subsequent homology analysis.

[0034] Understandably, converter coherence identification typically relies on multiple time-domain simulations, but a single simulation of a large-scale multi-converter system takes a considerable amount of time, limiting the efficiency of coherence identification. In fact, when the electrical distance between two converters is sufficiently large, their interaction is very weak and negligible, resulting in significant differences in dynamic characteristics. Furthermore, using electrical distance rather than geographical distance reflects actual power interaction characteristics and avoids zoning bias caused by differences in line length. Therefore, dividing the power system into different regions using electrical distance can significantly reduce the computational scale of a single simulation. Alternative metrics could include reactance distance, coupling degree, or coherence index.

[0035] Understandably, the final obtained local regions are subsets of nodes after partitioning. Nodes within each region have small electrical distances, while the electrical distances between different regions are larger. A typical local region can contain several to dozens of nodes, with the number of converters typically not exceeding one hundred. By forming local regions, the large-scale converter group across the entire network can be decoupled into multiple independent processing units, reducing the computational complexity of subsequent homology classification while preserving key dynamic coupling relationships within the region.

[0036] Step S20: For each local region, classify the different types of converters in the local region according to the preset coherence criterion to obtain multiple coherence classes.

[0037] It should be noted that in this application, different types of converters mainly refer to grid-type converters. Following (GFL) and grid type (Grid) Forming (GFM) are two control types.

[0038] Specifically, GFL converters rely on a phase-locked loop (PLL) to track the grid voltage phase and inject power into the grid in current source mode, commonly found in photovoltaic inverters and grid-connected energy storage PCS. GFM converters, on the other hand, autonomously establish voltage amplitude and frequency, simulating the external characteristics of a synchronous generator, and operate in voltage source mode; typical examples include virtual synchronous machines, droop-controlled energy storage converters, and black-start power supplies. The two differ fundamentally in their dynamic response mechanisms: the inertia of a GFL is determined by the PLL and current loop, with a response time constant typically in the millisecond range, and it is prone to instability under weak grid conditions; a GFM, however, has explicit inertia or damping coefficients, actively supporting the voltage frequency, and its response time constant can reach the hundreds of milliseconds level. Distinguishing between these two control types is a prerequisite for establishing synchronization criteria, because grouping GFLs and GFMs together will cause the equivalent model to lose the crucial differences in voltage / current source characteristics, resulting in distortion in subsequent simulations or stability analyses.

[0039] It should be noted that the coherence criterion in this application specifically refers to the quantitative criteria used to determine whether GFL and GFM converters have similar response characteristics during dynamic processes. Since the control architectures of the two types of converters are different, it is not appropriate to directly use the traditional rotor angle swing curve similarity; instead, a combination of indicators that reflects their essential differences should be adopted. Specifically, the coherence criterion can be designed as: port impedance characteristic criterion, transient voltage response criterion, or power oscillation mode criterion. Using a single indicator can accelerate classification, while using a multi-dimensional composite criterion can overcome the misjudgment of GFL / GFM mixed scenarios by a single indicator, ensuring that the control essence of converters within the coherence category is consistent, thus providing a physically consistent equivalent basis for subsequent aggregation. Therefore, the appropriate criterion can be selected according to actual needs.

[0040] As can be understood, homology classification refers to the process of grouping all GFL and GFM converters separately within each local region based on the aforementioned homology criteria. In practice, firstly, a uniform perturbation is applied to all converters within the region, and the time-domain response sequences of voltage, current, active power, and reactive power at each converter port are collected. Then, the homology criterion index between each pair of converters is calculated. Finally, hierarchical clustering or spectral clustering algorithms are used to group converters that meet the homology threshold into the same category. The classification results should ensure that the control type of converters within the same homology category is consistent, and GFL and GFM are not allowed to be mixed.

[0041] It is understandable that homology classification yields multiple homology classes, which refer to a group of converters obtained after homology classification. These classes not only meet the numerical requirements of the homology criterion but also exhibit strictly consistent control types. Within each homology class, all converters show highly similar trends in their port electrical quantities under the same external disturbances and display uniform control characteristics. This creates conditions for subsequently employing corresponding aggregation strategies, avoiding ambiguity in equivalent model parameters caused by control type aliasing and improving aggregation accuracy.

[0042] Step S30: Construct a virtual bus for each harmonic class, and transfer all converters in the harmonic class to the virtual bus through a virtual transformer.

[0043] It should be noted that the virtual bus refers to an abstract electrical node added for each harmonic class in the mathematical model constructed in this application. This node does not exist in the physical power grid and serves only as an intermediate reference point in the calculation or simulation process. The function of the virtual bus is to provide a common electrical connection point for all converters within the same harmonic class, so that converters originally distributed on different physical nodes of the system can be mathematically regarded as being connected in parallel to the same node. The voltage amplitude and phase of the virtual bus are not directly taken from actual measurements, but are determined by the subsequent aggregation algorithm based on the port characteristics of each converter within the harmonic class and the turns ratio of the virtual transformer.

[0044] It should be noted that a virtual transformer is a mathematical model element used to describe the electrical quantity transformation relationship between each converter and its original physical node and virtual bus. Mathematically, a virtual transformer is equivalent to an ideal transformer, and its turns ratio is determined by the ratio of the original node voltage level to the virtual bus reference voltage, as well as the line impedance reduction factor between the original node and the virtual bus.

[0045] Understandably, a virtual transformer can mathematically and precisely move the port characteristics of a converter from one node to another without changing the original network topology, thus realizing the conversion from non-parallel to virtual parallel. The entire process is reversible, which facilitates subsequent verification and debugging.

[0046] As can be understood, the transfer refers to the process of mapping the port electrical quantities of each converter within the same class of converters, including voltage, current, active power, reactive power, and controller state variables, from the original physical nodes to the virtual bus via a virtual transformer. The effect of the transfer operation is to unify the electrical interfaces of all converters in the same class of converters onto the virtual bus without changing the original system topology, thereby transforming the original non-parallel distributed relationship into a virtual parallel relationship. The specific implementation process typically involves converting actual values ​​into equivalent values ​​and then assigning these equivalent values ​​to the bus as the port characteristics of the converter on the virtual bus. This avoids the economic costs of rewiring and modifying the physical network structure, while preserving the coupling relationships between nodes in the original network (such as line impedance and transformer leakage reactance). This allows subsequent aggregation steps to be performed within a simplified but physically consistent framework, significantly reducing model complexity without affecting the overall steady-state and transient characteristics of the system.

[0047] Step S40: Based on the parallel relationship between converters on the same virtual bus, aggregate the states of the converters, and use the aggregated states as aggregation rules to solve for the parameters of the equivalent converter.

[0048] It should be noted that the parallel connection between converters on the same virtual bus refers to the direct parallel electrical connection of coherent converters that were originally distributed on different physical nodes of the power system after the transfer operation in step S30, on the abstract node of the virtual bus. Under this relationship, all converters share the same virtual bus voltage amplitude and phase, the algebraic sum of the currents injected into the virtual bus is equal to the total current flowing through the virtual bus, and there are no isolation components such as line impedance or transformer leakage reactance between the ports of each converter. At the circuit model level, this is equivalent to multiple controlled current sources (for GFL converters) or multiple controlled voltage sources connected in series with internal resistance (for GFM converters) connected in parallel at the same node.

[0049] Understandably, establishing this parallel relationship is fundamental to subsequent aggregation operations. It enables mathematical simplification of converter groups, which were previously unable to directly apply classical parallel equivalence methods due to their dispersed physical locations. Essentially, it transforms non-parallel topologies into parallel topologies, eliminating the physical topology's limitations on aggregation. This allows the aggregation algorithm to directly apply to all converters within the same homogeneous class, without considering line impedance differences between original nodes, thus significantly simplifying the aggregation calculation process.

[0050] It should be noted that aggregation refers to the process of merging the dynamic models of multiple parallel converters on the same virtual bus into a single equivalent converter model. For the GFL and GFM converters involved in this application, the aggregation method needs to be customized according to the control type: for GFL, the aggregation objects include the proportional-integral coefficients of the phase-locked loop (PLL), the gain and time constant of the inner current loop, the inductor and capacitance values ​​of the LCL filter, the upper and lower limits of the limiting circuit, and the DC-side capacitor voltage, etc.; for GFM, the aggregation objects include the virtual inertia constant, damping coefficient, active-frequency droop coefficient, reactive-voltage droop coefficient, parameters of the outer voltage loop and inner current loop, and output impedance characteristics.

[0051] It should be noted that commonly used aggregation algorithms include: weighted average method, which uses the capacity of each converter as the weight to sum the parameters of the same type, and is suitable for linear parameters; mode preservation method, which retains the dominant oscillation mode of the original multi-unit group through eigenvalue analysis and discards the secondary modes, and is suitable for controller parameters; and external characteristic fitting, which uses the port voltage-current trajectory of the original multi-unit group under typical disturbances as the target and fits the parameters of the equivalent single unit through least squares or intelligent optimization algorithms.

[0052] Understandably, after aggregation, the port-side characteristics of the equivalent converter should maintain an error of less than a preset threshold with the total response of the original multi-machine group within a specified frequency domain. By reducing dozens or even hundreds of converters within the same harmonic class to a single equivalent model, the number of converters in subsequent system-level simulations is reduced to 1 / K of the original (K being the number of harmonic classes). The simulation step size can be appropriately widened, while the calculation speed is improved, and the dominant dynamic characteristics of the original group are preserved.

[0053] Understandably, the aggregated state, acting as the aggregation rule, refers to applying the state variables or boundary conditions of each converter under several key operating conditions before aggregation, as equality or inequality constraints, to the solution process of the equivalent converter parameters. This ensures that the equivalent model's behavior under steady-state, transient, and extreme operating conditions is consistent with the original multi-unit cluster. It prevents the aggregated model from generating optimistic estimates that deviate from reality under extreme operating conditions, enabling the equivalent converter to be used for both normal operating condition analysis and fault verification and protection coordination.

[0054] Understandably, solving for the parameters of the equivalent converter involves determining the specific values ​​of all undetermined parameters in the equivalent converter through numerical optimization or analytical derivation, so that it can reproduce the overall dynamic response of the original multi-machine group as accurately as possible while satisfying the aforementioned state constraints. The solution process typically consists of two steps: first, determining the macroscopic parameters of the equivalent converter based on the constraints; second, identifying the remaining free parameters using optimization algorithms. After the solution is completed, the equivalent converter can replace all converters in the original homogeneous class for subsequent system stability assessment, controller design, or planning simulation. This achieves the reduction of the converter group model order from N×(number per step) to the number of single steps while ensuring model accuracy, and the parameters have clear physical meanings, allowing direct embedding into the custom component library of existing simulation tools without the need for additional dedicated model development.

[0055] It is understood that, referring to Figures 2(a) to 2(d), Figure 2(a) is a schematic diagram of the original multi-converter system provided in the embodiment of this application; Figure 2(b) is a schematic diagram of the homology classification of the multi-converter system provided in the embodiment of this application; Figure 2(c) is a schematic diagram of the construction of a virtual bus provided in the embodiment of this application; and Figure 2(d) is a schematic diagram of the aggregation of similar converters provided in the embodiment of this application.

[0056] Figures 2(a) to 2(d) illustrate the results produced after the above steps. Only the results are described here; the relevant parameters in the figures will be formally introduced below. It can be seen that Figure 2(a) before any steps were performed shows a multi-converter power system. After steps S10 and S20, the original multiple converters in Figure 2(b) were divided into several groups of coherent converters. After step S30, each of the coherent converter groups in Figure 2(c) has its own virtual bus and corresponding virtual transformer (shown in turns ratio). Finally, after step S40, while retaining the virtual bus and virtual transformer, the multiple coherent converter groups in Figure 2(d) are transformed into multiple equivalent converters.

[0057] In summary, by dividing the power system node space into multiple local regions based on electrical distance in step S10, the large-scale system is decomposed into several sub-regions, which significantly reduces the computational scale of subsequent coherence identification. Then, in step S20, for each local region, different types of converters in the region are classified according to a preset coherence criterion, which solves the problem of accurately defining and identifying the dynamic similarity between multiple converters and ensures that converters of the same type meet the aggregation conditions.

[0058] Then, in step S30, a virtual bus is constructed for each homogeneous class and a virtual transformer is introduced to transfer the non-parallel converters that were originally distributed and connected to different nodes to the same virtual bus. This transforms the non-parallel relationship into a parallel relationship without changing the original network structure, overcoming the limitation that the existing aggregation method is only applicable to parallel converters. Finally, in step S40, the states of the converters on the same virtual bus are aggregated based on their parallel relationship, and the aggregated state is used as the aggregation rule to solve the parameters of the equivalent converter, thereby obtaining a simplified equivalent model that is highly consistent with the dynamic response of the original system.

[0059] Therefore, this application effectively solves the problem of the lack of effective classification and aggregation methods for non-parallel heterogeneous converters and the difficulty in reducing the order of multi-converter systems by using a series of technical means such as region pre-division, heterogeneous converter homogeneity classification, virtual bus conversion and weighted aggregation. Compared with the existing technology, it achieves the technical effects of high aggregation accuracy, fast calculation speed and strong interpretability, and is particularly suitable for the rapid analysis of power systems with a high proportion of power electronics.

[0060] Furthermore, this application proposes an embodiment based on the sequential selection of the various algorithms and implementation methods mentioned above.

[0061] Based on the above, before executing step S10, it is necessary to obtain the electrical distance between any two nodes.

[0062] Specifically, obtaining the electrical distance includes: establishing a power grid model in the complex frequency domain of the dq coordinate system under transient conditions to obtain the node impedance matrix; performing matrix decomposition on the imaginary part of the node impedance matrix, and using the row vectors of the obtained decomposed matrix as the coordinates of each node; and calculating the distance between any two nodes as the electrical distance based on the coordinates of each node.

[0063] It should be noted that the dq coordinate system complex frequency domain power grid model under transient conditions refers to the relationship between node voltages and injected currents established in the complex frequency domain (s-domain or Laplace domain) when the power system experiences transient processes such as short circuits, load surges, or converter switching. This model transforms the three-phase AC quantities into the rotating dq coordinate system using the Park transformation. The core of this model is the node admittance matrix or node impedance matrix, where each element is a complex frequency domain function, encompassing the dynamic characteristics of lines, transformers, converter filter elements, and control systems.

[0064] Specifically, the power grid model can be achieved through the node admittance matrix. Description, its elements As shown below: (1).

[0065] in, and They are nodes and nodes The resistance and inductance of the branch circuit; and They are nodes and nodes The resistance and inductance of the branch circuit For nodes Capacitance between ground, This is the rated angular frequency of the power grid. For differential operators in the complex frequency domain, It is the imaginary unit.

[0066] At this point, the nodal admittance matrix The inverse can be used to obtain the nodal impedance matrix. .

[0067] It is understandable that, based on the nodal impedance matrix, the node... With nodes Equivalent impedance between As shown below: (2).

[0068] in, , , , These are all elements of the nodal impedance matrix, representing the nodes respectively. Self-impedance, nodes Self-impedance, nodes With nodes Mutual impedance between nodes With nodes The mutual impedance between them.

[0069] It is understandable that the imaginary part of the nodal impedance matrix is ​​taken. , is a positive definite real symmetric matrix; for The Cholesky decomposition is performed as follows: (3).

[0070] in, It is a lower triangular matrix.

[0071] Understandably, the Cholesky decomposition fully utilizes the positive definite symmetry of the Y matrix, reducing storage and computation by about half, and is less prone to numerical divergence, making it suitable for embedding in real-time or near-real-time calculation programs. After obtaining the nodal impedance matrix, its diagonal elements reflect the nodal self-impedance, and the off-diagonal elements reflect the mutual impedance, providing raw data for subsequent calculations of electrical distance.

[0072] It should be noted that... express No. The row vector of the row, therefore Can be used as a node coordinate vector, Can be used as a node coordinate vector; node and nodes electrical distance between The specific definitions are as follows: (4).

[0073] in, This represents the 2-norm operator. In transient complex frequency domain models, the reactance between two nodes is a core indicator of the ease with which energy exchange occurs between them. Here... It is calculated based on the coordinates defined earlier, giving electrical distance a physical meaning, and should not be understood as directly using the module length as the definition.

[0074] Understandably, the elements of the original impedance matrix may be complex numbers with complex dimensions. This can be addressed by taking the imaginary part and converting it to a scalar distance. This eliminates the influence of dimensions, making the distances between different node pairs comparable. Simultaneously, once the coordinate vector... Once determined, calculating the distance between any two points becomes a simple vector subtraction and trivial modulus calculation, which is highly efficient and suitable for real-time analysis of large-scale multi-converter systems.

[0075] Understandably, once the electrical distance is obtained, step S10 can be executed.

[0076] It should be noted that step S10 is implemented using the K-means algorithm. This algorithm is particularly suitable for processing electrical distance matrices with clear numerical characteristics because of its intuitive principle, fast convergence speed and ease of engineering implementation.

[0077] Specifically, randomly select Nodes As the initial region center; each node is assigned to the region where the region center with the closest electrical distance to it is located, that is, the node... Assign it to the area closest to it electrically, i.e., the area The node space is partitioned by using the average coordinates of all nodes within the region as the new region center and updating it. The node allocation and region center update steps are repeated until the region center meets the preset convergence condition, that is, the region center no longer changes or the specified maximum number of iterations is reached.

[0078] Understandably, here This represents the preset number of homology classes, and its value is usually set by the system size or by engineers based on experience. Although the random selection strategy is simple, it can effectively break symmetry and prevent the algorithm from getting stuck in a very poor solution space.

[0079] Understandably, in the node allocation step, the system iterates through each node. Calculate its relationship with the current regional centers. electrical distance between Then, the node Assigning to the category of the nearest regional center can be mathematically expressed as finding the category that makes... Index of the minimum value .

[0080] It should be noted that before executing step S20, the preset homology criterion needs to be clearly defined.

[0081] Therefore, a control scheme for the GFL converter is established, including phase-locked loop (PLL) units, power control loop, and current control loop. The q-axis voltage output by the GFL converter is selected as the index for synchronization identification, and the corresponding synchronization criteria are as follows: (5).

[0082] in, It represents a small perturbation to a variable; The q-axis voltage output by the GFL converter is relative to time. The function; , It is the index of the converter; This represents the final value for the observation period; The threshold for homology identification is a given positive number.

[0083] Preferably, a control scheme for the GFM converter is established, including a virtual synchronous generator (VSG) algorithm loop, a voltage control loop, and a current control loop. The phase angle, i.e., the virtual power angle, output from the virtual rotor motion equation of the GFM converter is selected as the index for synchronization identification. The corresponding synchronization criteria are as follows: (6).

[0084] Specifically, This is the virtual power angle for the GFM converter.

[0085] It should be noted that GFL and GFM converters are preferably three-phase converters. Figure 3 A converter main circuit topology diagram is shown. Q1 to Q6 are power devices. and These are the inductor and capacitor of the LC filter, respectively. DC voltage and These represent the converter voltage and current, respectively. and These are the converter output voltage and current, respectively. This represents the capacitor current.

[0086] It should be noted that a further distinction is made here between converter voltage and current, and converter output voltage and current. The former can be understood as the voltage and current inside the converter, before filtering by the filter. The voltage and current obtained after filtering are referred to as the latter, namely "converter output voltage" and "converter output current," which are the voltage at the converter's connection point to the grid and the current output to the grid side. The same applies below, and will not be elaborated further.

[0087] Based on this, this embodiment provides control strategies for GFL converters and GFM converters respectively.

[0088] It should be noted that the control strategies for GFL and GFM converters described below are common control strategies, used only to demonstrate the feasibility of this method, and should not be construed as limiting the method described in this application. This method can still be implemented even if the control strategy is switched.

[0089] The control strategy of GFL converter typically consists of five stages: LC filter main circuit stage, phase-locked loop synchronization stage, power calculation and low-pass filtering stage, power outer loop PI control stage, and current inner loop PI control stage.

[0090] The main circuit components of the LC filter are: (7).

[0091] It should be noted that the superscript and Represents the d-axis components and q-axis components. and These represent the converter voltage and current, respectively. and These are the output voltage and output current of the converter, respectively. and These are the inductor and capacitor of the LC filter, respectively. This is the angular frequency of the power grid.

[0092] The phase-locked loop synchronization mechanism is as follows: (8); (9).

[0093] It should be noted that, This represents the q-axis voltage of the GFL converter after MAF filtering. The first-order low-pass approximate cutoff angular frequency of the phase-locked loop MAF of the GFL converter. For the integral state variable of the phase-locked loop PI controller, This is the difference between the phase of the local reference frame and the phase of the global reference frame output by the phase-locked loop. and These are the proportional and integral coefficients of the phase-locked loop PI controller, respectively.

[0094] The power calculation and low-pass filtering process is as follows: (10); (11).

[0095] It should be noted that, and These represent the instantaneous active power and reactive power output by the converter, respectively. and The result is the two after passing through a first-order low-pass filter. This is the cutoff angular frequency of the low-pass filter after power calculation.

[0096] The power outer loop PI control element is: (12); (13).

[0097] It should be noted that, and These are the reference values ​​for the active and reactive power of the converter, respectively. and For the integral state variable of the PI controller in the power loop of the GFL converter, and These are the reference values ​​for the d-axis and q-axis of the inner current loop, respectively. and These are the proportional and integral coefficients of the active power loop PI controller, respectively. and These are the proportional and integral coefficients of the reactive power loop PI controller, respectively.

[0098] The inner loop PI control element for the current is: (14); (15).

[0099] It should be noted that, and For the integral state variable of the current loop PI controller, and These are the proportional and integral coefficients of the current loop PI controller, respectively.

[0100] The GFM converter control strategy typically consists of five stages: the LC filter main circuit stage, the VSG power control stage, the power calculation and low-pass filtering stage, the voltage outer loop PI control stage, and the current inner loop PI control stage.

[0101] The main circuit components of the LC filter are the same as those in equation (7).

[0102] The VSG power control circuit is as follows: (16); (17); (18).

[0103] It should be noted that, The angular frequency output by the VSG algorithm. This represents the difference between the local reference frame phase and the global reference frame phase output by the VSG algorithm. The virtual damping coefficient for the VSG algorithm of the GFM converter. For the virtual rotational inertia of the VSG algorithm, The d-axis reference voltage amplitude output by the VSG algorithm. The integral coefficient of the reactive power element in the VSG algorithm is... This refers to the voltage droop coefficient in the VSG algorithm. and These are the reference values ​​for the d-axis and q-axis of the outer voltage loop, respectively.

[0104] Power calculation and low-pass filtering: Same as equation (10) and equation (11).

[0105] The voltage outer loop PI control element is: (19); (20).

[0106] It should be noted that, and For the integral state variable of the PI controller in the voltage loop of the GFM converter. and These are the proportional and integral coefficients of the voltage loop PI controller, respectively.

[0107] The current inner loop PI control link is the same as that in equation (14) and equation (15).

[0108] Understandably, for GFL converters, the q-axis voltage is usually strongly correlated with reactive power control and is quite sensitive to grid disturbances, effectively reflecting the consistency of the dynamic behavior of GFL converters; for GFM converters, the virtual power angle determines the phase of the converter output voltage and is the most direct physical quantity characterizing its synchronous stability.

[0109] It should be noted that step S20 includes: constructing a homology matrix representing the dynamic similarity between converters within the region; based on the homology matrix, using a hierarchical clustering method to divide the converters into multiple classes, wherein the dynamic similarity between converters within a class satisfies the homology criterion, while the dynamic similarity between converters between classes does not satisfy the homology criterion.

[0110] It is understandable that a homology matrix is ​​constructed for each GFL and GFM converter within each region. Its elements As shown below: (twenty one).

[0111] in, The compatibility index of the converter is, for the GFL converter, it is For GFM converters . Similarly.

[0112] Understandably, elements Characterizing converter With converter The degree of similarity between the dynamic responses is measured, and the similarity is strictly calculated based on the aforementioned preset coherence criterion.

[0113] It should be noted that the converter is divided into multiple classes using a hierarchical clustering method.

[0114] Specifically, each converter is initialized as an independent class; the inter-class distance between all class pairs is calculated, which is defined as the maximum value of the corresponding elements of any two converters in the two classes in the homology matrix. , and Index of the class; and For the first The and the first Each class; merge classes with the smallest distance between them that is less than a preset threshold. Two classes; repeat the steps of calculating inter-class distance and merging until the inter-class distance of all classes is greater than the preset threshold. This method completes the homology classification of converters, ensuring that converters of the same type are necessarily homology in pairs.

[0115] It should be noted that step S30 includes: calculating the voltage of the virtual bus based on the rated power of each converter in the same class; determining the turns ratio of the virtual transformer corresponding to each converter according to the ratio of the output voltage of each converter to the voltage of the virtual bus; and using the turns ratio of the virtual transformer, converting the output voltage and output current of each converter to the virtual bus side to realize the transfer of the converter.

[0116] Specifically, a virtual bus is constructed for each homology class, and the voltage of the virtual bus is... As shown below: (twenty two).

[0117] in, For converter The rated power per unit value, For converter The original output voltage; For the first A collection of converter-like devices.

[0118] Specifically, a virtual transformer is designed for each converter, adjusting the converter's output voltage to match the virtual bus voltage while keeping the voltage and current at the original connection node unchanged; the turns ratio of the virtual transformer... As shown below: (twenty three).

[0119] Specifically, the converter's output voltage and output current are referred to the virtual bus side, as shown below: (twenty four); (25).

[0120] in, and Converters The original output voltage and output current, and Converters The output voltage and output current are converted to the virtual bus side.

[0121] It should be noted that step S40 includes: determining the weight of each converter in the aggregation process based on the rated power of each converter; weighted summing of the current, voltage, power of the converter and the internal state variables of the controller based on the parallel relationship of the parallel circuit and in combination with the weights to obtain the aggregation state of the equivalent converter; substituting the converter's own model into the calculation rules of the aggregation state, and obtaining the filter parameters, controller parameters and synchronization link parameters of the equivalent converter through algebraic operations.

[0122] It should be noted that the converter is defined according to the percentage of rated power. weight .

[0123] It is understandable that, based on the parallel relationship of the converters on the same virtual bus (Kirchhoff's law) and the output equivalence, the state variables of the converters are aggregated as shown in equations (26) to (32).

[0124] (26); (27); Among them, superscript This represents the equivalent variable of the state variables of the right-side converter after aggregation, and therefore will not be named separately. and These represent the converter voltage and current, respectively; the subscript 'o' indicates the output state after filtering; the difference between the converter output voltage and the converter voltage is explained above and will not be repeated here.

[0125] (28); in, and These are the reference values ​​for the active power and reactive power of the converter, respectively. and These are the results of the instantaneous active power and reactive power output from the converter after passing through a first-order low-pass filter, respectively.

[0126] (29); (30); (31); (32); in, This is the q-axis voltage of the GFL converter after MAF filtering; For the integral state variable of the phase-locked loop PI controller, satisfying ; This is the difference between the phase of the local reference frame and the phase of the global reference frame output by the phase-locked loop; The angular frequency output by the VSG algorithm; This is the difference between the local reference frame phase and the global reference frame phase output by the VSG algorithm; The d-axis reference voltage amplitude output by the VSG algorithm; and For the integral state variable of the PI controller of the GFL converter power loop, satisfying and ; and For the integral state variable of the voltage loop PI controller of the GFM converter, satisfying and ,and , ; and For the integral state variables of the two converter current loop PI controllers, satisfying and , and This is the reference current for the current loop.

[0127] Finally, by substituting the converter models of equations (7) to (20) into the aggregation rules of the state variables of the corresponding homology class, the equivalent converter parameters can be obtained as shown in equations (33) to (41).

[0128] (33); Equation (33) is the equivalent result of the LC filter parameters.

[0129] (34); (35); Equations (34) and (35) are equivalent results of the parameters of the PLL synchronization link of the GFL converter.

[0130] (36); (37); Equations (36) and (37) are equivalent results of the parameters of the VSG synchronization link of the GFM converter.

[0131] (38); Equation (38) is the equivalent result of the first-order low-pass filter parameters in the power calculation stage.

[0132] (39); (40); (41); Equation (39) is the equivalent result of the power loop parameters of the GFL converter; Equation (40) is the equivalent result of the voltage loop parameters of the GFM converter; Equation (41) is the equivalent result of the current loop parameters of the GFL and GFM converters.

[0133] It should be noted that equations (33) to (41) are a result presentation. The variables in equations (33) to (41) are all well-known definitions in this field and will not be elaborated further.

[0134] The following is a visual demonstration of the entire process of calculating the state variable expressions corresponding to equations (7) to (20) according to the aggregation rules (26) to (32). Specifically, first, the state variables on the left side of the equations (7) to (20) are identified, and then they are adjusted to the corresponding summation or weighted average forms in (26) to (32). Using the aggregation rules (26) to (32), and comparing them with the dynamic equations of the equivalent converter after aggregation, the expressions (33) to (41) of each parameter of the equivalent converter can be obtained. The calculation of an equivalent inductance is used as an example for illustration.

[0135] From equation (7) Adjusting to summation form, we get: (42): Right now (43).

[0136] because , ,then: (44).

[0137] Since the aggregated equivalent converter has the same dynamic form as the original converter, that is... (45).

[0138] Finally, by comparison, we can obtain the above equation in equation (33), and the calculation of the remaining parameters can be obtained in the same way.

[0139] Based on the content of this embodiment, this application is verified using an IEEE 33-bus system. The IEEE 33-bus system comprises eight GFL and eight GFM converters, and the system structure diagram is as follows. Figure 4 As shown, Figure 4 This is a schematic diagram of the IEEE 33-node system topology provided in an embodiment of this application. The blue and orange converter labels in the diagram correspond to GFL and GFM converters, respectively. Node 0 in the system is the slack line of the power grid, with a constant voltage of 10.5kV; the converter control parameters are shown in Table 1.

[0140] Table 1. Parameters of grid-connected converters:

[0141] Write the corresponding program in the computational software MATLAB R2024b and run the corresponding simulation in the simulation software Simulink R2024b. The computing device used is a laptop computer with a quad-core Intel i7-1165G7 processor, 16GB RAM, and running the Windows 11 operating system.

[0142] Set the number of region clusters The system region division results are as follows: Figure 5 As shown, Figure 5 This diagram illustrates the region partitioning results of the IEEE 33-node system provided in this embodiment. For ease of visualization, t-SNE dimensionality reduction is used to display the node coordinates on a two-dimensional plane. The results show that the electrical distance between nodes within the same region is small, while the electrical distance between nodes in different regions is large, thus verifying the effectiveness of partitioning the system regions based on electrical distance.

[0143] Based on the regional division results, regional synchronization identification was performed on the 16 converters within the system. A threshold for synchronization identification was set. The converter classification results are shown in Table 2. The 16 converters in the system were finally divided into 9 homogeneous classes.

[0144] Table 2. Converter Coherence Classification Results:

[0145] It should be noted that virtual buses C1 to C9 are constructed and similar converters are aggregated to obtain the aggregated system. To verify the dynamic equivalent accuracy of the aggregated model, three operating conditions were set: starting with rated load, a three-phase short circuit at node 32, and the load at node 2 being reduced to 1 / 3 of the original load. The dynamic changes of active and reactive power during the transient process were obtained through simulation. The results of the three operating conditions are shown in Figures 6(a) to 8(c).

[0146] Figure 6(a) shows the comparison of active power at the balancing node before and after aggregation in this embodiment; Figure 6(b) shows the comparison of reactive power at the balancing node before and after aggregation in this embodiment; and Figure 6(c) shows the comparison of power deviation at the balancing node before and after aggregation in this embodiment. Power deviation is defined as the per-unit value of the difference between the power of the complete system and the power of the aggregated system. The results show that the power changes of the aggregated system and the complete system are basically consistent, which indirectly illustrates that the construction of the virtual network and the aggregation of converters have an acceptable impact on the real network. During the transient process, the maximum relative error of active power is less than 2.8%, and the maximum relative error of reactive power is less than 4.5%. These values ​​converge to 0.3% and 2.1% respectively in steady state, meeting the accuracy requirements for stable operation. The results show that the proposed aggregation method can accurately represent the transient characteristics of the complete system startup process.

[0147] Figure 7(a) shows the comparison of active power at the balance node before and after aggregation under short-circuit faults provided in the embodiments of this application; Figure 7(b) shows the comparison of reactive power at the balance node before and after aggregation under short-circuit faults provided in the embodiments of this application; Figure 7(c) shows the comparison of power deviation at the balance node before and after aggregation under short-circuit faults provided in the embodiments of this application. When a short-circuit fault occurs, the active power of both the aggregated system and the complete system undergoes a momentary small-amplitude drop, and the timing and magnitude of the drop are almost identical. Furthermore, during the transient process after the fault, the dynamic response trajectories of the active power highly overlap. The reactive power of the two systems experiences a large synchronous drop, and the trends of change match. During the short-circuit process, the deviation between active power and reactive power is almost no more than 0.02 pu and quickly converges to near 0. The results show that the proposed aggregation method can accurately represent the transient characteristics of the short-circuit fault process of the complete system.

[0148] Figure 8(a) shows the comparison of active power at the equilibrium node before and after load disturbance provided in the embodiment of this application; Figure 8(b) shows the comparison of reactive power at the equilibrium node before and after load disturbance provided in the embodiment of this application; Figure 8(c) shows the comparison of power deviation at the equilibrium node before and after load disturbance provided in the embodiment of this application. After the load disturbance occurs, the active power of the aggregated system and the complete system exhibit synchronous instantaneous impact peaks. The peak occurrence time and peak amplitude of the two systems are almost identical, and the change law of active power is consistent with the dynamic response trajectory during the transient process after the disturbance. The reactive power of the two systems also oscillates synchronously, and the change trends are matched. Although there is an oscillation period, the deviation between active power and reactive power eventually converges and is basically the same as the power deviation before the load disturbance. The results show that the proposed aggregation method can accurately represent the transient characteristics of the load change process of the complete system.

[0149] It is understandable that, after integrating all the above data, it was found that during the transient process, the maximum relative error of active power was less than 2.8%, and the maximum relative error of reactive power was less than 4.5%, which met the requirements for operational accuracy.

[0150] It should be noted that different simulation stop times were set and the actual computation time of the two sets of models was recorded under different simulation durations, such as... Figure 9 As shown, Figure 9 The figure shows a comparison of the simulation efficiency of the system before and after aggregation, as provided in the embodiments of this application. Figure 9 The time cost is defined as the actual time consumed to complete a given simulation duration (the time the simulation stops) after execution. Results show that the computation time of the aggregated system is approximately half that of the complete system, effectively improving computational efficiency and validating the effectiveness of the proposed method.

[0151] In summary, implementing the method proposed in this application has the following beneficial effects: This application provides a homology classification method for heterogeneous converters, which reduces the computational scale of homology identification through region pre-division and strictly guarantees the pairwise homology of converters of the same type, thus solving the homology identification problem among multiple converters.

[0152] This application provides a weighted aggregation method based on a virtual bus strategy, which solves the aggregation problem of non-parallel converters distributed in different nodes of the system without changing the original network structure, and balances aggregation accuracy and computational efficiency.

[0153] The following describes the non-parallel heterogeneous converter classification and aggregation device provided in this application. Please refer to... Figure 10 The non-parallel heterogeneous converter classification and aggregation device described below and the non-parallel heterogeneous converter classification and aggregation method described above can be referred to in correspondence.

[0154] In this embodiment, the non-parallel heterogeneous converter classification and aggregation device includes: The region division module T10 is used to divide the node space of the power system into multiple local regions based on the electrical distance between the nodes in the power system.

[0155] The coherence classification module T20 is used to classify different types of converters in each local area based on a preset coherence criterion, and obtain multiple coherence classes.

[0156] The virtual bus construction module T30 is used to construct a virtual bus for each harmonic class and transfer all converters in the harmonic class to the virtual bus through a virtual transformer.

[0157] The parameter aggregation and solution module T40 is used to aggregate the states of converters based on the parallel relationship between converters on the same virtual bus, and solve for the parameters of the equivalent converter based on the aggregated states.

[0158] It is understood that the detailed functional implementation of each of the above units / modules can be found in the description in the aforementioned method embodiments, and will not be repeated here.

[0159] It should be understood that the above-described device is used to execute the methods in the above embodiments. The implementation principle and technical effect of the corresponding program modules in the device are similar to those described in the above methods. The working process of the device can be referred to the corresponding process in the above methods, and will not be repeated here.

[0160] Based on the methods in the above embodiments, please refer to Figure 11This application provides an electronic device that may include a processor, a communications interface, a memory, and a communication bus. The processor, communications interface, and memory communicate with each other via the communication bus. The processor can invoke logical instructions stored in the memory to execute the methods described in the above embodiments.

[0161] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application.

[0162] Based on the methods in the above embodiments, this application provides a computer-readable storage medium storing a computer program that, when run on a processor, causes the processor to execute the methods in the above embodiments.

[0163] Based on the methods in the above embodiments, this application provides a computer program product that, when run on a processor, causes the processor to execute the methods in the above embodiments.

[0164] It is understood that the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor or any conventional processor.

[0165] The method steps in this application embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can reside in an ASIC.

[0166] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0167] It is understood that the various numerical designations used in the embodiments of this application are merely for the convenience of description and are not intended to limit the scope of the embodiments of this application.

[0168] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for classifying and aggregating non-parallel heterogeneous converters, characterized in that, include: Step S10: Based on the electrical distance between each node in the power system, the node space of the power system is divided into multiple local regions; Step S20: For each local region, classify the different types of converters in the local region according to the preset coherence criterion to obtain multiple coherence classes; Step S30: Construct a virtual bus for each homogeneous class, and transfer all converters in the homogeneous class to the virtual bus through a virtual transformer; Step S40: Based on the parallel relationship between converters on the same virtual bus, aggregate the states of the converters, and solve for the parameters of the equivalent converter based on the aggregated states.

2. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 1, characterized in that, Step S10, which also includes the following: A complex frequency domain power grid model under transient conditions is established, and the node impedance matrix is ​​obtained; The imaginary part of the node impedance matrix is ​​decomposed, and the row vectors of the resulting decomposed matrix are used as the coordinates of each node. Based on the coordinates of each node, the distance between any two nodes is calculated as the electrical distance.

3. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 2, characterized in that, Step S10 includes: Randomly select multiple nodes as the initial region center; Each node is assigned to the region where the region center is closest to it electrically, and the region center is updated based on the average coordinates of all nodes in the region; Repeat the steps of node allocation and region center update until the region center meets the preset convergence condition, thus completing the partitioning of the node space.

4. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 1, characterized in that, Step S20 includes: Construct a homology matrix that characterizes the dynamic similarity among converters within the region; Based on the homology matrix, a hierarchical clustering method is used to divide the converters into multiple classes. The dynamic similarity between converters within a class satisfies the homology criterion, while the dynamic similarity between converters between classes does not satisfy the homology criterion.

5. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 4, characterized in that, Based on the aforementioned homology matrix, a hierarchical clustering method is used to divide the converter into multiple classes, including: Initialize each converter as a separate class; Calculate the inter-class distance between all class pairs, where the inter-class distance is defined as the maximum value of the corresponding elements of any two converters in the two classes in the homogeneity matrix; Merge the two classes with the smallest inter-class distance that is less than a preset threshold; Repeat the steps of calculating inter-class distances and merging until all inter-class distances are greater than the preset threshold, thus completing the homogeneity classification of the converter.

6. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 1, characterized in that, Step S30 includes: Calculate the voltage of the virtual bus based on the rated power of each converter in the homogeneous class; The turns ratio of the virtual transformer corresponding to each converter is determined based on the ratio of the output voltage of each converter to the voltage of the virtual bus. By utilizing the turns ratio of the virtual transformer, the output voltage and output current of each converter are converted to the virtual bus side to realize the transfer of the converter.

7. The method for classifying and aggregating non-parallel heterogeneous converters as described in claim 1, characterized in that, Step S40 includes: The weight of each converter in the aggregation process is determined based on its rated power. Based on the parallel relationship of the parallel circuit and combined with the weights, the current, voltage, power of the converter and the internal state variables of the controller are weighted and summed to obtain the aggregate state of the equivalent converter. Substitute the converter's own model into the calculation rules of the aggregation state, and obtain the filter parameters, controller parameters, and synchronization link parameters of the equivalent converter through algebraic operations.

8. A non-parallel heterogeneous converter classification and aggregation device, characterized in that, The device includes: The region division module is used to divide the node space of the power system into multiple local regions based on the electrical distance between each node in the power system. The homology classification module is used to classify different types of converters in each local area based on a preset homology criterion, and obtain multiple homology classes. The virtual bus construction module is used to construct a virtual bus for each homogeneous class and transfer all converters in the homogeneous class to the virtual bus through a virtual transformer. The parameter aggregation and solution module is used to aggregate the states of the converters based on the parallel relationship between the converters on the same virtual bus, and solve for the parameters of the equivalent converter based on the aggregated states.

9. An electronic device, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the non-parallel heterogeneous converter classification and aggregation method as described in any one of claims 1 to 7.

10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the non-parallel heterogeneous converter classification and aggregation method as described in any one of claims 1 to 7.