Oscillation elimination circuit and method for a transformer

Abstract

The present application belongs to the technical field of switching power supply, and discloses a transformer oscillation elimination circuit and method, the transformer oscillation elimination circuit comprising: a control circuit for outputting complementary first pulse width modulation signals and second pulse width modulation signals according to actual output voltage values and set output voltage values; a magnetic reset winding active drive circuit for driving a magnetic reset winding of a high-frequency transformer according to the first pulse width modulation signals; an excitation winding drive circuit for driving an excitation winding of the high-frequency transformer according to the second pulse width modulation signals; a high-frequency transformer; an upper tube drive circuit for driving a third power tube to open according to a drive signal output by a first secondary winding; a lower tube drive circuit; and a power conversion circuit for converting and transmitting an input direct current voltage to an output end. The present application can clamp the excitation winding and each secondary winding after the magnetic reset winding completes demagnetization, thereby avoiding power switch tube mis-conduction caused by resonance waveform transmission.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, and in particular to an oscillation elimination circuit and method for a transformer. Background Technology

[0002] With the development of new energy technologies, power converters are increasingly demanding higher power density. In order to reduce losses and decrease equipment size, the DC bus voltage of power converters is usually designed to be relatively high, reaching 750V, and in some special applications, it may even reach 1000V or higher.

[0003] Auxiliary power supplies, as an important component of power converters, are typically small in power and often employ flyback power supply schemes. Among them, dual-transistor flyback power supplies have advantages such as high efficiency, simple structure, and low voltage withstand requirements for power switches, and are therefore widely used in high-voltage DC bus voltage applications. Because the two power switches in a dual-transistor flyback power supply are connected in series, with the lower transistor's source grounded and the upper transistor's source floating, reliable floating ground drive for the upper transistor is required. Oscillation suppression during transformer drive directly affects the reliable turn-on and turn-off of the power switches.

[0004] Existing driving schemes for dual-transistor flyback power supplies typically include: First, using a dedicated driver chip, which can drive the upper transistor via bootstrapping, but its design voltage rating is usually limited, making it difficult to meet the application requirements of high-voltage DC bus voltage applications; Second, a magnetic isolation transformer drive with a single capacitor DC blocking scheme, which can achieve isolation transmission between the control side and the power side, but the single-gate drive voltage is easily affected by the duty cycle, and may lead to a low drive voltage amplitude under large duty cycles; Third, a magnetic isolation transformer drive with a dual capacitor DC blocking scheme, which can improve the drive amplitude problem, but relies on voltage multiplier capacitors for drive, and the capacitor voltage will change with the drive process. When driving different numbers of power switches, the capacitor parameters need to be rematched, resulting in poor versatility; Fourth, a magnetic reset winding isolation transformer drive, such as... Figure 5 As shown, this scheme adds a reset winding to the transformer. The amplitude of the drive voltage output by the control circuit is only a ratio to the amplitude of the drive voltage of the power switch after the transformer, and is independent of the duty cycle and the number of drive power transistors. However, this scheme also has the risk of leakage inductance energy oscillation causing the power switch to mis-turn on, such as... Figure 6 As shown.

[0005] Therefore, it is evident that existing drive schemes in dual-transistor flyback power supplies with high-voltage DC bus voltage still suffer from insufficient reliability. On the one hand, if the drive voltage amplitude varies with the duty cycle or drive load, it can easily lead to insufficient drive in scenarios with large duty cycles or multiple power transistors, affecting the reliable turn-on of the power switches. On the other hand, the isolation transformer will oscillate due to leakage inductance energy and parasitic capacitance after switching. When the transformer winding is not effectively clamped, the resonant waveform on the primary side may be transmitted to the secondary side through the transformer, causing abnormal drive voltage at the gate of the power switch, thus posing a risk of false turn-on.

[0006] Therefore, how to reduce the risk of false turn-on caused by the oscillation of the isolation drive transformer while ensuring the stability of the drive voltage amplitude of the dual-tube flyback power supply has become an urgent problem to be solved. Summary of the Invention

[0007] This invention provides a transformer oscillation elimination circuit and method to solve the above-mentioned problems existing in the prior art.

[0008] According to a first aspect of the present invention, an oscillation cancellation circuit for a transformer is provided.

[0009] In one embodiment, the oscillation cancellation circuit of the transformer includes: a control circuit for outputting complementary first pulse width modulation (PWM) signals and second pulse width modulation (PWM) signals based on the actual output voltage value and a set output voltage value; a magnetic reset winding active drive circuit for driving the magnetic reset winding of the high-frequency transformer according to the first PWM signal; a magnetizing winding drive circuit for driving the magnetizing winding of the high-frequency transformer according to the second PWM signal; a high-frequency transformer for transmitting an isolation drive signal to the upper and lower drive circuits of the dual-transistor flyback power supply through the magnetizing winding, the first stage winding, and the second stage winding; and an upper drive circuit. The third power transistor is driven to turn on by the drive signal output from the first winding and to discharge the gate charge of the third power transistor during the turn-off phase. The lower transistor drive circuit is used to drive the fourth power transistor to turn on by the drive signal output from the second winding and to discharge the gate charge of the fourth power transistor during the turn-off phase. The power conversion circuit is used to convert the input DC voltage and transmit it to the output terminal through the synchronously driven third and fourth power transistors. Among them, the magnetic reset winding active drive circuit remains on after the high-frequency transformer is demagnetized so that the magnetizing inductance of the high-frequency transformer does not participate in the resonance between the leakage inductance and parasitic capacitance.

[0010] According to a second aspect of the present invention, a method for eliminating transformer oscillations is provided.

[0011] In one embodiment, the oscillation elimination method of the transformer includes: step S101, the control circuit outputs a high-level second pulse width modulation signal and a low-level first pulse width modulation signal; step S102, the excitation winding drive circuit is turned on, the magnetic reset winding active drive circuit is turned off, the excitation winding is energized, and the first stage winding and the second stage winding output turn-on drive signals to drive the third power transistor and the fourth power transistor to conduct synchronously; step S103, when the conduction time of the third power transistor and the fourth power transistor reaches the turn-on time determined by the control circuit, the control circuit outputs a low-level second pulse width modulation signal and a high-level first pulse width modulation signal; Step S104: The excitation winding drive circuit is cut off, the magnetic reset winding active drive circuit is turned on, the magnetic reset winding demagnetizes the high-frequency transformer, and the first and second stage windings output turn-off drive signals to turn off the third and fourth power transistors; Step S105: After the magnetic reset winding completes demagnetization, the magnetic reset winding active drive circuit remains on, and the magnetic reset winding clamps the excitation winding, the first stage winding, and the second stage winding, so that the excitation inductance of the high-frequency transformer does not participate in the resonance between the leakage inductance and the parasitic capacitance; Step S106: After one switching cycle ends, steps S101 to S105 are repeated.

[0012] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects: (1) This invention achieves isolated driving of the dual-tube flyback power supply through the magnetic reset winding, excitation winding and secondary winding of the high-frequency transformer, so that the driving signal output by the control circuit can be transmitted to the upper tube driving circuit and the lower tube driving circuit through the transformer. Since the driving voltage amplitude of the power switching tube is mainly determined by the control side driving voltage and the winding ratio of the high-frequency transformer, the driving amplitude no longer changes significantly with the duty cycle or the number of driving power tubes, which is beneficial to ensure the synchronous turn-on of the power tubes in high-voltage DC bus voltage applications.

[0013] (2) The present invention changes the magnetic reset winding from a passive reset method to an active drive method. During the power switch turn-off stage, the magnetic reset winding active drive circuit drives the winding to demagnetize the high-frequency transformer, which can prevent the high-frequency transformer from becoming magnetically saturated. On this basis, after the magnetic reset winding has completed demagnetization, the magnetic reset winding active drive circuit continues to be turned on, so that the magnetic reset winding clamps the excitation winding and each secondary winding, thereby preventing the primary side excitation inductor from participating in the resonance between leakage inductance and parasitic capacitance, and avoiding the resonance waveform from continuing to couple to the secondary side.

[0014] (3) In the clamping stage after demagnetization, the voltage of other windings of the high-frequency transformer is limited to near zero, thus reducing the possibility of abnormal driving voltage formed by winding oscillation on the secondary side and reducing the risk of power switch tube mis-turn-on. Compared with the scheme that relies on voltage multiplier capacitor to maintain driving voltage, the present invention does not need to suppress residual voltage of capacitor through parallel discharge resistor, avoiding efficiency loss and driving amplitude reduction caused by discharge resistor. The overall driving method is more suitable for dual-tube flyback auxiliary power supply application on high voltage DC bus.

[0015] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0017] Figure 1 This is a circuit diagram of a transformer oscillation cancellation circuit according to an exemplary embodiment; Figure 2 This is a circuit schematic diagram of a drive circuit according to an exemplary embodiment; Figure 3 This is a schematic diagram of the current flow direction of the magnetic reset winding active drive circuit in stage t2, according to an exemplary embodiment. Figure 4 This is a schematic diagram of the current flow of the active drive circuit for the magnetic reset winding in stage t3, according to an exemplary embodiment. Figure 5 This is a circuit schematic diagram of a magnetic reset winding isolation transformer drive circuit according to an exemplary embodiment; Figure 6 This is a waveform diagram of a magnetic reset winding isolation transformer drive circuit according to an exemplary embodiment; Figure 7 This is a waveform diagram of a transformer oscillation cancellation circuit according to an exemplary embodiment; Figure 8 A schematic block diagram of a transformer oscillation cancellation circuit is shown according to an exemplary embodiment. Figure 9 This is a schematic flowchart illustrating a transformer oscillation elimination method according to an exemplary embodiment.

[0018] In the picture: I. Control circuit; II. Active drive circuit for magnetic reset winding; III. Drive circuit for excitation winding; IV. High-frequency transformer; V. Upper MOSFET drive circuit; VI. Lower MOSFET drive circuit; VII. Power conversion circuit. Detailed Implementation

[0019] The following description and accompanying drawings fully illustrate specific embodiments described herein to enable those skilled in the art to practice them. Some portions and features of certain embodiments may be included in or replace portions and features of other embodiments. The scope of the embodiments herein includes the entire scope of the claims and all available equivalents thereof. The various embodiments described herein are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments; similar or identical parts between embodiments can be referred to interchangeably.

[0020] The modules in the apparatus or system of this application can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0021] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0022] Figure 1 An embodiment of an oscillation cancellation circuit for a transformer according to the present invention is shown.

[0023] In this optional embodiment, the oscillation elimination circuit of the transformer includes: a control circuit I, used to output a complementary first pulse width modulation signal PWM1 and a second pulse width modulation signal PWM2 according to the actual output voltage value and the set output voltage value; a magnetic reset winding active drive circuit II, used to drive the magnetic reset winding Np1 of the high-frequency transformer IV according to the first pulse width modulation signal PWM1 to demagnetize the high-frequency transformer IV, and continue to clamp the other windings of the high-frequency transformer IV (i.e., the excitation winding Np2, the primary winding Ns1, and the secondary winding Ns2) after demagnetization; an excitation winding drive circuit III, used to drive the excitation winding Np2 of the high-frequency transformer IV according to the second pulse width modulation signal PWM2 to transfer the driving energy to the secondary winding of the high-frequency transformer IV; and a high-frequency transformer IV, used to drive the excitation winding Np2 and the primary winding Ns1 through the excitation winding Np2 and the primary winding Ns1. The second-stage winding Ns2 transmits the isolation drive signal to the upper-stage drive circuit V and the lower-stage drive circuit VI of the dual-transistor flyback power supply. The upper-stage drive circuit V is used to drive the third power transistor VT3 to turn on according to the drive signal output by the first-stage winding Ns1, and to discharge the gate charge of the third power transistor VT3 during the turn-off phase. The lower-stage drive circuit VI is used to drive the fourth power transistor VT4 to turn on according to the drive signal output by the second-stage winding Ns2, and to discharge the gate charge of the fourth power transistor VT4 during the turn-off phase. The power conversion circuit VII is used to convert the input DC voltage and transmit it to the output terminal through the synchronously driven third power transistor VT3 and fourth power transistor VT4. Among them, the magnetic reset winding active drive circuit II remains on after the high-frequency transformer IV is demagnetized, so that the magnetizing inductance of the high-frequency transformer IV does not participate in the resonance between the leakage inductance and the parasitic capacitance.

[0024] It should be noted that, based on the magnetic reset winding isolation transformer drive scheme, this invention addresses its shortcomings by proposing a transformer oscillation elimination circuit and method. The magnetic reset diode is replaced with an active drive scheme. After the magnetic reset winding is demagnetized, the actively driven MOS transistor remains on, clamping the other windings of the transformer. The magnetizing inductor on the primary side will not participate in resonance, preventing its resonant waveform from being transmitted to the secondary side. This method ensures both a fixed driving voltage amplitude for the power switch and eliminates the drive oscillation problem, providing a reliable dual-path drive for the dual-transistor flyback power supply. For example... Figure 8 As shown, the oscillation elimination circuit of the transformer includes a control circuit I, a magnetic reset winding active drive circuit II, an excitation winding drive circuit III, a high-frequency transformer IV, an upper tube drive circuit V, a lower tube drive circuit VI, and a power conversion circuit VII.

[0025] Specifically, the main function of control circuit I is to output two PWM drive waveforms, PWM1 and PWM2, according to the control loop, wherein PWM1 and PWM2 are complementary. Control circuit I includes an isolation operational amplifier U99, resistors R90 and R100, an unisolated operational amplifier U100, resistors R110, capacitor C30, power supply chip U88, and NOT gate U200.

[0026] Specifically, the magnetic reset winding active drive circuit II includes diodes VD0 and VD1, resistors R1 and R2, field-effect transistor VT1, and resistor R50. Its main function is to control winding Np1 to achieve demagnetization of transformer body T1 and winding clamping after demagnetization. Diodes VD1 and VD0 are switching diodes.

[0027] Specifically, the excitation winding drive circuit III includes electrolytic capacitor E1, diode VD3, resistor R5, resistor R6, and field-effect transistor VT2. Its main function is to control the excitation winding Np2 and transmit the PWM wave of control circuit I to the secondary windings Ns1 and Ns2 of transformer body T1, thereby driving the power switching transistor. Among them, diode VD3 is a switching diode.

[0028] Specifically, the high-frequency transformer IV includes windings Np1, Np2, Ns1, and Ns2, with a ferrite core. The two main power transistors VT3 and VT4 of the dual-transistor flyback power supply are connected in series and driven synchronously. Furthermore, the upper transistor VT3 requires floating ground drive. The high-frequency transformer IV can transmit the drive PWM2 of the power chip to windings Ns1 and Ns2 through the winding turns ratio to drive the two main power transistors VT3 and VT4. Pin 1 of the above four windings is the same name terminal, and the typical transformer turns ratio is Np1:Np2:Ns1:Ns2=1:1:1:1.

[0029] Specifically, the upper transistor drive circuit V includes capacitor C10, resistor R8, diode VD4, resistor R7, transistor VT5, resistor R10, and resistor R9. Its main function is to drive the power switch transistor VT3 to turn on and turn off under negative voltage. Diode VD4 is a switching diode, and transistor VT5 is a PNP switching transistor.

[0030] Specifically, the lower transistor drive circuit VI includes capacitor C11, resistor R12, diode VD5, resistor R11, transistor VT6, resistor R14, and resistor R13. Its main function is to drive the power switch transistor VT4 to turn on and turn off under negative voltage. Diode VD5 is a switching diode, and transistor VT6 is a PNP switching transistor.

[0031] Specifically, the power conversion circuit VII includes power transistors VT3 and VT4, a power transformer T10, a power diode VD80, and an electrolytic capacitor E20. Its main function is for power transistors VT3 and VT4 to convert the high-voltage DC voltage VDC into AC voltage, transfer the energy to the output through the power transformer T10, and then convert it back into DC voltage through the power diode VD80. Among them, power transistor VT3 is connected in series with the winding Np3 of the power transformer T10 and power transistor VT4, and the driving of power transistors VT3 and VT4 is synchronized.

[0032] In this optional embodiment, the first pulse width modulation signal output terminal of control circuit I is connected to the active drive circuit II for the magnetic reset winding, and the second pulse width modulation signal output terminal of control circuit I is connected to the excitation winding drive circuit III; the active drive circuit II for the magnetic reset winding is connected to the magnetic reset winding Np1 of the high-frequency transformer IV, and the excitation winding drive circuit III is connected to the excitation winding Np2 of the high-frequency transformer IV; the first stage winding Ns1 of the high-frequency transformer IV is connected to the upper transistor drive circuit V, and the second stage winding Ns2 of the high-frequency transformer IV is connected to the lower transistor drive circuit VI; the upper transistor drive circuit V is connected to the third power transistor VT3 in the power conversion circuit VII, and the lower transistor drive circuit VI is connected to the fourth power transistor VT4 in the power conversion circuit VII; the output terminal of the power conversion circuit VII is connected to control circuit I to feed back the actual output voltage value to control circuit I.

[0033] In this alternative embodiment, such as Figure 2 As shown, control circuit I includes isolation operational amplifier U99, resistors R90 and R100, error operational amplifier U100, resistor R110, capacitor C30, power supply chip U88, and inverter U200. The input terminal of isolation operational amplifier U99 is used to receive the actual output voltage value, and the output terminal of isolation operational amplifier U99 is connected to the inverting input terminal of error operational amplifier U100 through resistor R90. The non-inverting input terminal of error operational amplifier U100 receives the set output voltage value through resistor R100, and the inverting input terminal of error operational amplifier U100 is connected to the output terminal of error operational amplifier U100 through resistor R110 and capacitor C30. The output terminal of error operational amplifier U100 is connected to power supply chip U88, and power supply chip U88 outputs a second pulse width modulation signal PWM2. The second pulse width modulation signal PWM2 is inverted by inverter U200 to form a first pulse width modulation signal PWM1.

[0034] Specifically, in control circuit I, the input of isolation operational amplifier U99 is connected to the actual output voltage, and the output is connected to one end of resistor R90; the other end of resistor R90 is connected to the inverting pin of operational amplifier U100; one end of resistor R100 is connected to the set output voltage, and the other end is connected to the non-inverting pin of operational amplifier U100; one end of resistor R110 is connected to the inverting pin of operational amplifier U100, and the other end is connected to capacitor C30; the other end of capacitor C30 is connected to the output of operational amplifier U100, and then connected to power chip U88; the power chip outputs PWM2 signal and is connected to the input of inverter U200; inverter U200 outputs PWM1 signal; PWM1 is connected to the magnetic reset winding active drive circuit II, and PWM2 is connected to the excitation winding drive circuit III.

[0035] In this optional embodiment, the active drive circuit II for the magnetic reset winding includes diode VD1, diode VD0, resistors R1, R2, and R50, and a first field-effect transistor VT1. The cathode of diode VD1 is connected to one end of resistor R1 and receives the first pulse width modulation signal PWM1. The anode of diode VD1, the other end of resistor R1, and one end of resistor R2 are connected to the gate of the first field-effect transistor VT1. The other end of resistor R2 is connected to the source of the first field-effect transistor VT1 and grounded. The drain of the first field-effect transistor VT1 is connected to one end of resistor R50 and the anode of diode VD0. The other end of resistor R50 is connected to the cathode of diode VD0 and to the first end of the magnetic reset winding Np1 of the high-frequency transformer IV. The resistance value of resistor R50 is greater than the inductive reactance of the magnetic reset winding Np1 at the operating frequency, so that the winding voltage of the magnetic reset winding Np1 approaches zero during the clamping stage after demagnetization.

[0036] Specifically, in the active drive circuit II of the magnetic reset winding, the cathode of diode VD1 is connected to one end of resistor R1, and then connected to PWM1; the anode of diode VD1 is connected to the other end of resistor R1 and one end of resistor R2, and then connected to the gate of field-effect transistor VT1; the other end of resistor R2 is connected to the source of field-effect transistor VT1, and then connected to GND; the drain of field-effect transistor VT1 is connected to one end of resistor R50 and the anode of diode VD0; the other end of resistor R50 is connected to the cathode of diode VD0. The terminals are connected together, and then connected to pin 1 of the Np1 winding of the transformer body T1. The field-effect transistor VT1 has a withstand voltage ≥ 1.2 × 2 × VCC. The resistance of resistor R50 is much greater than the impedance of the Np1 winding of the transformer body T1. For example, if the power supply operating frequency is f and the inductance of Np1 is Lp1, then R50 >> 2 × π × f × Lp1. This is because during the clamping stage after demagnetization, resistor R50 and inductor Lp1 divide the voltage, thereby ensuring that the voltage of inductor Lp1 VLp1≈0V and preventing the transformer from saturating.

[0037] In this optional embodiment, the excitation winding drive circuit III includes an electrolytic capacitor E1, a diode VD3, a resistor R5, a resistor R6, and a second field-effect transistor VT2. The electrolytic capacitor E1 is connected between the drive power supply voltage VCC and ground. The cathode of the diode VD3 is connected to one end of the resistor R5 and receives the second pulse width modulation signal PWM2. The anode of the diode VD3, the other end of the resistor R5, and one end of the resistor R6 are connected to the gate of the second field-effect transistor VT2. The other end of the resistor R6 is connected to the source of the second field-effect transistor VT2 and grounded. The drain of the second field-effect transistor VT2 is connected to the excitation winding Np2 of the high-frequency transformer IV. When the second pulse width modulation signal PWM2 is high, the second field-effect transistor VT2 is turned on to excite the excitation winding Np2.

[0038] Specifically, in the excitation winding drive circuit III, the cathode of diode VD3 is connected to one end of resistor R5, and then connected to PWM2; the anode of diode VD3 is connected to the other end of resistor R5 and one end of resistor R6, and then connected to the gate of field-effect transistor VT2; the other end of resistor R6 is connected to the source of field-effect transistor VT2, and then connected to GND; the drain of field-effect transistor VT2 is connected to pin 1 of the Np2 winding of transformer body T1; wherein, the withstand voltage of field-effect transistor VT2 is ≥1.2×2×VCC.

[0039] In this optional embodiment, the high-frequency transformer IV includes a transformer body T1, which includes a magnetic reset winding Np1, an excitation winding Np2, a primary winding Ns1, and a secondary winding Ns2. The first end of the magnetic reset winding Np1 is connected to the active drive circuit II of the magnetic reset winding, and the second end of the magnetic reset winding Np1 is connected to the drive power supply voltage VCC. The first end of the excitation winding Np2 is connected to the drive power supply voltage VCC, and the second end of the excitation winding Np2 is connected to the excitation winding drive circuit III. The first end of the primary winding Ns1 is connected to the upper transistor drive circuit V, and the second end of the primary winding Ns1 is connected to the source of the third power transistor VT3. The first end of the secondary winding Ns2 is connected to the lower transistor drive circuit VI, and the second end of the secondary winding Ns2 is connected to the source of the fourth power transistor VT4 and grounded. The first ends of the magnetic reset winding Np1, the excitation winding Np2, the primary winding Ns1, and the secondary winding Ns2 are terminals with the same name.

[0040] Specifically, in the high-frequency transformer IV, there are four windings: Np1, Np2, Ns1, and Ns2. Pin 1 of the Np1 winding is connected to the drain of the field-effect transistor VT1; pin 2 of the Np1 winding is connected to VCC; pin 1 of the Np2 winding is connected to VCC; pin 2 of the Np2 winding is connected to the drain of the field-effect transistor VT2; pin 1 of the Ns1 winding is connected to the anode of the diode VD4; pin 2 of the Ns1 winding is connected to the source of the power switch VT3; pin 1 of the Ns2 winding is connected to the anode of the diode VD5; pin 2 of the Ns2 winding is connected to the source of the power switch VT4, and then both are connected to GND. Among them, pin 1 of the Np1, Np2, Ns1, and Ns2 windings are all terminals of the same name; the typical transformer turns ratio is Np1:Np2:Ns1:Ns2=1:1:1:1; the transformer core material is ferrite.

[0041] In this optional embodiment, the upper transistor drive circuit V includes a capacitor C10, a resistor R8, a diode VD4, a resistor R7, a transistor VT5, a resistor R10, and a resistor R9. The anode of diode VD4, one end of capacitor C10, and one end of resistor R8 are connected to the first terminal of the primary winding Ns1, and the cathode of diode VD4 is connected to one end of resistor R7. The other end of capacitor C10 and the other end of resistor R8 are connected to the base of transistor VT5, and the other end of resistor R7, the emitter of transistor VT5, and one end of resistor R9 are connected to the gate of the third power transistor VT3. The collector of transistor VT5 is connected to the source of the third power transistor VT3 through resistor R10, and the other end of resistor R9 is connected to the source of the third power transistor VT3. Diode VD4 and resistor R7 are used to charge the gate of the third power transistor VT3 during the turn-on phase, and transistor VT5 and resistor R10 are used to discharge the gate charge of the third power transistor VT3 during the turn-off phase.

[0042] Specifically, in the upper transistor drive circuit V, the anode of diode VD4 is connected to one end of capacitor C10 and one end of resistor R8, and then connected together to pin 1 of the Ns1 winding of transformer body T1; the cathode of diode VD4 is connected to one end of resistor R7; the other end of capacitor C10 is connected to the other end of resistor R8, and then connected together to the base of transistor VT5; the other end of resistor R7 is connected to the emitter of transistor VT5 and one end of resistor R9, and then connected together to the gate of power switch transistor VT3; one end of resistor R10 is connected to the collector of transistor VT5; the other end of resistor R10 is connected to the other end of resistor R9, and then connected together to the source of power switch transistor VT3.

[0043] In this optional embodiment, the lower transistor drive circuit VI includes a capacitor C11, a resistor R12, a diode VD5, a transistor VT6, a resistor R14, and a resistor R13. The anode of diode VD5, one end of capacitor C11, and one end of resistor R12 are connected to the first end of the secondary winding Ns2, and the cathode of diode VD5 is connected to one end of resistor R11. The other end of capacitor C11 and the other end of resistor R12 are connected to the base of transistor VT6, and the other end of resistor R11, the emitter of transistor VT6, and one end of resistor R13 are connected to the gate of the fourth power transistor VT4. The collector of transistor VT6 is connected to the source of the fourth power transistor VT4 through resistor R14, and the other end of resistor R13 is connected to the source of the fourth power transistor VT4 and grounded. Diode VD5 and resistor R11 are used to charge the gate of the fourth power transistor VT4 during the turn-on phase, and transistor VT6 and resistor R14 are used to discharge the gate charge of the fourth power transistor VT4 during the turn-off phase.

[0044] Specifically, in the lower transistor drive circuit VI, the anode of diode VD5 is connected to one end of capacitor C11 and one end of resistor R12, and then connected together to pin 1 of the Ns2 winding of transformer body T1; the cathode of diode VD5 is connected to one end of resistor R11; the other end of capacitor C11 is connected to the other end of resistor R12, and then connected together to the base of transistor VT6; the other end of resistor R11 is connected to the emitter of transistor VT6 and one end of resistor R13, and then connected together to the gate of power switch transistor VT4; one end of resistor R14 is connected to the collector of transistor VT6; the other end of resistor R14 is connected to the other end of resistor R13 and the source of power switch transistor VT4, and then connected together to GND.

[0045] In this optional embodiment, the power conversion circuit VII includes a third power transistor VT3, a fourth power transistor VT4, a power transformer T10, a power diode VD80, and an electrolytic capacitor E20; the power transformer T10 includes a primary power winding Np3 and a secondary power winding Np4; the drain of the third power transistor VT3 is connected to the input DC voltage VDC, and the source of the third power transistor VT3 is connected to the first terminal of the primary power winding Np3; the drain of the fourth power transistor VT4 is connected to the second terminal of the primary power winding Np3, and the source of the fourth power transistor VT4 is grounded; the anode of the power diode VD80 is connected to the third terminal of the secondary power winding Np4, and the cathode of the power diode VD80 is connected to the positive terminal of the electrolytic capacitor E20; the negative terminal of the electrolytic capacitor E20 is connected to the fourth terminal of the secondary power winding Np4; wherein, the third power transistor VT3 and the fourth power transistor VT4 are connected in series and are synchronously driven by the upper transistor drive circuit V and the lower transistor drive circuit VI.

[0046] Specifically, in power conversion circuit VII, the drain of power transistor VT3 is connected to the high voltage VDC, and the source of VT3 is connected to pin 1 of transformer T10; the drain of power transistor VT4 is connected to pin 2 of transformer VT10, and the source of VT4 is connected to GND; the anode of diode VD80 is connected to pin 3 of T10, and the cathode is connected to the positive terminal of electrolytic capacitor E20; the negative terminal of electrolytic capacitor E20 is connected to pin 4 of transformer T10, and then connected together to the secondary VSS; the typical value of the drive power supply voltage VCC is 15V.

[0047] It should still be noted that the working principle of the transformer oscillation elimination circuit in this invention is as follows: 1) Power switch turn-on: When PWM2 outputs a high level and PWM1 outputs a low level in control circuit I, MOSFET VT2 is turned on and MOSFET VT1 is turned off; VCC voltage forms a loop through windings Np2 and VT2, with the voltage of winding Np2 being positive at the top and negative at the bottom, and the voltages of the other three windings also being positive at the top and negative at the bottom; the voltage of winding Ns1 charges the gate capacitance of power switch VT3 through diode VD4 and resistor R7, driving VT3 to turn on; similarly, the voltage of winding Ns2 charges the gate capacitance of power switch VT4 through diode VD5 and resistor R11, driving VT4 to turn on.

[0048] 2) Power switch turn-off: When PWM1 outputs a high level and PWM2 outputs a low level in control circuit I, MOSFET VT1 is turned on and MOSFET VT2 is turned off; VCC voltage forms a loop through windings Np1 and VT1, with the voltage of winding Np1 being negative at the top and positive at the bottom, and the voltages of the other three windings also being negative at the top and positive at the bottom; transistor VT5 is turned on, and the gate charge of the power switch is quickly discharged through resistor R10, where capacitor C10 is an accelerating capacitor, accelerating the turn-on of VT5; similarly, transistor VT6 is turned on, and the gate charge of the power switch is quickly discharged through resistor R14, where capacitor C11 is an accelerating capacitor, accelerating the turn-on of VT6.

[0049] Figure 9 An embodiment of a transformer oscillation elimination method according to the present invention is shown.

[0050] In this optional embodiment, the oscillation elimination method of the transformer uses the oscillation elimination circuit of the transformer described above to eliminate the oscillation of the high-frequency transformer IV in the dual-transistor flyback power supply. Specifically, it includes: step S101, the control circuit I outputs a high-level second pulse width modulation signal PWM2 and a low-level first pulse width modulation signal PWM1; step S102, the excitation winding drive circuit III is turned on, the magnetic reset winding active drive circuit II is turned off, the excitation winding Np2 is energized, and the first stage winding Ns1 and the second stage winding Ns2 output turn-on drive signals to drive the third power transistor VT3 and the fourth power transistor VT4 to conduct synchronously; step S103, when the conduction time of the third power transistor VT3 and the fourth power transistor VT4 reaches the turn-on time determined by the control circuit I, the control circuit I outputs a low-level second pulse width modulation signal P WM2 and the high-level first pulse width modulation signal PWM1; Step S104: The excitation winding drive circuit III is cut off, the magnetic reset winding active drive circuit II is turned on, the magnetic reset winding Np1 demagnetizes the high-frequency transformer IV, and the first stage winding Ns1 and the second stage winding Ns2 output the turn-off drive signal to turn off the third power transistor VT3 and the fourth power transistor VT4; Step S105: After the magnetic reset winding Np1 completes demagnetization, the magnetic reset winding active drive circuit II continues to be turned on, and the magnetic reset winding Np1 clamps the excitation winding Np2, the first stage winding Ns1 and the second stage winding Ns2, so that the excitation inductance of the high-frequency transformer IV does not participate in the resonance between the leakage inductance and the parasitic capacitance; Step S106: After one switching cycle ends, steps S101 to S105 are repeated.

[0051] It should be noted that the oscillation elimination method of this transformer, such as... Figure 9 As shown, the process includes: Step ①, PWM2 outputs a high level, and PWM1 outputs a low level; Step ②, the magnetic reset winding active drive circuit II is cut off, the excitation winding drive circuit III is turned on, winding Np2 is energized, and energy is transferred to the secondary windings Ns1 and Ns2 through the transformer body T1, thereby driving power switches VT3 and VT4 to turn on; Step ③, the conduction time of power switches VT3 and VT4 reaches the turn-on time calculated by control circuit I, PWM2 outputs a low level, and PWM1 outputs a high level; where, as Figure 2As shown, the turn-on time is obtained by comparing the triangular carrier wave inside the power chip with the control loop; Step ④: The excitation winding drive circuit III is cut off, the magnetic reset winding active drive circuit II is turned on, and the winding Np2 demagnetizes the transformer body T1 to prevent saturation. At this time, the current of VT1 flows from the source to the drain; Step ⑤: After the magnetic reset winding Np1 completes demagnetization, the magnetic reset winding active drive circuit II continues to be turned on. The Np1 winding clamps the other three windings. The leakage inductance energy of the Np2 winding only resonates between the leakage inductance and the parasitic capacitance and will not be transferred to the secondary through the excitation inductor. At this time, the current of VT1 flows from the drain to the source; Step ⑥: One switching cycle ends, and the above steps are repeated starting from step ①.

[0052] In this optional embodiment, in step S104, when the magnetic reset winding Np1 demagnetizes the high-frequency transformer IV, the current of the first field-effect transistor VT1 flows from the source to the drain, and returns to the drive power supply voltage VCC through diode VD0 and the magnetic reset winding Np1; in step S105, after the magnetic reset winding Np1 completes demagnetization, the current of the first field-effect transistor VT1 flows from the drive power supply voltage VCC through the magnetic reset winding Np1 and resistor R50 to the drain of the first field-effect transistor VT1, and then flows from the drain of the first field-effect transistor VT1 to the source; wherein, resistor R50 and magnetic reset winding Np1 form a voltage divider, making the winding voltage of magnetic reset winding Np1 approach zero, so as to clamp the winding voltages of excitation winding Np2, first stage winding Ns1 and second stage winding Ns2 to approach zero.

[0053] It should also be noted that the specific principle of the transformer oscillation elimination method in this invention is as follows: like Figure 6 As shown, in stage t1 (excitation of excitation winding Np2), the PWM output is high and VT2 is turned on; while in stage t2 (demagnetization of magnetic reset winding Np1), the PWM output is low, VT2 is off, VD14 is turned on, the drain voltage of VT2 resonates with 2×VCC, and the leakage inductance and parasitic capacitance resonate. In this stage, the other windings are clamped at VCC, and the power switches VT3 and VT4 are driven at 0V; in stage t3 (demagnetization of magnetic reset winding Np1 is completed), VD14 is off, the drain voltage of VT2 resonates with VCC, and the excitation inductance, leakage inductance and parasitic capacitance resonate. At this time, none of the four windings of the transformer are clamped, and the resonant energy is transferred to the secondary side, which poses a risk of the power switches being mis-turned on.

[0054] like Figure 7As shown, in stage t1 (excitation of excitation winding Np2), PWM2 outputs a high level, PWM1 outputs a low level, VT2 is turned on, and VT1 is turned off; in stage t2 (demagnetization of magnetic reset winding Np1), PWM2 outputs a low level, PWM1 outputs a high level, VT2 is turned off, and VT1 is turned on. The drain voltage of VT2 resonates around 2×VCC, with the leakage inductance and parasitic capacitance resonating. During this stage, all other windings are clamped at VCC, and power switches VT3 and VT4 are driven at 0V; in stage t3 (demagnetization of magnetic reset winding Np1 is completed), PWM1 continues to output a high level, and the other windings of the transformer are clamped at 0V. Power switches VT3 and VT4 are driven at 0V, and no [excitation occurs]. Figure 6 The oscillation waveform in stage t3 ensures reliable turn-off of the power switch. It is worth noting that during the turn-off stages t2 and t3, the current flow direction of winding Np1 differs from the return path. In stage t2, as... Figure 3 As shown, the current flows from the source to the drain of VT1, then through diode VD0 and winding Np1 back to VCC; in stage t3, as... Figure 4 As shown, the current flows from VCC through the drain of winding Np1, resistor R50, and VT1 to the source.

[0055] This invention is not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this invention is limited only by the appended claims.

Claims

1. An oscillation cancellation circuit for a transformer, characterized in that, The oscillation cancellation circuit of the transformer includes: The control circuit is used to output a complementary first pulse width modulation signal and a second pulse width modulation signal based on the actual output voltage value and the set output voltage value. The magnetic reset winding active drive circuit is used to drive the magnetic reset winding of the high-frequency transformer according to the first pulse width modulation signal. The excitation winding drive circuit is used to drive the excitation winding of the high-frequency transformer according to the second pulse width modulation signal. A high-frequency transformer is used to transmit isolated drive signals to the upper and lower drive circuits of a dual-transistor flyback power supply through the excitation winding, the primary winding, and the secondary winding. The upper transistor drive circuit is used to drive the third power transistor to turn on according to the drive signal output from the primary winding, and to discharge the gate charge of the third power transistor during the turn-off phase. The lower transistor drive circuit is used to drive the fourth power transistor to turn on according to the drive signal output from the secondary winding, and to discharge the gate charge of the fourth power transistor during the turn-off phase. A power conversion circuit is used to convert the input DC voltage and transmit it to the output terminal through synchronously driven third and fourth power transistors; The active drive circuit of the magnetic reset winding remains on after the high-frequency transformer is demagnetized, so that the magnetizing inductance of the high-frequency transformer does not participate in the resonance between the leakage inductance and the parasitic capacitance.

2. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The first pulse width modulation signal output terminal of the control circuit is connected to the active drive circuit of the magnetic reset winding, and the second pulse width modulation signal output terminal of the control circuit is connected to the excitation winding drive circuit. The active drive circuit for the magnetic reset winding is connected to the magnetic reset winding of the high-frequency transformer, and the drive circuit for the excitation winding is connected to the excitation winding of the high-frequency transformer. The primary winding of the high-frequency transformer is connected to the upper tube drive circuit, and the secondary winding of the high-frequency transformer is connected to the lower tube drive circuit. The upper transistor drive circuit is connected to the third power transistor in the power conversion circuit, and the lower transistor drive circuit is connected to the fourth power transistor in the power conversion circuit. The output terminal of the power conversion circuit is connected to the control circuit to feed back the actual output voltage value to the control circuit.

3. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The control circuit includes an isolation operational amplifier, resistors R90 and R100, an error operational amplifier, resistor R110, capacitor C30, a power supply chip, and an inverter. The input terminal of the isolation operational amplifier is used to receive the actual output voltage value, and the output terminal of the isolation operational amplifier is connected to the inverting input terminal of the error operational amplifier through resistor R90. The non-inverting input terminal of the error operational amplifier receives the set output voltage value through resistor R100, and the inverting input terminal of the error operational amplifier is connected to the output terminal of the error operational amplifier through resistor R110 and capacitor C30. The output terminal of the error operational amplifier is connected to the power supply chip, and the power supply chip outputs a second pulse width modulation signal. The second pulse width modulation signal is inverted by an inverter to form a first pulse width modulation signal.

4. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The magnetic reset winding active drive circuit includes diode VD1, diode VD0, resistor R1, resistor R2, resistor R50 and a first field-effect transistor. The cathode of the diode VD1 is connected to one end of the resistor R1 and receives the first pulse width modulation signal. The anode of the diode VD1, the other end of the resistor R1, and one end of the resistor R2 are connected to the gate of the first field-effect transistor. The other end of the resistor R2 is connected to the source of the first field-effect transistor and grounded, and the drain of the first field-effect transistor is connected to one end of the resistor R50 and the anode of the diode VD0. The other end of the resistor R50 is connected to the cathode of the diode VD0 and to the first end of the magnetic reset winding of the high-frequency transformer. The resistance value of the resistor R50 is greater than the inductive reactance of the magnetic reset winding at the operating frequency, so that the winding voltage of the magnetic reset winding approaches zero during the clamping phase after demagnetization.

5. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The excitation winding drive circuit includes an electrolytic capacitor E1, a diode VD3, a resistor R5, a resistor R6, and a second field-effect transistor. The electrolytic capacitor E1 is connected between the driving power supply voltage and ground. The cathode of the diode VD3 is connected to one end of the resistor R5 and receives the second pulse width modulation signal. The anode of the diode VD3, the other end of the resistor R5, and one end of the resistor R6 are connected to the gate of the second field-effect transistor. The other end of the resistor R6 is connected to the source of the second field-effect transistor and grounded, and the drain of the second field-effect transistor is connected to the excitation winding of the high-frequency transformer. When the second pulse width modulation signal is high, the second field-effect transistor is turned on to excite the excitation winding.

6. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The high-frequency transformer includes a magnetic reset winding, an excitation winding, a primary winding, and a secondary winding; The first end of the magnetic reset winding is connected to the active drive circuit of the magnetic reset winding, and the second end of the magnetic reset winding is connected to the drive power supply voltage. The first end of the excitation winding is connected to the driving power supply voltage, and the second end of the excitation winding is connected to the excitation winding driving circuit. The first end of the first primary winding is connected to the upper tube drive circuit, and the second end of the first primary winding is connected to the source of the third power tube. The first end of the second stage winding is connected to the lower tube drive circuit, and the second end of the second stage winding is connected to the source of the fourth power tube and grounded.

7. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The upper transistor drive circuit includes capacitor C10, resistor R8, diode VD4, resistor R7, transistor VT5, resistor R10, and resistor R9. The anode of diode VD4, one end of capacitor C10, and one end of resistor R8 are connected to the first end of the primary winding, and the cathode of diode VD4 is connected to one end of resistor R7. The other end of capacitor C10 and the other end of resistor R8 are connected to the base of transistor VT5, and the other end of resistor R7, the emitter of transistor VT5 and one end of resistor R9 are connected to the gate of the third power transistor. The collector of transistor VT5 is connected to the source of the third power transistor through resistor R10, and the other end of resistor R9 is connected to the source of the third power transistor. The diode VD4 and resistor R7 are used to charge the gate of the third power transistor during the turn-on phase, and the transistor VT5 and resistor R10 are used to discharge the gate charge of the third power transistor during the turn-off phase.

8. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The lower transistor drive circuit includes capacitor C11, resistor R12, diode VD5, resistor R11, transistor VT6, resistor R14, and resistor R13. The anode of diode VD5, one end of capacitor C11, and one end of resistor R12 are connected to the first end of the secondary winding, and the cathode of diode VD5 is connected to one end of resistor R11. The other end of capacitor C11 and the other end of resistor R12 are connected to the base of transistor VT6, and the other end of resistor R11, the emitter of transistor VT6 and one end of resistor R13 are connected to the gate of the fourth power transistor. The collector of the transistor VT6 is connected to the source of the fourth power transistor through a resistor R14, and the other end of the resistor R13 is connected to the source of the fourth power transistor and grounded. The diode VD5 and resistor R11 are used to charge the gate of the fourth power transistor during the turn-on phase, and the transistor VT6 and resistor R14 are used to discharge the gate charge of the fourth power transistor during the turn-off phase.

9. The oscillation elimination circuit for a transformer according to claim 1, characterized in that, The power conversion circuit includes a third power transistor, a fourth power transistor, a power transformer, a power diode VD80, and an electrolytic capacitor E20; the power transformer includes a primary power winding and a secondary power winding. The drain of the third power transistor is connected to the input DC voltage, and the source of the third power transistor is connected to the first end of the primary winding of the power transistor. The drain of the fourth power transistor is connected to the second end of the primary winding of the power transistor, and the source of the fourth power transistor is grounded. The anode of the power diode VD80 is connected to the third terminal of the power secondary winding, and the cathode of the power diode VD80 is connected to the positive terminal of the electrolytic capacitor E20. The negative terminal of the electrolytic capacitor E20 is connected to the fourth terminal of the power secondary winding. The third and fourth power transistors are connected in series and driven synchronously by the upper transistor drive circuit and the lower transistor drive circuit.

10. A method for eliminating transformer oscillations, comprising using the transformer oscillation elimination circuit of any one of claims 1-9 to eliminate oscillations in a high-frequency transformer of a two-transistor flyback power supply, characterized in that, The methods for eliminating the oscillation of the transformer include: Step S101: The control circuit outputs a high-level second pulse width modulation signal and a low-level first pulse width modulation signal; Step S102: The excitation winding drive circuit is turned on, the magnetic reset winding active drive circuit is turned off, the excitation winding is energized, and the first stage winding and the second stage winding output the turn-on drive signal to drive the third power transistor and the fourth power transistor to turn on synchronously. Step S103: When the conduction time of the third power transistor and the fourth power transistor reaches the turn-on time determined by the control circuit, the control circuit outputs a low-level second pulse width modulation signal and a high-level first pulse width modulation signal. Step S104: The excitation winding drive circuit is cut off, the magnetic reset winding active drive circuit is turned on, the magnetic reset winding demagnetizes the high frequency transformer, and the first stage winding and the second stage winding output a turn-off drive signal to turn off the third power transistor and the fourth power transistor. Step S105: After the magnetic reset winding is demagnetized, the active drive circuit of the magnetic reset winding continues to be turned on. The magnetic reset winding clamps the excitation winding, the first stage winding and the second stage winding, so that the excitation inductance of the high-frequency transformer does not participate in the resonance between the leakage inductance and the parasitic capacitance. Step S106: After a switching cycle ends, repeat steps S101 to S105.

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