MOSFET radio frequency power amplifier and radio frequency module

Abstract

The application provides a MOSFET radio frequency power amplifier and a radio frequency module, which comprise an input matching circuit, a pre-stage power amplification circuit, a final-stage power amplification circuit and an output matching circuit, wherein the input matching circuit is used for realizing input impedance matching for the pre-stage power amplification circuit; the pre-stage power amplification circuit comprises at least one first single-ended amplification subunit and a second single-ended amplification subunit arranged after the last-stage first single-ended amplification subunit; the final-stage power amplification circuit comprises a differential amplification subunit and a first balun subunit and a second balun subunit arranged at the front end and the rear end of the differential amplification subunit respectively; and the output matching circuit is used for realizing output impedance matching for the final-stage power amplification circuit and outputting a radio frequency amplification signal. The application has good robustness, linearity and even harmonic suppression performance while realizing high power output and high stability, and the circuit is compact and simple in structure.

Description

Technical Field

[0001] This invention relates to the field of radio frequency circuit technology, and in particular to a MOSFET radio frequency power amplifier and radio frequency module. Background Technology

[0002] MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) RF power amplifiers are core components of wireless RF communication systems. These devices, using MOSFETs as the core amplification unit, are primarily used to amplify weak RF signals, effectively improving signal power and transmission stability. They are widely used in wireless communication, IoT RF terminals, and RF sensing. The output power, linearity, harmonic suppression capability, and chip size of these devices directly determine the transmission quality and miniaturization level of the RF system, making them a core research direction for RF equipment performance optimization.

[0003] Currently, mainstream MOSFET RF power amplifiers mainly fall into three categories: single-ended architecture, fully differential architecture, and hybrid architecture with a single-ended first stage and a differential second stage.

[0004] Single-ended architecture has a simple circuit structure, fewer components, and a small chip area, making it suitable for low-cost and simple RF scenarios, but its overall amplification performance is limited. The fully differential architecture uses a fully symmetrical differential amplification path, which has strong anti-interference ability and good signal linearity. It is often used in high-performance RF scenarios, but the circuit design is more complex. The hybrid architecture of single-ended first stage and differential second stage is a compromise solution. It combines input adaptability and basic amplification performance by using single-ended first stage to adapt the signal input and differential second stage to enhance the amplification performance. It is a common design for small and medium power RF power amplifiers.

[0005] All three architectures mentioned above have obvious technical flaws: Single-ended architecture topologies have inherent limitations, including low output power, poor circuit stability and robustness, severe nonlinear distortion in signal amplification, and poor linearity. Furthermore, the lack of differential symmetric cancellation mechanisms means they cannot suppress even-order harmonics generated during amplification, resulting in severe harmonic interference and poor transmission quality, making them unsuitable for high-precision, medium-to-high-power RF applications.

[0006] Fully differential architecture and hybrid architecture can effectively make up for the performance shortcomings of single-ended architecture, and have excellent stability, linearity and harmonic suppression capabilities. However, both types of architectures require the configuration of symmetrical differential paths and matching and balancing circuits, resulting in complex and redundant structures, high consumption of device and wiring resources, large chip area and low integration, which significantly increases design and manufacturing costs and cannot meet the development needs of current portable and miniaturized RF terminals.

[0007] In summary, existing MOSFET RF power amplifiers struggle to simultaneously achieve high performance, small size, and low cost, exhibiting significant technical bottlenecks. There is an urgent need to develop new architectures to address these issues. Summary of the Invention

[0008] This invention aims to solve the technical problem that it is difficult to achieve high performance, small size and low cost simultaneously in radio frequency power amplifiers.

[0009] To address the aforementioned technical problems, in a first aspect, the present invention provides a MOSFET RF power amplifier, comprising an input matching circuit, a pre-amplifier circuit, a final-amplifier circuit, and an output matching circuit, wherein: The input matching circuit is used to receive external radio frequency signals and to achieve input impedance matching for the pre-amplifier circuit. The pre-amplifier circuit includes at least one first single-ended amplifier sub-unit implemented based on MOSFET transistors, and one second single-ended amplifier sub-unit connected in series after the first single-ended amplifier sub-unit at the last stage. The input terminal of the first single-ended amplifier sub-unit at the beginning is connected to the input matching circuit, and the output terminal of the second single-ended amplifier sub-unit is connected to the final stage power amplifier circuit. The final stage power amplifier circuit includes a differential amplifier sub-unit implemented using MOSFET transistors, a first balun sub-unit disposed at the front end of the differential amplifier sub-unit, and a second balun sub-unit disposed at the rear end of the differential amplifier sub-unit. The input terminal of the first balun sub-unit is connected to the output terminal of the second single-ended amplifier sub-unit, and the first balun sub-unit is used to convert a single-ended signal to a differential signal. The output terminal of the differential amplifier sub-unit is connected to the input terminal of the second balun sub-unit, and the output terminal of the second balun sub-unit is connected to the input terminal of the output matching circuit. The second balun sub-unit is used to convert a differential signal to a single-ended signal and to achieve impedance matching. The output matching circuit is used to achieve output impedance matching for the final stage power amplifier circuit and output the radio frequency amplified signal obtained after being amplified by the preceding stage power amplifier circuit and the final stage power amplifier circuit in sequence.

[0010] Furthermore, the first single-ended amplifier subunit includes a first transistor, a first inductor, a first resistor, a first capacitor, and a second capacitor; wherein, the gate of the first transistor is used to connect to an external bias voltage and serves as the input terminal of the first single-ended amplifier subunit, the source of the first transistor is grounded, and the drain of the first transistor is connected to the first end of the first inductor and serves as the output terminal of the first single-ended amplifier subunit. The second terminal of the first inductor is used to connect to an external power supply voltage; The first end of the first resistor is connected to the gate of the first transistor, and the second end of the first resistor is connected to the first end of the first capacitor. The second terminal of the first capacitor is connected to the first terminal of the first inductor; The first terminal of the second capacitor is connected to the first terminal of the first inductor, and the second terminal of the second capacitor is connected to the second terminal of the first inductor. The second single-ended amplifier subunit includes a second transistor, a second resistor, a third capacitor, and a fourth capacitor; wherein, the gate of the second transistor is used to connect to an external bias voltage and serves as the input terminal of the second single-ended amplifier subunit, and is connected to the drain of the first transistor in the first single-ended amplifier subunit of the preceding stage; the source of the second transistor is grounded; and the drain of the second transistor is connected to the first terminal of the fourth capacitor. The first end of the second resistor is connected to the gate of the second transistor, and the second end of the second resistor is connected to the first end of the third capacitor; The second terminal of the third capacitor is connected to the first terminal of the fourth capacitor; The second terminal of the fourth capacitor is used to connect to an external power supply voltage. When the first single-ended amplifier subunit comprises multiple stages, the first end of the first inductor of the first single-ended amplifier subunit of the previous stage is connected to the gate of the first transistor of the first single-ended amplifier subunit of the next stage. The gate of the first transistor in the first single-ended amplifier subunit at the beginning serves as the input terminal of the pre-amplifier circuit, and the drain of the second transistor in the second single-ended amplifier subunit serves as the output terminal of the pre-amplifier circuit.

[0011] Furthermore, the preamplifier circuit also includes an interstage matching subunit, which is connected in series between the first single-ended amplifier subunit and the second single-ended amplifier subunit located in the last stage to achieve interstage impedance matching; The interstage matching subunit includes a matching capacitor. The first end of the matching capacitor is connected to the output terminal of the first single-ended amplification subunit located in the last stage, and the second end of the matching capacitor is connected to the input terminal of the second single-ended amplification subunit.

[0012] Furthermore, the differential amplifier subunit includes a third transistor, a fourth transistor, a third resistor, a fourth resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, and a ninth capacitor, wherein: The gate of the third transistor is connected to the first terminal of the third resistor, the source of the third transistor is grounded, and the drain of the third transistor is connected to the first terminal of the ninth capacitor. The gate of the fourth transistor is connected to the first terminal of the fourth resistor, the source of the fourth transistor is grounded, and the drain of the fourth transistor is connected to the second terminal of the ninth capacitor. The second end of the third resistor is connected to the first end of the fifth capacitor; The second end of the fourth resistor is connected to the first end of the sixth capacitor; The second terminal of the fifth capacitor is connected to the first terminal of the ninth capacitor; The second terminal of the sixth capacitor is connected to the second terminal of the ninth capacitor; The first terminal of the seventh capacitor is connected to the gate of the third transistor, and the second terminal of the seventh capacitor is connected to the drain of the fourth transistor. The first terminal of the eighth capacitor is connected to the gate of the fourth transistor, and the second terminal of the eighth capacitor is connected to the drain of the third transistor. The first balun sub-unit includes a first primary coil and a second secondary coil that are mutually inductive. The first end of the first primary coil is connected to an external power supply voltage, and the second end of the first primary coil is connected to the drain of the second transistor as the input terminal of the final stage power amplifier circuit. The first end of the first primary coil is connected to the gate of the third transistor, and the second end of the first primary coil is connected to the gate of the fourth transistor. The second balun sub-unit includes a second primary coil and a second secondary coil. The first end of the second primary coil is connected to the first end of the ninth capacitor, and the second end of the second primary coil is connected to the second end of the ninth capacitor. The center tap of the second primary coil is connected to an external power supply voltage. The first end of the second stage coil is grounded, and the second end of the second stage coil is connected to the output matching circuit as the output terminal of the final stage power amplifier circuit.

[0013] Furthermore, the first single-ended amplifier subunit also includes a fifth transistor, the source of which is connected to the drain of the first transistor, the drain of which is connected to the first terminal of the first inductor, and the gate of which is used to connect to an external bias voltage.

[0014] Furthermore, the second single-ended amplifier subunit also includes a sixth transistor, the source of which is connected to the drain of the second transistor, the drain of which is connected to the first terminal of the fourth capacitor, and the gate of which is used to connect to an external bias voltage.

[0015] Furthermore, the bias voltages required by the third transistor and the fourth transistor are connected by the center tap of the first stage coil, or by the gate of the third transistor and the gate of the fourth transistor, respectively.

[0016] Furthermore, the differential amplifier subunit also includes a seventh transistor and an eighth transistor. The source of the seventh transistor is connected to the drain of the third transistor, the drain of the seventh transistor is connected to the first terminal of the ninth capacitor, and the gate of the seventh transistor is used to connect to an external bias voltage. The source of the eighth transistor is connected to the drain of the fourth transistor, the drain of the eighth transistor is connected to the second terminal of the ninth capacitor, and the gate of the eighth transistor is used to connect to an external bias voltage.

[0017] Furthermore, the differential amplifier subunit also includes a ninth transistor and a tenth transistor. The source of the ninth transistor is connected to the drain of the seventh transistor, the drain of the ninth transistor is connected to the first terminal of the ninth capacitor, and the gate of the ninth transistor is used to connect to an external bias voltage. The source of the tenth transistor is connected to the drain of the eighth transistor, the drain of the tenth transistor is connected to the second terminal of the ninth capacitor, and the gate of the tenth transistor is used to connect to an external bias voltage.

[0018] Secondly, the present invention also provides a radio frequency module, the radio frequency module including the MOSFET radio frequency power amplifier as described above.

[0019] The beneficial effects achieved by this invention are that it proposes a MOSFET RF power amplifier that combines the advantages of single-ended and differential architectures. The front stage adopts a single-ended amplification architecture, while the final stage adopts a differential amplification architecture. This enables high power output and high stability, while also possessing good robustness, linearity, and even-order harmonic suppression performance. Furthermore, the overall circuit of this MOSFET RF power amplifier is compact, simple in structure, and easy to control in terms of manufacturing costs. Attached Figure Description

[0020] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings: Figure 1 This is a circuit diagram of the MOSFET radio frequency power amplifier provided in Embodiment 1 of the present invention; Figure 2 This is a circuit diagram of the MOSFET RF power amplifier provided in Embodiment 2 of the present invention; Figure 3This is a circuit diagram of the MOSFET RF power amplifier provided in Embodiment 3 of the present invention. Detailed Implementation

[0021] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0022] The specific embodiments / examples described herein are specific implementations of the present invention, used to illustrate the concept of the invention, and are illustrative and exemplary, and should not be construed as limiting the implementation methods or scope of the present invention. In addition to the embodiments described herein, those skilled in the art can employ other obvious technical solutions based on the content disclosed in the claims and specification of this application. These technical solutions include those that make any obvious substitutions and modifications to the embodiments described herein, all of which are within the protection scope of the present invention.

[0023] Example 1 Please refer to Figure 1 , Figure 1 This is a circuit diagram of a MOSFET RF power amplifier 100 provided in an embodiment of the present invention. In this embodiment, the MOSFET RF power amplifier 100 includes an input matching circuit 101, a pre-amplifier circuit 102, a final-amplifier circuit 103, and an output matching circuit 104, wherein: The input matching circuit 101 is used to receive the external radio frequency signal RFin and to achieve input impedance matching for the pre-amplifier circuit 102. The pre-amplifier circuit 102 includes at least one first single-ended amplifier sub-unit 1021 implemented based on MOSFET transistors, and one second single-ended amplifier sub-unit 1022 connected in series after the first single-ended amplifier sub-unit 1021 in the last stage. The input terminal of the first single-ended amplifier sub-unit 1021 at the beginning is connected to the input matching circuit 101, and the output terminal of the second single-ended amplifier sub-unit 1022 is connected to the final stage power amplifier circuit 103. The final stage power amplifier circuit 103 includes a differential amplifier sub-unit 1031 implemented using MOSFET transistors, and a first balun sub-unit 1032 disposed at the front end of the differential amplifier sub-unit 1031, and a second balun sub-unit 1033 disposed at the rear end of the differential amplifier sub-unit 1031. The input terminal of the first balun sub-unit 1032 is connected to the output terminal of the second single-ended amplifier sub-unit 1022. The first balun sub-unit 1032 is used to convert single-ended signals to differential signals. The output terminal of the differential amplifier sub-unit 1031 is connected to the input terminal of the second balun sub-unit 1033. The output terminal of the second balun sub-unit 1033 is connected to the input terminal of the output matching circuit 104. The second balun sub-unit 1033 is used to convert differential signals to single-ended signals and to achieve impedance matching.

[0024] The output matching circuit 104 is used to achieve output impedance matching for the final stage power amplifier circuit 103, and output the radio frequency amplified signal RFout obtained after being amplified by the pre-stage power amplifier circuit 102 and the final stage power amplifier circuit 103 in sequence.

[0025] Specifically, the first single-ended amplifier subunit 1021 includes a first transistor M1, a first inductor L1, a first resistor R1, a first capacitor C1, and a second capacitor C2. The gate of the first transistor M1 is used to connect to an external bias voltage VB1 and serves as the input terminal of the first single-ended amplifier subunit 1021. The source of the first transistor M1 is grounded, and the drain of the first transistor M1 is connected to the first terminal of the first inductor L1 and serves as the output terminal of the first single-ended amplifier subunit 1021. The second terminal of the first inductor L1 is used to connect to the external power supply voltage VDD; The first end of the first resistor R1 is connected to the gate of the first transistor M1, and the second end of the first resistor R1 is connected to the first end of the first capacitor C1. The second terminal of the first capacitor C1 is connected to the first terminal of the first inductor L1; The first terminal of the second capacitor C2 is connected to the first terminal of the first inductor L1, and the second terminal of the second capacitor C2 is connected to the second terminal of the first inductor L1. The second single-ended amplifier subunit 1022 includes a second transistor M2, a second resistor R2, a third capacitor C3, and a fourth capacitor C4. The gate of the second transistor M2 is used to connect to an external bias voltage VB2 and serves as the input terminal of the second single-ended amplifier subunit 1022. It is connected to the drain of the first transistor M1 in the first single-ended amplifier subunit 1021 of the preceding stage. The source of the second transistor M2 is grounded, and the drain of the second transistor M2 is connected to the first terminal of the fourth capacitor C4. The first end of the second resistor R2 is connected to the gate of the second transistor M2, and the second end of the second resistor R2 is connected to the first end of the third capacitor C3; The second terminal of the third capacitor C3 is connected to the first terminal of the fourth capacitor C4; The second terminal of the fourth capacitor C4 is used to connect to the external power supply voltage VDD. When the first single-ended amplifier subunit 1021 includes multiple stages, the first end of the first inductor L1 of the first stage of the first single-ended amplifier subunit 1021 is connected to the gate of the first transistor M1 of the first stage of the first single-ended amplifier subunit 1021. The gate of the first transistor M1 of the first single-ended amplifier subunit 1021 at the first end serves as the input terminal of the pre-amplifier circuit 102, and the first and second terminals of the fourth capacitor C4 of the second single-ended amplifier subunit 1022 both serve as the output terminals of the pre-amplifier circuit 102.

[0026] The external radio frequency signal is first connected to the input matching circuit 101, which performs input impedance matching before sending it to the pre-amplifier circuit 102. In each first single-ended amplifier sub-unit 1021, the first transistor M1 is the core amplifying device; the first inductor L1 acts as a choke inductor, which can block radio frequency AC signals and conduct DC power supply; the first resistor R1 and the first capacitor C1 together form a feedback circuit, which optimizes the transistor's operating state through a feedback mechanism. The second capacitor C2 is connected across the first inductor L1, and in addition to participating in the impedance matching of this stage circuit, it also helps to complete the inter-stage matching between units. The external bias voltage VB1 is connected to the gate of the first transistor M1 to provide a DC operating point, the source of the transistor is grounded, and the drain outputs the amplified single-ended radio frequency signal.

[0027] The pre-amplifier circuit 102 includes multiple stages of first single-ended amplification sub-units 1021 ( Figure 1 Only one level is shown in the diagram, and a second single-ended amplifier subunit 1022 is located after the first single-ended amplifier subunit 1021. The external radio frequency signal is processed by the input matching circuit 101 and then connected to the input terminal of the first single-ended amplifier subunit 1021 located at the beginning.

[0028] The first single-ended amplifier subunit 1021, as the main contributor to the gain of the pre-amplifier stage, operates with an external bias voltage VB1 applied to the gate of the first transistor M1, causing it to operate in the amplification region. The radio frequency (RF) signal is input through the gate of the first transistor M1, amplified, and output from the drain to the first terminal of the first inductor L1. The second terminal of the first inductor L1 is connected to the external power supply voltage VDD. Utilizing the high impedance characteristic of the inductor to AC signals, the DC power supply is isolated from the RF signal path, ensuring signal energy transmission to subsequent stages. The first resistor R1 and the first capacitor C1 form a series feedback branch, connected between the gate and drain of the first transistor M1, used to improve the linearity and stability of the transistor; the second capacitor C2 is connected across the two ends of the first inductor L1, participating in the impedance matching of this stage.

[0029] When multi-stage gain is required, the first end of the first inductor L1 of the first single-ended amplifier subunit 1021 of the previous stage is connected to the gate of the first transistor M1 of the first single-ended amplifier subunit 1021 of the next stage to realize cascaded amplification.

[0030] In addition, to further optimize inter-level matching characteristics, such as Figure 1 As shown, the preamplifier circuit 102 further includes an interstage matching subunit 1023, which is connected in series between the first single-ended amplifier subunit 1021 and the second single-ended amplifier subunit 1022 located in the last stage to achieve interstage impedance matching. The interstage matching subunit 1023 includes a matching capacitor Cm, which is connected to the output terminal of the first single-ended amplifier subunit 1021 located in the last stage, and the second terminal of the matching capacitor Cm is connected to the input terminal of the second single-ended amplifier subunit 1022.

[0031] The matching capacitor Cm is used to adjust the interstage transmission zeros and poles, compensate for interstage phase delay, and realize impedance transformation to ensure gain flatness over a wide bandwidth, while also providing DC isolation. Simultaneously, the first inductor L1 and the second capacitor C2 of the first single-ended amplifier subunit 1021 in the preceding stage also participate in interstage impedance matching, further optimizing the signal transmission characteristics of the multi-stage cascade.

[0032] like Figure 1 As shown, the final stage power amplifier circuit 103 includes a differential amplifier subunit 1031, a first balun subunit 1032 (Ba1), and a second balun subunit 1033 (Ba2), wherein: The differential amplifier subunit 1031 includes a third transistor M3, a fourth transistor M4, a third resistor R3, a fourth resistor R4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9, wherein: The gate of the third transistor M3 is connected to the first terminal of the third resistor R3, the source of the third transistor M3 is grounded, and the drain of the third transistor M3 is connected to the first terminal of the ninth capacitor C9. The gate of the fourth transistor M4 is connected to the first terminal of the fourth resistor R4, the source of the fourth transistor M4 is grounded, and the drain of the fourth transistor M4 is connected to the second terminal of the ninth capacitor C9. The second end of the third resistor R3 is connected to the first end of the fifth capacitor C5; The second end of the fourth resistor R4 is connected to the first end of the sixth capacitor C6; The second terminal of the fifth capacitor C5 is connected to the first terminal of the ninth capacitor C9; The second terminal of the sixth capacitor C6 is connected to the second terminal of the ninth capacitor C9; The first terminal of the seventh capacitor C7 is connected to the gate of the third transistor M3, and the second terminal of the seventh capacitor C7 is connected to the drain of the fourth transistor M4. The first terminal of the eighth capacitor C8 is connected to the gate of the fourth transistor M4, and the second terminal of the eighth capacitor C8 is connected to the drain of the third transistor M3. The first balun sub-unit 1032 includes a first primary coil LP1 and a second secondary coil LS1 that are mutually inductive. The first end of the first primary coil LP1 is connected to the external power supply voltage VDD, and the second end of the first primary coil LP1 is connected to the drain of the second transistor M2 as the input terminal of the final stage power amplifier circuit 103. The first end of the first primary coil LS1 is connected to the gate of the third transistor M3, and the second end of the first primary coil LS1 is connected to the gate of the fourth transistor M4. The second balun sub-unit 1033 includes a second primary coil LP2 and a second secondary coil LS2. The first end of the second primary coil LP2 is connected to the first end of the ninth capacitor C9, and the second end of the second primary coil LP2 is connected to the second end of the ninth capacitor C9. The center tap of the second primary coil LP2 is connected to the external power supply voltage VDD. The first end of the second stage coil LS2 is grounded, and the second end of the second stage coil LS2 is connected to the output matching circuit 104 as the output terminal of the final stage power amplifier circuit 103.

[0033] The input signal of the differential amplifier subunit originates from the output of the second single-ended amplifier subunit 1022 in the pre-amplifier circuit 102. The first balun subunit 1032 is connected between the output terminal of the second single-ended amplifier subunit 1022 and the input terminal of the differential amplifier subunit 1031.

[0034] The preamplifier circuit 102 implements single-ended radio frequency amplification. Under electromagnetic induction, the first primary coil LP1 couples the single-ended signal to the first secondary coil LS1. Due to the characteristics of the transformer (balun), the two ends of the first secondary coil LS1 output differential radio frequency signals with equal amplitude and opposite phase (180 degrees out of phase). These differential signals are respectively loaded onto the gates of the third transistor M3 and the fourth transistor M4, thereby driving the subsequent differential amplifier circuit. Therefore, in this embodiment of the invention, the first balun sub-unit 1032 achieves efficient conversion from single-ended signal to differential signal and completes the impedance transformation between the preamplifier stage and the final stage.

[0035] The differential amplifier subunit 1031 implements differential radio frequency amplification function as a whole, including a third transistor M3 and a fourth transistor M4.

[0036] Under the bias circuit (provided by the third resistor R3, the fourth resistor R4, the fifth capacitor C5, and the sixth capacitor C6), the third transistor M3 and the fourth transistor M4 operate in the amplification region. When a differential signal is input, the third transistor M3 and the fourth transistor M4 amplify the inverted input signal, respectively.

[0037] To optimize high-frequency performance, this embodiment connects a seventh capacitor C7 and an eighth capacitor C8 between the gate and drain of the transistors. Specifically, the seventh capacitor C7 is connected between the gate of the third transistor M3 and the drain of the fourth transistor M4, and the eighth capacitor C8 is connected between the gate of the fourth transistor M4 and the drain of the third transistor M3. This cross-coupled capacitor connection method utilizes cross feedback to cancel the parasitic gate-drain capacitance inside the transistors, significantly improving the amplifier's reverse isolation and high-frequency stability, while also improving the circuit's linearity.

[0038] The amplified differential signals are output from the drain of the third transistor M3 and the drain of the fourth transistor M4, respectively, and loaded onto the two ends of the ninth capacitor C9, which serves as the output matching capacitor.

[0039] In this embodiment of the invention, the bias voltage VB3 required for the third transistor M3 and the fourth transistor M4 is connected to the center tap of the first stage coil LS1. This method eliminates the need for additional long traces or large-value resistors between the transistor gate and the bias source, reducing the chip area occupied and also reducing the parasitic capacitance of the gate node to ground, which is beneficial to improving the high-frequency response characteristics of the circuit.

[0040] The second balun subunit 1033 is connected to the drain of the third transistor M3 and the drain of the fourth transistor M4, and is used to synthesize the amplified differential signal into a single-ended signal for output. Specifically, the two ends of the second primary coil LP2 are respectively connected to the two ends of the ninth capacitor C9, receiving the differential RF signal output by the differential amplifier subunit 1031. The center tap of the second primary coil LP2 is connected to the external power supply voltage VDD, providing DC operating current for the third transistor M3 and the fourth transistor M4, while utilizing the symmetry of the balun coil with respect to AC signals to ensure the balance of differential amplification. Under the action of electromagnetic induction, the second primary coil LP2 couples the differential signal to the second stage coil LS2. One end of the second stage coil LS2 is grounded, and the other end serves as the output terminal of the final stage power amplifier circuit 103, outputting the synthesized single-ended high-power RF signal. This single-ended signal then enters the output matching circuit 104 for final impedance matching and filtering.

[0041] In summary, the final stage power amplifier circuit 103 in this embodiment of the invention achieves single-ended to differential drive through the first balun sub-unit 1032, achieves high stability and high linearity power amplification through the differential amplifier sub-unit 1031 with a neutralizing capacitor, and finally achieves differential synthesis and single-ended signal output through the second balun sub-unit 1033. With the center-tapped power supply structure, it realizes high power and high linearity radio frequency power amplification.

[0042] The MOSFET RF power amplifier 100 proposed in this embodiment of the invention employs dual inductor coupling to form an integrated balun, eliminating the need for additional complex signal conversion and matching networks, simplifying the circuit topology, and effectively reducing chip area and design cost. Simultaneously, by combining multi-stage single-ended and differential amplification architectures and using coupled inductor baluns to achieve mutual conversion between single-ended and differential signals, it retains the advantages of simple single-ended circuit structure and fewer components, while also possessing the advantages of strong stability, good robustness, and suppression of even-order harmonics of differential circuits. This solves the problems of low output power and poor linearity in traditional pure single-ended power amplifiers, as well as the complex structure and large chip area of ​​fully differential and hybrid differential power amplifiers.

[0043] Example 2 like Figure 2 As shown, unlike the method in Embodiment 1 where the first stage coil LS1 is set with a center tap connected to an external bias voltage VB3 to provide bias voltage for the third transistor M3 and the fourth transistor M4, in Embodiment 2, the bias voltage required by the third transistor M3 and the fourth transistor M4 is connected to (VB3L, VB3R) by the gate of the third transistor M3 and the gate of the fourth transistor M4, respectively.

[0044] In Example 2, the gates of the third transistor M3 and the fourth transistor M4 are each connected to independent external bias voltages. This independence provides the possibility for calibration circuits; that is, if a mismatch is found in the transistors during manufacturing, the process deviation can be compensated by fine-tuning the two bias voltages, allowing the circuit to reach its optimal static operating point. During implementation, the design of the required bias voltages for the third transistor M3 and the fourth transistor M4 can be determined according to actual needs.

[0045] Example 3 like Figure 3 As shown, based on Embodiment 1, the first single-ended amplifier subunit 1021 further includes a fifth transistor M5. The source of the fifth transistor M5 is connected to the drain of the first transistor M1, the drain of the fifth transistor M5 is connected to the first terminal of the first inductor L1, and the gate of the fifth transistor M5 is used to connect to an external common-gate bias voltage VB4.

[0046] In this structure: the first transistor M1 acts as a transconductance stage, converting the input voltage signal into a current signal; the fifth transistor M5 acts as a common gate stage, with its gate AC grounded (through a bypass capacitor).

[0047] The fifth transistor, M5, utilizes its low input impedance to clamp the voltage swing at the drain node of the first transistor, M1, to a lower level. This connection significantly suppresses the Miller effect and greatly reduces the equivalent capacitance of the gate-drain parasitic capacitance of the first transistor M1 at the input. This not only extends the high-frequency bandwidth of the circuit but also improves its stability. Simultaneously, the cascode structure provides higher output impedance, and when combined with the first inductor L1 as a load, it achieves a higher voltage gain than a single-transistor cascode amplifier.

[0048] Similarly, the second single-ended amplifier subunit 1022 also includes a sixth transistor M6. The source of the sixth transistor M6 is connected to the drain of the second transistor M2, the drain of the sixth transistor M6 is connected to the first terminal of the fourth capacitor C4, and the gate of the sixth transistor M6 is used to connect to an external common-gate bias voltage VB5.

[0049] The cascode structure formed by the sixth transistor M6 and the second transistor M2, in addition to its advantages of high gain and high isolation, significantly improves the voltage withstand capability of the final stage driver circuit. During RF power amplification, a high voltage standing wave (VSWR) often exists at the output. The cascode structure distributes the voltage stress across the two stacked transistors (M2 and M6), preventing a single transistor from breaking down due to excessive drain-source voltage, thereby improving the circuit's reliability and linearity.

[0050] It should be noted that the above embodiments are described using a two-layer transistor stack (i.e., a common-source transistor and a common-gate transistor) as an example, but this should not be construed as a limitation of the present invention. Based on the technical concept of the embodiments of the present invention, those skilled in the art can extend the circuit structure as follows according to the voltage withstand and gain requirements of the actual process node: Expanding the number of transistors stacked: The number of transistors stacked in a single amplification subunit is optional. In low-voltage processes or low supply voltage applications, only the first transistor M1 or the second transistor M2 can be retained, employing a single-transistor common-source structure. However, in high-voltage processes or applications requiring extremely high output swing, more common-gate transistors (e.g., three- or four-layer stacked structures) can be stacked between the first transistor M1 and the fifth transistor M5, or above the fifth transistor M5. By increasing the number of stacked layers, the output voltage stress can be further distributed, adapting to higher supply voltages and achieving greater output power.

[0051] Cascading Quantity Expansion: The number of cascaded first single-ended amplifier sub-units 1021 in the preamplifier circuit 102 is also optional. Although the foregoing embodiments demonstrate specific cascading numbers, in actual designs, the number of cascaded first single-ended amplifier sub-units 1021 can be flexibly adjusted according to the system's requirements for total gain and noise figure. For example, if extremely high gain is required, three or more of the first single-ended amplifier sub-units 1021 can be cascaded; if extremely high noise figure requirements are needed, the number of cascaded units can be reduced or the matching network of the first single-ended amplifier sub-units 1021 can be optimized.

[0052] Similar to the improvement of the single-ended amplifier subunit, the differential amplifier subunit 1031 also includes a seventh transistor M7 and an eighth transistor M8. The source of the seventh transistor M7 is connected to the drain of the third transistor M3, the drain of the seventh transistor M7 is connected to the first terminal of the ninth capacitor C9, and the gate of the seventh transistor M7 is used to connect to the external bias voltage VB6. The source of the eighth transistor M8 is connected to the drain of the fourth transistor M4, the drain of the eighth transistor M8 is connected to the second terminal of the ninth capacitor C9, and the gate of the eighth transistor M8 is used to connect to the external bias voltage VB6.

[0053] The differential amplifier branch can also be designed as a common-source, common-gate architecture. The third transistor M3 and the fourth transistor M4 serve as the common-source input stage, responsible for converting the input differential voltage signal into a current signal. The seventh transistor M7 and the eighth transistor M8 serve as the common-gate buffer stage, with their sources following the drain potentials of the third transistor M3 and the fourth transistor M4, respectively. This connection method clamps the drain potentials of the third transistor M3 and the fourth transistor M4 at a low and stable level, thereby greatly reducing the impact of the gate-drain parasitic capacitances of the third transistor M3 and the fourth transistor M4 on the input, expanding the high-frequency bandwidth of the circuit, and improving the circuit stability.

[0054] Furthermore, in order to further adapt to higher power supply voltage requirements and obtain extremely high output impedance, such as Figure 3 As shown, the differential amplifier subunit 1031 further includes a ninth transistor M9 and a tenth transistor M10. The source of the ninth transistor M9 is connected to the drain of the seventh transistor M7, the drain of the ninth transistor M9 is connected to the first terminal of the ninth capacitor C9, and the gate of the ninth transistor M9 is used to connect to an external bias voltage VB7. The source of the tenth transistor M10 is connected to the drain of the eighth transistor M8, the drain of the tenth transistor M10 is connected to the second terminal of the ninth capacitor C9, and the gate of the tenth transistor M10 is used to connect to the external bias voltage VB7.

[0055] Based on the original differential common-source common-gate architecture, the differential amplifier subunit 1031 continues to stack a second-stage common-gate layer composed of a ninth transistor M9 and a tenth transistor M10 on top of the seventh transistor M7 and the eighth transistor M8. The ninth transistor M9 and the tenth transistor M10 serve as the top-level common-gate output stage, forming a series stack with the transistors below.

[0056] This three-layer stacked structure distributes the high voltage swing at the output across three sets of transistors. Compared to single-layer or double-layer structures, the top layer of transistors absorbs most of the output voltage fluctuations, thus protecting the lower driver and intermediate transistors from breakdown. This allows the differential amplifier subunit 1031 to operate at a supply voltage much higher than the breakdown voltage of a single transistor, significantly improving circuit reliability and maximum output power.

[0057] It should be noted that although the above embodiments specifically describe a three-layer stacked structure containing two layers of common-gate transistor pairs, this should not be construed as a limitation of the present invention. Based on the technical concept of the embodiments of the present invention, the number of transistor pairs stacked in the differential amplifier subunit is optional, and those skilled in the art can flexibly adjust it according to the voltage withstand requirements and gain specifications of the actual process node. For example: In low-voltage processes or applications where gain requirements are not high, the ninth and tenth transistors on the top layer can be omitted, retaining only the two-layer stacked structure consisting of the third, fourth, seventh, and eighth transistors; or even a common-source structure consisting of a single layer of the third and fourth transistors can be used directly.

[0058] In ultra-high voltage applications (such as radio frequency energy harvesting and high voltage driving), more common-gate transistor pairs (e.g., fourth or fifth layers) can be stacked in series above the ninth and tenth transistors. With each additional layer, the circuit's voltage withstand capability increases linearly, and the output impedance is further improved.

[0059] In summary, the beneficial effects achieved by this invention are that it proposes a MOSFET RF power amplifier that combines the advantages of single-ended and differential architectures. The front stage adopts a single-ended amplification architecture, while the final stage adopts a differential amplification architecture. This enables high power output and high stability, while also exhibiting good robustness, high linearity, and good even-order harmonic suppression. Furthermore, the overall circuit of this MOSFET RF power amplifier is compact, simple in structure, and easy to control in terms of manufacturing costs.

[0060] Example 4 This invention also provides a radio frequency (RF) module, which includes a MOSFET RF power amplifier 100 as described in any one of embodiments one to three above. It is understood that, based on the specific circuit design of the MOSFET RF power amplifier 100, the RF module combines the advantages of single-ended and differential architectures. The front-end stages all employ a single-ended amplification architecture, while the final stage employs a differential amplification architecture. This enables high power output and high stability while possessing good robustness, linearity, and even-order harmonic suppression performance. Furthermore, the overall circuit implementation of this MOSFET RF power amplifier is simple, small in size, and easy to control manufacturing costs. Referring to the descriptions in the above embodiments, further details are omitted here.

[0061] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0062] The embodiments of the present invention have been described above with reference to the accompanying drawings. The disclosed embodiments are merely preferred embodiments of the present invention. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many equivalent changes in form under the guidance of the present invention without departing from the spirit and scope of the claims. All such changes are within the protection scope of the present invention.

Claims

1. A MOSFET RF power amplifier, characterized in that, It includes an input matching circuit, a pre-amplifier circuit, a final power amplifier circuit, and an output matching circuit, wherein: The input matching circuit is used to receive external radio frequency signals and to achieve input impedance matching for the pre-amplifier circuit. The pre-amplifier circuit includes at least one first single-ended amplifier sub-unit based on MOSFET transistors, and one second single-ended amplifier sub-unit connected in series after the last first single-ended amplifier sub-unit. The input terminal of the first single-ended amplifier sub-unit at the beginning is connected to the input matching circuit, and the output terminal of the second single-ended amplifier sub-unit is connected to the final power amplifier circuit. The final stage power amplifier circuit includes a differential amplifier subunit implemented using MOSFET transistors, a first balun subunit disposed at the front end of the differential amplifier subunit, and a second balun subunit disposed at the rear end of the differential amplifier subunit. The input terminal of the first balun subunit is connected to the output terminal of the second single-ended amplifier subunit, and the first balun subunit is used to convert a single-ended signal to a differential signal. The output terminal of the differential amplifier subunit is connected to the input terminal of the second balun subunit, and the output terminal of the second balun subunit is connected to the input terminal of the output matching circuit. The second balun subunit is used to convert a differential signal to a single-ended signal and to achieve impedance matching. The output matching circuit is used to achieve output impedance matching for the final stage power amplifier circuit and output the radio frequency amplified signal obtained after being amplified by the pre-stage power amplifier circuit and the final stage power amplifier circuit in sequence. The first single-ended amplifier subunit includes a first transistor, a first inductor, a first resistor, a first capacitor, and a second capacitor. The gate of the first transistor is used to connect to an external bias voltage and serves as the input terminal of the first single-ended amplifier subunit. The source of the first transistor is grounded, and the drain of the first transistor is connected to the first end of the first inductor and serves as the output terminal of the first single-ended amplifier subunit. The second terminal of the first inductor is used to connect to an external power supply voltage; The first end of the first resistor is connected to the gate of the first transistor, and the second end of the first resistor is connected to the first end of the first capacitor. The second terminal of the first capacitor is connected to the first terminal of the first inductor; The first terminal of the second capacitor is connected to the first terminal of the first inductor, and the second terminal of the second capacitor is connected to the second terminal of the first inductor. The second single-ended amplifier subunit includes a second transistor, a second resistor, a third capacitor, and a fourth capacitor; the gate of the second transistor is used to connect to an external bias voltage and serves as the input terminal of the second single-ended amplifier subunit, which is connected to the drain of the first transistor in the first single-ended amplifier subunit of the preceding stage; the source of the second transistor is grounded; and the drain of the second transistor is connected to the first terminal of the fourth capacitor. The first end of the second resistor is connected to the gate of the second transistor, and the second end of the second resistor is connected to the first end of the third capacitor; The second terminal of the third capacitor is connected to the first terminal of the fourth capacitor; The second terminal of the fourth capacitor is used to connect to an external power supply voltage. When the first single-ended amplifier subunit comprises multiple stages, the first end of the first inductor of the first single-ended amplifier subunit of the previous stage is connected to the gate of the first transistor of the first single-ended amplifier subunit of the next stage. The gate of the first transistor in the first single-ended amplifier subunit at the beginning serves as the input terminal of the pre-amplifier circuit, and the drain of the second transistor in the second single-ended amplifier subunit serves as the output terminal of the pre-amplifier circuit.

2. The MOSFET RF power amplifier according to claim 1, characterized in that, The preamplifier circuit also includes an interstage matching subunit, which is connected in series between the first single-ended amplifier subunit and the second single-ended amplifier subunit located in the last stage to achieve interstage impedance matching. The interstage matching subunit includes a matching capacitor. The first end of the matching capacitor is connected to the output terminal of the first single-ended amplification subunit located in the last stage, and the second end of the matching capacitor is connected to the input terminal of the second single-ended amplification subunit.

3. The MOSFET RF power amplifier according to claim 1, characterized in that, The differential amplifier subunit includes a third transistor, a fourth transistor, a third resistor, a fourth resistor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, and a ninth capacitor, wherein: The gate of the third transistor is connected to the first terminal of the third resistor, the source of the third transistor is grounded, and the drain of the third transistor is connected to the first terminal of the ninth capacitor. The gate of the fourth transistor is connected to the first terminal of the fourth resistor, the source of the fourth transistor is grounded, and the drain of the fourth transistor is connected to the second terminal of the ninth capacitor. The second end of the third resistor is connected to the first end of the fifth capacitor; The second end of the fourth resistor is connected to the first end of the sixth capacitor; The second terminal of the fifth capacitor is connected to the first terminal of the ninth capacitor; The second terminal of the sixth capacitor is connected to the second terminal of the ninth capacitor; The first terminal of the seventh capacitor is connected to the gate of the third transistor, and the second terminal of the seventh capacitor is connected to the drain of the fourth transistor. The first terminal of the eighth capacitor is connected to the gate of the fourth transistor, and the second terminal of the eighth capacitor is connected to the drain of the third transistor. The first balun sub-unit includes a first primary coil and a second secondary coil that are mutually inductive. The first end of the first primary coil is connected to an external power supply voltage, and the second end of the first primary coil is connected to the drain of the second transistor as the input terminal of the final stage power amplifier circuit. The first end of the first primary coil is connected to the gate of the third transistor, and the second end of the first primary coil is connected to the gate of the fourth transistor. The second balun sub-unit includes a second primary coil and a second secondary coil. The first end of the second primary coil is connected to the first end of the ninth capacitor, and the second end of the second primary coil is connected to the second end of the ninth capacitor. The center tap of the second primary coil is connected to an external power supply voltage. The first end of the second stage coil is grounded, and the second end of the second stage coil is connected to the output matching circuit as the output terminal of the final stage power amplifier circuit.

4. The MOSFET RF power amplifier according to claim 1, characterized in that, The first single-ended amplifier subunit further includes a fifth transistor, the source of which is connected to the drain of the first transistor, the drain of which is connected to the first end of the first inductor, and the gate of which is used to connect to an external bias voltage.

5. The MOSFET RF power amplifier according to claim 1, characterized in that, The second single-ended amplifier subunit further includes a sixth transistor, the source of which is connected to the drain of the second transistor, the drain of which is connected to the first terminal of the fourth capacitor, and the gate of which is used to connect to an external bias voltage.

6. The MOSFET RF power amplifier according to claim 3, characterized in that, The bias voltages required for the third and fourth transistors are connected by the center tap of the primary coil, or by the gates of the third and fourth transistors respectively.

7. The MOSFET RF power amplifier according to claim 3, characterized in that, The differential amplifier subunit further includes a seventh transistor and an eighth transistor. The source of the seventh transistor is connected to the drain of the third transistor, the drain of the seventh transistor is connected to the first terminal of the ninth capacitor, and the gate of the seventh transistor is used to connect to an external bias voltage. The source of the eighth transistor is connected to the drain of the fourth transistor, the drain of the eighth transistor is connected to the second terminal of the ninth capacitor, and the gate of the eighth transistor is used to connect to an external bias voltage.

8. The MOSFET RF power amplifier according to claim 7, characterized in that, The differential amplifier subunit further includes a ninth transistor and a tenth transistor. The source of the ninth transistor is connected to the drain of the seventh transistor, the drain of the ninth transistor is connected to the first terminal of the ninth capacitor, and the gate of the ninth transistor is used to connect to an external bias voltage. The source of the tenth transistor is connected to the drain of the eighth transistor, the drain of the tenth transistor is connected to the second terminal of the ninth capacitor, and the gate of the tenth transistor is used to connect to an external bias voltage.

9. A radio frequency module, characterized in that, The radio frequency module includes the MOSFET radio frequency power amplifier as described in any one of claims 1 to 8.

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