A time-triggered ethernet time-triggered flow scheduling method based on link delay compensation
Patent Information
- Application Number
- CN202610954974.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-30
- Publication Date
- 2026-09-04
AI Technical Summary
[0015]本申请公开了一种基于链路时延补偿的时间触发以太网时间触发流调度方法及系统,旨在解决现有时间触发以太网中调度表强依赖静态链路延时、在链路延时发生变化时需要重新进行全网调度、难以适应动态网络环境的问题
[0026]本申请公开了一种基于链路时延补偿的时间触发以太网时间触发流调度方法及系统,该方法与系统适用于具有链路时延动态变化的时间触发以太网通信场景,旨在解决现有调度方法依赖静态链路时延建模、在链路时延变化时需要重新进行全网调度的问题。时间触发流动态调度系统包括一个交换机以及至少两个端系统,交换机与各端系统共同构成时间触发以太网通信组网,通过该组网可实现时间触发流在链路时延变化情况下的动态调度执行。交换机侧预先生成基准调度表,并将基准调度表下发至各端系统,其中在生成基准调度表时,将端系统接入链路的传输时延抽象为零时延。端系统获取基准调度表后,在时间同步建立完成的条件下进入调度执行准备状态。端系统基于时间同步协议获取与交换机之间的链路时延信息,并对链路时延进行稳定化处理,以得到稳定链路时延。随后,端系统根据稳定链路时延对基准调度表中的调度时刻进行补偿计算,其中包括对发送时刻进行前移补偿以及对接收时刻进行后移补偿,从而生成与实际链路状态匹配的本地执行调度表。然后,对于生成的本地执行调度表进行时序校验,确保新生成的本地执行调度表的合法性。当链路时延发生变化时,端系统对新的链路时延进行稳定化处理,并判断其变化是否超过预设阈值;当超过阈值时,通过双缓冲机制在调度周期边界完成新旧调度表的切换,从而实现调度的动态更新;当未超过阈值时,保持当前执行调度表不变。在调度执行过程中,端系统依据当前执行调度表控制时间触发流的发送与接收校验,其中发送侧在补偿后的发送时刻触发数据帧出队发送,接收侧在补偿后的接收窗口内对接收数据进行校验。通过上述方式,在无需对交换机侧调度表进行修改的情况下,实现端系统基于链路时延变化的本地动态调度,从而保证时间触发流在复杂网络环境中的确定性传输与系统稳定运行。相比于相关技术,本申请的技术方案具备以下优点:(1)无需全网重构调度表,显著提高调度更新效率。本发明通过在交换机侧生成基准调度表,并在端系统侧基于链路时延进行本地补偿计算,将传统依赖集中式离线调度重构的方式转变为端系统本地动态调整机制。当链路时延发生变化时,仅需更新端系统本地执行调度表,无需重新生成全网调度表,从而降低调度计算复杂度并提高系统响应速度。(2)基于稳定链路时延的补偿机制,提高调度执行的准确性与稳定性。本发明对获取的链路时延进行滤波、平滑或统计处理,得到稳定链路时延,并基于该稳定值进行调度补偿计算,避免链路时延瞬时波动对调度时序的影响,从而保证时间触发流发送与接收时刻的稳定性,提升系统的确定性传输能力。(3)支持链路时延变化的自适应调度,增强系统灵活性。本发明通过检测链路时延变化并结合预设阈值触发本地执行调度表更新,使系统能够在链路状态变化时自动调整调度参数,无需人工干预或重新部署调度策略,从而适应复杂网络环境下的动态变化需求。(4)采用双缓冲与校验机制,提高系统运行可靠性。本发明通过设置当前执行表与备用执行表,并在调度周期边界完成调度表切换,避免调度更新过程中对正在执行任务的影响;同时通过本地时序校验模块对新生成调度表进行合法性验证,当校验不通过时保持原调度表不变,从而保障系统稳定运行并降低异常风险。
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Abstract
Description
Technical Field
[0001] This application relates to the field of communication scheduling technology, specifically to a time-triggered Ethernet time-triggered flow scheduling method, system, electronic device, storage medium, and network based on link delay compensation. Background Technology
[0002] With the continuous development of communication technology, Ethernet has been widely used in key fields such as industrial control, aerospace, rail transportation, and vehicle networks due to its advantages of openness, compatibility, and low cost. However, traditional Ethernet uses a carrier sense multiple access / collision detection (CSMA / CD) mechanism, which is prone to collisions in multi-node concurrent communication scenarios, leading to data retransmission and making communication delays random and unpredictable, making it difficult to meet the application requirements of high real-time and high determinism.
[0003] To address the nondeterministic nature of traditional Ethernet, Time-Triggered Ethernet (TTE) achieves deterministic communication by introducing a global time synchronization mechanism and a time-based scheduling strategy. In a TTE network, a time synchronization protocol enables all nodes to share a unified time base, and services are divided into three categories: Time-Triggered Streams (TT), Rate-Constrained Streams (RC), and Event-Triggered Streams (BE). Time-Triggered Streams, in particular, are transmitted at predetermined times according to a pre-generated time schedule, exhibiting strict time constraints and serving as a crucial mechanism for ensuring system real-time performance.
[0004] In the aforementioned mechanism, the time-triggered scheduling table is typically generated offline by scheduling software based on network topology, link transmission latency, and service requirements, and then distributed to each node for execution. Existing research indicates that time-triggered scheduling requires comprehensive consideration of factors such as link latency, resource constraints, and conflict avoidance, and its scheduling results have a decisive impact on the system's real-time performance and reliability. Therefore, the accuracy of the scheduling table is highly dependent on accurate modeling of link transmission latency.
[0005] However, in practical engineering applications, link transmission latency exhibits dynamic characteristics. Link latency is not only related to the network topology but is also affected by factors such as hardware implementation, caching mechanisms, physical link length, and environmental changes, thus displaying a degree of uncertainty and volatility. When the system deployment environment changes, the link latency will change accordingly, thereby affecting the transmission timing of time-triggered streams.
[0006] To address the issue of link latency variations, existing technologies typically employ the following approach: First, link latency information is obtained through offline measurement or timestamp-based methods; second, the measured link latency is used as an input parameter, and a scheduling algorithm regenerates the time schedule table; finally, the updated schedule table is distributed to each network node for execution, thereby ensuring that the transmission of time-triggered streams meets deterministic requirements.
[0007] However, the above-mentioned processing methods still have certain limitations in practical applications, specifically: 1. The scheduling generation process is complex and cannot meet the needs of rapid computation.
[0008] The scheduling problem is an NP-hard problem. As network size and business complexity increase, the scheduling solution time grows exponentially, resulting in low scheduling generation efficiency and making it difficult to meet the needs of rapid system deployment and dynamic updates.
[0009] 2. The scheduling table relies heavily on static link delay and lacks the ability to adapt to dynamic changes.
[0010] Existing time-triggered scheduling methods typically generate scheduling tables based on static link delay models. Once link delays change, these original scheduling tables become inapplicable. Related research indicates that in deterministic Ethernet, the uncertainty and dynamic changes in link delay directly impact scheduling feasibility and system real-time performance. Therefore, static scheduling mechanisms struggle to adapt to dynamic changes in link delays in real-world systems.
[0011] 3. Low resource utilization and conservative scheduling lead to bandwidth waste.
[0012] To ensure real-time constraints are met even in the worst-case scenario, existing static scheduling methods typically employ conservative modeling based on upper bounds of link latency, introducing large guard bands in the scheduling table. While this strategy avoids conflicts, it also results in a large number of time windows remaining idle, thus reducing link bandwidth utilization. When service load is low or link latency fluctuations are small, this overly conservative resource allocation approach leads to significant resource waste and limits the improvement of overall system efficiency.
[0013] 4. The scheduling system relies on centralized reconstruction, resulting in insufficient system flexibility.
[0014] In existing scheduling systems, scheduling tables are typically calculated centrally by a central node and distributed to all network devices. When network topology or link characteristics change, global scheduling must be re-performed and all node configurations updated. This process involves configuration synchronization and system switching, making engineering implementation complex and impacting continuous system operation, thus limiting the system's flexibility and scalability. Summary of the Invention
[0015] This application discloses a time-triggered Ethernet time-triggered flow scheduling method and system based on link delay compensation, aiming to solve the problems in existing time-triggered Ethernet where the scheduling table strongly depends on static link delay, requires re-scheduling the entire network when the link delay changes, and is difficult to adapt to dynamic network environments.
[0016] To achieve the above objectives, the first aspect of this application provides a time-triggered Ethernet time-triggered stream scheduling method based on link delay compensation, comprising: acquiring link delay information between an end system and a switch, and stabilizing the link delay information to obtain a stable link delay; loading a baseline scheduling table generated by the switch, wherein the baseline scheduling table abstracts the end system access link delay as zero delay during generation; performing forward compensation on the transmission time in the baseline scheduling table based on the stable link delay to obtain a compensated transmission time, and performing backward compensation on the reception time, and generating a compensated reception time interval in combination with a preset reception window length; generating a local execution scheduling table based on the compensated transmission time and the compensated reception time interval; performing timing verification on the local execution scheduling table; when the change in stable link delay is detected to exceed a preset threshold, switching the time-verified backup execution scheduling table to the current execution scheduling table at the scheduling cycle boundary; and controlling the transmission and reception of time-triggered streams according to the current execution scheduling table.
[0017] Optionally, the link delay information is stabilized by using one or more of the following methods: filtering, moving average, or exponential smoothing algorithms to filter out instantaneous jitter and measurement errors.
[0018] Optionally, the transmission time in the baseline scheduling table is forward-shifted based on the stable link delay, including: subtracting the corresponding stable link delay from the transmission time in the baseline scheduling table; the reception time is backward-shifted based on the stable link delay, including: adding the corresponding stable link delay to the reception time in the baseline scheduling table, and using the added reception time as the starting point, and generating the compensated reception time interval in combination with the preset reception window length.
[0019] Optionally, the local execution schedule table is subjected to timing verification, including: period boundary validity verification, table entry order verification, and time validity verification; when the verification fails, the current execution schedule table remains unchanged.
[0020] Optionally, at the boundary of the scheduling cycle, the standby execution scheduling table that has undergone time-series verification is switched to the current execution scheduling table, including: maintaining the current execution table and the standby execution table using a double buffering mechanism; when the change in stable link latency is detected to exceed a preset threshold, a new local execution scheduling table is generated based on the new stable link latency and written into the standby execution table; and at the boundary of the next scheduling cycle, the standby execution table is switched to the current execution table.
[0021] Optionally, the sending and receiving of time-triggered streams are controlled according to the current execution schedule table, including: generating a dequeue enable signal when the synchronization time reaches the compensated sending time, driving the time-triggered frames in the corresponding queue to dequeue and enter the sending link; and extracting the arrival time and frame identifier of the received data frames, determining whether the arrival time falls within the corresponding compensated receiving time interval, and discarding the data frame if it does not fall within the interval.
[0022] To achieve the above objectives, the second aspect of this application also provides a time-triggered Ethernet time-triggered flow scheduling system based on link delay compensation, comprising: a synchronization and delay acquisition module for acquiring link delay information between the end system and the switch; a link delay processing module for stabilizing the link delay information to obtain a stable link delay; a baseline scheduling table loading module for loading a baseline scheduling table generated by the switch, wherein the baseline scheduling table abstracts the end system access link delay as zero delay during generation; and a local scheduling compensation module for shifting the transmission time in the baseline scheduling table forward based on the stable link delay to obtain a compensated delay. The system comprises the following modules: a transmission time and a reception time. The transmission time is adjusted by shifting the reception time backward and then using a preset reception window length to generate a compensated reception time interval. A local execution scheduling table generation module generates a local execution scheduling table based on the compensated transmission time and the compensated reception time interval. A local execution scheduling table verification module performs timing verification on the local execution scheduling table. A scheduling table switching module switches the timing-verified backup execution scheduling table to the current execution scheduling table at the scheduling cycle boundary when a change in stable link delay exceeds a preset threshold. A transmission and reception module controls the transmission and reception of time-triggered streams according to the current execution scheduling table.
[0023] To achieve the above objectives, a third aspect of this application also provides an electronic device in which the processor, when executing a computer program, implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described above.
[0024] To achieve the above objectives, the fourth aspect of this application also provides a computer-readable storage medium that, when executed by a processor, implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described above.
[0025] To achieve the above objectives, the fifth aspect of this application also provides a time-triggered Ethernet communication network, including a switch and at least two end systems; The switch is used to generate a baseline scheduling table and distribute it to each end system. When generating the baseline scheduling table, the access link latency of the end system is abstracted to zero latency. Each terminal system is configured with a time-triggered Ethernet time-triggered flow scheduling system based on link delay compensation.
[0026] This application discloses a time-triggered Ethernet time-triggered flow scheduling method and system based on link delay compensation. This method and system are applicable to time-triggered Ethernet communication scenarios with dynamically changing link delays, aiming to solve the problem that existing scheduling methods rely on static link delay modeling and require re-scheduling the entire network when link delays change. The time-triggered flow dynamic scheduling system includes a switch and at least two end systems. The switch and each end system together form a time-triggered Ethernet communication network, which enables dynamic scheduling and execution of time-triggered flows under varying link delay conditions. The switch pre-generates a baseline scheduling table and distributes it to each end system. When generating the baseline scheduling table, the transmission delay of the link accessed by the end system is abstracted as zero delay. After obtaining the baseline scheduling table, the end system enters the scheduling execution preparation state after time synchronization is established. The end system obtains the link delay information between itself and the switch based on the time synchronization protocol and performs link delay stabilization processing to obtain a stable link delay. Subsequently, the end system performs compensation calculations on the scheduling times in the baseline scheduling table based on the stable link latency. This includes forward compensation for the transmission time and backward compensation for the reception time, thereby generating a local execution scheduling table that matches the actual link state. Then, the generated local execution scheduling table undergoes timing verification to ensure its validity. When the link latency changes, the end system stabilizes the new link latency and determines whether the change exceeds a preset threshold. If the threshold is exceeded, a double-buffering mechanism is used to switch between the old and new scheduling tables at the scheduling cycle boundary, thus achieving dynamic scheduling updates. If the threshold is not exceeded, the current execution scheduling table remains unchanged. During scheduling execution, the end system controls the transmission and reception verification of time-triggered streams based on the current execution scheduling table. The transmitting side triggers data frame dequeue transmission at the compensated transmission time, and the receiving side verifies the received data within the compensated reception window. Through this method, local dynamic scheduling based on link latency changes is achieved by the end system without modifying the switch-side scheduling table, thereby ensuring deterministic transmission of time-triggered streams and stable system operation in complex network environments. Compared with related technologies, the technical solution of this application has the following advantages: (1) No need to reconstruct the scheduling table across the entire network, significantly improving scheduling update efficiency. This invention generates a baseline scheduling table on the switch side and performs local compensation calculation based on link latency on the end system side, transforming the traditional method of relying on centralized offline scheduling reconstruction into a local dynamic adjustment mechanism on the end system. When the link latency changes, only the local execution scheduling table of the end system needs to be updated, without regenerating the entire network scheduling table, thereby reducing the complexity of scheduling calculations and improving the system response speed. (2) Based on a compensation mechanism for stable link latency, the accuracy and stability of scheduling execution are improved.This invention filters, smooths, or statistically processes the acquired link delay to obtain a stable link delay, and performs scheduling compensation calculations based on this stable value to avoid the impact of instantaneous fluctuations in link delay on scheduling timing, thereby ensuring the stability of the sending and receiving times of time-triggered streams and improving the deterministic transmission capability of the system. (3) Supports adaptive scheduling for changes in link delay, enhancing system flexibility. This invention detects changes in link delay and triggers local execution scheduling table updates by combining preset thresholds, enabling the system to automatically adjust scheduling parameters when the link state changes, without manual intervention or redeployment of scheduling strategies, thus adapting to dynamic changes in complex network environments. (4) Employs a double buffer and verification mechanism to improve system reliability. This invention sets up a current execution table and a backup execution table, and completes the scheduling table switching at the scheduling cycle boundary, avoiding the impact of scheduling updates on ongoing tasks; at the same time, it verifies the legality of newly generated scheduling tables through a local timing verification module, and keeps the original scheduling table unchanged when the verification fails, thereby ensuring stable system operation and reducing the risk of anomalies. Attached Figure Description
[0027] Figure 1 A general structural block diagram of a time-triggered Ethernet dynamic scheduling system based on link delay compensation provided in this application embodiment; Figure 2 This is a schematic diagram illustrating the relationship between the baseline scheduling table and the local compensation of the end system in an embodiment of this application; Figure 3 This is a flowchart of the synchronization and link latency acquisition process in the embodiments of this application; Figure 4 This is a schematic diagram illustrating the relationship between the transmission time and the receiving window compensation in the embodiments of this application; Figure 5 This is a flowchart illustrating the generation of the local execution scheduling table in this embodiment of the application. Figure 6 This is a flowchart of the local timing verification and rollback mechanism in the embodiments of this application; Figure 7 This is a flowchart of the double-buffered execution table switching mechanism in the embodiments of this application; Figure 8 This is a flowchart of the sending and scheduling execution process in the embodiments of this application; Figure 9 This is a flowchart of the receiving scheduling verification process in an embodiment of this application; Figure 10 This is a flowchart of the overall dynamic scheduling in the embodiments of this application; Figure 11 This is a flowchart illustrating a method according to an embodiment of this application.
[0028] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0029] To better understand the purpose, technical solution, and function of this invention, the invention will be described in further detail below with reference to the accompanying drawings. However, this invention can be implemented in many different ways as defined and covered by the claims. The accompanying drawings, which constitute a part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.
[0030] Explanation of key terms Time-triggered flow: In time-triggered Ethernet, a data stream is sent at predetermined times according to a pre-generated time schedule. Its transmission has strict time constraints and is a key mechanism to ensure the real-time performance of the system.
[0031] Baseline scheduling table: The initial scheduling basis generated offline by the switch side. When generating it, the access link latency of the end system is abstracted to zero latency, and only the internal port-level scheduling relationship of the switch is planned.
[0032] Stable link delay: The link delay value obtained by filtering, smoothing or statistically calculating the acquired raw link delay information is used to filter out instantaneous jitter and measurement errors, and serves as the input parameter for scheduling compensation calculation.
[0033] Local execution scheduling table: The actual execution scheduling basis generated by the end system based on the baseline scheduling table and stable link latency, after compensation for forward transmission time and backward reception window.
[0034] Compensated transmission / reception time interval: The new scheduling time point and the allowed reception time range are obtained by the end system after offsetting the original transmission and reception times in the baseline scheduling table based on the stable link delay.
[0035] Double buffering mechanism: A hardware or software architecture design that maintains a current execution table and a backup execution table to seamlessly switch between the old and new scheduling tables at the boundary of the scheduling cycle, in order to ensure the continuous operation of the system during the scheduling update process.
[0036] In existing time-triggered Ethernet technologies, the generation of scheduling tables heavily relies on static link delay modeling. When changes in the actual network environment cause link delay fluctuations, traditional methods must recalculate the entire network's offline scheduling and issue new tables. Since time-triggered scheduling is an NP-hard problem, the solution time increases exponentially with network size. Furthermore, to ensure real-time performance in the worst-case scenario, existing methods often employ conservative upper-bound delay modeling, introducing large protection intervals and resulting in low bandwidth utilization. In addition, centralized reconfiguration mechanisms make the system inflexible and unable to adapt to dynamically changing link states.
[0037] To address the problems of existing time-triggered Ethernet scheduling tables heavily relying on static link delays, requiring full-network rescheduling when link delays change, and being difficult to adapt to dynamic network environments, this invention provides a time-triggered Ethernet time-triggered stream scheduling method and system based on link delay compensation. By using a scheduling table generated on the switch side as a baseline scheduling table and performing compensation calculations on the end system side based on link delay for sending time and receiving window, dynamic matching between scheduling execution and actual link status is achieved. The traditional scheduling update method, which relies on offline full-network reconstruction, is transformed into an end-system local compensation and dynamic update mechanism, improving scheduling response speed and reducing computational complexity and system maintenance costs. When link delays change, a local scheduling table update and switching mechanism enables dynamic scheduling capabilities without full-network reconstruction, thereby ensuring deterministic transmission of time-triggered streams in complex network environments.
[0038] Figure 1 This invention demonstrates the overall structure of a time-triggered Ethernet dynamic scheduling system based on link delay compensation, according to an embodiment of the present invention. The system includes a switch and at least two end systems. The switch and each end system are connected via network links. The switch executes an offline-generated baseline scheduling table, while the end systems compensate for transmission times and reception windows based on link delay to generate locally executed scheduling tables. Unlike traditional full-network offline reconstruction methods, this invention separates the impact of changes in the end system's access links from the switch-side scheduling generation stage. During the runtime phase, the end systems dynamically compensate and update these changes locally, thereby achieving adaptive scheduling without modifying the switch's baseline scheduling table.
[0039] In this embodiment, the switching module is implemented through a state machine, which includes at least the following states: idle state, new table generation state, timing verification state, waiting period boundary state, and switching completed state. In this embodiment, the scheduling execution module allows transmission only if the following conditions are met simultaneously: time synchronization is valid, stable link latency is valid, the local execution scheduling table is valid, and the queue corresponding to the current entry is not empty. If any condition is not met, the transmission is prohibited.
[0040] refer to Figure 11 and Figure 10 The first embodiment of this application provides a time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation, to solve the technical problem in the background art that the existing scheduling methods rely on static link delay modeling and require re-scheduling the entire network when link delay changes. This method can be executed by a processor, which can be located in a terminal or a switch. The execution process of the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation can be as follows: Step S101: Obtain the time synchronization status of the end system, and enter the scheduling execution state when the time synchronization status is valid; Step S102: Obtain the link delay information between the end system and the switch, and perform link delay stabilization processing to obtain a stable link delay; In one embodiment of this application, the link delay information is stabilized by using one or more of the following methods: filtering, moving average, or exponential smoothing algorithms to process the link delay information in order to filter out instantaneous jitter and measurement errors.
[0041] refer to Figure 3 , Figure 3 The working process of the link delay acquisition and processing module is demonstrated. The end system first establishes a unified time synchronization relationship via the IEEE 1588 protocol. After time synchronization is complete, the end system acquires the raw link delay value between itself and the switch. Since the raw link delay value may be affected by instantaneous jitter, measurement errors, and short-term fluctuations, directly using the instantaneous value for scheduling compensation can easily lead to scheduling jitter and frequent reconfiguration. Therefore, this invention includes a link delay processing module to stabilize the acquired link delay. The stabilization process can employ one or more combinations of methods such as filtering, moving average, exponential smoothing, minimum-maximum denoising, or threshold suppression to obtain a stable link delay. The stable link delay is used as input for scheduling compensation, rather than directly using the instantaneous measurement value.
[0042] Step S103: Load the baseline scheduling table generated by the switch and use the baseline scheduling table as the initial scheduling basis for the end system; In one embodiment of this application, the baseline scheduling table is generated offline by the switch side. When generating the baseline scheduling table, the access link latency of the end system is abstracted as zero latency, and the baseline scheduling table is sent to the end system as the initial scheduling table before compensation.
[0043] refer to Figure 2 , Figure 2This invention illustrates the relationship between the baseline scheduling table and the local compensation of the end systems in this embodiment. The baseline scheduling table on the switch side is generated offline by scheduling software. During the generation process, the access link latency of the end systems is abstracted to zero latency, and only the internal port-level scheduling relationships of the switch are planned. After generation, the baseline scheduling table is distributed to each end system as the initial scheduling basis. After obtaining the link latency between itself and the switch, the end system performs local compensation on the sending and receiving times in the baseline scheduling table to obtain the local execution scheduling table.
[0044] Step S104: Perform link delay compensation on the transmission times in the baseline scheduling table to obtain the compensated transmission times; Furthermore, the transmission time in the baseline scheduling table is advanced to compensate for the stable link delay, including subtracting the corresponding stable link delay from the transmission time in the baseline scheduling table.
[0045] In this embodiment, the transmission compensation can be expressed as:
[0046] Step S105: Perform link delay compensation on the reception time in the baseline scheduling table to obtain the compensated reception window; Furthermore, the reception time in the baseline scheduling table is shifted backward based on the stable link delay, including: adding the corresponding stable link delay to the reception time in the baseline scheduling table, and using the increased reception time as the starting point, and generating the compensated reception time interval in combination with the preset reception window length.
[0047] refer to Figure 4 , Figure 4 This illustrates the local scheduling compensation relationship in this embodiment of the invention. For the sending side, to ensure the time-triggered stream arrives at the switch's reference time after propagation through the access link, the end system needs to shift the sending time forward, i.e., subtract the stable link delay from the reference sending time to obtain the compensated sending time. For the receiving side, to match the receiving window with the actual arrival time of the packet, the reference receiving time needs to be shifted backward, i.e., the stable link delay is added to the reference receiving time, and combined with a preset receiving window length to form the compensated receiving time interval.
[0048] In this embodiment, receiving compensation can be expressed as: .
[0049] If the receive window length is Then the compensated receiving window can be represented as:
[0050] .
[0051] Step S106: Generate a local execution scheduling table for the end system based on the compensated transmission time and receiving window; refer to Figure 5 , Figure 5 The working process of the local execution scheduling table generation module is demonstrated. The end system obtains the stable link latency and, in conjunction with the information in the baseline scheduling table, compensates for the transmission time and reception window item by item, forming a local execution table entry consisting of multiple time-triggered flows within a period. The local execution scheduling table is generated locally on the end system and does not require modification of the quasi-scheduling table on the switch side.
[0052] Step S107: Perform timing verification on the local execution schedule table; Furthermore, the local execution scheduling table is subjected to timing verification, including: period boundary validity verification, table entry order verification, and time validity verification; when the verification fails, the current execution scheduling table remains unchanged.
[0053] refer to Figure 6 , Figure 6 The local timing verification and rollback mechanism is demonstrated. Since the newly generated local execution scheduling table may not meet scheduling requirements due to excessive compensation, window out-of-bounds errors, or table entry conflicts, local timing verification is required before switching. This verification includes at least: period boundary validity verification, table entry order verification, transmission time validity verification, and reception window validity verification. When the new table passes the verification, it is allowed to participate in subsequent switching; when the verification fails, the current execution scheduling table remains unchanged to prevent erroneous scheduling from taking effect.
[0054] Step S108: Detect link latency changes. When a stable link latency change is detected to exceed a preset threshold, the verified backup execution scheduling table is switched to the current execution scheduling table at the boundary of the scheduling cycle. Furthermore, at the boundary of the scheduling cycle, the standby execution scheduling table that has undergone time-series verification is switched to the current execution scheduling table, including: maintaining the current execution table and the standby execution table using a double buffering mechanism; when the change in stable link latency is detected to exceed a preset threshold, a new local execution scheduling table is generated based on the new stable link latency and written into the standby execution table; and at the boundary of the next scheduling cycle, the standby execution table is switched to the current execution table.
[0055] For example, when a stable link latency change is detected to exceed a preset threshold, a local execution scheduling table update is triggered; when the stable link latency change does not exceed the preset threshold, the current execution scheduling table remains unchanged.
[0056] Figure 7This invention demonstrates a dual-buffered execution table switching mechanism. To ensure that the scheduling update process does not affect the scheduling parameters being executed in the current cycle, this invention employs a dual-buffered mechanism of the current execution table (Active Table) and the backup execution table (Shadow Table). When a link latency change is detected to exceed a preset threshold, the system loads a local execution scheduling table generated based on the new stable link latency and writes it into the backup execution table. After it passes local timing verification, the backup execution table is switched to the current execution table at the boundary of the scheduling cycle. If the link latency change does not exceed the preset threshold, the current execution table remains unchanged.
[0057] Step S109: Control the sending and receiving of time-triggered streams according to the current execution schedule table; Furthermore, the sending and receiving of time-triggered streams are controlled according to the current execution schedule, including: generating a dequeue enable signal when the synchronization time reaches the compensated sending time, driving the time-triggered frames in the corresponding queue to dequeue and enter the sending link; and extracting the arrival time and frame identifier of the received data frames, determining whether the arrival time falls within the corresponding compensated receiving time interval, and discarding the data frame if it does not fall within the interval.
[0058] For example, when the time synchronization state is invalid, the stable link delay is unavailable, or the backup execution schedule table fails verification, the time-triggered stream is prohibited from being sent, and the current execution table remains unchanged or the sending is prohibited state is maintained.
[0059] Figure 8 The transmission scheduling execution process is demonstrated. The transmission-side scheduling execution module includes a time-triggered queue and a dequeue control unit. Data frames of the time-triggered stream are pre-buried in the buffer. The scheduling execution module compares the current synchronization time with the compensated transmission time in the current execution scheduling table. When the scheduling time is reached, a dequeue enable signal dequeue_en is generated, driving the time-triggered frame in the corresponding queue to be dequeued and enter the transmission link.
[0060] Figure 9 The receiving scheduling verification process is demonstrated. After receiving the time-triggered stream, the receiving end first parses the data, extracting the message identifier and arrival time information. Then, it verifies the message arrival time based on the start and end times of the receiving window for the corresponding stream in the current execution scheduling table. When the received data falls within the allowed time interval, it is considered a valid reception; if it is outside the receiving window, it is considered invalid and is discarded or reported as an error. This method ensures that the receiving side can adapt to the arrival time offset caused by changes in access link latency.
[0061] The working process of the present invention is illustrated below with reference to an embodiment. Assume that the transmission reference time of a certain time-triggered flow (TT flow) in the switch's reference scheduling table is... The receiving reference time is The length of the receiving window is Assume the end system obtains the current stable latency value of the link through the synchronization and link latency acquisition module. At this point, the end system will adjust the sending and receiving times in the baseline scheduling table according to the link delay compensation principle.
[0062] Step 1: Calculate the compensated transmission and reception times Compensation transmission time: The transmission time in the baseline scheduling table is 100µs. After link delay compensation, the end system advances the transmission time. The compensated transmission time is:
[0063] This means that although the baseline transmission time is 100us, the end system needs to trigger the transmission of the TT frame at 92us after considering the link transmission delay.
[0064] Compensation reception time: The baseline reception time is 200µs. After link delay compensation, the reception time will be shifted backward. The compensated reception time is:
[0065] The receiving window will begin from the compensated receiving time; therefore, the range of the receiving window is:
[0066]
[0067] This means that the end system's receive window will start at 208us and end at 218us, and only messages arriving within this window will be considered legitimate.
[0068] Step 2: Sending side scheduling execution On the sending side, the end system triggers the transmission of data frames through the following steps: When the synchronization time reaches 92us, the end system raises the dequeue control signal dequeue_en to dequeue the corresponding TT frame from the buffer queue. The buffer queue is dequeued at this time, allowing the data frame to enter the transmission link for transmission. Because the transmission time has been compensated, the accuracy and real-time nature of the transmission are ensured, thereby guaranteeing that the timing of the transmitted data meets the scheduling requirements. Step 3: Execution of receiving-side scheduling On the receiving side, the end system performs receive window verification on the received data frames: When the receiving end receives a data frame, it first extracts the arrival time and frame identifier of the data frame and matches them with the compensated receiving window. If the data frame arrives at time satisfy conditions, that is If so, the receiving end determines that the data frame is a legitimate reception. If the data frame is received outside the receiving window, the system will discard the data frame or perform error handling. Step 4: Link latency changes and scheduling table updates Suppose that during operation, the link state changes, causing the stable link latency to become 12µs. Since the change in link latency may affect the data transmission timing, the end system needs to perform compensation calculations for the new link latency and update the local execution scheduling table.
[0069] Calculate the new compensated transmission and reception times: The new stable link latency is 12µs, and the system recalculates the compensated transmission time:
[0070] Meanwhile, the new reception time is:
[0071] The receiving window is also updated accordingly:
[0072]
[0073] Detection link latency changes exceeding the threshold: The end system detected the change in link latency. The change exceeds a preset threshold δ (e.g., 2us), thus triggering an update to the local execution schedule table. Update and switch the schedule: The system regenerates the compensated scheduling table and updates the new scheduling time and receiving window information into the new local execution scheduling table. At the boundary of the next scheduling cycle, the system uses a double buffering mechanism to switch the new local execution scheduling table to the current execution table, ensuring that the scheduling update does not interfere with the current cycle. To address the aforementioned technical problems, the second embodiment of this application provides a time-triggered Ethernet time-triggered flow scheduling system based on link delay compensation to solve the same technical problems as the method embodiment. The system 1000 may include the following modules: a synchronization and delay acquisition module 1001, a link delay processing module 1002, a baseline scheduling table loading module 1003, a local scheduling compensation module 1004, a local execution scheduling table generation module 1005, a local execution scheduling table verification module 1006, a scheduling table switching module 1007, and a sending and receiving module 1008.
[0074] The synchronization and delay acquisition module 1001 is used to acquire the time synchronization status and link delay information of the end system. In one embodiment of this application, the synchronization and delay acquisition module acquires time synchronization information based on the IEEE 1588 protocol, acquires link delay information between the end system and the switch, and outputs stable link delay after stabilizing the link delay information.
[0075] The link delay processing module 1002 is used to stabilize the acquired link delay information; The baseline scheduling table loading module 1003 is used to load the baseline scheduling table generated by the switch; The local scheduling compensation module 1004 is used to compensate the sending time and receiving time in the baseline scheduling table according to the stable link delay, wherein the sending time is shifted forward for compensation and the receiving time is shifted backward for compensation.
[0076] The local execution scheduling table generation module 1005 is used to generate the local execution scheduling table of the end system based on the compensated transmission time and reception window. The local execution schedule table verification module 1006 is used to perform legality verification on the newly generated local execution schedule table, including period boundary verification, table entry order verification and time legality verification. When the verification fails, the current execution schedule table remains unchanged.
[0077] The scheduling table switching module 1007 is used to update and switch the local execution scheduling table; furthermore, a double buffering mechanism is adopted to maintain the current execution table and the standby execution table, and the standby execution table is switched to the current execution table at the next scheduling cycle boundary.
[0078] The sending and receiving module 1008 is used to control the sending and receiving of time-triggered streams according to the current execution schedule table. Specifically, the sending side generates a dequeue enable signal to drive the data frame to be dequeued at the compensated sending time. The receiving side extracts the arrival time and frame identifier to determine whether it falls within the corresponding compensated receiving time interval. If it does not fall within the interval, the data frame is discarded.
[0079] It is understood that the above-described device embodiments correspond to the method embodiments. Therefore, the device embodiments have all the beneficial effects of the method embodiments, and will not be repeated here.
[0080] To achieve the above objectives, a third aspect of this application also provides an electronic device, including a processor, a memory, and a computer program stored in the memory and executable on the processor; when the processor executes the computer program, it implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described above.
[0081] To achieve the above objectives, a fourth aspect of this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as provided above.
[0082] To achieve the above objectives, the fifth aspect of this application also provides a time-triggered Ethernet communication network, including a switch and at least two end systems; the switch is used to generate a baseline scheduling table and distribute it to each end system, wherein the access link delay of the end system is abstracted to zero delay when generating the baseline scheduling table; each end system is configured with the time-triggered Ethernet time-triggered stream scheduling system based on link delay compensation provided in the previous embodiment.
[0083] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A time-triggered Ethernet flow scheduling method based on link delay compensation, characterized in that, Applied to end systems, including: The link delay information between the end system and the switch is obtained, and the link delay information is stabilized to obtain a stable link delay. Load the baseline scheduling table generated by the switch, wherein the baseline scheduling table abstracts the end system access link latency as zero latency when it is generated; Based on the stable link delay, the transmission time in the baseline scheduling table is shifted forward to obtain the compensated transmission time, and the reception time is shifted backward to generate the compensated reception time interval in combination with the preset reception window length. A local execution scheduling table is generated based on the compensated transmission time and the compensated reception time interval; Perform timing verification on the local execution scheduling table; When the change in stable link latency is detected to exceed a preset threshold, the standby execution scheduling table that has undergone time-series verification will be switched to the current execution scheduling table at the boundary of the scheduling cycle. The sending and receiving of time-triggered streams are controlled according to the current execution schedule table.
2. The time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in claim 1, characterized in that, Stabilization processing of the link delay information includes: The link delay information is processed using one or more of the following algorithms: filtering, moving average, or exponential smoothing, in order to filter out instantaneous jitter and measurement errors.
3. The time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in claim 1, characterized in that, The step of shifting the transmission time in the baseline scheduling table forward based on the stable link delay includes: Subtract the corresponding stable link delay from the transmission time in the baseline scheduling table; The method of compensating for the delayed reception time includes: The receiving time in the baseline scheduling table is increased by the corresponding stable link delay, and the increased receiving time is used as the starting point to generate the compensated receiving time interval in combination with the preset receiving window length.
4. The time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in claim 1, characterized in that, Perform timing verification on the local execution scheduling table, including: Periodic boundary validity verification, entry order verification, and time validity verification; If the verification fails, keep the current execution schedule unchanged.
5. The time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in claim 1, characterized in that, The step of switching the time-checked backup execution schedule table to the current execution schedule table at the scheduling cycle boundary includes: A double buffering mechanism is used to maintain the current execution table and the standby execution table; When the change in stable link latency is detected to exceed a preset threshold, a new local execution scheduling table is generated based on the new stable link latency and written into the backup execution table. At the next scheduling cycle boundary, the standby execution table will be switched to the current execution table.
6. The time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in claim 1, characterized in that, The sending and receiving of time-triggered streams are controlled according to the current execution schedule table, including: When the synchronization time reaches the compensated transmission time, a dequeue enable signal is generated, which drives the time-triggered frame in the corresponding queue to be dequeued and enter the transmission link. The system extracts the arrival time and frame identifier of the received data frame, determines whether the arrival time falls within the corresponding compensated reception time interval, and discards the data frame if it does not.
7. A time-triggered Ethernet time-triggered flow scheduling system based on link delay compensation, characterized in that, include; The synchronization and latency acquisition module is used to acquire link latency information between the end system and the switch; The link delay processing module is used to stabilize the link delay information to obtain a stable link delay. The baseline scheduling table loading module is used to load the baseline scheduling table generated by the switch, wherein the baseline scheduling table abstracts the end system access link latency as zero latency when it is generated; The local scheduling compensation module is used to advance the transmission time in the baseline scheduling table based on the stable link delay to obtain the compensated transmission time, and to advance the reception time and combine it with the preset reception window length to generate the compensated reception time interval. The local execution scheduling table generation module is used to generate a local execution scheduling table based on the compensated transmission time and the compensated reception time interval; The local execution scheduling table verification module is used to perform timing verification on the local execution scheduling table; The scheduling table switching module is used to switch the time-checked backup execution scheduling table to the current execution scheduling table at the boundary of the scheduling cycle when the detected change in stable link latency exceeds a preset threshold. The sending and receiving module is used to control the sending and receiving of time-triggered streams according to the current execution schedule table.
8. An electronic device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and executable on the processor; when the processor executes the computer program, it implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the time-triggered Ethernet time-triggered flow scheduling method based on link delay compensation as described in any one of claims 1 to 6.
10. A time-triggered Ethernet communication network, characterized in that, Includes a switch and at least two end systems; The switch is used to generate a baseline scheduling table and distribute it to each end system. When generating the baseline scheduling table, the access link latency of the end system is abstracted to zero latency. Each terminal system is configured with the time-triggered Ethernet time-triggered flow scheduling system based on link delay compensation as described in claim 7.