Method of manufacturing an image sensor

Abstract

The application provides a manufacturing method of an image sensor. The manufacturing method comprises the following steps: providing a substrate, the substrate having an isolation structure, the top surface of the isolation structure protruding from the top surface of the substrate; forming a silicon nitride material layer on the substrate by using a low-pressure chemical vapor deposition process, the silicon nitride material layer covering the top surface of the substrate and the isolation structure; coating a photoresist on the silicon nitride material layer to form a second photoresist layer, exposing and developing the second photoresist layer to form a patterned second photoresist layer; taking the patterned second photoresist layer as a mask to etch the silicon nitride material layer to form a patterned second hard mask layer; and taking the patterned second hard mask layer as a mask to etch the substrate to form a groove accommodating a vertical transfer gate. In this way, the photolithography process window of the vertical transfer gate in the image sensor can be expanded, and the Hole miss phenomenon in the manufacturing process of the vertical transfer gate can be effectively reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for manufacturing an image sensor. Background Technology

[0002] CIS chips refer to CMOS image sensor chips, which are indispensable core components in modern digital cameras, mobile phones, tablets, and other electronic products. Shallow Trench Isolation (STI) technology is frequently used in CIS processes. This involves etching shallow trenches on a silicon wafer and then filling them with silicon oxide to form an electrically isolated shallow trench isolation structure. With the miniaturization of devices, image sensor pixels are becoming increasingly dense while their size is decreasing, requiring a corresponding reduction in the size of the transfer gates that contact the photodiodes. However, reducing the size of the transfer gates leads to a decrease in the pixel fill power, resulting in more noise in the image sensor. The transfer gates of image sensors are typically located below the photodiodes. Changing the transfer gate structure from horizontal to vertical allows for the formation of deeper photodiodes within the pixel, enabling more electrons to pass through the transfer gates to the floating diffusion nodes, achieving the goal of capturing more electrons in a smaller space. This is known as Vertical Transfer Gate (VTG) technology. The typical design of a vertical transfer gate involves creating holes in the silicon substrate at the edge of the STI (Self-Touch Transmission Gate). Because the STI protrudes a certain height from the substrate surface, it affects the photolithography window of the vertical transfer gate (VTG PH window) and can easily lead to hole misses. Figure 2 The hole in the upper left corner is missing. Summary of the Invention

[0003] One of the objectives of this application is to provide a method for fabricating an image sensor that can expand the photolithography process window of the vertical transmission gate in the image sensor and effectively reduce the Hole miss phenomenon during the fabrication process of the vertical transmission gate.

[0004] To achieve the above objectives, the method for fabricating an image sensor provided in this application includes: providing a substrate having an isolation structure, the top surface of the isolation structure protruding from the top surface of the substrate; forming a silicon nitride material layer on the substrate using a low-pressure chemical vapor deposition process, the silicon nitride material layer covering the substrate and the top surface of the isolation structure; coating photoresist on the silicon nitride material layer to form a second photoresist layer; exposing and developing the second photoresist layer to form a patterned second photoresist layer; using the patterned second photoresist layer as a mask, etching the silicon nitride material layer to form a patterned second hard mask layer; and using the patterned second hard mask layer as a mask, etching the substrate to form a groove accommodating a vertical transmission gate.

[0005] Optionally, the reaction gases used in the low-pressure chemical vapor deposition process include dichlorosilane and ammonia, wherein the flow rate of dichlorosilane is greater than or equal to 114 sccm and less than or equal to 126 sccm, and the flow rate of ammonia is greater than or equal to 456 sccm and less than or equal to 504 sccm.

[0006] Optionally, the low-pressure chemical vapor deposition process is carried out in a furnace tube, and the pressure inside the furnace tube is greater than or equal to 180 mtorr and less than or equal to 200 mtorr.

[0007] Optionally, during the formation of the silicon nitride material layer, the substrate is placed in the central region of the furnace tube.

[0008] Optionally, the temperature of the low-pressure chemical vapor deposition process is greater than or equal to 580°C and less than or equal to 800°C.

[0009] Optionally, in the step of forming a silicon nitride material layer on the substrate using a low-pressure chemical vapor deposition process, the height difference between the silicon nitride material layer above the isolation structure and the silicon nitride material layer on the side of the isolation structure is less than or equal to 200 Å.

[0010] Optionally, the method for fabricating the image sensor further includes: after forming the groove, removing the patterned second hard mask layer; forming a gate oxide layer on the inner surface of the groove; and filling the groove with polysilicon to form a vertical transmission gate.

[0011] Optionally, after the groove is formed and before the patterned second hard mask layer is removed, ion implantation is performed on the substrate of the groove sidewalls and bottom surface.

[0012] Optionally, a wet etching process can be used to remove the patterned second hard mask layer.

[0013] Optionally, the method of forming an isolation structure in the substrate includes: patterning a first hard mask layer on the substrate; etching the substrate to form trenches using the patterned first hard mask layer as a mask; depositing an isolation material on the substrate, the isolation material covering the patterned first hard mask layer and filling the trenches; grinding away the isolation material above the patterned first hard mask layer and stopping at the patterned first hard mask layer, retaining the isolation material in the trenches; and removing the patterned first hard mask layer to form an isolation structure with its top surface protruding from the top surface of the substrate.

[0014] The image sensor fabrication method provided in this application involves forming a silicon nitride material layer on a substrate using a low-pressure chemical vapor deposition (LPCVD) process. This silicon nitride material layer covers the top surface of the substrate and the isolation structure. Then, photoresist is coated onto the silicon nitride material layer to form a second photoresist layer. The second photoresist layer is exposed and developed to form a patterned second photoresist layer. Next, using the patterned second photoresist layer as a mask, the silicon nitride material layer is etched to form a patterned second hard mask layer. Finally, using the patterned second hard mask layer as a mask, the substrate is etched to form a groove accommodating a vertical transfer gate. This application uses a low-pressure chemical vapor deposition process to form a silicon nitride material layer on a substrate. In the low-pressure chemical vapor deposition process, the mean free path of the reactant gas is large, the flow rate is slow, and molecular diffusion dominates, resulting in the precursor being uniformly distributed across the entire wafer surface without large-area localized accumulation and erosion. This provides good step coverage, resulting in a smooth and low-undulation surface of the silicon nitride material layer covering the substrate and isolation structure. Continued Photolithography can be performed on a relatively flat silicon nitride material layer surface, which can result in better thickness uniformity of the photoresist layer in different areas of the silicon nitride material layer. This helps to expand the photolithography process window of the vertical transfer gate and can effectively reduce the Hole miss phenomenon during the fabrication of the vertical transfer gate. Attached Figure Description

[0015] Figure 1 This is a cross-sectional schematic diagram after a silicon nitride hard mask layer and a photoresist layer have been formed on a substrate of an image sensor.

[0016] Figure 2 This is a partial planar view of a substrate for an image sensor after a recess for accommodating a vertical transmission gate has been formed.

[0017] Figure 3 This is a schematic flowchart illustrating a method for manufacturing an image sensor according to an embodiment of this application.

[0018] Figures 4 to 9 This is a step-by-step structural diagram of a method for manufacturing an image sensor according to an embodiment of this application.

[0019] Figure 10 This is a partial plan view of a substrate after a groove has been formed in one embodiment of this application.

[0020] Explanation of reference numerals in the attached figures: 1-substrate; 2-shallow trench isolation structure; 3-silicon nitride material layer; 4-photoresist layer; 100-substrate; 101-isolation structure; 102a-silicon nitride material layer; 102-patterned second hard mask layer; 103a-second photoresist layer; 103-patterned second photoresist layer; 104-groove; 105-gate oxide layer; 106-vertical transport gate. Detailed Implementation

[0021] Figure 1 This is a schematic cross-sectional view of an image sensor substrate after a silicon nitride hard mask layer and a photoresist layer have been formed. As described in the background section, see reference... Figure 1 As shown, for the substrate 1 of the image sensor, after forming a shallow trench isolation structure 2 in the substrate 1, the top surface of the shallow trench isolation structure 2 will protrude from the top surface of the substrate 1. After forming a silicon nitride material layer 3 using plasma enhanced chemical vapor deposition (PECVD), a slope with a height of about 500 Å will be formed on the surface of the silicon nitride material layer 3. Photoresist is coated on such a slope. Although the surface of the formed photoresist layer 4 is flat, due to the large slope, after coating the photoresist, some areas of the photoresist layer 4 have a large thickness and some areas have a small thickness with a large thickness difference. Since the exposure energy required for the thinner areas is less and the exposure energy required for the thicker areas is more, it is necessary to ensure that the areas with large thickness differences have a good profile, so that the lithography window is small. Especially for higher node processes, the original window is already small. Therefore, a better method is needed to improve the photolithography process window.

[0022] In the image sensor fabrication method provided in this application, a silicon nitride material layer is formed on a substrate using a low-pressure chemical vapor deposition (LPCVD) process. The LCVD process features a large mean free path, slow flow rate, and dominant molecular diffusion of the reactant gases, resulting in a uniform distribution of the precursor across the entire wafer surface without large-area localized accumulation or erosion. This leads to good step coverage, resulting in a smooth and relatively flat surface of the silicon nitride material layer covering the substrate and isolation structure. Subsequent photolithography can be performed on this relatively flat silicon nitride material layer surface, ensuring good thickness uniformity of the photoresist layer in different areas. This helps to expand the photolithography process window of the vertical transfer gate and effectively reduces the Hole miss phenomenon during vertical transfer gate fabrication.

[0023] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present application will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present application.

[0024] For ease of description, some embodiments of this application may use spatially relative terms such as “above,” “below,” “top,” and “under” to describe the relationship between one element or component and another (or more) elements or components as shown in the accompanying drawings. It should be understood that, in addition to the orientations described in the drawings, the spatially relative terms are also intended to include different orientations of the device during use or operation. For example, if the device in the drawings is flipped, it is described as an element or component “below” or “under” other elements or components, and will subsequently be positioned “above” or “on” other elements or components. The terms “first,” “second,” etc., used below are used to distinguish between similar elements and are not necessarily used to describe a particular order or temporal sequence. It should be understood that these terms, as used, may be replaced where appropriate.

[0025] Figure 3 This is a schematic flowchart illustrating a method for fabricating an image sensor according to an embodiment of this application. (Reference) Figure 3 As shown, the method for manufacturing an image sensor provided in this embodiment includes:

[0026] Step S1: Provide a substrate having an isolation structure, the top surface of the isolation structure protruding from the top surface of the substrate;

[0027] Step S2: A silicon nitride material layer is formed on the substrate using a low-pressure chemical vapor deposition process. The silicon nitride material layer covers the top surface of the substrate and the isolation structure.

[0028] Step S3: Coat the silicon nitride material layer with photoresist to form a second photoresist layer, expose and develop the second photoresist layer to form a patterned second photoresist layer;

[0029] Step S4: Using the patterned second photoresist layer as a mask, etch the silicon nitride material layer to form a patterned second hard mask layer; and

[0030] Step S5: Using the patterned second hard mask layer as a mask, the substrate is etched to form a groove that accommodates the vertical transmission gate.

[0031] Figures 4 to 9 This is a step-by-step structural diagram illustrating a method for fabricating an image sensor according to an embodiment of this application. The following is in conjunction with... Figure 2 , Figures 4 to 9 The method for manufacturing the image sensor in this embodiment will be described.

[0032] refer to Figure 4 As shown, the substrate 100 provided in step S1 has an isolation structure 101, the top surface of which protrudes from the top surface of the substrate 100.

[0033] For example, the substrate 100 may be any suitable substrate known in the art, such as at least one of the following materials: silicon, germanium, silicon germanium, silicon carbide, silicon germanium carbide, indium arsenide, gallium arsenide, indium phosphide, or other III / V compound semiconductors, including multilayer structures composed of these semiconductors, or silicon on insulator, silicon germanide on insulator, and germanium on insulator.

[0034] For example, the isolation structure 101 may be a shallow trench isolation structure (STI). For example, a method of forming the isolation structure 101 in the substrate 100 may include: forming a first hard mask material layer (not shown) on the substrate 100, the first hard mask material layer covering the top surface of the substrate 100; forming a patterned first photoresist layer (not shown) on the first hard mask material layer; etching the first hard mask material layer using the patterned first photoresist layer as a mask to form a patterned first hard mask layer; removing the patterned first photoresist layer; etching the substrate 100 using the patterned first hard mask layer as a mask to form a trench; depositing an isolation material on the substrate 100, the isolation material covering the patterned first hard mask layer and filling the trench; grinding away the isolation material above the patterned first hard mask layer and stopping at the patterned first hard mask layer, retaining the isolation material within the trench; removing the patterned first hard mask layer to form an isolation structure 101 with its top surface protruding from the top surface of the substrate 100.

[0035] In this embodiment, the isolation structure 101 can be used to electrically isolate the device structures on both sides of the isolation structure 101.

[0036] In step S2, refer to Figure 4 As shown, a silicon nitride material layer 102a is formed on the substrate 100 using a low-pressure chemical vapor deposition (LPCVD) process. The silicon nitride material layer 102a covers the top surface of the substrate 100 and the isolation structure 101.

[0037] It should be noted that PECVD processes typically use spray heads for gas supply and rely on edge heat dissipation, resulting in uneven plasma distribution, large local temperature differences between the center and edges, significant deposition rate gradients, poor step coverage, uneven nucleation, high roughness, difficulty in controlling step differences, and a tendency for protrusions. Therefore, if... Figure 1As shown, the surface of the silicon nitride material layer 3 formed by the PECVD process has large undulations. In the low-pressure chemical vapor deposition process, the mean free path of the reactant gas is large, the flow rate is slow, and molecular diffusion dominates, which makes the precursor uniformly spread across the entire wafer surface without large-area local accumulation and erosion, and the step coverage is good. Therefore, in this embodiment, the silicon nitride material layer 102a formed on the substrate 100 by the low-pressure chemical vapor deposition process can make the surface undulations of the silicon nitride material layer 102a covering the substrate 100 and the isolation structure 101 small and relatively smooth. Preferably, the height difference between the silicon nitride material layer 102a above the isolation structure 101 and the silicon nitride material layer 102a on the side of the isolation structure 101 is less than or equal to 200 Å, so that the subsequent vertical transmission gate photolithography process window can be enlarged significantly.

[0038] For example, the low-pressure chemical vapor deposition process is performed in a furnace tube, and the pressure inside the furnace tube can be greater than or equal to 180 mtorr and less than or equal to 200 mtorr, for example, 190 mtorr, but is not limited thereto. In this embodiment, during the formation of the silicon nitride material layer 102a, the substrate 100 (i.e., the wafer) can be placed in the middle region of the furnace tube, that is, the edge region of the furnace tube can be used for production without placing the wafer. Since the stability of the middle region of the furnace tube is better, placing the substrate 100 in the middle region of the furnace tube helps to reduce the step difference on the surface of the silicon nitride material layer 102a. In addition, the furnace tube adopts multi-zone heating, which can improve the uniformity of the deposition rate of the silicon nitride material layer 102a, and help to reduce the step difference on the surface of the silicon nitride material layer 102a.

[0039] In this embodiment, the reaction gases used in the low-pressure chemical vapor deposition process may include dichlorosilane (DCS) and ammonia (NH3). The flow rate of the dichlorosilane may be greater than or equal to 114 sccm and less than or equal to 126 sccm, for example, 120 sccm; the flow rate of the ammonia may be greater than or equal to 456 sccm and less than or equal to 504 sccm, for example, 480 sccm. The relatively low flow rate of the reaction gases in this embodiment helps to reduce the step difference on the surface of the silicon nitride material layer 102a, that is, to reduce the step height on the surface of the silicon nitride material layer 102a.

[0040] In this embodiment, the temperature of the low-pressure chemical vapor deposition process can be greater than or equal to 580°C and less than or equal to 800°C, for example, 760°C. Forming the silicon nitride material layer 102a at a temperature below 800°C helps to reduce the step difference on the surface of the silicon nitride material layer 102a.

[0041] In step S3, refer to Figure 5 As shown, a second photoresist layer 103a is formed by coating photoresist onto the silicon nitride material layer 102a, with reference to... Figure 6As shown, the second photoresist layer 103a is exposed and developed to form a patterned second photoresist layer 103.

[0042] In this embodiment, since the surface undulation of the silicon nitride material layer 102a formed by the low-pressure chemical vapor deposition process is small, the thickness uniformity of each region of the second photoresist layer 103a formed thereon is good. Thus, the exposure energy of the photoresist layer 103a is less limited by the thickness of the photoresist layer 103a, thereby expanding the photolithography process window.

[0043] In step S4, refer to Figure 6 and Figure 7 As shown, the patterned second photoresist layer 103 is used as a mask to etch the silicon nitride material layer 102a to form a patterned second hard mask layer 102.

[0044] For example, the silicon nitride material layer 102a can be etched using a dry etching process, but is not limited thereto.

[0045] Subsequently, the patterned second photoresist layer 103 can be removed by an ashing process, and the wafer can also be wet-cleaned after the patterned second photoresist layer 103 is removed.

[0046] In step S5, refer to Figure 8 As shown, the substrate 100 is etched using the patterned second hard mask layer 102 as a mask to form a groove 104 for accommodating the vertical transmission gate.

[0047] In this embodiment, a dry etching process can be used to etch the substrate 100 to form the groove 104. In this embodiment, the groove 104 is located on the side of the isolation structure 101 and is disposed close to the isolation structure 101.

[0048] Figure 10 This is a partial plan view of a substrate after a groove has been formed in one embodiment of this application. (See reference...) Figure 10 As shown, the groove 104 is fabricated using the image sensor fabrication method of this application, and... Figure 2 In comparison, it effectively improves the problem of hole miss.

[0049] refer to Figure 8 As shown, after forming the groove 104, the patterned second hard mask layer 102 is removed; a gate oxide layer 105 is formed on the inner surface of the groove 104; Reference Figure 9 As shown, polysilicon is filled in the groove 104 to form a vertical transport gate 106. The gate oxide layer 105 can be formed by processes such as thermal oxidation; the material of the gate oxide layer 105 includes, but is not limited to, silicon oxide; the gate oxide layer 105 can also cover the surface of the substrate 100, but is not limited thereto.

[0050] In this embodiment, after the formation of the groove 104 and before the formation of the gate oxide layer 105, the substrate 100 can be pre-cleaned to avoid the influence of natural oxides and impurities on the quality of the gate oxide layer 105.

[0051] In this embodiment, the patterned second hard mask layer 102 can be removed by a wet etching process, but it is not limited to this.

[0052] In some embodiments, after the groove 104 is formed and before the patterned second hard mask layer 102 is removed, ion implantation can be performed on the substrate of the sidewalls and bottom of the groove 104, followed by heat treatment of the substrate 100. This allows for doping adjustment of the substrate, which helps to improve the performance of the image sensor.

[0053] In this embodiment, the image sensor also includes a photodiode and a floating diffusion node. The substrate around the vertical transmission gate can contact the photodiode, and the electrons generated by the photodiode move to the floating diffusion node under the control of the vertical transmission gate 106.

[0054] In the image sensor fabrication method provided in this application, a silicon nitride material layer 102a is formed on a substrate 100 using a low-pressure chemical vapor deposition process. The silicon nitride material layer 102a covers the top surface of the substrate 100 and the isolation structure 101. Then, photoresist is coated on the silicon nitride material layer 102a to form a second photoresist layer 103a. The second photoresist layer 103a is exposed and developed to form a patterned second photoresist layer 103. Next, using the patterned second photoresist layer 103 as a mask, the silicon nitride material layer 102a is etched to form a patterned second hard mask layer 102. Using the patterned second hard mask layer 102 as a mask, the substrate 100 is etched to form a groove 104 for accommodating a vertical transmission gate 106. This application employs a low-pressure chemical vapor deposition (LPV) process to form a silicon nitride material layer 102a on a substrate 100. In the LPV process, the reactant gases have a large mean free path, slow flow rate, and are dominated by molecular diffusion, resulting in the precursor being uniformly distributed across the entire wafer surface without large-area localized accumulation or erosion. This leads to good step coverage, resulting in a smooth and low-ripple surface of the silicon nitride material layer 102a covering the substrate 100 and the isolation structure 101. Continued The photolithography process can be performed on the relatively flat surface of the silicon nitride material layer 102a, which can make the thickness uniformity of the second photoresist layer 103a in each region of the silicon nitride material layer 102a better. This helps to expand the photolithography process window of the vertical transmission gate and can effectively reduce the Hole miss phenomenon in the vertical transmission gate fabrication process.

[0055] The above description is merely a description of preferred embodiments of this application and is not intended to limit the scope of the claims of this application. Any person skilled in the art can make possible changes and modifications to the technical solutions of this application by utilizing the methods and techniques disclosed above without departing from the spirit and scope of this application. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall fall within the protection scope of the technical solutions of this application.

Claims

1. A method for manufacturing an image sensor, characterized in that, include: A substrate is provided having an isolation structure, the top surface of which protrudes from the top surface of the substrate; A silicon nitride material layer is formed on the substrate using a low-pressure chemical vapor deposition process, and the silicon nitride material layer covers the top surface of the substrate and the isolation structure; A second photoresist layer is formed by coating photoresist onto the silicon nitride material layer, and the second photoresist layer is exposed and developed to form a patterned second photoresist layer. Using the patterned second photoresist layer as a mask, the silicon nitride material layer is etched to form a patterned second hard mask layer; as well as Using the patterned second hard mask layer as a mask, the substrate is etched to form a groove that accommodates the vertical transmission gate.

2. The method for manufacturing an image sensor as described in claim 1, characterized in that, The low-pressure chemical vapor deposition process uses reaction gases including dichlorosilane and ammonia, wherein the flow rate of dichlorosilane is greater than or equal to 114 sccm and less than or equal to 126 sccm, and the flow rate of ammonia is greater than or equal to 456 sccm and less than or equal to 504 sccm.

3. The method for manufacturing an image sensor as described in claim 1, characterized in that, The low-pressure chemical vapor deposition process is carried out in a furnace tube, and the pressure inside the furnace tube is greater than or equal to 180 mtorr and less than or equal to 200 mtorr.

4. The method for manufacturing an image sensor as described in claim 3, characterized in that, During the formation of the silicon nitride material layer, the substrate is placed in the central region of the furnace tube.

5. The method for manufacturing an image sensor as described in claim 1, characterized in that, The temperature of the low-pressure chemical vapor deposition process is greater than or equal to 580°C and less than or equal to 800°C.

6. The method for manufacturing an image sensor as described in claim 1, characterized in that, In the step of forming a silicon nitride material layer on the substrate using a low-pressure chemical vapor deposition process, the height difference between the silicon nitride material layer above the isolation structure and the silicon nitride material layer on the side of the isolation structure is less than or equal to 200 Å.

7. The method for manufacturing an image sensor as described in claim 1, characterized in that, Also includes: After the groove is formed, the patterned second hard mask layer is removed; A gate oxide layer is formed on the inner surface of the groove; as well as Polysilicon is filled into the groove to form a vertical transmission gate.

8. The method for manufacturing an image sensor as described in claim 7, characterized in that, After the groove is formed and before the patterned second hard mask layer is removed, ion implantation is performed on the substrate of the groove sidewalls and bottom surface.

9. The method for manufacturing an image sensor as described in claim 7, characterized in that, The patterned second hard mask layer is removed using a wet etching process.

10. The method for manufacturing an image sensor as described in claim 1, characterized in that, The method of forming an isolation structure in the substrate includes: A patterned first hard mask layer is formed on the substrate; Using the patterned first hard mask layer as a mask, the substrate is etched to form trenches; An isolation material is deposited on the substrate, the isolation material covering the patterned first hard mask layer and filling the trench; Grinding removes the insulating material above the patterned first hard mask layer and stops at the patterned first hard mask layer, retaining the insulating material within the trench; and Remove the patterned first hard mask layer to form an isolation structure with its top surface protruding from the top surface of the substrate.

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