Digital management system for batch production of boars based on passive sensing of SAW

Abstract

The present application relates to the technical field of digital management of livestock breeding, and particularly relates to a batch production digital management system for breeding pigs based on SAW passive sensing, which comprises a passive homologous sensing ear tag, a SAW radio frequency reader, an edge processing unit and a transfer channel gating device, the passive homologous sensing ear tag is in wireless communication connection with the SAW radio frequency reader, the SAW radio frequency reader, the transfer channel gating device and the weighing device are all in electrical connection with the edge processing unit, and the batch production control is used for the transfer link of breeding pigs, the passive homologous sensing ear tag of the present application integrates ID coding, body temperature and heart rate sensitive resonators in the same quartz substrate, is driven by the same radio frequency excitation, synchronously outputs in the same receiving channel, the time difference of multi-parameter output is less than 100 nanoseconds, and the synchronization deviation is eliminated; the completely passive design does not need to be built-in battery, has long service life, greatly reduces the operation and maintenance cost of large-scale pig farms, and the differential heart rate detection structure can offset the motion noise and significantly improve the detection accuracy in dynamic scenes.

Description

Technical Field

[0001] This invention relates to the field of digital management technology for livestock farming, specifically to a digital management system for batch production of breeding pigs based on SAW passive sensing. Background Technology

[0002] With the rapid development of pig farming towards large-scale and intensive operations, batch production of breeding pigs has become a core model for modern pig farms to improve reproductive efficiency, standardize production rhythms, and strengthen disease prevention and control. The herd transfer process, as a key node in batch production, directly determines the overall production efficiency of the pig farm through its control precision and execution efficiency. Current technologies mostly use RFID technology for individual breeding pig identification, combined with weighing equipment for basic data collection, and manage batch information through upper-level computer software. However, some problems still exist in practical applications: Existing passive RFID ear tags can only achieve ID recognition and cannot simultaneously collect core physiological indicators such as body temperature and heart rate. Active sensor ear tags require built-in batteries, resulting in short lifespans and high maintenance costs. Furthermore, the separate collection of data from multiple sensors can only be synchronized by software afterward, leading to significant time discrepancies and an inability to achieve simultaneous synchronization of multiple parameters, which can easily cause distortions in stress assessment. Existing SAW sensing technologies are mostly single-parameter detection, lacking mature solutions for simultaneous acquisition of multiple parameters. Moreover, the current system relies on serial software processing for the entire data acquisition, processing, and control process, with processing delays ranging from tens of milliseconds to seconds. This only enables post-event traceability and cannot achieve real-time verification and closed-loop management during herd transfers, easily leading to batch mis-transfers and pen mismatches. The existing batch verification logic is fixed in software, unable to flexibly adapt to different production modes with different batch cycles, and the parameter adjustment process is cumbersome, making it difficult to meet the management needs of high-frequency herd transfers in large-scale pig farms. Summary of the Invention

[0003] To address the aforementioned deficiencies and problems in batch-based herding of breeding pigs, such as asynchronous multi-parameter processing, high processing latency, poor batch adaptation, weak anti-interference, and inability to intervene in stress in real time, this invention provides a digital management system for batch-based production of breeding pigs based on SAW passive sensing. It utilizes SAW passive ear tags to achieve synchronous acquisition of ID, body temperature, and heart rate, eliminating the need for batteries and ensuring long lifespan. The FPGA hardware direct connection processing latency is <1 millisecond, enabling timestamp binding. Reconfigurable logic adapts to multiple batch modes, achieving closed-loop management during herding. Real-time stress detection and coordinated feeding and environmental control provide precise intervention, significantly improving batch production efficiency and the health assurance level of breeding pigs.

[0004] The solution adopted by this invention to solve its technical problem is: a digital management system for batch production of breeding pigs based on SAW passive sensing, including passive homologous sensing ear tags, SAW radio frequency readers, an edge processing unit, a transfer channel gating device, and a weighing device. The passive homologous sensing ear tags are wirelessly connected to the SAW radio frequency readers, and the SAW radio frequency readers, transfer channel gating devices, and weighing devices are all electrically connected to the edge processing unit, used for batch production control in the breeding pig transfer process. The passive homogeneous sensing ear tag is a completely passive structure worn on the ear of the breeding pig. The passive homogeneous sensing ear tag integrates a surface acoustic wave chip. The surface acoustic wave chip integrates an ID encoding resonator, a body temperature sensitive resonator, and a heart rate sensitive resonator on the same quartz substrate. The ID encoding resonator, body temperature sensitive resonator, and heart rate sensitive resonator are driven by the same radio frequency excitation signal and synchronously output oscillation echo signals through the same receiving channel, realizing physical-layer homogeneous synchronization of individual ID, body temperature data, and heart rate data. The SAW radio frequency reader is an anti-interference SAW radio frequency reader, which is set in the detection area of ​​the breeding pig transfer channel. It is used to transmit radio frequency excitation signals and receive oscillation echo signals. The SAW radio frequency reader is directly connected to the edge processing unit through a hardware IO interface without software protocol relay. The edge processing unit is an FPGA hardware reconfigurable edge processing unit. The FPGA hardware reconfigurable edge processing unit is directly connected to the group channel gating device and the weighing device through a hardware IO interface. The FPGA hardware reconfigurable edge processing unit has built-in reconfigurable hardware logic. The reconfigurable hardware logic is set to generate an anchor reference timestamp when the first tag detection signal of the SAW radio frequency reader is received, synchronously trigger the signal acquisition of the SAW radio frequency reader and the weighing data acquisition of the weighing device, and perform signal demodulation, batch rhythm verification and stress state determination in parallel. The total processing delay does not exceed 1 millisecond. The signal demodulation is a hardware parallel demodulation of the oscillating echo signal. The individual ID, body temperature data, heart rate data, and weight data obtained by demodulation are all bound to the anchored reference timestamp. The batch rhythm verification and stress state determination are parallel hardware logic verification based on dynamically configured batch rhythm parameters and stress threshold parameters.

[0005] Furthermore, the body temperature sensitive resonator adopts a quartz cut with temperature coefficient sensitivity, and its resonant frequency responds to the linear shift in the body temperature of the breeding pig within the range of 35°C to 42°C; the heart rate sensitive resonator senses the vibration of the ear rim pulse of the breeding pig through the piezoelectric effect of the quartz substrate, and its resonant frequency responds to the linear shift in the heart rate within the range of 30 beats / minute to 300 beats / minute.

[0006] Furthermore, the FPGA hardware reconfigurable edge processing unit includes: The hardware-level group trigger synchronization module is configured to immediately generate an anchor reference timestamp when the first tag detection signal is detected, and synchronously send trigger commands to the anti-interference SAW RF reader, weighing device and channel gating device. The SAW signal hardware demodulation acceleration core is configured to use parallel hardware logic to demodulate individual ID, body temperature data and heart rate data from the oscillating echo signal; The reconfigurable batch rhythm verification hardware acceleration core is configured with a parameterized reconfigurable logic architecture. It executes in parallel hardware logic during the verification process and can adapt to different batch rhythm parameters without modifying the FPGA hardware code.

[0007] Furthermore, the FPGA hardware reconfigurable edge processing unit also includes a gating control and intervention logic module, which is configured to output release or lock commands directly to the channel gating device through the hardware IO interface based on the results of batch rhythm verification and stress state determination, and push early warning information to the management terminal through the network interface.

[0008] Furthermore, the anti-interference SAW radio frequency reader is equipped with a diversity receiving antenna and a metal interference suppression bandstop filter. The diversity receiving antenna is respectively located at the entrance and exit of the transfer channel, and the metal interference suppression bandstop filter is used to suppress electromagnetic reflections and harmonic interference generated by the metal fence and weighing equipment of the transfer channel.

[0009] Furthermore, the width of the transfer channel is set to allow only a single breeding pig to pass through, and it is connected to the FPGA hardware reconfigurable edge processing unit through a hardware I / O interface, so that the mechanical movement of the channel is synchronized with data acquisition, verification, and control at the hardware level.

[0010] A digital management method for batch production of breeding pigs based on SAW passive sensing includes the following steps: S1. When the SAW radio frequency reader detects the first tag signal of a breeding pig wearing a passive homogeneous sensing ear tag entering the transfer channel, it sends a trigger signal to the FPGA hardware reconfigurable edge processing unit directly through the hardware IO interface. The FPGA hardware reconfigurable edge processing unit generates an anchor reference timestamp, which synchronously triggers the high-frequency acquisition of the SAW radio frequency reader and the synchronous weighing acquisition of the transfer channel weighing device. The S2 and SAW radio frequency readers transmit radio frequency excitation signals to the passive homogeneous sensing ear tags and receive oscillation echo signals synchronously returned by the ID encoding resonator, body temperature sensitive resonator and heart rate sensitive resonator through the same receiving channel. S3. In the FPGA hardware reconfigurable edge processing unit, the oscillation echo signal is demodulated through parallel hardware logic, and the individual ID, body temperature data, and heart rate data are extracted synchronously. The individual ID, body temperature data, heart rate data, and synchronously collected weighing data are bound to the anchor reference timestamp at the hardware level. S4. In the FPGA hardware reconfigurable edge processing unit, through parallel hardware logic, batch rhythm verification and stress state determination are performed on the bound individual data according to the dynamically configured batch rhythm parameters and stress threshold parameters, and the entire process processing delay is controlled within 1 millisecond. S5. Based on the results of batch rhythm verification and stress state determination, output release or lock control commands to the transfer channel gate control device through the hardware IO interface, and push corresponding early warning information to the management terminal to realize closed-loop management of the transfer.

[0011] The beneficial effects of this invention are: The passive homogeneous sensing ear tag of the present invention integrates ID encoding, body temperature and heart rate sensitive resonators on the same quartz substrate, drives them with the same radio frequency excitation, and outputs synchronously through the same receiving channel. The time difference of multiple parameter outputs is less than 100 nanoseconds, eliminating synchronization deviation. The completely passive design does not require an internal battery, has a long working life, and significantly reduces the operation and maintenance costs of large-scale pig farms. The differential heart rate detection structure can cancel motion noise and significantly improve the detection accuracy in dynamic scenarios. The SAW RF reader is directly connected to the FPGA via hardware I / O, without any software protocol relay, and the trigger latency is no more than 100 microseconds; the FPGA performs full-process hardware parallel processing with a total latency of no more than 1 millisecond, realizing hardware-level timestamp binding of individual ID, physiological data, and weighing data to ensure accurate correspondence between data and individuals in dynamic group transfer scenarios. The FPGA has a built-in parameterized reconfigurable batch verification acceleration core, which can adapt to different batch production modes without modifying the hardware code, making it highly adaptable. The fully parallel hardware logic can instantly complete multi-dimensional verification and directly output gating control commands to realize closed-loop management of acquisition-verification-control, eliminate batch mismatch, and greatly improve the batch management efficiency of large-scale pig farms. Attached Figure Description

[0012] Figure 1 This is a block diagram of the overall architecture of the digital management system for batch production of breeding pigs according to the present invention; Figure 2 This is a schematic diagram of the internal surface acoustic wave chip structure of the passive homogeneous sensing ear tag of the present invention; Figure 3 This is a block diagram of the internal hardware logic of the FPGA hardware reconfigurable edge processing unit of the present invention. Figure 4 This is a schematic diagram of the transfer channel structure of the present invention; Figure 5This is a block diagram of the hardware circuit principle of the SAW radio frequency reader of the present invention; Figure 6 This is a flowchart of the digital management method for batch production of breeding pigs according to the present invention.

[0013] In the diagram: 1. Passive homogeneous sensing ear tag; 2. Surface acoustic wave chip; 201. Quartz substrate; 202. Interdigital transducer; 203. ID-coded resonator; 204. Body temperature-sensitive resonator; 205. Heart rate-sensitive resonator; 206. Reflective grating array; 207. Silicon dioxide passivation protective layer; 3. FPGA hardware reconfigurable edge processing unit; 4. Group transfer channel; 401. Electric entrance door; 402. Entrance SAW RF reader; 403. Electronic scale; 404. Exit SAW RF reader; 405. Electric exit door. Detailed Implementation

[0014] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0015] Please see Figure 1-6 This invention provides a technical solution for a digital management system for batch production of breeding pigs based on SAW passive sensing: Example

[0016] This invention provides a digital management system for batch production of breeding pigs based on SAW passive sensing. The system includes: a passive homologous sensing ear tag 1 worn on individual breeding pigs; an anti-interference SAW radio frequency reader deployed in the detection area of ​​the transfer channel 4 for transmitting radio frequency excitation signals to the ear tag and receiving echo signals; and an FPGA hardware reconfigurable edge processing unit 3 directly connected to the SAW radio frequency reader, the transfer channel gating device, and the weighing device through a hardware I / O interface, serving as the control and computing center of the system.

[0017] The passive co-sensing ear tag 1 and the SAW RF reader exchange energy and data via a 433MHz RF link. The SAW RF reader transmits the received oscillation echo signal in raw data form to the FPGA edge processing unit in real time through the hardware I / O interface. After generating the anchoring reference timestamp and sending trigger commands to each device synchronously, the FPGA edge processing unit performs hardware demodulation, batch verification, and stress determination on the echo signal. Finally, it outputs the release or lock control command directly to the group transfer channel gate control device through the hardware I / O interface, and uploads the complete anchoring data packet to the cloud batch management platform through the network interface.

[0018] The passive, homogeneous sensing ear tag 1 is a completely passive structure worn on the ear of a breeding pig. It requires no built-in battery and is driven solely by the radio frequency excitation signal emitted by a SAW radio frequency reader. The ear tag shell is injection molded from a corrosion-resistant material that meets livestock farming standards, with a designed service life of no less than 5 years. The ear tag integrates a surface acoustic wave chip 2 based on a piezoelectric quartz substrate 201. This chip integrates three resonator units on the same quartz substrate using micro-nano fabrication technology: an ID-coded resonator 203, a body temperature-sensitive resonator 204, and a heart rate-sensitive resonator 205.

[0019] The ID-encoded resonator 203 consists of a reflective grating with a specific coding arrangement, used to store the unique identification of each breeding pig. Its coding format is compatible with the ISO 018000-6C standard. The body temperature-sensitive resonator 204 adopts a quartz crystal with a specific temperature coefficient. Its design principle is that when the ambient temperature changes, the sound velocity and lattice size of the quartz crystal change accordingly, causing a calibrable linear shift in the resonator's resonant frequency. The temperature-frequency characteristics of this resonator are precisely calibrated so that its resonant frequency can respond linearly to changes in the breeding pig's body temperature within the range of 35°C to 42°C. With the demodulation processing of the reader, the temperature measurement accuracy can reach ±0.2°C. The heart rate sensitive resonator 205 utilizes the piezoelectric effect of the quartz substrate 201 to effectively pick up the micro-vibrations of the marginal auricular artery pulse transmitted through the cartilage tissue of the pig's ear. This periodic pulse pressure wave acts on the quartz substrate 201, causing changes in lattice stress through the piezoelectric effect, thereby modulating the resonant frequency of the resonator. The offset of the resonant frequency is proportional to the instantaneous intensity of the pulse vibration, and its frequency change period corresponds to the heart rate. The measurable range is 30 beats / minute to 300 beats / minute, and the measurement accuracy can reach +2 beats / minute.

[0020] The three resonators mentioned above share the same set of interdigital transducers 202, are simultaneously driven by the same radio frequency excitation signal emitted by the SAW radio frequency reader, and synchronously output oscillating echo signals through the same receiving channel. The output time difference of individual ID, body temperature data, and heart rate data is less than 100 nanoseconds, achieving multi-parameter synchronous operation and eliminating time synchronization deviations caused by separate acquisition of multiple sensors and software time calibration. Preferably, a silicon dioxide passivation protective layer 207 is prepared on the surface of the quartz substrate 201. The passivation layer is approximately 200 nanometers thick, which can effectively block corrosive gases such as ammonia and hydrogen sulfide in the pig farm environment, as well as the high humidity environment, from eroding the chip resonant structure. At the same time, it reduces the interference of external mechanical vibration on the resonant frequency detection, so that the environmental interference errors of body temperature and heart rate detection are controlled within ±0.1℃ and ±1 time / minute, respectively.

[0021] Furthermore, in the implementation plan optimized for irregular movement scenarios of sows during regrouping, the heart rate-sensitive resonator is designed as a differential structure. Specifically, a pair of resonators with identical electrical characteristics, spatially close and symmetrically placed, are designed on a quartz substrate 201. The sensitive area of ​​one resonator is mechanically coupled to the tight contact surface between the ear tag and the pig's ear to sense the superposition signal of pulse vibration and motion noise; the other resonator is suspended to pick up only the common-mode motion noise caused by acceleration. In the subsequent SAW signal hardware demodulation acceleration core, a differential signal processing submodule is added to perform a difference operation on the frequency change signals output by the two resonators, thereby canceling the common-mode motion noise, extracting a purer pulse vibration signal, and effectively reducing false positive stress alarms caused by pig movement.

[0022] An anti-interference SAW RF reader is installed in the detection area of ​​the pig transfer channel 4. It is directly connected to the FPGA hardware reconfigurable edge processing unit 3 via a hardware I / O interface, without any software protocol relay, and the trigger signal transmission delay does not exceed 100 microseconds. The reader adopts a 433MHz ISM band RF solution. This band has better diffraction and penetration capabilities than the 915MHz and 2.4GHz bands in the metal structure environment of the pig farm, which can effectively reduce the signal obstruction caused by the stainless steel fence and weighing equipment in the transfer channel. The reader's RF front end is equipped with a power amplifier and a low-noise amplifier. The transmit power is adjustable from 0dBm to 20dBm, the receive sensitivity is better than -110dBm, the tag reading distance covers 0.5 meters to 2 meters, and the reading rate is not less than 100 times / second. In the actual test environment of the pig farm with high electromagnetic interference, the tag reading success rate is not less than 99.9%.

[0023] To address the severe electromagnetic reflections and harmonic interference generated by the metal structure within the transfer channel 4, the reader's RF circuit incorporates a metal interference suppression band-stop filter. This filter's stopband covers the main harmonic frequency bands affected by electromagnetic reflections from the stainless steel structure, achieving an in-band suppression depth of at least 40dB. Simultaneously, the reader is equipped with dual-channel diversity receiving antennas, fixedly installed at the entrance and exit ends of transfer channel 4 respectively. The two antennas employ spatial diversity reception mode, effectively eliminating signal fading caused by the pigs' bodies obstructing the signal during the transfer process.

[0024] The reader is directly connected to the FPGA edge processing unit through a parallel hardware I / O interface. It uses the LVDS level standard to transmit trigger signals and raw radio frequency data, eliminating the processing delay of software protocol stacks such as TCP / IP or serial ports. The trigger signal transmission delay does not exceed 100 microseconds, providing a time accuracy basis for subsequent hardware-level synchronous triggering.

[0025] The FPGA hardware reconfigurable edge processing unit 3 serves as the core control and processing hub of the system. This unit uses a Xilinx Artix-7XC7A35T FPGA chip as its main control core, complemented by an ARM Cortex-M4 processor as an auxiliary management unit. The ARM auxiliary processor is responsible for configuring and distributing batch rhythm parameters and stress threshold parameters, monitoring system status, and data uploading and interaction; it does not participate in the core real-time processing flow. The reconfigurable hardware logic within the FPGA chip solidifies the entire process of group switching triggering, signal demodulation, batch rhythm verification, and gating intervention into parallel hardware logic, with no intermediate software serial processing stages, and a total processing latency of no more than 1 millisecond.

[0026] This unit contains four core hardware logic modules, and the structure and function of each module are as follows: Hardware-level group transfer trigger synchronization module: The signal input of this module is directly connected to the trigger output of the SAW RFID reader via a hardware I / O interface. The signal output is directly connected to the control inputs of the SAW RFID reader, the weighing device, and the channel gating device via hardware I / O interfaces, respectively. This module is configured to immediately generate a unique group transfer anchoring reference timestamp T when the first valid tag detection signal sent by the SAW RFID reader 402 at the entrance is detected. O Simultaneously, trigger commands are sent to the SAW RF reader, weighing device, and channel gate control device, triggering the reader to start high-frequency acquisition, the weighing device to perform synchronous weighing, and the channel entrance gate to perform locking action. The delay of this entire process synchronous triggering does not exceed 100 microseconds.

[0027] SAW Signal Hardware Demodulation Acceleration Core: This acceleration core's signal input is connected to the raw data output of the SAW RF reader via a hardware I / O interface. Internally, it employs a fully parallel hardware logic architecture, specifically including a digital down-conversion submodule, a matched filter submodule, a frequency calculation submodule, and an ID decoding submodule. The digital down-conversion submodule down-converts the intermediate frequency signal output by the reader to baseband; the matched filter submodule performs pulse compression processing on the signal to improve the signal-to-noise ratio; the frequency calculation submodule extracts the frequency offset of each resonator through a fast Fourier transform; and the ID decoding submodule parses the individual identification identifier according to the encoding rules of the reflector grating. All submodules operate in parallel in a pipelined manner, with a total processing delay not exceeding 500 microseconds. The demodulated individual ID, body temperature data, and heart rate data are all automatically bound to the anchored reference timestamp T0.

[0028] Reconfigurable Batch Rhythm Verification Hardware Acceleration Core: This acceleration core adopts a parameterized reconfigurable logic architecture, with its signal input terminals connected to the SAW signal hardware demodulation acceleration core and the signal output terminals of the weighing device, respectively. Through an ARM auxiliary processor, production managers can dynamically configure control parameters such as batch cycle (e.g., 7 days, 14 days, 21 days, 28 days), mating date, expected delivery date, target slot availability status, and stress thresholds. The configuration process requires no modification to the FPGA hardware code. The verification process employs fully parallel hardware logic, simultaneously comparing the demodulated real-time data (batch information corresponding to the individual ID, expected delivery date, body temperature, and heart rate) with preset batch rhythm boundary conditions and stress thresholds. Verification content includes the matching of the batch to which the transferred individual belongs with the target slot batch, the consistency of the expected delivery date with the target slot batch rhythm, the availability status of the target slot, and whether the individual's body temperature and heart rate exceed the stress threshold.

[0029] The specific implementation of this parameterized reconfigurable logic architecture is as follows: A set of configurable registers is allocated inside the FPGA to store the batch rhythm parameters issued by the ARM auxiliary processor; the comparator and arithmetic unit inside the verification core use the values ​​of this set of registers as the decision criterion and perform verification operations in parallel through a hardware logic gate array. When it is necessary to switch the batch rhythm mode, it is only necessary to update the parameter values ​​in the register set through the ARM auxiliary processor, without resynthesizing, placement and routing, or burning the FPGA configuration bitstream, so as to achieve instant switching of the batch rhythm.

[0030] Gating control and intervention logic module: The signal input of this module is connected to the output of the reconfigurable batch rhythm verification hardware acceleration core. The signal output is directly connected to the group transfer channel gating device and the on-site audible and visual alarm equipment through the hardware IO interface, and simultaneously communicates with the pig farm feeding system, environmental control system, and management personnel's handheld terminal through the Ethernet interface. This module is configured to generate and output deterministic control commands based on the results of batch rhythm verification and stress state determination. When the verification is successful (i.e., the individual belongs to the target batch, the stress state is normal, the target pen rhythm matches, and there is an available pen), a release command is output to the electric exit gate 405; when there is a batch rhythm conflict, a lock command is output to the electric exit gate 405, and a conflict warning and pen adjustment suggestion are pushed to the management terminal; when the body temperature or heart rate of the breeding pig is detected to exceed the preset stress threshold, while outputting the release command, the individual is marked as a high-risk individual, and its individual ID and physiological data are simultaneously pushed to the feeding system and environmental control system, triggering subsequent feeding curve adjustment and pen temperature control intervention.

[0031] The width of the transfer channel 4 is set between 0.6 meters and 0.8 meters, allowing only one breeding pig to pass through in one direction at a time. This ensures a one-to-one correspondence between the radio frequency signal and the individual pig, preventing signal collisions and data confusion caused by multiple pigs entering simultaneously. Electric entrance gates 401 and 405 are installed at both ends of the channel, respectively. The gates are made of stainless steel and driven by 24V DC brushless motors. The control signal input of the motor driver is directly connected to the FPGA edge processing unit via a hardware I / O interface.

[0032] The weighing device is a channel-type dynamic electronic scale 403, installed in the middle of the transfer channel 4. It uses four C3-grade cantilever beam load cells for elastic support, covering a weighing range of 50 kg to 500 kg, with a static weighing accuracy of no less than ±0.1 kg. The signal output terminals of the load cells are directly connected to the hardware I / O interface of the FPGA edge processing unit via a high-speed analog-to-digital converter module. The weighing acquisition action is determined by the anchored reference timestamp T output by the FPGA. O Synchronous triggering automatically binds the collected weighing data to this timestamp.

[0033] Example 2: Application of 21-day batch production in a large-scale breeding pig farm with 10,000 pigs This example is for a large-scale breeding pig farm with 10,000 breeding sows. The farm adopts a 21-day batch production model, with approximately 500 breeding sows per batch and a single batch transfer cycle of 2 days.

[0034] The specific hardware deployment is as follows: A complete system as described above is deployed in the transfer corridor between the gestation and farrowing pens of the pig farm. The corridor width is set at 0.7 meters to accommodate the body size of adult crossbred sows. An anti-interference SAW RF reader is installed at both the entrance and exit of the corridor, with the antenna installed at a height of 1.2 meters and a downward angle of 15 degrees to ensure coverage of the corridor's detection area. A corridor-type dynamic electronic scale is installed in the middle of the corridor. An FPGA hardware reconfigurable edge processing unit is installed in the control box next to the corridor. The reader, electronic scale, and electric gate are all directly connected to the hardware I / O ports of the FPGA unit via shielded cables, with the cable length controlled within 3 meters to reduce signal attenuation.

[0035] The parameter pre-configuration is performed as follows: Parameters are configured to the reconfigurable batch rhythm verification hardware acceleration core via an ARM auxiliary processor, including a batch cycle of 21 days, a single batch insemination window of 3 days, and a stress threshold of body temperature not lower than 39.5°C or heart rate not lower than 120 beats / minute. Simultaneously, the batch affiliation, expected delivery date window, and availability status information of each column in the target delivery ward are written to the register group, and the transmit power of the SAW RF reader is set to 10dBm and the read rate to 100 times / second.

[0036] The complete system operation process is as follows: When a sow wearing a passive homogeneous sensing ear tag enters the transfer channel entrance, the SAW RF reader at the entrance detects the ear tag echo signal and immediately sends a trigger signal to the FPGA unit through the hardware I / O interface. After receiving this signal, the hardware-level transfer trigger synchronization module immediately generates an anchoring reference timestamp T. O The system simultaneously triggers the closure of the entrance gate, the start of weighing on the electronic scale, and the activation of high-frequency data acquisition by the reader. The SAW signal hardware demodulation acceleration core demodulates the sow's individual ID, body temperature, and heart rate in parallel within 500 microseconds; the electronic scale simultaneously acquires the sow's weight, and the weighing data is also linked to the T... O Time. The reconfigurable batch rhythm verification hardware acceleration core then completes four verifications in parallel within 300 microseconds: verifying that the individual ID belongs to the current batch to be transferred, confirming that its expected farrowing date falls within the batch production window of the target farrowing pen, checking that the target pen is available, and determining that the body temperature and heart rate are both below the stress threshold. After all four verifications pass, the gate control and intervention logic module outputs a release command, the exit gate opens, the sow is successfully transferred, and the anchored data packet containing the individual ID, body temperature, heart rate, weight, batch verification results, and timestamp is synchronously uploaded to the cloud batch management platform.

[0037] The execution logic for handling anomalies is as follows: If a sow's body temperature and heart rate exceed a preset stress threshold, the FPGA unit, while issuing a release command, marks the individual as high-risk and simultaneously pushes its physiological data and identity information to the feeding and environmental control systems. The system automatically lowers the nutrient concentration of the sow's feeding curve by one level and lowers the target temperature of its farrowing pen by 1.5°C over the next 7 days to alleviate regrouping stress. If a sow's expected farrowing date does not match the batch rhythm window of the target pen, resulting in a batch conflict, the FPGA unit immediately issues a lock command to keep the exit gate closed. Simultaneously, it pushes a conflict warning to the production supervisor's handheld terminal and searches for matching candidates in available pens in adjacent batches based on the sow's expected farrowing date, providing pen adjustment suggestions.

[0038] Example 3: Application in pig farms under harsh lighting conditions This embodiment addresses the situation in some semi-open pig farms where the local illumination in the transfer channel is extremely low and the infrared body surface temperature rise characteristics are difficult to capture accurately. Based on the system structure of Embodiment 1, it expands upon the existing system structure by adding an ambient light compensation sensing mechanism to enhance the applicability and robustness of the system under different lighting conditions.

[0039] An additional photosensitive resonator is integrated onto the quartz substrate of the SAW passive homogeneous sensing ear tag. This photosensitive resonator is fabricated by depositing a semiconductor thin film sensitive to the visible to near-infrared wavelengths in a designated area of ​​the quartz substrate. When this semiconductor thin film is excited by light, it generates photogenerated carriers, causing a change in conductivity along the surface acoustic wave propagation path, thereby modulating the resonant frequency of the resonator. The frequency shift is linearly related to the incident light illuminance. A corresponding photosensitive channel demodulation submodule is added to the SAW signal hardware demodulation acceleration core to simultaneously extract ambient light illuminance data while demodulating body temperature and heart rate data.

[0040] An ambient light compensation judgment module is added to the FPGA edge processing unit. This module is configured to automatically increase the confidence weight compensation coefficient of the output value of the body temperature sensitive resonator when the photosensitive resonator detects that the ambient light intensity of the transfer channel is lower than a preset threshold, and correspondingly increase the body temperature threshold for stress judgment by 0.2°C to correct the systematic error of the sow's body surface temperature reading being too low due to the low light environment. When the ambient light intensity recovers to above the preset threshold, the compensation is automatically canceled and the normal stress judgment threshold is restored.

[0041] In semi-open or poorly lit pig farm settings, this embodiment can still maintain a high accuracy rate in detecting stress abnormalities, avoiding missed detections or misjudgments caused by changes in lighting conditions.

[0042] It should be noted that the above embodiments and accompanying drawings are merely illustrative examples of the core principles and key structures of a digital management system and method for batch production of breeding pigs based on SAW passive sensing. The accompanying drawings are simplified schematic diagrams, intended to clearly illustrate the structural, process, or data flow relationships related to the innovative points of the technical solution, and are not intended to limit the complete form of the actual product. This specification focuses on the innovative technical means necessary to achieve the invention's objectives and solve the technical problems. Auxiliary or common-sense details that can be implemented by those skilled in the art without creative effort, such as the corrosion-resistant packaging process of the ear tag shell, the shell protection level and heat dissipation layout of the reader and control unit, the specific lightning protection treatment of the communication interface, conventional power supply filtering and voltage regulation circuits, the JTAG debugging interface configuration of the FPGA, and the specific mounting bracket selection for each hardware module, although not described in detail, should all be understood as naturally included in the specific implementation of this invention and fall within the protection and implementation scope of this technical solution.

Claims

1. A digital management system for batch production of breeding pigs based on SAW passive sensing, comprising a passive homologous sensing ear tag, an SAW radio frequency reader, an edge processing unit, a transfer channel gating device, and a weighing device, wherein the passive homologous sensing ear tag is wirelessly connected to the SAW radio frequency reader, and the SAW radio frequency reader, the transfer channel gating device, and the weighing device are all electrically connected to the edge processing unit, for batch production control during the transfer of breeding pigs, characterized in that: The passive homogeneous sensing ear tag is a completely passive structure worn on the ear of the breeding pig. The passive homogeneous sensing ear tag integrates a surface acoustic wave chip. The surface acoustic wave chip integrates an ID encoding resonator, a body temperature sensitive resonator, and a heart rate sensitive resonator on the same quartz substrate. The ID encoding resonator, body temperature sensitive resonator, and heart rate sensitive resonator are driven by the same radio frequency excitation signal and synchronously output oscillation echo signals through the same receiving channel, realizing physical-layer homogeneous synchronization of individual ID, body temperature data, and heart rate data. The SAW radio frequency reader is an anti-interference SAW radio frequency reader, which is set in the detection area of ​​the breeding pig transfer channel. It is used to transmit radio frequency excitation signals and receive oscillation echo signals. The SAW radio frequency reader is directly connected to the edge processing unit through a hardware IO interface without software protocol relay. The edge processing unit is an FPGA hardware reconfigurable edge processing unit. The FPGA hardware reconfigurable edge processing unit is directly connected to the group channel gating device and the weighing device through a hardware IO interface. The FPGA hardware reconfigurable edge processing unit has built-in reconfigurable hardware logic. The reconfigurable hardware logic is set to generate an anchor reference timestamp when the first tag detection signal of the SAW radio frequency reader is received, synchronously trigger the signal acquisition of the SAW radio frequency reader and the weighing data acquisition of the weighing device, and perform signal demodulation, batch rhythm verification and stress state determination in parallel. The total processing delay does not exceed 1 millisecond. The signal demodulation is a hardware parallel demodulation of the oscillating echo signal. The individual ID, body temperature data, heart rate data, and weight data obtained by demodulation are all bound to the anchored reference timestamp. The batch rhythm verification and stress state determination are parallel hardware logic verification based on dynamically configured batch rhythm parameters and stress threshold parameters.

2. The digital management system for batch production of breeding pigs based on SAW passive sensing as described in claim 1, characterized in that, The body temperature sensitive resonator adopts a quartz cut with temperature coefficient sensitivity, and its resonant frequency responds to the linear shift in the body temperature of the breeding pig within the range of 35°C to 42°C; the heart rate sensitive resonator senses the vibration of the ear rim pulse of the breeding pig through the piezoelectric effect of the quartz substrate, and its resonant frequency responds to the linear shift in the heart rate within the range of 30 beats / minute to 300 beats / minute.

3. The digital management system for batch production of breeding pigs based on SAW passive sensing as described in claim 1, characterized in that, The FPGA hardware reconfigurable edge processing unit includes: The hardware-level group trigger synchronization module is configured to immediately generate an anchor reference timestamp when the first tag detection signal is detected, and synchronously send trigger commands to the anti-interference SAW RF reader, weighing device and channel gating device. The SAW signal hardware demodulation acceleration core is configured to use parallel hardware logic to demodulate individual ID, body temperature data and heart rate data from the oscillating echo signal; The reconfigurable batch rhythm verification hardware acceleration core is configured with a parameterized reconfigurable logic architecture. It executes in parallel hardware logic during the verification process and can adapt to different batch rhythm parameters without modifying the FPGA hardware code.

4. The digital management system for batch production of breeding pigs based on SAW passive sensing as described in claim 3, characterized in that, The FPGA hardware reconfigurable edge processing unit also includes a gating control and intervention logic module, which is configured to output release or lock commands directly to the channel gating device through the hardware IO interface based on the results of batch rhythm verification and stress state determination, and push early warning information to the management terminal through the network interface.

5. The digital management system for batch production of breeding pigs based on SAW passive sensing as described in claim 1, characterized in that, The anti-interference SAW radio frequency reader is equipped with a diversity receiving antenna and a metal interference suppression bandstop filter. The diversity receiving antenna is respectively located at the entrance and exit of the transfer channel. The metal interference suppression bandstop filter is used to suppress electromagnetic reflection and harmonic interference generated by the metal fence and weighing equipment of the transfer channel.

6. The digital management system for batch production of breeding pigs based on SAW passive sensing as described in claim 5, characterized in that, The width of the transfer channel is set to allow only a single breeding pig to pass through, and it is connected to the FPGA hardware reconfigurable edge processing unit through a hardware I / O interface, so that the mechanical movement of the channel is synchronized with data acquisition, verification and control at the hardware level.

7. A digital management method for batch production of breeding pigs based on SAW passive sensing, characterized in that, Includes the following steps: S1. When the SAW radio frequency reader detects the first tag signal of a breeding pig wearing a passive homogeneous sensing ear tag entering the transfer channel, it sends a trigger signal to the FPGA hardware reconfigurable edge processing unit directly through the hardware IO interface. The FPGA hardware reconfigurable edge processing unit generates an anchor reference timestamp, which synchronously triggers the high-frequency acquisition of the SAW radio frequency reader and the synchronous weighing acquisition of the transfer channel weighing device. The S2 and SAW radio frequency readers transmit radio frequency excitation signals to the passive homogeneous sensing ear tags and receive oscillation echo signals synchronously returned by the ID encoding resonator, body temperature sensitive resonator and heart rate sensitive resonator through the same receiving channel. S3. In the FPGA hardware reconfigurable edge processing unit, the oscillation echo signal is demodulated through parallel hardware logic, and the individual ID, body temperature data, and heart rate data are extracted synchronously. The individual ID, body temperature data, heart rate data, and synchronously collected weighing data are bound to the anchor reference timestamp at the hardware level. S4. In the FPGA hardware reconfigurable edge processing unit, through parallel hardware logic, batch rhythm verification and stress state determination are performed on the bound individual data according to the dynamically configured batch rhythm parameters and stress threshold parameters, and the entire process processing delay is controlled within 1 millisecond. S5. Based on the results of batch rhythm verification and stress state determination, output release or lock control commands to the transfer channel gate control device through the hardware IO interface, and push corresponding early warning information to the management terminal to realize closed-loop management of the transfer.

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