Current shunt monitoring system
Patent Information
- Application Number
- CN202510258660.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-05
- Publication Date
- 2026-09-08
AI Technical Summary
另外也需要注意其他因素,例如AFE电路110具有高共模抑制比(highCMRR),ADC电路120具低偏移量(low offset),而上述因素都会增加电流分流监视器100的设计难度
Smart Images

Figure CN122709780A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a monitoring system, and more particularly to a current shunt monitoring system. Background Technology
[0002] Please refer to Figure 1 The illustration depicts a conventional current shunt monitor. The current shunt monitor 100 includes an analog front-end circuit (AFE) 110 and an analog-to-digital converter (ADC) 120. Generally, the current shunt monitor 100 is designed inside an IC chip 180, which is soldered onto a circuit board 190. Additionally, a resistor R is soldered onto the circuit board 190. For example, the circuit board 190 can be a printed circuit board (PCB).
[0003] like Figure 1 As shown, the two ends of the resistor R on the circuit board 190 are connected to two pins 101 and 102 of the IC chip 180, respectively. In addition, the two pins 101 and 102 of the IC chip 180 are also connected to the AFE circuit 110 in the current shunt monitor 100, so that the AFE circuit 110 can detect the voltage drop across the resistor R.
[0004] Generally, to support high current detection range and high resolution, the resistors R soldered on the circuit board 190 typically have extremely small resistance values. Therefore, the current I flowing through resistor R produces a small voltage drop I×R. This voltage drop I×R is equal to the input voltage V. IN And the input voltage V IN Input current shunt monitor 100. For example, the resistance value of resistor R is approximately 0.5Ω to 2Ω, and the voltage drop I×R is approximately in the mV level. Basically, since resistors R with fairly precise resistance values are commercially available and soldered onto circuit board 190, the voltage drop I×R has almost no error, and there is no need to calibrate resistor R.
[0005] Since the input signal received by the current shunt monitor 100 is in the mV range, the AFE circuit 110 needs to be designed with a high gain to amplify the input voltage V. IN Only in this way can the ADC circuit 120 generate high-resolution digital values (D). ADC .
[0006] Based on accuracy considerations, and the input voltage V IN The offset of the AFE circuit 110 needs to be maintained at the μV level, with values in the mV range. Other factors also need to be considered, such as the high common-mode rejection ratio (high CMRR) of the AFE circuit 110 and the low offset of the ADC circuit 120. These factors will increase the design difficulty of the current shunt monitor 100. Summary of the Invention
[0007] This invention relates to a current shunt monitoring system connected to a resistor, through which a current flows and generates a voltage drop. The current shunt monitoring system includes: an analog front-end circuit, a first input terminal of which is connected to a first terminal of the resistor, and a second input terminal of which is connected to a second terminal of the resistor; an analog-to-digital converter circuit, an input terminal of which is connected to an output terminal of the analog front-end circuit to receive an output voltage, wherein the analog-to-digital converter circuit converts the output voltage; and a digital correction circuit, an input terminal of which is connected to an output terminal of the analog-to-digital converter circuit. During the first calibration, the analog front-end circuit receives an input voltage that is zero, and the analog-to-digital converter generates a first digital error value to the digital calibration circuit. During normal operation after the first calibration, the input voltage received by the analog front-end circuit is equal to the voltage drop, and the analog-to-digital converter generates a digital operating value to the digital calibration circuit. During normal operation, the digital calibration circuit subtracts the first digital error value from the digital operating value to obtain a summed value, multiplies the summed value by a calibration ratio to obtain a calibration output value, and outputs the calibration output value.
[0008] To provide a better understanding of the above and other aspects of the present invention, preferred embodiments are described below in detail with reference to the accompanying drawings: Attached Figure Description
[0009] Figure 1 For familiar current shunt monitors;
[0010] Figure 2 This is a schematic diagram of the current shunt monitoring system of the present invention;
[0011] Figure 3 This is a first embodiment of the current shunt monitoring system of the present invention;
[0012] Figure 4A and Figure 4B This is a schematic diagram of the standard calibration process performed by the diversion monitoring system in the first embodiment;
[0013] Figure 5 This is a second embodiment of the current shunt monitoring system of the present invention;
[0014] Figures 6A to 6D This is the first example of an advanced correction procedure for the traffic diversion monitoring system in the second embodiment; and
[0015] Figures 7A to 7F This is a second example of an advanced correction process for the traffic diversion monitoring system in the second embodiment.
[0016] The reference numerals in the attached figures are explained as follows:
[0017] 100: Current Shunt Monitor
[0018] 101, 102, 201, 202, 301, 302: Pins
[0019] 110, 210, 310: AFE circuit
[0020] 120, 220, 320: ADC circuit
[0021] 180, 280: IC chips
[0022] 190, 290: Circuit board
[0023] 200, 300: Current shunt monitoring system
[0024] 230, 330: Digital correction circuit
[0025] 240, 340: Power supply circuit
[0026] 250, 350: Control circuit
[0027] 312: Gain Controller
[0028] 314: Differential Amplifier
[0029] 332: Storage unit
[0030] 334: Adder
[0031] 335: Multiplier Detailed Implementation
[0032] This invention proposes a current shunt monitoring system. The current shunt monitoring system can utilize a standard calibration procedure to correct errors generated by various circuits within the system. These errors include at least the circuit offset and the CMRR variation. Furthermore, this invention proposes an advanced calibration procedure to eliminate gain deviation and offset deviation in the AFE circuit.
[0033] Please refer to Figure 2 The diagram illustrates the current shunt monitoring system of the present invention. The current shunt monitoring system 200 includes: a front-end analog circuit (AFE circuit) 210, an analog-to-digital converter (ADC circuit) 220, a digital calibration circuit 230, a power supply circuit 240, and a control circuit 250. Similarly, the current shunt monitoring system 200 is designed inside an IC chip 280, which is soldered onto a circuit board 290. Furthermore, a resistor R is also soldered onto the circuit board 290. The resistance value of this resistor R is very precise, and can be considered as having almost no error in the voltage drop I×R.
[0034] The power supply circuit 240 is connected to the AFE circuit 210, and the control circuit 250 is connected to both the AFE circuit 210 and the digital correction circuit 230. The power supply circuit 240 can set the output voltage V of the AFE circuit 210. OUT The bias point causes the output voltage V of the AFE circuit 210 to... OUT There is sufficient headroom between the voltage source and the voltage source.
[0035] During normal operation, the two input terminals of the AFE circuit 210 are connected to the two ends of the resistor R via two pins 201 and 202 of the IC chip 280 to receive the input voltage V. IN This input voltage V IN This is the voltage drop I×R caused by the current I flowing through the resistor R. The AFE circuit 210 can convert the input voltage V... IN Amplify and generate an output voltage V. OUT .
[0036] ADC circuit 220 receives output voltage V OUTAnd perform analog-to-digital conversion. According to an embodiment of the present invention, when the current shunt monitoring system 200 performs calibration, the ADC circuit 220 calculates the output voltage V. OUT A digital error value is generated and temporarily stored in the digital correction circuit 230. Then, when the current shunt monitoring system 200 is operating normally, the ADC circuit 220 calculates the output voltage V... OUT Generates digital operation value (D) ADC To the digital correction circuit 230. Furthermore, based on the digital error value and the digital operating value D... ADC The digital correction circuit 230 generates a calibrated output value (D). OUT This correction output value D OUT This accurately reflects the voltage drop across resistor R. Furthermore, since the resistance value of R is known, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0037] Please refer to Figure 3 The diagram illustrates the detailed structure of the current shunt monitoring system according to the first embodiment of the present invention. For the sake of simplicity, the IC chip 280 and the circuit board 290 are not shown, and the two ends of the resistor R are respectively connected to two pins 301 and 302.
[0038] The power supply circuit 340 outputs a first voltage V1 from its first power terminal and a second voltage V2 from its second power terminal. Essentially, the first voltage V1 is greater than the second voltage V2.
[0039] The AFE circuit 310 includes a differential amplifier 314, a gain controller, and variable resistors R1 and R2. 1F R2, R 2F Switch S 1A S 1B S 2A S 2B Switch S 1A The first terminal is connected to pin 301, switch S 1A The second end is connected to node a. Switch S 1B The first terminal is connected to pin 302, switch S 1B The second end is connected to node b. Switch S 2AThe first terminal is connected to the first power supply terminal of the power supply circuit 340 to receive the first voltage V1, and the switch S 2A The second end is connected to node a. Switch S 2B The first terminal is connected to the first power supply terminal of the power supply circuit 340 to receive the first voltage V1, and the switch S 2B The second terminal of the variable resistor R1 is connected to node b. The first terminal of the variable resistor R1 is connected to node a, and the second terminal of the variable resistor R1 is connected to the positive input terminal of the differential amplifier 314. 1F The first terminal is connected to the second power supply terminal of the power supply circuit 340 to receive the second voltage V2, and the variable resistor R 1F The second terminal of the variable resistor R2 is connected to the positive input terminal of the differential amplifier 314. The first terminal of the variable resistor R2 is connected to node b, and the second terminal of the variable resistor R2 is connected to the negative input terminal of the differential amplifier 314. 2F The first terminal is connected to the output terminal of the differential amplifier 314, and the variable resistor R 2F The second terminal is connected to the negative input terminal of the differential amplifier 314. Furthermore, the gain controller 312 can output an adjustment signal T. UNE To the variable resistors R1 and R 1F R2, R 2F The control terminal is used to adjust the variable resistors R1 and R2. 1F R2, R 2F The resistance value. When the variable resistors R1 and R... 1F R2, R 2F When the resistance value changes, the gain of the differential amplifier 314 also changes. That is, the gain controller 312 uses the adjustment signal T... UNE This is used to adjust the gain of the differential amplifier 314. Basically, the gain controller 312 controls the resistor R. 1F The ratio of the resistance value of resistor R1 to the resistance value of resistor R is equal to the resistance value of resistor R. 2F The ratio of the resistance value of resistor R2 to that of resistor R2, that is, (R 1F / R1) equals (R 2F / R2). For example, the gain controller 312 controls the resistor R. 1F With resistance R 2F They have the same resistance value, and control resistors R1 and R2 have the same resistance value.
[0040] According to a first embodiment of the present invention, the first voltage V1 is used to set the common voltage of the differential amplifier 314, and to obtain better calibration accuracy for CMRR-induced error. The second voltage V2 is used to set the output voltage V of the differential amplifier 314. OUTThis minimum value allows the differential amplifier 314 to easily support input voltages reduced to 0 V. IN (That is, the current I equals 0), and the error is subtracted during correction.
[0041] Furthermore, the input terminal of the ADC circuit 320 receives the output voltage V. OUT It then performs analog-to-digital conversion. For example, during normal operation, the output of the ADC circuit 320 outputs a digital operating value D. ADC .
[0042] The input terminal of the digital correction circuit 330 is connected to the output terminal of the ADC circuit 320. The digital correction circuit 330 includes an adder 334, a multiplier 335, a storage device 332, and switches S3 and S4. The first terminal of switch S3 is connected to the output terminal of the ADC circuit 320, and the second terminal of switch S3 is connected to the input terminal of the storage device 332. The output terminal of the storage device 332 is connected to the first input terminal of the adder 334. The first terminal of switch S4 is connected to the output terminal of the ADC circuit 320, and the second terminal of switch S4 is connected to the second input terminal of the adder 334. The adder 334 subtracts the value received at the first input terminal from the value received at the second input terminal; the result of this subtraction is the sum of its values, SUM, which is output from the output terminal of the adder 334. The first input of multiplier 335 is connected to the output of adder 334 to receive the summation value SUM, and the second input of multiplier 335 receives a correction ratio K. The product of the summation value SUM and the correction ratio K becomes the corrected output value D. OUT The correction output value D is output from the output terminal of the multiplier 335. OUT For example, the correction ratio K can be set to a constant value, such as K equals 1.
[0043] Control circuit 350 generates control signal C TRL Control signal C TRL It can control the switch S in the AFE circuit 310 and the digital correction circuit 330. 1A S 1B S 2A S 2B S3 and S4 are either in the on state or in the off state. For example, control signal C... TRL This includes six sub-control signals (not shown), which are transmitted to the corresponding switches S. 1A S 1B S 2A S 2BThe control terminals S3 and S4 are used to control switch S. 1A S 1B S 2A S 2B S3 and S4 are either in the on or off state.
[0044] The following describes the standard calibration procedure for the traffic diversion monitoring system of the first embodiment. The standard calibration procedure includes initial calibration and normal operation. The initial calibration can be considered as the first calibration.
[0045] Please refer to Figure 4A and Figure 4B The diagram illustrates the standard calibration procedure of the traffic diversion monitoring system in the first embodiment. Essentially, the traffic diversion monitoring system 300 performs an initial calibration before entering normal operation.
[0046] like Figure 4A As shown, during the initial calibration, control circuit 350 controls switch S. 1A S 1B S4 is in the open state, and control switch S 2A S 2B S3 is in the ON state. At this time, the input terminal of AFE circuit 310 is not connected to the external resistor R, and the input terminal of AFE circuit 310 receives the same first voltage V1. That is, the input voltage V... IN It equals zero. Therefore, the output voltage V OUT This error is generated by the error of the differential amplifier 314. Specifically, the input offset within the differential amplifier 314 error is amplified, while other errors of the differential amplifier 314 are not amplified. Furthermore, the error of the ADC circuit 320 is not amplified. Therefore, when performing initial correction with the gain of the differential amplifier 314 at G, the ADC circuit 320 outputs a digital error value D. CAL_0G And the digital error value D CAL_0G It will be stored in the storage unit 332 of the digital correction circuit 330.
[0047] In other words, D CAL_0G =V OS ×(G+1)+V AFE_ERR +V ADC_ERR +V2. Where V OS For initial calibration, the input offset of differential amplifier 314, and V OS It will be magnified by (G+1) times, V AFE_ERR For other errors of the differential amplifier 314, VADC_ERR To compensate for the error of the ADC circuit 320, the second voltage V2 provides power to the power supply circuit 340 to set the output voltage V. OUT The minimum value. Additionally, G is the gain of the differential amplifier 314, which is controlled by the gain controller 312. For example, G = (R... 2F / R2)=(R 1F / R1).
[0048] After the initial calibration is completed, the shunt monitoring system 300 enters normal operation with the differential amplifier 314 at a gain of G. For example... Figure 4B As shown, during normal operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the ON state, and control switch S 2A S 2B S3 is in the off state. At this time, the input terminal of AFE circuit 310 is connected to an external resistor R, and it begins to detect the voltage drop I×R across resistor R. That is, the input voltage V... IN It equals the voltage drop I × R. At this time, the output voltage V OUT From the input voltage V IN This is caused by error. The ADC circuit 320 outputs the digital operating value D. ADC_1G In other words, under normal operation, with the differential amplifier 314 having a gain of G, the ADC circuit 320 outputs a digital operating value D. ADC_1G .
[0049] That is, D ADC_1G =V IN ×G+V OS ×(G+1)+V AFE_ERR +V ADC_ERR +V2. Wherein, the input voltage V IN It equals the voltage drop (I×R). That is, D ADC_1G = (I×R)×G+V CAL_0G Where (I×R)×G can be considered as the ideal value, V CAL_0G It can be considered a non-ideal value.
[0050] Furthermore, in the digital correction circuit 330, the storage unit 332 outputs the digital error value D stored at the start of correction. CAL_0G Therefore, the digital correction circuit 330 outputs a corrected output value D. OUT And D OUT =(D ADC_1G -D CAL_0G(I×R)×G×K. That is, when the shunt monitoring system 300 is operating normally, with the correction ratio K set to 1, the correction output value D output by the digital correction circuit 330 is... OUT = (I×R)×G.
[0051] As can be seen from the above explanation, under normal operation, the digital correction circuit 330 outputs a correction output value D. OUT Non-ideal values have been eliminated, leaving only ideal values, so that the corrected output value D... OUT It accurately reflects the voltage drop I×R across resistor R. Furthermore, since the resistance value of R is known, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0052] In the standard calibration procedure described above, the calibration ratio K is set to 1. However, the calibration ratio K can actually be set to other values depending on the actual operation of the current shunt monitoring system 300. For example, suppose the gain of the AFE circuit 310 is set to G. But it is expected that during normal operation, the gain will change from G to 1.1G. In this case, the calibration ratio K can be set to (1 / 1.1), thus correcting the output value D. OUT Adjust to the ideal value.
[0053] Furthermore, in the standard calibration procedure described above, the gain deviation and offset deviation can be considered very small and negligible. However, when the shunt monitoring system 300 operates in a poor environment, the gain deviation and offset deviation become severe and cannot be ignored.
[0054] For example, during initial calibration, the ambient temperature of the shunt monitoring system 300 is low, and the gain deviation and offset deviation are small. However, during normal operation, the ambient temperature of the shunt monitoring system 300 increases, and the gain deviation and offset deviation of the AFE circuit 310 become more and more severe. Therefore, the present invention designs a current shunt monitoring system in the second embodiment, and incorporates an advanced calibration procedure to dynamically adjust the calibration ratio K to improve the calibration output value D. OUT .
[0055] Please refer to Figure 5 The illustration depicts a second embodiment of the current shunt monitoring system of the present invention. Compared to Figure 3The first embodiment of the current shunt monitoring system 300, and the second embodiment of the current shunt monitoring system 500, further include a tuning device 539 in the digital correction circuit 530, which can be used to dynamically adjust the correction ratio K. Apart from this, the connection relationships of other components are the same as in the first embodiment, and will not be described again here.
[0056] like Figure 5 As shown, the adjustment element 539 in the digital correction circuit 530 is connected to the output of the ADC circuit. During multiple corrections of the shunt monitoring system 500, the adjustment element 539 receives multiple digital error values. The adjustment element 539 further updates the correction ratio K based on the gain G of the AFE circuit 310 and these digital error values, and passes the updated correction ratio K to the multiplier 335.
[0057] The advanced calibration procedure of the shunt monitoring system in the second embodiment is described below. The advanced calibration procedure includes initial calibration, normal operation calibration, and in-operation calibration. Initial calibration can be considered as the first calibration, and in-operation calibration as the second calibration. Furthermore, the current shunt monitoring system 500 can perform in-operation calibration during normal operation. In this case, the current shunt monitoring system 500 first pauses normal operation to perform in-operation calibration. During in-operation calibration, the digital calibration circuit 530 updates the digital error value in the storage unit 332 and updates the calibration ratio K. After updating the calibration ratio K, the current shunt monitoring system 500 resumes normal operation.
[0058] Please refer to Figures 6A to 6D The illustration depicts the first example of the advanced correction process performed by the traffic diversion monitoring system in the second embodiment. The initial correction includes a first period and a second period.
[0059] like Figure 6A As shown, during the first period of the initial calibration, the control circuit 350 controls switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, for example, G = (R 2F / R2), and G is greater than 1. At this time, the input terminal of AFE circuit 310 is not connected to the external resistor R, and the two input terminals of AFE circuit 310 receive the same first voltage V1, that is, the input signal V. IN The value is zero. Therefore, the ADC circuit 320 outputs the first digital error value D. CAL_0G And the first digital error value D CAL_0G It will be stored in digital correction circuit
[0060] The adjustment element 539 and the storage unit 332 of the circuit 530.
[0061] Therefore, D CAL_0G =V OS0 ×(G+1)+V AFE_ERR +V ADC_ERR +V2. Where V OS0 For initial calibration, the input offset of differential amplifier 314, and V OS0 It will be magnified by (G+1) times, V AFE_ERR For other errors of the differential amplifier 314, V ADC_ERR To compensate for the error of the ADC circuit 320, the second voltage V2 provides power to the power supply circuit 340 to set the output voltage V. OUT The lowest value.
[0062] exist Figure 6A In the case of the connection relationship, during the second period of the initial correction, the control circuit 350 controls the switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state. Only the gain controller 312 adjusts the gain of the differential amplifier 314 to G=1, for example, by adjusting the two resistors R. 2F R1 and R2 have the same resistance value. At this time, the ADC circuit 320 outputs the second digital error value D. CAL_01 And the second digital error value D CAL_01 D is stored only in the adjustment element 539 of the digital correction circuit 530. CAL_01 =V OS0 ×(1+1)+V AFE_ERR +V ADC_ERR +V2.
[0063] After the initial calibration is completed, the diversion monitoring system 500 enters normal operation. Figure 6B As shown, during normal operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the ON state, and control switch S 2A S 2BWhen S3 is in the off state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, the AFE circuit 310 is connected to both ends of the resistor R, and the ADC circuit 320 outputs the digital operating value D. ADC_0G And, D ADC_0G =V IN ×G+V OS1 ×(G+1)+V AFE_ERR +V ADC_ERR +V2. Where V OS1 The input offset of the differential amplifier 314 during normal operation.
[0064] In addition, in the digital correction circuit 530, the storage unit 332 outputs the first digital error value D stored at the start of correction. CAL_0G Since the gain deviation and offset deviation of the AFE circuit 310 did not occur when the shunt monitoring system 500 transitioned from initial calibration to normal operation, the two input offsets V... OS0 With V OS1 The values are approximately equal, and the correction ratio K is set to 1. In other words, the initial correction in the advanced correction procedure is similar to the principle of normal operation in the standard correction procedure. Therefore, the digital correction circuit 530 outputs a correction output value D. OUT And D OUT =(D ADC_0G -D CAL_0G )×K=(I×R)×G. At this time, the corrected output value D output by the digital correction circuit 530 is... OUT This accurately reflects the voltage drop I×R across resistor R. Additionally, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0065] After the shunt monitoring system 500 has been operating normally for a period of time, the gain deviation and offset deviation of the AFE circuit 310 will become increasingly severe. At this time, the gain changes from G to (G+ΔG), and the two input offsets V OS0 With V OS1 The values are not equal, so operational corrections are required. Similarly, operational corrections also include the first and second periods.
[0066] like Figure 6C As shown, during the first period of calibration during operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, for example, G = (R2F / R2 At this time, the input terminal of AFE circuit 310 is not connected to the external resistor R, and the input terminal of AFE circuit 310 receives the same first voltage V1, that is, the input voltage V. IN The value is zero. Therefore, the ADC circuit 320 outputs the third digital error value D. CAL_1G And the third numerical error value D CAL_1G It will be stored in the adjustment element 539 of the digital correction circuit 530 and the storage unit 332. Among them, D CAL_1G =V OS1 ×(G+ΔG+1)+V AFE_ERR +V ADC_ERR +V2.
[0067] exist Figure 6C In the case of the connection relationship, during the second period of correction during operation, the control circuit 350 controls the switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state. Only the gain controller 312 adjusts the gain of the differential amplifier 314 to G=1, for example, by adjusting the two resistors R. 2F R1 and R2 have the same resistance value. At this time, the ADC circuit 320 outputs the fourth digital error value D. CAL_11 And the fourth numerical error value D CAL_11 It is stored only in the adjustment element 539 of the digital correction circuit 530, and D CAL_11 =V OS1 ×(1+1)+V AFE_ERR +V ADC_ERR +V2.
[0068] After the calibration was completed during operation, the diversion monitoring system 500 resumed normal operation. Figure 6D As shown, during normal operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the ON state, and control switch S 2A S 2B When S3 is in the open state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, the AFE circuit 310 is connected to both ends of the resistor R, and the ADC circuit 320 outputs the digital operating value D. ADC_1G D ADC_1G =V IN ×(G+ΔG)+V OS1 ×(G+ΔG+1)+V AFE_ERR +V ADC_ERR +V2.
[0069] In addition, in the digital correction circuit 530, the storage unit 332 outputs the third digital error value D stored during the correction process. CAL_1G Therefore, the digital correction circuit 530 outputs a corrected output value D. OUT And D OUT =(D ADC_1G -D CAL_1G )×K=I×R×(G+ΔG)×K. In order to make the correction output value D OUT This does indeed reflect the voltage drop I×R across resistor R, so adjustment element 539 needs to update the correction ratio K to [G / (G+ΔG)].
[0070] According to an embodiment of the present invention, the adjustment element 539 adjusts based on the gain value G and four digital error values D. CAL_0G D CAL_01 D CAL_1G D CAL_11 The updated correction ratio K is then calculated. The following is a brief explanation of how the adjustment element 539 is calculated.
[0071] First, calculate M, then calculate the correction ratio K.
[0072]
[0073] As explained above, when the shunt monitoring system 500 completes its in-operation calibration and re-enters normal operation, the adjustment element 539 can provide an updated calibration ratio K. Therefore, the calibration output value D output by the digital calibration circuit 530... OUT This accurately reflects the voltage drop I×R across resistor R. Additionally, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0074] Please refer to Figures 7A to 7F The illustration depicts a second example of the advanced correction process performed by the diversion monitoring system in the second embodiment. Compared to the first example, in the second example of the advanced correction process, during the second period of correction, switch S... 2B It is in the disconnected state.
[0075] like Figure 7A As shown, during the first period of the initial calibration, the control circuit 350 controls switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, for example, G = (R 2F / R2), and G is greater than 1. At this time, the ADC circuit 320 outputs the first digital error value D. CAL_0GAnd the first digital error value D CAL_0G It will be stored in the adjustment element 539 and storage unit 332 of the digital correction circuit 530.
[0076] Therefore, D CAL_0G =V OS0 ×(G+1)+V AFE_ERR +V ADC_ERR +V2. Where V OS0 For initial calibration, the input offset of differential amplifier 314, and V OS0 It will be magnified by (G+1) times, V AFE_ERR For other errors of the differential amplifier 314, V ADC_ERR To compensate for the error of the ADC circuit 320, the second voltage V2 provides power to the power supply circuit 340 to set the output voltage V. OUT The lowest value.
[0077] like Figure 7B As shown, during the second period of the initial correction, the control circuit 350 controls switch S. 1A S 1B S 2A S 2B With switch S4 in the off state and control switch S3 in the on state, the gain controller 312 adjusts the gain of the differential amplifier 314 to G=1, for example, by adjusting the two resistors R. 2F R1 and R2 have the same resistance value. At this time, the ADC circuit 320 outputs the second digital error value D. CAL_01 And the second digital error value D CAL_01 It is stored only in the adjustment element 539 of the digital correction circuit 530, and D CAL_01 =V OS0 +V AFE_ERR +V ADC_ERR +V2.
[0078] After the initial calibration is completed, the diversion monitoring system 500 enters normal operation. Figure 7C As shown, during normal operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the ON state, and control switch S 2A S 2B When S3 is in the off state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, the AFE circuit 310 is connected to both ends of the resistor R, and the ADC circuit 320 outputs the digital operating value D. ADC_0 G. D ADC_0G =V IN ×G+V OS1 ×(G+1)+V AFE_ERR +V ADC_ERR+V2. Where V OS1 The input offset of the differential amplifier 314 during normal operation.
[0079] In addition, in the digital correction circuit 530, the storage unit 332 outputs the first digital error value D stored at the start of correction. CAL_0G Since the gain deviation and offset deviation of the AFE circuit 310 did not occur when the shunt monitoring system 500 transitioned from initial calibration to normal operation, the two input offsets V... OS0 With V OS1 The values are approximately equal, and the correction ratio K is set to 1. In other words, the initial correction in the advanced correction procedure is similar to the principle of normal operation in the standard correction procedure. Therefore, the digital correction circuit 530 outputs a correction output value D. OUT And D OUT =(D ADC_0G -D CAL_0G )×K=(I×R)×G. At this time, the corrected output value D output by the digital correction circuit 530 is... OUT This accurately reflects the voltage drop I×R across resistor R. Additionally, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0080] After the shunt monitoring system 500 has been operating normally for a period of time, the gain deviation and offset deviation of the AFE circuit 310 will become increasingly severe. At this time, the gain changes from G to (G+ΔG), and the two input offsets V OS0 With V OS1 The values are not equal, so operational corrections are required. Similarly, operational corrections also include the first and second periods.
[0081] like Figure 7D As shown, during the first period of calibration during operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the open state, controlling switch S 2A S 2B S3 is in the ON state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, for example, G = (R 2F / R2). At this time, the ADC circuit 320 outputs the third digital error value D. CAL_1G And the third numerical error value D CAL_1G It will be stored in the adjustment element 539 of the digital correction circuit 530 and the storage unit 332. Among them, D CAL_1G =V OS1 ×(G+ΔG+1)+V AFE_ERR +V ADC_ERR+V2.
[0082] like Figure 7E As shown, during the second period of calibration during operation, the control circuit 350 controls switch S. 1A S 1B S 2A S 2B With switch S4 in the off state and control switch S3 in the on state, the gain controller 312 adjusts the gain of the differential amplifier 314 to G=1, for example, by adjusting the two resistors R. 2F R1 and R2 have the same resistance value. At this time, the ADC circuit 320 outputs the fourth digital error value D. CAL_11 And the fourth numerical error value D CAL_11 It is stored only in the adjustment element 539 of the digital correction circuit 530. Wherein, D CAL_11 =V OS1 +V AFE_ERR +V ADC_ERR +V2.
[0083] After the calibration was completed during operation, the diversion monitoring system 500 resumed normal operation. Figure 7F As shown, during normal operation, the control circuit 350 controls switch S. 1A S 1B S4 is in the ON state, and control switch S 2A S 2B When S3 is in the off state, and the gain controller 312 adjusts the gain of the differential amplifier 314 to G, the AFE circuit 310 is connected to both ends of the resistor R, and the ADC circuit 320 outputs the digital operating value D. ADC_1G D ADC_1G =V IN ×(G+ΔG)+V OS1 ×(G+ΔG+1)+V AFE_ERR +V ADC_ERR +V2.
[0084] In addition, in the digital correction circuit 530, the storage unit 332 outputs the third digital error value D stored during the correction process. CAL_1G Therefore, the digital correction circuit 530 outputs a corrected output value D. OUT And D OUT =(D ADC_1G -D CAL_1G )×K=I×R×(G+ΔG)×K. In order to make the correction output value D OUT This does indeed reflect the voltage drop I×R across resistor R, so adjustment element 539 needs to update the correction ratio K to [G / (G+ΔG)].
[0085] According to an embodiment of the present invention, the adjustment element 539 adjusts based on the gain value G and four digital error values D. CAL_0G D CAL_01 D CAL_1G D CAL_11 The updated correction ratio K is then calculated. The following is a brief explanation of how the adjustment element 539 is calculated.
[0086] Calculate the correction ratio K directly.
[0087]
[0088] As explained above, when the shunt monitoring system 500 completes its in-operation calibration and resumes normal operation, the adjusting element 539 can provide an updated calibration ratio K. Therefore, the calibration output value D output by the digital calibration circuit 530... OUT This accurately reflects the voltage drop I×R across resistor R. Additionally, the corrected output value D... OUT It can also accurately reflect the magnitude of the current I flowing through the resistor R.
[0089] In summary, this invention proposes a current shunt monitoring system. The current shunt monitoring system can utilize a standard calibration procedure to correct errors generated by various circuits within the system. These errors include at least circuit offset and CMRR variation. Furthermore, this invention can utilize an advanced calibration procedure to eliminate gain and offset deviations in the AFE circuit.
[0090] In summary, although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.
Claims
1. A current shunt monitoring system, connected to a resistor, through which a current flows and generates a voltage drop, the current shunt monitoring system comprising: An analog front-end circuit, wherein a first input terminal of the analog front-end circuit is connected to a first terminal of the resistor, and a second input terminal of the analog front-end circuit is connected to a second terminal of the resistor; An analog-to-digital converter circuit, wherein an input terminal of the analog-to-digital converter circuit is connected to an output terminal of the analog front-end circuit to receive an output voltage, wherein the analog-to-digital converter circuit converts the output voltage; A digital correction circuit, wherein one input terminal of the digital correction circuit is connected to one output terminal of the analog-to-digital converter circuit; During the first calibration, the analog front-end circuit receives an input voltage that is zero, and the analog-to-digital conversion circuit generates a first digital error value to the digital calibration circuit. During normal operation after the first correction, the input voltage received by the analog front-end circuit is equal to the voltage drop, and the analog-to-digital conversion circuit generates a first digital operating value to the digital correction circuit. During normal operation, the digital correction circuit subtracts the first digital error value from the first digital operating value to obtain a summed value, multiplies the summed value by a correction ratio to obtain a correction output value, and outputs the correction output value.
2. The current shunt monitoring system as described in claim 1 further includes a power supply circuit, wherein a first power supply terminal of the power supply circuit outputs a first voltage to the analog front-end circuit, and a second power supply terminal of the power supply circuit outputs a second voltage to the analog front-end circuit.
3. The current shunt monitoring system as described in claim 2, wherein the analog front-end circuit comprises: A differential amplifier; A first switch, wherein a first terminal of the first switch is connected to a first terminal of the resistor, and a second terminal of the first switch is connected to a first node; A second switch, wherein a first terminal of the second switch is connected to a second terminal of the resistor, and a second terminal of the second switch is connected to a second node; A third switch, wherein a first end of the third switch is connected to the first node, and a second end of the third switch is connected to the first power supply terminal; A fourth switch, wherein a first end of the fourth switch is connected to the second node, and a second end of the fourth switch is connected to the first power supply terminal; A first variable resistor, a first end of which is connected to the first node, and a second end of which is connected to a first input terminal of the differential amplifier; A second variable resistor, a first end of which is connected to the second power supply terminal, and a second end of which is connected to the first input terminal of the differential amplifier; A third variable resistor, a first end of which is connected to the second node, and a second end of which is connected to a second input terminal of the differential amplifier; A fourth variable resistor, a first terminal of which is connected to an output terminal of the differential amplifier, and a second terminal of which is connected to a second input terminal of the differential amplifier; and A gain controller, connected to the first variable resistor, the second variable resistor, the third variable resistor and the fourth variable resistor, is used to control the analog front-end circuit to have a first gain value.
4. The current shunt monitoring system as described in claim 3, wherein the gain controller outputs an adjustment signal to the control terminals of the first variable resistor, the second variable resistor, the third variable resistor and the fourth variable resistor, and controls the resistance values of the first variable resistor, the second variable resistor, the third variable resistor and the fourth variable resistor.
5. The current shunt monitoring system as described in claim 4, wherein the resistance ratio of the first variable resistor to the second variable resistor is equal to the resistance ratio of the third variable resistor to the fourth variable resistor.
6. The current shunt monitoring system as described in claim 3, wherein the digital correction circuit comprises: One adder; One storage unit; A fifth switch, a first terminal of which is connected to the output terminal of the analog-to-digital conversion circuit, a second terminal of which is connected to an input terminal of the memory cell, and an output terminal of the memory cell is connected to a first input terminal of the adder; A sixth switch, a first terminal of which is connected to the output terminal of the analog-to-digital conversion circuit, and a second terminal of which is connected to a second input terminal of the adder, wherein during normal operation, the adder subtracts the first digital operating value received at the second input terminal from the first digital error value received at the first input terminal to obtain the sum value; as well as A multiplier receives the summed value at a first input terminal and the correction ratio at a second input terminal. The multiplier multiplies the summed value by the correction ratio to obtain the correction output value, and outputs the correction output value at an output terminal.
7. The current shunt monitoring system as claimed in claim 6, wherein during the first calibration, the first switch, the second switch, and the sixth switch are in an open state, the third switch, the fourth switch, and the fifth switch are in a closed state, the input voltage is zero, and the analog-to-digital conversion circuit outputs the first digital error value to the storage unit.
8. The current shunt monitoring system as claimed in claim 7, wherein during normal operation, the first switch, the second switch, and the sixth switch are in the on state, the third switch, the fourth switch, and the fifth switch are in the off state, the input voltage is equal to the voltage drop, and the analog-to-digital converter outputs the first digital operating value to the second input terminal of the adder.
9. The current shunt monitoring system as claimed in claim 8, wherein the correction ratio is a fixed value.
10. The current shunt monitoring system of claim 6, wherein the digital correction circuit further includes an adjustment circuit, an input terminal of the adjustment circuit being connected to the output terminal of the analog-to-digital converter, and an input terminal of the adjustment circuit being connected to the second input terminal of the multiplier.
11. The current shunt monitoring system as claimed in claim 10, wherein during a first period of the first correction, the first switch, the second switch, and the sixth switch are in an off state, the third switch, the fourth switch, and the fifth switch are in an on state, the analog front-end circuit has a first gain value greater than 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs the first digital error value to the storage unit and the adjustment circuit.
12. The current shunt monitoring system as claimed in claim 11, wherein during a second period of the first correction, the first switch, the second switch, and the sixth switch are in the off state, the third switch, the fourth switch, and the fifth switch are in the on state, the analog front-end circuit has a first gain value equal to 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a second digital error value to the adjustment circuit.
13. The current shunt monitoring system as claimed in claim 12, wherein during normal operation, the first switch, the second switch, and the sixth switch are in the on state, the third switch, the fourth switch, and the fifth switch are in the off state, the input voltage is equal to the voltage drop, and the analog-to-digital converter outputs the first digital operating value to the second input terminal of the adder.
14. The current shunt monitoring system as claimed in claim 13, wherein during the first period of a second correction in normal operation, the first switch, the second switch, and the sixth switch are in an off state, the third switch, the fourth switch, and the fifth switch are in an on state, the analog front-end circuit has a first gain value greater than 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a third digital error value to the storage unit and the adjustment circuit.
15. The current shunt monitoring system as claimed in claim 14, wherein during a second period of the second correction, the first switch, the second switch, and the sixth switch are in the off state, the third switch, the fourth switch, and the fifth switch are in the on state, the analog front-end circuit has a first gain value equal to 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a fourth digital error value to the adjustment circuit; wherein, The adjustment circuit calculates an update correction ratio based on the first digital error value, the second digital error value, the third digital error value, and the fourth digital error value.
16. The current shunt monitoring system as claimed in claim 15, wherein when the system re-enters normal operation after the second period of the second correction, the first switch, the second switch, and the sixth switch are in the on state, the third switch, the fourth switch, and the fifth switch are in the off state, the input voltage is equal to the voltage drop, and the analog-to-digital converter outputs a second digital operating value to the second input terminal of the adder.
17. The current shunt monitoring system of claim 16, wherein when the system re-enters normal operation after the second period of the second correction, the summation value is equal to the second digital operating value minus the third digital error value, and the correction output value is equal to the summation value multiplied by the update correction ratio.
18. The current shunt monitoring system as claimed in claim 10, wherein during a first period of the first correction, the first switch, the second switch, and the sixth switch are in an off state, the third switch, the fourth switch, and the fifth switch are in an on state, the analog front-end circuit has a first gain value greater than 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs the first digital error value to the storage unit and the adjustment circuit.
19. The current shunt monitoring system as claimed in claim 18, wherein during a second period of the first correction, the first switch, the second switch, the third switch, the fourth switch, and the sixth switch are in the off state, the fifth switch is in the on state, the analog front-end circuit has a first gain value equal to 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a second digital error value to the adjustment circuit.
20. The current shunt monitoring system as claimed in claim 19, wherein during normal operation, the first switch, the second switch, and the sixth switch are in the on state, the third switch, the fourth switch, and the fifth switch are in the off state, the input voltage is equal to the voltage drop, and the analog-to-digital converter outputs the first digital operating value to the second input terminal of the adder.
21. The current shunt monitoring system of claim 20, wherein during a first period of a second correction in normal operation, the first switch, the second switch, and the sixth switch are in an off state, the third switch, the fourth switch, and the fifth switch are in an on state, the analog front-end circuit has a first gain value greater than 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a third digital error value to the storage unit and the adjustment circuit.
22. The current shunt monitoring system as claimed in claim 21, wherein during a second period of the second correction, the first switch, the second switch, the third switch, the fourth switch, and the sixth switch are in the off state, the fifth switch is in the on state, the analog front-end circuit has a first gain value equal to 1, the input voltage is zero, and the analog-to-digital conversion circuit outputs a fourth digital error value to the adjustment circuit; wherein, The adjustment circuit calculates an update correction ratio based on the first digital error value, the second digital error value, the third digital error value, and the fourth digital error value.
23. The current shunt monitoring system as claimed in claim 22, wherein when the system re-enters normal operation after the second period of the second correction, the first switch, the second switch, and the sixth switch are in the on state, the third switch, the fourth switch, and the fifth switch are in the off state, the input voltage is equal to the voltage drop, and the analog-to-digital converter outputs a second digital operating value to the second input terminal of the adder.
24. The current shunt monitoring system of claim 23, wherein when the system re-enters normal operation after the second period of the second correction, the summation value is equal to the second digital operating value minus the third digital error value, and the correction output value is equal to the summation value multiplied by the update correction ratio.