A low-temperature testing device for power semiconductor devices

Abstract

This application relates to the field of semiconductor device testing, and in particular to a low-temperature testing device for power semiconductor devices. The device includes an insulating substrate and a detachable housing fixed thereon, which together form a testing chamber. The insulating substrate has a cooling plate with an open cooling groove. The power semiconductor device under test is fixed to the opening of the cooling groove via a locking mechanism, forming the cooling chamber. The cooling plate has input and output interfaces for the cooling medium. The insulating substrate has a test cable restraint assembly, and the housing has a mating fitting port. The testing chamber is connected to an external dry air source, and a humidity sensor is located inside the chamber. Furthermore, the mounting groove of the insulating substrate has positioning shoulders, pin holes, etc., as well as an annular airflow channel and a dry gas supply branch. This application achieves the technical effects of effective dehumidification, maintaining positive pressure, accurate device positioning, and ensuring stable test connections during low-temperature testing of power semiconductor devices.

Description

Technical Field

[0001] This application relates to the field of semiconductor device testing, and in particular to a low-temperature testing device for power semiconductor devices. Background Technology

[0002] Power semiconductor devices are core components of modern power electronic systems and are widely used in new energy vehicles, industrial motor drives, smart grids, rail transportation, and renewable energy. To ensure the reliable operation of power semiconductor devices under different operating conditions, it is usually necessary to test their electrical characteristics at low temperatures to obtain key performance parameters such as on-state voltage drop, switching characteristics, and breakdown voltage under low-temperature conditions.

[0003] Currently, low-temperature testing of power semiconductor devices typically relies on dedicated low-temperature testing equipment. The general structure of such testing equipment involves placing the power semiconductor device under test (DUT) within a large-capacity, sealed, refrigerated chamber, where a cooling system cools the entire device. To prevent moisture in the air from condensing on the device surface and the test circuit board at low temperatures, existing technologies typically introduce dry air or dry inert gas into the sealed chamber during testing to reduce the absolute humidity and thus avoid leakage or test failure caused by condensation. Specifically, related technologies include testing devices that pump dry air into specific areas of the test chamber to prevent conductor condensation, and testing schemes that form a sealed chamber between the processing board and the support and introduce dry gas to prevent condensation. Furthermore, some schemes create a positive pressure barrier by introducing dry gas into a chamber surrounding the test area to isolate ambient air and prevent condensation on the device surface within the test area.

[0004] However, the existing low-temperature testing devices for power semiconductor devices still have the following shortcomings: First, they require dedicated low-temperature testing equipment and large-capacity sealed chambers, resulting in high equipment costs and difficulty in directly adapting to existing conventional high-temperature testing equipment, thus limiting the versatility and utilization of the testing equipment. Second, the large volume of the sealed chamber makes it difficult for dry air to quickly fill the entire chamber, leading to slow humidity reduction and uneven humidity distribution. This can easily result in localized excessive humidity and condensation, affecting the accuracy and reliability of the test results. Furthermore, the humidity monitoring points cannot accurately reflect the actual humidity conditions near the device. Third, some components of the testing system are kept in the sealed chamber for extended periods, and the chamber cannot be opened during testing, hindering rapid device replacement and test circuit adjustments, thus reducing testing efficiency. Additionally, the cooling methods of these testing devices are mostly based on overall environmental cooling, which has low cooling efficiency and makes it difficult to achieve rapid localized cooling of the parts of the power semiconductor device that need to be cooled. Summary of the Invention

[0005] To overcome the shortcomings of the prior art, this application provides a low-temperature testing device for power semiconductor devices, which can achieve localized precise cooling and rapid dehumidification, and is compatible with conventional testing equipment.

[0006] This application is achieved through the following technical solution: A low-temperature testing device for power semiconductor devices includes an insulating substrate and a cover, wherein the cover is detachably fixed on the insulating substrate, and the insulating substrate and the cover together form a test cavity. A cooling plate is provided on the insulating substrate, and the cooling plate has an open cooling groove for accommodating the power semiconductor device under test; the open cooling groove is located inside the test chamber, and the opening size of the open cooling groove is adapted to the part of the power semiconductor device under test to be cooled; the power semiconductor device under test is fixed at the opening of the cooling groove by a locking mechanism to form a cooling chamber; the cooling plate is provided with a cooling medium input interface and a cooling medium output interface communicating with the cooling chamber; The insulating substrate is provided with a test cable constraint assembly, and the cover is provided with a mating opening adapted to the test cable constraint assembly. When the cover is closed on the insulating substrate, the test cable constraint assembly and the mating opening are sealed together. The test chamber is configured to be connected to an external dry air source to dehumidify the test chamber during the testing phase and maintain the air pressure inside the test chamber in a positive pressure state. A humidity sensor is installed inside the test chamber to monitor the humidity of the environment inside the test chamber during the testing phase.

[0007] By adopting the above technical solution, the insulating substrate and the enclosure form a test cavity, providing an independent low-temperature testing environment for power semiconductor devices. This isolates the internal environment of the test cavity from the external environment, avoiding interference from external moisture and impurities during the testing process. The open cooling grooves on the cooling plate, in conjunction with the locking mechanism, form a cooling cavity. The cooling medium circulates within the cooling cavity through the input and output interfaces, allowing the cooling medium to directly act on the parts of the power semiconductor device under test, achieving precise local cooling of the tested parts. Compared to traditional overall environmental cooling methods, this method offers faster cooling speed and higher cooling efficiency. The test cavity is connected to an external dry air source and maintains a positive pressure state during the testing phase. Continuous positive pressure drying gas can continuously expel moisture from the test chamber, effectively preventing water vapor condensation in the test chamber under low-temperature conditions. At the same time, the humidity sensor in the test chamber monitors the ambient humidity in real time, allowing operators to monitor humidity changes throughout the test process. This ensures that the power-on test can only be performed after the humidity reaches the standard, avoiding leakage or test failure caused by condensation on the device surface due to excessive humidity, and guaranteeing the accuracy and reliability of the test data. The test cable restraint assembly on the insulating substrate and the mating port on the cover form a sealed fit after closing, ensuring that the test cable maintains the sealing integrity of the test chamber when entering and exiting, further guaranteeing the positive pressure maintenance capability and dehumidification effect of the test chamber.

[0008] Optionally, the insulating substrate is provided with a mounting groove for accommodating the cooling plate; a positioning shoulder is formed on the side wall of the open cooling groove for defining the position of the power semiconductor device under test; a sealing element is provided on the mating surface of the positioning shoulder and the power semiconductor device under test.

[0009] By adopting the above technical solution, a mounting groove for accommodating the cooling plate is provided on the insulating substrate, making the assembly relationship between the cooling plate and the insulating substrate more compact and stable. The positioning shoulder formed on the side wall of the open cooling tank plays a limiting role for the power semiconductor device under test, enabling the device to be quickly and accurately positioned to the preset test position when placed, reducing the error and time cost of manual alignment. The sealing element provided on the mating surface of the positioning shoulder and the power semiconductor device under test can fill the tiny gap between the device and the shoulder when a seal is formed at the opening of the open cooling tank, effectively preventing the cooling medium in the cooling chamber from leaking outward from the edge of the device, thereby ensuring the sealing and cooling effect of the cooling chamber.

[0010] Optionally, the bottom of the mounting groove is provided with a pin hole, and the bottom of the cooling plate is provided with a positioning pin that matches the pin hole.

[0011] By adopting the above technical solution, the pin hole at the bottom of the mounting slot matches the positioning pin at the bottom of the cooling plate, thus achieving precise positioning of the cooling plate in the mounting slot. This ensures the accurate relative position between the open cooling slot on the cooling plate and the relevant structure on the insulating substrate, avoiding problems such as inaccurate device positioning or sealing failure due to assembly deviations. It also improves the assembly repeatability and consistency of the device. In addition, cooling plates that are compatible with different specifications of the power semiconductor devices under test can be quickly replaced as needed.

[0012] Optionally, an annular airflow channel is formed between the sidewall of the mounting groove and the sidewall of the cooling plate; a dry gas supply main pipe connected to an external dry gas source is fixed to the side of the insulating substrate, and the dry gas supply main pipe is connected to a first gas supply branch and a second gas supply branch; a gas distribution component is provided on the inner sidewall of the cover, and the gas distribution component has several gas release ports; the first gas supply branch is connected to the gas distribution component to deliver dry gas into the test chamber; a dry gas inlet hole is provided on the sidewall of the mounting groove, and the second gas supply branch is connected to the dry gas inlet hole to deliver dry gas into the annular airflow channel to remove moisture.

[0013] By adopting the above technical solution, the annular airflow channel between the sidewall of the mounting slot and the sidewall of the cooling plate provides a flow space for the drying gas around the cooling plate, allowing the drying gas delivered by the second air supply branch to be evenly distributed around the entire perimeter of the cooling plate. The main drying gas supply pipe delivers the drying gas to the gas distribution component on the inner wall of the enclosure through the first air supply branch. The gas distribution component releases the drying gas evenly into the test chamber through several gas release ports, enabling the drying gas to be quickly and evenly distributed within the test chamber, achieving efficient dehumidification of the overall environment of the test chamber and avoiding airflow stagnation caused by a single air supply port. The second air supply branch delivers dry gas to the dry gas inlet hole on the side wall of the mounting slot, and then into the assembly gap between the cooling plate and the mounting slot. It actively blows air into this assembly gap to remove moisture, effectively preventing moisture from accumulating at the bottom of the cooling plate and in the gap of the mounting slot, which would affect the cooling effect or cause local condensation. This dual-branch air supply design allows the same dry gas source to simultaneously meet the air supply needs of two different areas: dehumidification of the test chamber environment and dehumidification of the cooling plate mounting gap. Moreover, the two airflows are independent of each other and do not interfere with each other, which significantly improves the utilization efficiency of the dry gas and the overall dehumidification effect.

[0014] Optionally, the side wall of the mounting groove is further provided with a first through hole and a second through hole for the cooling medium input interface and the cooling medium output interface to pass through; when the cooling medium input interface and the cooling medium output interface pass through the corresponding through hole, an exhaust gap is formed between them and the hole wall of the corresponding through hole, and the moisture in the test chamber is discharged outward through the exhaust gap.

[0015] By adopting the above technical solution, the first and second through holes on the side wall of the mounting slot provide through channels for the cooling medium input and output interfaces, allowing the interfaces on the cooling plate to easily extend to the outside of the mounting slot to connect to external cooling medium pipelines. When the cooling medium input and output interfaces pass through the corresponding through holes, an exhaust gap is formed between them and the hole wall. The test chamber is maintained under positive pressure due to the continuous introduction of dry gas. After the positive pressure gas carries the moisture in the test chamber, the moisture can be actively discharged outward through the exhaust gap by means of the pressure difference between the inside and outside of the test chamber. This structural design eliminates the need for additional independent exhaust valves or exhaust pipes, thus achieving continuous and automatic discharge of moisture from the test chamber, simplifying the device structure and reducing manufacturing costs. More importantly, the filler with a porous and breathable structure, such as a sponge, filling the exhaust gap allows gas to pass through while also filtering out small particles in the airflow. The porous packing effectively intercepts and filters impurities, preventing dust, fibers, and other pollutants from the external environment from entering the test chamber through the exhaust gap and contaminating the power semiconductor device under test. It also prevents external moisture from flowing back into the test chamber through the exhaust gap when the gas supply stops or the pressure fluctuates. The capillary action of the porous packing can mitigate the transient impact of the airflow, making the exhaust process more stable and uniform. This avoids the pressure drop in the test chamber caused by excessively fast airflow, which could affect the stability of positive pressure maintenance. In addition, the porous structure itself has a large specific surface area, which can produce a certain adsorption and drying effect on the gas passing through, further reducing the residual moisture content in the exhaust gas. The combination of this packing and the exhaust gap allows the gap, which originally only served as a gas channel, to have multiple functions of filtration, buffering, and auxiliary drying. This significantly improves the safety and reliability of the exhaust process without increasing the space occupied by the device.

[0016] Optionally, the cable constraint assembly is located inside the test chamber and includes a power terminal constraint unit and a signal terminal constraint unit; the power terminal constraint unit is used to constrain the power terminal cable of the power semiconductor device under test, and the signal terminal constraint unit is used to constrain the signal terminal cable of the power semiconductor device under test; the open edge of the cover is provided with a clearance groove for a portion of the power terminal of the power semiconductor device under test to extend to the outside of the cover to form an electrical connection with an external test circuit board, and a sealing position adjustment assembly is provided at the clearance groove, the sealing position adjustment assembly being used to adjust the mating gap between the power terminal and the cover and the insulating substrate.

[0017] By adopting the above technical solution, the power terminal constraint unit and signal terminal constraint unit in the cable constraint assembly independently constrain and manage the power terminal cables and signal terminal cables respectively, keeping the two types of cables separately arranged in the test chamber. This avoids electromagnetic interference to the signal cables when the power cables transmit high currents, and also facilitates the classification, identification, and quick connection of cables by testers. The clearance groove on the edge of the enclosure provides a channel for some power terminals of the power semiconductor device under test to extend to the outside of the enclosure, allowing these power terminals to directly form an electrical connection with the existing external test circuit board without the need for additional adapter circuit boards or extension cables in the test chamber. This reduces signal transmission loss and allows the device to be directly adapted to existing conventional test equipment without modification. The sealing position adjustment component set at the clearance groove can adjust the fitting gap according to the actual thickness and position of the power terminal, ensuring the airtightness of the penetration part when the power terminal passes through the enclosure, and avoiding or slowing down the discharge of positive pressure gas from the test chamber due to the gap between the power terminal and the clearance groove.

[0018] Optionally, the sealing position adjustment assembly includes an upper clamping member disposed on the cover and a lower clamping member disposed on the insulating substrate. The upper clamping member and the lower clamping member are respectively provided with elongated adjustment holes to allow the upper clamping member and the lower clamping member to move relative to each other in a set direction. The upper clamping member and the lower clamping member are respectively provided with elastic sealing bodies adapted to the outer peripheral wall of the power terminal.

[0019] By adopting the above technical solution, the upper clamping component and the lower clamping component are respectively set on the cover and the insulating substrate. The relative position of the two is adjusted along the set direction through the elongated adjustment hole, so that the sealing position adjustment component can be flexibly adapted according to the thickness and position deviation of different power terminals. The elastic sealing body set on the upper clamping component and the lower clamping component is adapted to the outer peripheral wall of the power terminal. Under the clamping state, the elastic sealing body undergoes elastic deformation and tightly fits the outer surface of the power terminal, realizing the effective filling or sealing of the gap between the power terminal and the cover. The elastic sealing body can be a rubber sealing strip or a sponge.

[0020] Optionally, the locking mechanism includes a cover plate that is detachably fixed on an insulating substrate, and the lower end of the cover plate is provided with a positioning rib adapted to the power semiconductor device under test.

[0021] By adopting the above technical solution, the cover plate is detachably fixed on the insulating substrate. The positioning rib at the lower end of the cover plate abuts against the upper surface of the power semiconductor device under test. The power semiconductor device under test is quickly fixed by a simple covering and pressing method. The operation is convenient and the structure is simple. It is suitable for test scenarios with high requirements for fixing efficiency and ease of operation.

[0022] Optionally, the locking mechanism includes a guide rod, a pressure plate, and a pressure handle; the guide rod is vertically fixed to the upper end of the insulating substrate; the pressure plate is slidably connected to the guide rod, and a test substrate is provided on the side of the pressure plate; a plurality of test spring probes capable of abutting against the power terminals or signal terminals of the power semiconductor device under test are fixed on the test substrate; the test spring probes are electrically connected to the power terminal cable or signal terminal cable; the middle part of the pressure handle is hinged to the upper end of the guide rod, and a guide groove is opened at the tail end of the pressure handle, and an abutting member capable of abutting against the test substrate is fixed; a sliding pin is fixed on the pressure plate, and the sliding pin slides... The pressure handle is connected in a guide groove; the front section of the pressure handle is fixed with an elastic support rod that abuts against the pressure plate; when the pressure handle deflects towards the insulating substrate, the guide groove drives the pressure plate to move downward to act on the power semiconductor device under test, so that the power semiconductor device under test abuts against the open cooling groove and forms a cooling cavity, and when the abutting member abuts against the test substrate, the pressure handle is at the mechanical bottom dead center position; when the pressure handle deflects away from the insulating substrate, the guide groove drives the pressure plate to move upward to move away from the power semiconductor device under test, and when the sliding pin abuts against the limiting edge of the guide groove, the pressure handle is at the mechanical top dead center position.

[0023] By adopting the above technical solution, the guide rod is vertically fixed to the upper end of the insulating substrate, the pressure plate is slidably connected to the guide rod, and the middle part of the pressure handle is hinged to the upper end of the guide rod. When the operator holds the pressure handle and deflects it towards the insulating substrate, the cooperation between the guide groove at the tail end of the pressure handle and the sliding pin on the pressure plate converts the rotational motion of the pressure handle into the downward linear sliding of the pressure plate along the guide rod. The pressure plate drives the power semiconductor device under test to move down and abut against the open cooling groove to form a cooling chamber. During this process, the elastic support rod provides elastic buffer for the pressure plate to avoid damage to the device under test caused by rigid impact. When the abutting part abuts against the test substrate, the pressure handle is at the mechanical bottom dead center position. At this time, the reverse force borne by the pressure handle is converted into the continuous downward pressure of the pressure plate through the cooperation of the guide groove and the sliding pin. This downward pressure will not be released on its own when there is no external reverse force, realizing the mechanical self-locking clamping of the power semiconductor device under test without the need for additional settings. The locking device maintains the sealing of the cooling chamber. When the operator holds the pressure handle and deflects it away from the insulating substrate, the guide groove drives the pressure plate to slide upward along the guide rod, disengaging the power semiconductor device under test from the open cooling chamber, facilitating device removal or other operations within the test chamber. When the sliding pin abuts against the limiting edge of the guide groove, the pressure handle is at its mechanical dead point. At this point, the pressure handle remains in the raised position and will not fall on its own, preventing accidental drop during device replacement and potential safety hazards or device damage. This locking mechanism requires no external power source and achieves device positioning, cooling chamber sealing, and mechanical self-locking sequentially through the deflection of a single pressure handle. It is simple to operate and reliable in locking. At the same time, the vertical guiding effect of the guide rod ensures the stability and consistency of the force direction during the pressure plate's downward press, ensuring the uniformity and repeatability of the cooling chamber seal.

[0024] Optionally, the pressure plate has a groove arranged perpendicularly to the insulating substrate on its side. A test substrate is slidably connected in the groove, and an elastic element is provided between the bottom end of the groove and the test substrate. During the initial downward stroke of the pressure plate, the pressure plate drives the power semiconductor device under test to move down and abut against the open cooling groove to form the cooling cavity. The test substrate and the test spring probe move synchronously with the pressure plate but do not contact the power terminal. During the subsequent stroke after the cooling cavity is formed, the abutting member pushes against the test substrate to overcome the elastic force of the elastic element and slides downward relative to the pressure plate along the groove, thereby abutting the test spring probe against the power terminal to achieve electrical connection.

[0025] By adopting the above technical solution, the sliding groove arranged perpendicularly to the insulating substrate on the side of the pressure plate provides a sliding guide space for the test substrate relative to the pressure plate. The elastic element between the bottom end of the sliding groove and the test substrate keeps the test substrate in an elastically suspended state within the floating stroke range. In the first stroke of the downward movement of the pressure plate, the pressure plate drives the power semiconductor device under test to move down and abut against the open cooling groove to form a cooling cavity. During this process, the test substrate and the test spring probe move synchronously with the pressure plate but have not yet contacted the power terminal. That is, the probe always remains separated from the power terminal before the cooling cavity is sealed, which completely avoids the probe accidentally touching the power terminal during the downward movement of the pressure plate, which would cause the power semiconductor device to deviate from the open cooling groove, thereby affecting the sealing of the cooling cavity and the accuracy of the test data. In the second stroke after the cooling cavity is formed, the abutting element, under the action of the elastic support rod, uses the position of the mechanical dead point to push the test substrate to slide down the sliding groove relative to the pressure plate. The spring-loaded spring probe is compressed to eliminate floating travel, allowing it to smoothly contact the power terminal and establish an electrical connection. Since the cooling chamber is already sealed, the power semiconductor device under test is reliably fixed on the open cooling tank, preventing any displacement of the device during subsequent probe contact. This ensures contact stability and alignment accuracy between the probe and the terminal. Through the coordination of the sliding groove, elastic element, and floating travel, this technology achieves automatic separation of the cooling chamber formation and probe electrical connection in a sequential manner, allowing them to be completed sequentially during a single press-handle operation. This ensures the reliability of the cooling chamber seal and reduces mechanical damage to the power terminal from the probe. Simultaneously, the buffering effect of the elastic element avoids rigid impact at the moment of probe-terminal contact, extending the probe's lifespan. This timing control mechanism is implemented through a purely mechanical structure, requiring no additional electrical control or sensor detection, and exhibits higher reliability and stability in low-temperature testing environments.

[0026] In summary, this application includes at least one of the following beneficial technical effects: The insulating substrate and the cover form a test cavity, providing an independent low-temperature test environment for power semiconductor devices and avoiding interference from external humidity and impurities. The open cooling tank of the cooling plate and the locking mechanism form a cooling cavity. The circulation of the cooling medium allows the cooling medium to act directly on the part to be cooled, achieving localized and precise cooling with faster cooling speed and higher efficiency. The test chamber of this application is connected to an external dry air source and maintains positive pressure to continuously drive out moisture and prevent water vapor condensation. The humidity sensor monitors the humidity in real time to ensure accurate and reliable test data. The test cable constraint assembly and the mating port are sealed to ensure the positive pressure maintenance capability and dehumidification effect of the test chamber. This application installs a positioning shoulder on the side wall of the mounting slot to limit the position of the device, and a sealing element on the mating surface to prevent leakage of the cooling medium, ensuring the sealing of the cooling chamber and the cooling effect; the bottom pin hole of the mounting slot is matched with the bottom positioning pin of the cooling plate to achieve precise positioning of the cooling plate, improve the repeatability and consistency of the device assembly, and the cooling plate can be replaced as needed. Attached Figure Description

[0027] Figure 1 This is a three-dimensional structural schematic diagram of the low-temperature testing device for power semiconductor devices described in Embodiment 1 of this application; Figure 2 This is a schematic diagram of the internal three-dimensional structure of the low-temperature testing device for power semiconductor devices described in Embodiment 1 of this application; Figure 3 This is a schematic diagram of the locking mechanism described in Embodiment 1 of this application; Figure 4 This is a schematic diagram of the arrangement structure of the insulating substrate and the cooling plate described in Embodiment 1 of this application; Figure 5 This is a schematic diagram of the structure of the insulating substrate described in Embodiment 1 of this application; Figure 6 This is a schematic diagram of the structure of the cooling plate described in Embodiment 1 of this application; Figure 7 This is a schematic diagram of the structure of the cover described in Embodiment 1 of this application; Figure 8 This is a schematic diagram of the sealing position adjustment assembly described in Embodiment 1 of this application; Figure 9 This is a schematic diagram of the locking mechanism in the mechanical dead point position as described in Embodiment 2 of this application; Figure 10 This is a schematic diagram of the locking mechanism in the mechanical bottom dead center position as described in Embodiment 2 of this application; Figure 11 This is a schematic diagram of the locking mechanism described in Embodiment 3 of this application; Figure 12 This is a schematic diagram of the structure of the pressure plate described in Embodiment 3 of this application; Figure 13 This is a schematic diagram of the locking mechanism in the mechanical bottom dead center position as described in Embodiment 3 of this application.

[0028] In the diagram: 1. Insulating substrate; 11. Mounting groove; 111. Pin hole; 112. Drying gas inlet hole; 113. First through hole; 114. Second through hole; 2. Cooling plate; 21. Open cooling groove; 211. Positioning shoulder; 212. Seal; 22. Positioning pin; 23. Cooling medium inlet; 24. Cooling medium outlet; 25. Annular airflow channel; 3. Cover; 31. Mating joint; 32. Clearance groove; 33. Gas distribution component; 331. Gas release port; 34. Fastening bolt; 4. Drying gas supply main pipe; 41. First gas supply branch; 42. Second gas supply branch; 5. Exhaust gap; 6. Locking Mechanism; 61. Guide rod; 611. Connecting rod; 62. Pressure plate; 621. Slide groove; 622. Slide pin; 63. Pressure handle; 631. Guide groove; 632. Abutment; 633. Elastic support rod; 64. Test substrate; 641. Test spring probe; 65. Elastic element; 66. Cover plate; 661. Positioning rib; 7. Cable constraint assembly; 71. Power terminal constraint unit; 72. Signal terminal constraint unit; 8. Sealing position adjustment assembly; 81. Upper clamping element; 82. Lower clamping element; 83. Elastic sealing body; 9. Humidity sensor; 10. Test power semiconductor device; 101. Power terminal; 102. Signal terminal. Detailed Implementation

[0029] The technical solutions of various embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Example 1

[0030] Reference Figures 1 to 3 This application discloses a low-temperature testing device for power semiconductor devices, including an insulating substrate 1 and a cover 3. The cover 3 is detachably fixed on the insulating substrate 1, and the insulating substrate 1 and the cover 3 enclose a test cavity. A cooling plate 2 is provided on the insulating substrate 1. The cooling plate 2 has an open cooling groove 21 for accommodating the power semiconductor device 10 under test. The open cooling groove 21 is located inside the test chamber, and the opening size of the open cooling groove 21 is adapted to the part of the power semiconductor device 10 under test to be cooled. The power semiconductor device 10 under test is fixed at the opening of the cooling groove 21 by a locking mechanism 6 to form a cooling chamber. The cooling plate 2 is provided with a cooling medium input interface 23 and a cooling medium output interface 24 communicating with the cooling chamber. The insulating substrate 1 is provided with a test cable constraint assembly 7, and the cover 3 is provided with a mating port 31 that is adapted to the test cable constraint assembly 7. When the cover 3 is closed on the insulating substrate 1, the test cable constraint assembly 7 and the mating port 31 are sealed together. The test chamber is configured to be connected to an external dry air source to dehumidify the test chamber during the testing phase and maintain the air pressure inside the test chamber in a positive pressure state. A humidity sensor 9 is installed inside the test chamber to monitor the humidity of the environment inside the test chamber during the testing phase.

[0031] For details, please refer to Figures 2 to 5 The locking mechanism 6 is used to fix the power semiconductor device 10 under test at the opening of the cooling tank 21 to form a cooling cavity. In this embodiment, the locking mechanism 6 includes a cover plate 66 that is detachably fixed on the insulating substrate 1. The cover plate 66 is usually made of metal or plastic. Its lower end is provided with a positioning rib 661 that is adapted to the power semiconductor device 10 under test. The positioning rib 661 can be a strip-shaped protrusion, a dot-shaped protrusion, etc. By closing and pressing the cover plate 66, the power semiconductor device 10 under test can be quickly fixed.

[0032] refer to Figures 4 to 6 The insulating substrate 1 is the basic supporting component of the entire device, and is usually made of materials with good insulation properties, such as ceramics and plastics. The insulating substrate 1 is provided with a mounting groove 11 for accommodating the cooling plate 2. The mounting groove 11 makes the assembly between the cooling plate 2 and the insulating substrate 1 more compact and stable. A positioning shoulder 211 is formed on the side wall of the open cooling tank 21. The positioning shoulder 211 can be annular or block-shaped protrusion. Its function is to limit the position of the power semiconductor device 10 under test, so that the device can be quickly and accurately positioned to the preset test position. A sealing element 212 is provided on the mating surface between the positioning shoulder 211 and the power semiconductor device 10 under test. The sealing element 212 can be a rubber sealing ring, silicone gasket, etc. Its function is to fill the small gap between the device and the shoulder and prevent the cooling medium in the cooling chamber from leaking. The bottom of the mounting groove 11 is provided with a pin hole 111. The shape of the pin hole 111 can be circular, square, etc. The bottom of the cooling plate 2 is provided with a positioning pin 22 that matches the pin hole 111. The cooperation between the positioning pin 22 and the pin hole 111 realizes the precise positioning of the cooling plate 2 in the mounting groove 11, ensuring the accurate relative position between the open cooling tank 21 on the cooling plate 2 and the relevant structure on the insulating substrate 1, and improving the assembly repeatability and consistency of the device.

[0033] refer to Figures 4 to 6The cooling plate 2 has an open cooling tank 21 for accommodating the power semiconductor device 10 under test. The opening size of the open cooling tank 21 is adapted to the part of the power semiconductor device 10 under test to be cooled, so that the cooling medium can directly act on the part to be cooled. The cooling plate 2 is provided with a cooling medium input interface 23 and a cooling medium output interface 24 communicating with the cooling chamber. The cooling medium input interface 23 and the cooling medium output interface 24 can be pipe joints, threaded interfaces, etc., which facilitate the input and output of the cooling medium. The cooling medium can be a coolant, cooling gas, etc., which enters the cooling chamber through the input interface, carries away the heat generated by the power semiconductor device 10 under test, and is then discharged through the output interface.

[0034] refer to Figures 4 to 6 The test cable constraint assembly 7 is located inside the test chamber and includes a power terminal constraint unit 71 and a signal terminal constraint unit 72. The power terminal constraint unit 71 is used to constrain the power terminal cable of the power semiconductor device 10 under test, and the signal terminal constraint unit 72 is used to constrain the signal terminal cable of the power semiconductor device 10 under test. The power terminal constraint unit 71 and the signal terminal constraint unit 72 can be cable clamps, cable trays, etc., and their function is to keep the two types of cables separated in the test chamber, avoid electromagnetic interference, and facilitate the test personnel to classify and quickly connect the cables.

[0035] refer to Figures 4 to 6 The test chamber is configured to be connected to an external dry air source to dehumidify the test chamber during the testing phase and maintain a positive pressure state inside the test chamber. A dry gas supply main pipe 4 connected to an external dry air source is fixed to the side of the insulating substrate 1. The dry gas supply main pipe 4 is connected to a first gas supply branch 41 and a second gas supply branch 42. A gas distribution component 33 is provided on the inner side wall of the cover 3. The gas distribution component 33 has several gas release ports 331. The first gas supply branch 41 is connected to the gas distribution component 33 to deliver dry gas into the test chamber, so that the dry gas is quickly and evenly distributed in the test chamber, achieving efficient dehumidification of the overall environment of the test chamber. A dry gas inlet hole 112 is provided on the side wall of the mounting groove 11. The second gas supply branch 42 is connected to the dry gas inlet hole 112 to deliver dry gas to the annular air circulation channel 25 to remove moisture. The annular air circulation channel 25 is formed between the side wall of the mounting groove 11 and the side wall of the cooling plate 2, providing space for the flow of dry gas around the cooling plate 2.

[0036] refer to Figures 4 to 6The side wall of the mounting groove 11 is also provided with a first through hole 113 and a second through hole 114 for the cooling medium input interface 23 and the cooling medium output interface 24 to pass through. When the cooling medium input interface 23 and the cooling medium output interface 24 pass through the corresponding through holes, an exhaust gap 5 is formed between them and the hole wall of the corresponding through hole. The moisture in the test chamber is discharged to the outside through the exhaust gap 5. The exhaust gap 5 is filled with a filler with a porous and breathable structure, such as a sponge. While allowing gas to pass through, the filler can effectively intercept and filter small particles and impurities in the airflow, preventing pollutants in the external environment from entering the test chamber. It also prevents external moisture from flowing back into the test chamber and can reduce the transient impact of the airflow, making the exhaust process more stable and uniform.

[0037] refer to Figures 7 to 8 The top of the cover 3 is provided with fastening bolt holes, which can be fixed to the insulating substrate 1 by fastening bolts 34. A rubber sealing gasket can be set at the mating edge of the cover 3 and the insulating substrate 1. A humidity sensor 9 is fixed on the top of the cover 3. The humidity sensor 9 can be a capacitive humidity sensor, a resistive humidity sensor, etc. Its function is to monitor the humidity of the environment in the test chamber during the testing phase, so that the operator can keep track of the humidity changes in the chamber in real time and ensure that the power-on test can only be carried out after the humidity reaches the standard. A temperature sensor, such as a laser temperature sensor, can also be set in the test chamber to detect the temperature of the power semiconductor device 10 under test, so that the operator can keep track of the temperature changes of the power semiconductor device 10 under test in real time. As a mature existing technology, the humidity sensor 9 and the temperature sensor can be electrically connected to the control unit of the device to realize the automated supply of drying air source and cooling medium.

[0038] refer to Figures 7 to 8 The enclosure 3 has an opening edge with a clearance groove 32 for a portion of the power terminals 101 of the power semiconductor device 10 under test to extend to the outside of the enclosure 3 to form an electrical connection with an external test circuit board. A sealing position adjustment assembly 8 is provided at the clearance groove 32. The sealing position adjustment assembly 8 is used to adjust the mating clearance between the power terminals 101 and the enclosure 3 and the insulating substrate 1. The sealing position adjustment assembly 8 includes an upper clamping member 81 disposed on the enclosure 3 and a lower clamping member 82 disposed on the insulating substrate 1. The clamping member 82 is provided with elongated adjustment holes to allow the upper clamping member 81 and the lower clamping member 82 to move relative to each other in a set direction. The upper clamping member 81 and the lower clamping member 82 are respectively provided with elastic sealing bodies 83 adapted to the outer peripheral wall of the power terminal 101. The elastic sealing body 83 can be a rubber sealing strip, sponge, etc. In the clamping state, the elastic sealing body 83 undergoes elastic deformation and fits tightly against the outer surface of the power terminal 101, thereby effectively filling or sealing the gap between the power terminal 101 and the cover 3.

[0039] The implementation principle of this embodiment is as follows: This device forms a test chamber by enclosing the insulating substrate 1 and the cover 3, providing an independent test environment for the power semiconductor device and avoiding interference from the external environment. The open cooling groove 21 on the cooling plate 2 cooperates with the locking mechanism 6 to form a cooling chamber, realizing localized and precise cooling of the part of the power semiconductor device 10 to be cooled, thus improving the cooling efficiency; the test cable constraint assembly 7 and the mating port 31 on the cover 3 are sealed together to ensure the airtightness of the test chamber; the test chamber is connected to the external dry air source to maintain a positive pressure state and dehumidify, and the humidity sensor 9 monitors the humidity in the test chamber in real time to ensure the dryness of the test environment and avoid test problems caused by excessive humidity; at the same time, the setting of the positioning shoulder 211, positioning pin 22, annular air circulation channel 25, exhaust gap 5 and other structures of the mounting groove 11 further improves the stability, dehumidification effect and reliability of the device; the setting of the cover plate 66 and the positioning rib 661 can quickly fix the power semiconductor device 10 under test, which is convenient to operate and has a simple structure. Example 2

[0040] Reference Figures 9 to 10The difference between this embodiment and Embodiment 1 is that the locking mechanism 6 adopts a different form. In this embodiment, the locking mechanism 6 includes a guide rod 61, a pressure plate 62, and a pressure handle 63. There are two guide rods 61, vertically fixed to the upper end of the insulating substrate 1, and symmetrically arranged on both sides of the mounting groove. A connecting rod 611 is connected to the upper end of the two guide rods 61. The pressure plate 62 is slidably connected to the guide rod 61, and the middle of the pressure handle 63 is hinged to the connecting rod 611 located at the upper end of the guide rod 61. A test substrate 64 is fixedly mounted on the side of the pressure plate 62. Several test spring probes 641, capable of contacting the power terminals 101 or signal terminals 102 of the power semiconductor device 10 under test, are fixed on the test substrate 64. The test spring probes 641 are electrically connected to the power terminal cables or signal terminal cables, and the positions of the probes need to be strictly arranged to ensure accurate contact with the corresponding terminals. The pressure handle 63 has a guide groove 631 at the tail end located at the hinge point, and is fixed with a groove capable of contacting the test spring probes. The substrate 64 has an abutment member 632, and a sliding pin 622 is fixed on the pressure plate 62, which is slidably connected in the guide groove 631. The pressure handle 63 has an elastic support rod 633 fixed at its front end, located at the hinge point, which abuts against the pressure plate 62. The elastic support rod 633 can be a pneumatic support rod, a spring support rod, etc. Both the abutment member 632 and the elastic support rod 633 are arranged at right angles to the pressure handle 63. When the pressure handle 63 deflects towards the insulating substrate 1, the guide groove 631... 31 drives the pressure plate 62 to move downward, so that the power semiconductor device 10 under test abuts against the open cooling tank 21 and forms a cooling chamber. When the abutting member 632 abuts against the test substrate 64, the pressure handle 63 is at the mechanical bottom dead center position, realizing the mechanical self-locking clamping of the power semiconductor device 10 under test. When the pressure handle 63 deflects away from the insulating substrate 1, the guide groove 631 drives the pressure plate 62 to move upward, so that the power semiconductor device 10 under test is disengaged from the abutment of the open cooling tank 21.

[0041] The implementation principle of this embodiment is as follows: the locking mechanism 6 requires no external power source; it can sequentially achieve three functions—device positioning, cooling chamber sealing, and mechanical self-locking—through the deflection operation of a single pressure handle 63. The operation is simple and the locking is reliable. The vertical guiding effect of the guide rod 61 ensures the stability and consistency of the force direction during the pressing of the pressure plate 62, ensuring the uniformity and repeatability of the cooling chamber sealing. Simultaneously, the test substrate 64 fixed to the side of the pressure plate 62 and the precisely arranged probe positions ensure accurate contact between the test spring probe 641 and the power terminal 101 or signal terminal 102, achieving a stable electrical connection. Example 3

[0042] Reference Figures 11 to 13The difference between this embodiment and the above embodiment is that the locking mechanism 6, based on the second embodiment, adds a mechanical timing control function; specifically, the side of the pressure plate 62 is provided with a sliding groove 621 arranged perpendicularly to the insulating substrate 1, and the sliding groove 621 can adopt a T-shaped groove structure; the test substrate 64 is slidably connected in the sliding groove 621, and an elastic element 65, such as a spring, is provided between the bottom end of the sliding groove 621 and the test substrate 64; in the first stroke of the downward movement of the pressure plate 62, the pressure plate 62 drives the power semiconductor device 10 under test to move down and abut against the open cooling groove 21 to form a cooling cavity, and the test substrate 64 and the test spring probe 641 move synchronously with the pressure plate 62 but do not contact the power terminal 101; in the second stroke after the cooling cavity is formed, the abutting member 632 pushes the test substrate 64 to overcome the elastic force of the elastic element 65 and slides downward relative to the pressure plate 62 along the sliding groove 621, so that the test spring probe 641 abuts against the power terminal 101 to achieve electrical connection.

[0043] The implementation principle of this application embodiment is as follows: through the cooperation of the slide groove 621, the elastic element 65 and the floating stroke, the automatic separation of the cooling cavity formation and the probe electrical connection in terms of timing is realized, so that the two are completed sequentially in the operation of a single pressure handle 63; when the cooling cavity sealing is not yet completed, the probe is always separated from the power terminal 101, completely avoiding the probe accidentally touching the power terminal 101 during the downward movement of the pressure plate 62, which would cause the power semiconductor device under test 10 to deviate from the open cooling groove 21, thereby affecting the sealing of the cooling cavity and the accuracy of the test data; after the cooling cavity is formed, the probe then abuts against the power terminal 101, ensuring the contact stability and alignment accuracy between the probe and the terminal; at the same time, the buffering effect of the elastic element 65 avoids the rigid impact at the moment of contact between the probe and the terminal, extending the service life of the probe; this timing control mechanism is realized through a pure mechanical structure, without the need for additional electrical control or sensor detection, and has higher reliability and stability in low temperature testing environment, and can be adapted to power semiconductor devices 10 of different specifications, especially since the pins of the power semiconductor device 10 under test have an upward bent structure.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the technical solutions of the embodiments of this application.

Claims

1. A low-temperature testing device for power semiconductor devices, characterized in that, It includes an insulating substrate (1) and a cover (3), wherein the cover (3) is detachably fixed on the insulating substrate (1), and the insulating substrate (1) and the cover (3) together form a test cavity; The insulating substrate (1) is provided with a cooling plate (2), which has an open cooling groove (21) for accommodating the power semiconductor device (10) under test; the open cooling groove (21) is located in the test chamber, and the opening size of the open cooling groove (21) is adapted to the part of the power semiconductor device (10) under test to be cooled; the power semiconductor device (10) under test is fixed at the opening of the open cooling groove (21) by a locking mechanism (6) to form a cooling chamber; the cooling plate (2) is provided with a cooling medium input interface (23) and a cooling medium output interface (24) communicating with the cooling chamber; The insulating substrate (1) is provided with a test cable constraint assembly (7), and the cover (3) is provided with a mating port (31) adapted to the test cable constraint assembly (7). When the cover (3) covers the insulating substrate (1), the test cable constraint assembly (7) and the mating port (31) are sealed together. The test chamber is configured to be connected to an external dry air source to dehumidify the test chamber during the test phase and maintain the air pressure inside the test chamber in a positive pressure state. A humidity sensor (9) is provided inside the test chamber to monitor the humidity of the environment inside the test chamber during the test phase.

2. The low-temperature testing apparatus for power semiconductor devices according to claim 1, characterized in that, The insulating substrate (1) is provided with a mounting groove (11) for accommodating the cooling plate (2); the side wall of the open cooling groove (21) is formed with a positioning shoulder (211) for defining the position of the power semiconductor device (10) under test; a sealing element (212) is provided on the mating surface of the positioning shoulder (211) and the power semiconductor device (10) under test.

3. The low-temperature testing apparatus for power semiconductor devices according to claim 2, characterized in that, The bottom of the mounting groove (11) is provided with a pin hole (111), and the bottom of the cooling plate (2) is provided with a positioning pin (22) that matches the pin hole (111).

4. The low-temperature testing apparatus for power semiconductor devices according to claim 2, characterized in that, An annular air circulation channel (25) is formed between the side wall of the mounting groove (11) and the side wall of the cooling plate (2); a dry gas supply main pipe (4) connected to an external dry gas source is fixed on the side of the insulating substrate (1), and the dry gas supply main pipe (4) is connected to a first gas supply branch (41) and a second gas supply branch (42); a gas distribution component (33) is provided on the inner side wall of the cover (3), and the gas distribution component (33) has several gas release ports (331). The first gas supply branch (41) is connected to the gas distribution component (33) to deliver dry gas into the test chamber; a dry gas inlet hole (112) is provided on the side wall of the mounting groove (11), and the second gas supply branch (42) is connected to the dry gas inlet hole (112) to deliver dry gas into the annular air circulation channel (25) to remove moisture.

5. The low-temperature testing apparatus for power semiconductor devices according to claim 4, characterized in that, The side wall of the mounting groove (11) is also provided with a first through hole (113) and a second through hole (114) for the cooling medium input interface (23) and the cooling medium output interface (24) to pass through; when the cooling medium input interface (23) and the cooling medium output interface (24) pass through the corresponding through hole, an exhaust gap (5) is formed between them and the hole wall of the corresponding through hole, and the moisture in the test chamber is discharged outward through the exhaust gap (5).

6. The low-temperature testing apparatus for power semiconductor devices according to claim 1, characterized in that, The cable constraint assembly (7) is located inside the test chamber and includes a power terminal constraint unit (71) and a signal terminal constraint unit (72). The power terminal constraint unit (71) is used to constrain the power terminal cable of the power semiconductor device under test (10), and the signal terminal constraint unit (72) is used to constrain the signal terminal cable of the power semiconductor device under test (10). The open edge of the cover (3) is provided with a clearance groove (32) for a portion of the power terminal (101) of the power semiconductor device under test (10) to extend to the outside of the cover (3) to form an electrical connection with the external test circuit board. A sealing position adjustment assembly (8) is provided at the clearance groove (32). The sealing position adjustment assembly (8) is used to adjust the mating gap between the power terminal (101) and the cover (3) and the insulating substrate (1).

7. The low-temperature testing apparatus for power semiconductor devices according to claim 6, characterized in that, The sealing position adjustment assembly (8) includes an upper clamping member (81) disposed on the cover (3) and a lower clamping member (82) disposed on the insulating substrate (1). The upper clamping member (81) and the lower clamping member (82) are respectively provided with elongated adjustment holes to allow the upper clamping member (81) and the lower clamping member (82) to move relative to each other in a set direction. The upper clamping member (81) and the lower clamping member (82) are respectively provided with elastic sealing bodies (83) adapted to the outer peripheral wall of the power terminal (101).

8. The low-temperature testing apparatus for power semiconductor devices according to claim 1, characterized in that, The locking mechanism (6) includes a cover plate (66) that is detachably fixed on the insulating substrate (1), and the lower end of the cover plate (66) is provided with a positioning rib (661) that is adapted to the power semiconductor device (10) under test.

9. The low-temperature testing apparatus for power semiconductor devices according to claim 1, characterized in that, The locking mechanism (6) includes a guide rod (61), a pressure plate (62), and a pressure handle (63); the guide rod (61) is vertically fixed to the upper end of the insulating substrate (1); the pressure plate (62) is slidably connected to the guide rod (61), and a test substrate (64) is provided on the side of the pressure plate (62); a plurality of test spring probes (641) capable of abutting against the power terminals (101) or signal terminals (102) of the power semiconductor device (10) under test are fixed on the test substrate (64); the test spring probes (641) are electrically connected to the power terminal cable or signal terminal cable; the middle part of the pressure handle (63) is hinged to the upper end of the guide rod (61), and the pressure handle (63) has a guide groove (631) at the tail end located at the hinge point, and an abutment member (632) capable of abutting against the test substrate (64) is fixed on it; a sliding pin (622) is fixed on the pressure plate (62), and the sliding pin (622) is fixed on the upper end of the guide rod (61). 22) Sliding connection in guide groove (631); the pressure handle (63) is fixed with an elastic support rod (633) that abuts against the pressure plate (62) at the front end of the hinge point; when the pressure handle (63) deflects toward the insulating substrate (1), the guide groove (631) drives the pressure plate (62) to move down, so as to act on the power semiconductor device (10) under test, so that the power semiconductor device (10) under test abuts against the open cooling groove (21) and forms a cooling cavity. When the abutting member (632) abuts against the test substrate (64), the pressure handle (63) is at the mechanical bottom dead center position; when the pressure handle (63) deflects away from the insulating substrate (1), the guide groove (631) drives the pressure plate (62) to move upward away from the power semiconductor device under test (10), and when the sliding pin (622) abuts against the limiting edge of the guide groove (631), the pressure handle (63) is at the mechanical top dead center position.

10. The low-temperature testing apparatus for power semiconductor devices according to claim 9, characterized in that, The pressure plate (62) has a groove (621) arranged perpendicularly to the insulating substrate (1) on its side. A test substrate (64) is slidably connected in the groove (621), and an elastic element (65) is provided between the bottom end of the groove (621) and the test substrate (64). During the initial downward stroke of the pressure plate (62), the pressure plate (62) drives the power semiconductor device (10) under test to move downward and abut against the open cooling groove (21) to form the cooling cavity. The test substrate (64) and the test spring probe (641) move synchronously with the pressure plate (62) but do not contact the power terminal (101); in the later stroke after the cooling cavity is formed, the abutment (632) pushes against the test substrate (64) to overcome the elastic force of the elastic member (65) and slides downward relative to the pressure plate (62) along the slide groove (621), thereby making the test spring probe (641) abut against the power terminal (101) to achieve electrical connection.

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