A lithium tantalate wafer aging test method and system

Abstract

The present application relates to the technical field of wafer aging test, and particularly relates to a lithium tantalate wafer aging test method and system. The present application establishes a time sequence corresponding relationship between the temperature change rate in the aging temperature cycle process and the surface charge accumulation amount, determines the time point when the charge accumulation amount reaches the peak value according to the time sequence corresponding relationship, and marks the time point as an electrical damage risk time point, so as to realize positioning of the occurrence time of the electrical damage caused by the pyroelectric effect in the temperature rise and fall cycle. The present application compares the evolution rate of the electric field strength value with the degradation rate of the dielectric loss value with the aging time, and according to this, distinguishes whether the dominant cause of aging failure is polarization flip ability degradation or dielectric energy dissipation ability recession, so as to provide a basis for subsequent development of corresponding process improvement measures for different dominant degradation types.

Description

Technical Field

[0001] This invention relates to the field of wafer aging testing technology, specifically to a method and system for testing the aging of lithium tantalate wafers. Background Technology

[0002] After manufacturing and before delivery, lithium tantalate wafers must undergo aging temperature cycling tests to assess the degree of electrical performance degradation. During aging temperature cycling, temperature changes induce pyroelectric charges on the wafer surface. The strong electric field generated by the accumulation of these charges can damage the wafer's polarization structure and dielectric properties, directly affecting the wafer's device performance and reliability.

[0003] In the prior art, Chinese invention patent CN121027783A discloses a wafer aging test system and method with dynamic gate bias and reverse bias testing functions. It applies dynamic high-temperature reverse bias and dynamic high-temperature gate bias stress to the wafer through a high-voltage switching circuit and a test switching circuit, and monitors the threshold voltage online to evaluate chip reliability. Chinese invention patent CN117825910A discloses a wafer-level LED chip rapid aging test method and system, which uses RTA equipment to perform heating annealing on the wafer in a non-powered state, and compares the changes in electrical parameters before and after annealing to determine the chip's anti-aging ability.

[0004] However, none of the aforementioned existing technologies have conducted correlation analysis and quantification of the temperature change rate and surface charge accumulation during aging temperature cycling, resulting in the inability to determine the timing of electrical damage. Furthermore, they fail to distinguish whether the primary cause of aging failure is the degradation of polarization reversal capability or the decline in dielectric energy dissipation capability, making the physical mechanism of aging failure unclear and the location of aging damage difficult to pinpoint. Consequently, it is impossible to formulate corresponding process improvement measures for different aging failure physical mechanisms. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method and system for testing the aging of lithium tantalate wafers.

[0006] The technical solution adopted by the present invention to solve its technical problem is: a lithium tantalate wafer aging test method, including the following steps: based on the time sequence correspondence between the real-time temperature change rate and the surface charge accumulation during the aging temperature cycle of the wafer, the temperature change range where the temperature change rate reaches its peak and the time point where the charge accumulation reaches its peak are determined; the time point is marked as the electrical damage risk time point, and the temperature change range is marked as the pyroelectric effect concentration range.

[0007] Based on the electric field strength and dielectric loss values ​​measured before and after the polarization reversal electric field is applied at the time point of electrical damage risk, the evolution rate of the electric field strength value with aging time and the degradation rate of the dielectric loss value are calculated and compared, and the dominant degradation type is determined accordingly.

[0008] The process of calculating the evolution rate of electric field strength value with aging time and the degradation rate of dielectric loss value is as follows: multiple aging time points are selected before and after the electrical damage risk point. A polarization reversal electric field is applied to the wafer at each selected aging time point, and the electric field strength value measured at each aging time point is recorded. The electric field strength values ​​are arranged in chronological order of aging time to form an intensity sequence. The electric field strength values ​​of two adjacent aging time points before the electrical damage risk point are selected from the intensity sequence, and the ratio of the difference between the two selected electric field strength values ​​to the difference in aging time is calculated as the evolution rate of the first stage.

[0009] The electric field intensity values ​​of two adjacent aging time points after the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the evolution rate of the latter stage. The average of the evolution rate of the former stage and the evolution rate of the latter stage is taken as the evolution rate of the electric field intensity value with aging time.

[0010] The electric field strength value and dielectric loss value are recorded at each aging time point. The dielectric loss values ​​are arranged in chronological order of aging time to form a dielectric sequence. The dielectric loss values ​​of multiple aging time points continuously distributed after the electrical damage risk point are selected from the dielectric sequence. The selected multiple dielectric loss values ​​are linearly fitted with the corresponding aging time. The regression coefficients obtained from the fitting are used as the degradation rate of dielectric loss value with aging time.

[0011] The process of determining the dominant degradation type is as follows: compare the rate of evolution of electric field strength with aging time with the rate of degradation of dielectric loss to determine the dominant degradation type; the dominant degradation type includes polarization damage type degradation and dielectric fatigue type degradation.

[0012] Calculate the low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the pyroelectric effect concentration range of the same wafer.

[0013] The dominant degradation location is determined by considering the relationship between the low-frequency and high-frequency dielectric constant degradation and the dominant degradation type.

[0014] Based on the electrical damage risk time point, dominant degradation type, and dominant degradation location, the wafer aging test conclusion is output.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention establishes a time-series correspondence between the temperature change rate and the surface charge accumulation during the aging temperature cycle, determines the time point when the charge accumulation reaches its peak based on the time-series correspondence and marks it as the time point of electrical damage risk, thereby locating the time of occurrence of electrical damage caused by pyroelectric effect during the heating and cooling cycle.

[0016] 2. This invention calculates and compares the evolution rate of electric field strength with aging time and the degradation rate of dielectric loss, thereby distinguishing whether the dominant cause of aging failure is the degradation of polarization reversal capability or the decline of dielectric energy dissipation capability. This provides a basis for formulating corresponding process improvement measures for different dominant degradation types.

[0017] 3. This invention compares the magnitudes of low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the concentrated region of pyroelectric effect, and determines the dominant degradation location by combining the dominant degradation type, thereby making the formulation of subsequent process improvement measures more targeted. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the test method flow of the present invention; Figure 2 A schematic diagram illustrating the process of determining the temperature variation range in this invention; Figure 3 A flowchart illustrating the process of determining the point at which the charge accumulation reaches its peak value according to the present invention; Figure 4 A schematic diagram illustrating the process for determining the dominant degradation location in this invention; Figure 5 This is a schematic diagram of the process for obtaining wafer aging test results according to the present invention. Detailed Implementation

[0020] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention. Furthermore, it should be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale.

[0021] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use. Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification.

[0022] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0024] The following description, in conjunction with the accompanying drawings, details a specific scheme for an aging test method for lithium tantalate wafers provided by this invention.

[0025] Please see Figure 1 , Figure 2 and Figure 3 The diagram shows a flowchart of an aging test method for lithium tantalate wafers provided by the present invention, which specifically includes the following steps: Step S1, based on the time-series correspondence between the real-time temperature change rate and the surface charge accumulation during the aging temperature cycle of the wafer, determine the temperature change range in which the temperature change rate reaches its peak and the time point in which the charge accumulation reaches its peak.

[0026] In practice, measurement points are evenly distributed on the wafer surface in a grid pattern. Specifically, eight radial lines are arranged at 45-degree intervals along the circumference of the wafer. Starting from the wafer center, a measurement point is placed every fixed length along the radial lines until the wafer edge. This ensures that the circumferential spacing between any two adjacent measurement points increases with the radius, but the circumferential spacing is smaller than the radial spacing near the center. This guarantees that the spatial resolution of the measurement points across the entire wafer surface is on the same order of magnitude, avoiding local over-density or under-density. In actual aging tests, the wafer has a standard circular outline.

[0027] Next, an infrared thermal imager is mounted above the wafer, with its field of view covering the entire upper surface of the wafer. Simultaneously, an electrostatic voltage scanner is mounted above the wafer, with its field of view covering the entire upper surface of the wafer.

[0028] In view of the fact that the spatial resolution of infrared thermal imagers and electrostatic voltage scanners is usually 1 to 3 millimeters, in order to prevent the signals of adjacent measurement points from interfering with each other, the above-mentioned fixed length is set to 5 millimeters.

[0029] During the aging temperature cycling process, temperature changes induce pyroelectric charges on the wafer surface of lithium tantalate wafers. As the temperature changes, the spontaneous polarization intensity of the lithium tantalate crystal changes accordingly, leading to the release and accumulation of bound charges on the crystal surface, forming surface charge accumulation. The greater the rate of temperature change, the more bound charges are released per unit time, and the faster the surface charge accumulation rate.

[0030] Meanwhile, changes in surface charge accumulation affect the electric field distribution inside the wafer, thus influencing the polarization reversal process. Therefore, there is a direct physical correlation between the rate of temperature change and the amount of surface charge accumulation, and the temporal correspondence between the two is the basis for subsequently identifying the concentrated region of the pyroelectric effect.

[0031] Aging temperature cycling refers to the process of placing a wafer in a programmable temperature cycling test chamber and periodically heating and cooling it according to a preset temperature change rate and preset temperature range (existing technology). During the aging temperature cycling process, the total duration of a complete heating and cooling phase is recorded as the heating / cooling cycle.

[0032] Upon reaching the start time of the aging test, the temperature control system of the temperature cycling test chamber outputs a trigger signal, followed by the acquisition of transient temperature values ​​by an infrared thermal imager and transient surface potential values ​​by an electrostatic voltage scanner. The sampling frequency is set to once per second to capture the detailed process of temperature and surface potential changes. The start time of the aging test is the moment when the temperature cycling test chamber reaches the starting point of the preset temperature range. In this invention, the acquisition time is defined as the aging time.

[0033] The specific process for establishing the time sequence correspondence is as follows: Transient temperature values ​​and transient surface potential values ​​from multiple measurement points on the wafer surface are continuously collected during each heating and cooling cycle of the aging temperature cycle. The transient temperature values ​​are arranged in chronological order of aging time to obtain the transient temperature time sequence for each measurement point. The transient surface potential value is multiplied by the equivalent capacitance to obtain the surface charge. The surface charge is then arranged in chronological order of aging time to obtain the surface charge time sequence. Here, the equivalent capacitance refers to the equivalent capacitance between the wafer surface and the reference electrode of the electrostatic voltage scanner. The equivalent capacitance is directly calibrated using a standard capacitance calibration procedure after the test system is installed (existing technology), and is a fixed constant after calibration.

[0034] For each measurement point's transient temperature time series, starting from the second aging time, the difference between the transient temperature value at the current aging time and the transient temperature value at the previous aging time is calculated sequentially. The difference is divided by the difference between two adjacent aging times to obtain the temperature change rate at the current aging time (in degrees Celsius per second). After traversing the transient temperature time series, the temperature change rate time series is obtained.

[0035] For each measurement point, the charge accumulation rate (in amperes) at the current aging time is obtained using the same method described above. After traversing the surface charge time series, the charge accumulation rate time series is obtained.

[0036] Next, with aging time as the horizontal axis (i.e., the aging time axis), starting from time zero, the time series of temperature change rate and charge accumulation rate at the same measurement point are aligned with the aging time axis to obtain the time series correspondence of each measurement point.

[0037] Based on the temporal correspondence, the aging time corresponding to the maximum point on the charge accumulation rate time series is used as the reference time. When the charge accumulation rate reaches its maximum value, it indicates that the charge accumulation rate on the wafer surface is the fastest, and the pyroelectric effect is most intense at that moment. If multiple maximum points appear on the charge accumulation rate time series curve, the aging time corresponding to the first maximum point is selected as the reference time.

[0038] Then, starting from the reference time, the values ​​of two adjacent aging times are compared point by point along the aging time axis (i.e., in the direction of time decrease). When the value of the later aging time is greater than the value of the earlier aging time for the first time, the earlier aging time is taken as the starting time. At the same time, the values ​​of two adjacent aging times are compared point by point along the aging time axis (i.e., in the direction of time increase). When the value of the later aging time is less than the value of the earlier aging time for the first time, the earlier aging time is taken as the ending time.

[0039] The candidate temperature change range for each measurement point is defined by the start time and the end time. From the candidate temperature change ranges of all measurement points on the same wafer, the earliest start time is taken as the common start time and the latest end time is taken as the common end time. The temperature change range is formed by the common start time and the common end time.

[0040] Within the temperature variation range, the temperature change rate on the wafer surface reaches the overall peak level, and the pyroelectric effect is most concentrated. Therefore, the temperature variation range is marked as the pyroelectric effect concentration range.

[0041] Furthermore, in the time series of charge accumulation rates at each measurement point, the aging time corresponding to the maximum value point is taken as the peak charge accumulation time point. The maximum value point corresponds to the moment when the charge accumulation rate is the highest and the surface charge accumulation growth rate is the fastest. At this moment, the total accumulated charge reaches a level that can cause electrical damage to the wafer. If multiple maximum values ​​appear on the charge accumulation rate time series curve, the aging time corresponding to the largest value among the maximum values ​​is selected as the peak charge accumulation time point. Then, the latest occurrence of the peak charge accumulation time point among all measurement points on the same wafer is selected as the reference time point.

[0042] Using a reference time point as a boundary, all measurement points are divided into a set that reaches its peak value earlier than the reference time point and a set that reaches its peak value later than the reference time point. The aging time values ​​of the charge accumulation peak time points of all measurement points in the set that reaches its peak value earlier than the reference time point are added together and divided by the total number of measurement points in the set that reaches its peak value earlier than the reference time point to obtain the first average time point; the second average time point is calculated in the same way based on the set that reaches its peak value later than the reference time point.

[0043] Next, the first average time point and the second average time point are calculated, and then divided by two to obtain the midpoint time. The midpoint time is taken as the time when the charge accumulation reaches its peak. At the time when the charge accumulation reaches its peak, the electric field inside the wafer is the strongest, and the risk of damage to the internal polarization structure and dielectric properties of the wafer is the highest. Therefore, the time when the charge accumulation reaches its peak is marked as the time point of electrical damage risk.

[0044] Step S2: Based on the electric field strength and dielectric loss values ​​measured when the polarization reversal electric field is applied before and after the electrical damage risk point, calculate and compare the evolution rate of the electric field strength value with aging time and the degradation rate of the dielectric loss value, and determine the dominant degradation type accordingly.

[0045] In practice, multiple aging time points are taken before and after the electrical damage risk point; in order to focus on the electric field intensity change characteristics near the electrical damage risk point to the greatest extent, two aging time points are taken before and after the electrical damage risk point.

[0046] A polarization reversal electric field is applied to the wafer at each selected aging time point. The application process is as follows: upon reaching the selected aging time point, the high-voltage power supply connected to the polarization fixture is closed and the output voltage is gradually increased until the polarization reversal voltage value is reached. This polarization reversal voltage value is maintained until the polarization current drops below 5% of the peak current (an empirical value in the field). Then, the output voltage is gradually reduced to zero, and the high-voltage power supply is disconnected. It should be noted that the wafer has been placed in the polarization fixture beforehand. The polarization fixture consists of upper and lower electrode plates. The upper electrode plate is connected to the positive terminal of the high-voltage power supply, and the lower electrode plate is connected to the negative terminal of the high-voltage power supply.

[0047] The polarization reversal voltage is set to 1.5 times the coercive electric field strength of the lithium tantalate wafer to ensure complete polarization reversal. The coercive electric field strength of the lithium tantalate wafer is read from the material parameter table provided by the wafer material supplier. The polarization current is obtained in real time by an ammeter connected in series in the polarization circuit.

[0048] During the aging process, the electric field strength applied to the wafer is measured in real time using a high-voltage probe and voltmeter connected to the electrode plate. The electric field strength value is obtained by dividing the voltmeter reading by the wafer thickness. Simultaneously, the dielectric loss value is measured using an impedance analyzer connected to the electrode plate. The electric field strength values ​​are arranged in chronological order of aging time to form an intensity sequence; the dielectric loss values ​​are arranged in chronological order of aging time to form a dielectric sequence.

[0049] Then, the electric field intensity values ​​of two adjacent aging time points before the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the initial evolution rate. Similarly, the electric field intensity values ​​of two adjacent aging time points after the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the subsequent evolution rate.

[0050] Considering that before the electrical damage risk point, the pyroelectric accumulation effect is dominant, while after the electrical damage risk point, the defect evolution caused by polarization reversal is dominant, in order to comprehensively reflect the overall trend of electric field intensity changes before and after the electrical damage risk point, the arithmetic mean of the evolution rate of the first stage and the evolution rate of the second stage is calculated as the evolution rate of electric field intensity with aging time. The evolution rate of electric field intensity with aging time reflects the degree of obstruction of domain pinning and domain wall movement during polarization reversal; the higher the evolution rate of electric field intensity with aging time, the more significant the degradation of the wafer's polarization response capability with aging time.

[0051] If the difference between the two selected electric field strength values ​​is zero, it indicates that the electric field strength has not changed between two adjacent aging time points. In this case, the evolution rate of the first or second stage is set to zero, and the evolution rate of the electric field strength value with aging time is zero. A zero evolution rate of the electric field strength value with aging time indicates that the wafer's polarization response capability has not deteriorated with aging time.

[0052] Subsequently, dielectric loss values ​​from multiple aging time points consecutively distributed after the electrical damage risk point are selected from the dielectric sequence. To ensure sufficient data points are included in subsequent fitting, and to avoid introducing interference from irrelevant aging factors far from the electrical damage risk point due to selecting too many points, this invention selects dielectric loss values ​​from four consecutive aging time points consecutively distributed after the electrical damage risk point.

[0053] Based on this, considering that dielectric loss exhibits a continuous and irreversible degradation after the point of electrical damage risk, and its trend shows an approximately linear increase, this invention employs a linear fitting method to solve for the degradation rate of dielectric loss with aging time, so as to accurately reflect the long-term cumulative degradation trend of dielectric loss.

[0054] The linear fitting process involves establishing a univariate linear regression equation based on multiple selected dielectric loss values ​​and corresponding aging times, with aging time as the independent variable and dielectric loss value as the dependent variable. The regression coefficients are then solved using the least squares method to minimize the sum of squared residuals between the measured dielectric loss values ​​at each data point and the predicted values ​​on the regression line. The specific process is existing technology and will not be elaborated upon here.

[0055] The regression coefficients obtained from the fitting are used as the degradation rate of dielectric loss over aging time. The degradation rate of dielectric loss over aging time reflects the degree of energy dissipation during polarization switching. The higher the degradation rate of dielectric loss over aging time, the more energy the wafer consumes during polarization switching, and the more severe the degradation of dielectric properties.

[0056] Subsequently, in order to distinguish the main physical mechanisms of wafer aging failure and provide directional guidance for the subsequent determination of the dominant degradation location, the evolution rate of electric field strength value with aging time and the degradation rate of dielectric loss value were compared to determine the dominant degradation type.

[0057] The stress experienced by lithium tantalate wafers in the concentrated pyroelectric effect region mainly takes two forms: one is the strong electric field generated by the accumulation of pyroelectric charge that hinders polarization reversal (corresponding to polarization damage-type degradation); the other is the fatigue effect of repeated thermal stress caused by the pyroelectric effect on dielectric properties (corresponding to dielectric fatigue-type degradation). Therefore, the dominant degradation types in this invention include polarization damage-type degradation and dielectric fatigue-type degradation.

[0058] The specific rule for determining the dominant degradation type is as follows: when the evolution rate of the electric field strength value is greater than the degradation rate of the dielectric loss value, it indicates that the domain pinning effect dominates during the polarization reversal process, and the wafer aging is mainly manifested as the deterioration of polarization response capability. At this time, the dominant degradation type is determined to be polarization damage type degradation.

[0059] When the rate of evolution of the electric field strength is less than or equal to the rate of degradation of the dielectric loss, it indicates that the polarization damage is not obvious or the dielectric loss is dominant. The wafer aging is mainly manifested as the decline in the dielectric energy dissipation capability. At this time, the dominant degradation type is determined to be dielectric fatigue degradation.

[0060] Step S3: Calculate the low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the pyroelectric effect concentration range of the same wafer.

[0061] Within the aging time range before the start of the pyroelectric effect concentration range, the wafer has not yet experienced the pyroelectric effect concentration range, and its dielectric constant is in a relative reference state. Therefore, the aging time range before the start of the pyroelectric effect concentration range is regarded as the external range.

[0062] Within the aging time range from the start to the end of the pyroelectric effect concentration zone, the wafer is experiencing the pyroelectric effect concentration zone. The dielectric constant is degraded by the strong electric field generated by the accumulation of pyroelectric charge. Therefore, the aging time range from the start to the end of the pyroelectric effect concentration zone is considered as the internal range.

[0063] Then, since low frequencies typically range from 10 Hz to 1000 Hz, and high frequencies typically range from 1 MHz to 500 MHz, to cover the dielectric response characteristics at each frequency point within these bands, six different frequencies—10 Hz, 50 Hz, 100 Hz, 200 Hz, 500 Hz, and 1000 Hz—are selected at logarithmic intervals in the low-frequency band to form a low-frequency test electric field. Simultaneously, six different frequencies—1 MHz, 5 MHz, 10 MHz, 50 MHz, 100 MHz, and 500 MHz—are selected at logarithmic intervals in the high-frequency band to form a high-frequency test electric field.

[0064] The low-frequency range was selected based on the following: space charge and mobile ions in lithium tantalate wafers exhibit a significant dielectric response in the 10Hz to 1000Hz frequency band, which corresponds to the characteristic frequencies of oxygen vacancies and lithium ion vacancies migration under an electric field. The high-frequency range was selected based on the following: the 1MHz to 500MHz frequency band corresponds to the ionic polarization vibration modes of Ta-O bonds in the lithium tantalate lattice, reflecting lattice integrity and polarization response capability. Six frequency points were selected to uniformly cover the aforementioned characteristic frequency bands in the logarithmic frequency band, ensuring that the degradation calculation is sufficiently representative in the frequency domain. The frequency range remains unchanged for lithium tantalate wafers with different doping concentrations.

[0065] Next, an impedance analyzer was used as the measuring device. Externally, the signal output terminal of the impedance analyzer was brought into contact with the measurement point on the wafer surface via a probe. The capacitance value at each frequency was measured using the impedance analyzer. The capacitance value was multiplied by the wafer's surface area and then divided by the wafer thickness to obtain the dielectric constant value (i.e., low-frequency dielectric constant) at the corresponding frequency. The unit of the dielectric constant value is farad per meter. The arithmetic mean of the dielectric constant values ​​measured at all frequencies was calculated as the reference value. Internally, the same measuring device and frequency were used to perform the same operation to obtain the dielectric constant value (i.e., high-frequency dielectric constant) at the corresponding frequency and the reference value.

[0066] The area of ​​the upper surface of the wafer is calculated by multiplying the square of the wafer radius by pi. The wafer radius and wafer thickness are both read from the wafer design drawings.

[0067] For each frequency, the internally measured dielectric constant value is subtracted from the corresponding external reference value. The difference is then divided by the external reference value to obtain the deviation rate. The deviation rates are summed to obtain the low-frequency dielectric constant degradation. The larger the low-frequency dielectric constant degradation, the more severe the dielectric performance degradation near the wafer surface.

[0068] The dielectric constant values ​​were measured using multiple high-frequency test electric fields of different frequencies, both externally and internally. Following the same process used to calculate the low-frequency dielectric constant degradation, the high-frequency dielectric constant degradation was calculated similarly. A larger high-frequency dielectric constant degradation indicates a greater loss in lattice polarization response and more severe degradation of dielectric properties within the wafer.

[0069] Please see Figure 4 Step S4: Determine the dominant degradation location based on the relationship between the low-frequency dielectric constant degradation and the high-frequency dielectric constant degradation, combined with the dominant degradation type.

[0070] Because the low-frequency dielectric constant is easily affected by space charge and mobile ions, and the concentration of space charge and mobile ions near the wafer surface is higher than inside the wafer, the magnitude of low-frequency dielectric constant degradation is related to the degree of degradation in the wafer surface region. The high-frequency dielectric constant is affected by lattice polarization, which corresponds to the dielectric response in the bulk region inside the wafer; therefore, the magnitude of high-frequency dielectric constant degradation is related to the degree of degradation in the wafer's internal region. Based on this, by comparing the magnitudes of low-frequency and high-frequency dielectric constant degradation, the location of wafer aging damage can be pinpointed.

[0071] In practice, if the degradation of the low-frequency dielectric constant is greater than that of the high-frequency dielectric constant, it indicates that the pyroelectric effect has a more significant impact on the region near the wafer surface, and the degradation is concentrated in the wafer surface region. In this case, further determination is made based on the dominant degradation type: when the dominant degradation type is polarization damage, the dominant degradation location is determined to be in the domain region at the electrode interface on the wafer surface; when the dominant degradation type is dielectric fatigue, the dominant degradation location is determined to be in the defect-rich region near the surface of the wafer.

[0072] If the degradation of the low-frequency dielectric constant is less than or equal to the degradation of the high-frequency dielectric constant, it indicates that the pyroelectric effect has a more significant impact on the bulk region inside the wafer, and the degradation is concentrated inside the wafer. In this case, further determination is made based on the dominant degradation type: when the dominant degradation type is polarization damage, the dominant degradation location is determined to be in the domain region of the bulk wafer; when the dominant degradation type is dielectric fatigue, the dominant degradation location is determined to be in the defect accumulation region of the bulk wafer.

[0073] Please see Figure 5Step S5: Based on the electrical damage risk time point, dominant degradation type, and dominant degradation location, output the wafer aging test conclusion.

[0074] In practice, the value of the electrical damage risk point is divided by the total duration of the heating and cooling cycle to obtain a ratio. A ratio of 0.5 corresponds to the midpoint of the heating and cooling cycle.

[0075] When the ratio is less than or equal to 0.5, it indicates that the risk of electrical damage occurs in the first half of the temperature rise and fall cycle, and the risk level at this time is determined to be high. When the ratio is greater than 0.5, it indicates that the risk of electrical damage occurs in the second half of the temperature rise and fall cycle, and the risk level at this time is determined to be low.

[0076] Then, the type risk level is determined based on the dominant degradation type. Specifically: when the dominant degradation type is polarization damage type degradation, the type risk level is determined to be high risk; when the dominant degradation type is dielectric fatigue type degradation, the type risk level is determined to be low risk.

[0077] Among them, polarization damage-type degradation corresponds to a sharp deterioration in polarization switching capability, which has a more direct and severe impact on the device performance of the wafer. Therefore, the corresponding risk level is set to high risk level.

[0078] Simultaneously, the location risk level is determined based on the dominant degradation location. Specifically: when the dominant degradation location is located on the wafer surface, the location risk level is determined to be high-risk; when the dominant degradation location is located inside the wafer, the location risk level is determined to be low-risk.

[0079] Among them, since surface degradation can be repaired or improved to a certain extent through electrode interfaces and surface treatment, while internal bulk degradation involves irreversible damage to lattice and bulk defects, the risk level of the corresponding location is set as high risk level.

[0080] Subsequently, the overall aging risk level is determined based on the number of high-risk levels. Specifically, the number of high-risk levels among the point-in-time risk level, type risk level, and location risk level is counted. When there are three high-risk levels, the overall aging risk level is Level 1, representing the highest risk level. This indicates that the wafer is in the most unfavorable state in terms of pyroelectric effect sensitivity, severity of degradation mechanism, and repairability of degradation location, and the wafer has the highest risk of device performance failure.

[0081] When there are two high-risk levels, the overall aging risk level is level two, representing a high-risk level. When there is one high-risk level, the overall aging risk level is level three, representing a medium-risk level. When there are zero high-risk levels, the overall aging risk level is level four, representing the lowest-risk level.

[0082] When the overall aging risk level is Level 1 or Level 2, it means that the wafer is in a high-risk state in at least two of the time-based risk level, type-based risk level, and location-based risk level, and the long-term reliability of the wafer devices can no longer be guaranteed.

[0083] Subsequently, the wafer aging test conclusion is formed by comprehensively considering the aging risk level, the corresponding electrical damage risk time point, the dominant degradation type, and the dominant degradation location. The wafer aging test conclusion is then used to generate an aging assessment report according to the alarm information data format defined by the test platform. The aging assessment report is then transmitted to the test platform's database for storage via wired or wireless communication.

[0084] Meanwhile, wafers with a comprehensive aging risk level of Level 1 or 2 are marked as non-conforming products, and an alarm is triggered to notify the testing personnel to take appropriate measures. When the comprehensive aging risk level is Level 3 or below, only monitoring data needs to be recorded, and no alarm needs to be triggered.

[0085] The measures include, but are not limited to: removing defective products from the production line and adjusting the subsequent aging process parameters for wafers in the same batch.

[0086] The present invention also provides a lithium tantalate wafer aging test system, comprising: a time-position determination module, used to determine the temperature change range in which the temperature change rate reaches its peak and the time point in which the charge accumulation reaches its peak based on the time-series correspondence between the real-time temperature change rate and the surface charge accumulation during the aging temperature cycle of the wafer; marking the time point as the electrical damage risk time point and marking the temperature change range as the pyroelectric effect concentration range.

[0087] The degradation analysis module is used to calculate and compare the electric field strength value and dielectric loss value measured when the polarization reversal electric field is applied before and after the electrical damage risk point, and thereby determine the dominant degradation type.

[0088] The process of calculating the evolution rate of electric field strength value with aging time and the degradation rate of dielectric loss value is as follows: multiple aging time points are selected before and after the electrical damage risk point. A polarization reversal electric field is applied to the wafer at each selected aging time point, and the electric field strength value measured at each aging time point is recorded. The electric field strength values ​​are arranged in chronological order of aging time to form an intensity sequence. The electric field strength values ​​of two adjacent aging time points before the electrical damage risk point are selected from the intensity sequence, and the ratio of the difference between the two selected electric field strength values ​​to the difference in aging time is calculated as the evolution rate of the first stage.

[0089] The electric field intensity values ​​of two adjacent aging time points after the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the evolution rate of the latter stage. The average of the evolution rate of the former stage and the evolution rate of the latter stage is taken as the evolution rate of the electric field intensity value with aging time.

[0090] The electric field strength value and dielectric loss value are recorded at each aging time point. The dielectric loss values ​​are arranged in chronological order of aging time to form a dielectric sequence. The dielectric loss values ​​of multiple aging time points continuously distributed after the electrical damage risk point are selected from the dielectric sequence. The selected multiple dielectric loss values ​​are linearly fitted with the corresponding aging time. The regression coefficients obtained from the fitting are used as the degradation rate of dielectric loss value with aging time.

[0091] The process of determining the dominant degradation type is as follows: compare the rate of evolution of electric field strength with aging time with the rate of degradation of dielectric loss to determine the dominant degradation type; the dominant degradation type includes polarization damage type degradation and dielectric fatigue type degradation.

[0092] The degradation calculation module is used to calculate the low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the pyroelectric effect concentration range of the same wafer.

[0093] The location determination module is used to determine the dominant degradation location based on the relationship between the low-frequency dielectric constant degradation and the high-frequency dielectric constant degradation, combined with the dominant degradation type.

[0094] The conclusion generation module is used to output wafer aging test conclusions based on the electrical damage risk time point, dominant degradation type, and dominant degradation location.

[0095] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented in software, the above embodiments can be implemented, in whole or in part, as a computer program product.

[0096] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0097] In addition, the functional modules in the various embodiments of the present invention can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0098] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

[0099] Finally, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for testing the aging of lithium tantalate wafers, characterized in that, Includes the following steps: Based on the temporal correspondence between the real-time temperature change rate and surface charge accumulation during the aging temperature cycle of the wafer, the temperature change range in which the temperature change rate reaches its peak and the time point in which the charge accumulation reaches its peak are determined; the time point is marked as the time point of electrical damage risk, and the temperature change range is marked as the pyroelectric effect concentration range; Based on the electric field strength and dielectric loss values ​​measured before and after the polarization reversal electric field is applied at the time point of electrical damage risk, the evolution rate of the electric field strength value with aging time and the degradation rate of the dielectric loss value are calculated and compared, and the dominant degradation type is determined accordingly. The process of calculating the evolution rate of electric field strength value with aging time and the degradation rate of dielectric loss value is as follows: multiple aging time points are selected before and after the electrical damage risk point. A polarization reversal electric field is applied to the wafer at each selected aging time point, and the electric field strength value measured at each aging time point is recorded. The electric field strength values ​​are arranged in chronological order of aging time to form an intensity sequence. The electric field strength values ​​of two adjacent aging time points before the electrical damage risk point are selected from the intensity sequence, and the ratio of the difference between the two selected electric field strength values ​​to the difference in aging time is calculated as the evolution rate of the first stage. The electric field intensity values ​​of the two aging time points adjacent to the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the evolution rate of the latter stage. The average of the evolution rate of the former stage and the evolution rate of the latter stage is taken as the evolution rate of the electric field intensity value with aging time. The electric field strength value and dielectric loss value are recorded at each aging time point. The dielectric loss values ​​are arranged in chronological order of aging time to form a dielectric sequence. The dielectric loss values ​​of multiple aging time points continuously distributed after the electrical damage risk point are selected from the dielectric sequence. The selected multiple dielectric loss values ​​are linearly fitted with the corresponding aging time. The regression coefficient obtained by fitting is used as the degradation rate of dielectric loss value with aging time. The process of determining the dominant degradation type is as follows: compare the rate of evolution of electric field strength with aging time with the rate of degradation of dielectric loss to determine the dominant degradation type; the dominant degradation types include polarization damage type degradation and dielectric fatigue type degradation; Calculate the low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the pyroelectric effect concentration region of the same wafer; Based on the relationship between the low-frequency dielectric constant degradation and the high-frequency dielectric constant degradation, the dominant degradation location is determined in conjunction with the dominant degradation type. Based on the electrical damage risk time point, dominant degradation type, and dominant degradation location, the wafer aging test conclusion is output.

2. The lithium tantalate wafer aging test method according to claim 1, characterized in that, The process of establishing the temporal correspondence is as follows: During each heating and cooling cycle of the aging temperature cycle, transient temperature values ​​and transient surface potential values ​​at multiple measurement points on the wafer surface are continuously collected; For each measurement point, the first derivative of the transient temperature value with respect to aging time is obtained to get the time series sequence of the temperature change rate of each measurement point; the first derivative of the transient surface potential value with respect to aging time is obtained to get the time series sequence of the charge accumulation rate of each measurement point. By aligning the time series of temperature change rate and charge accumulation rate at the same measurement point with the aging time axis, the time series correspondence of each measurement point is obtained.

3. The lithium tantalate wafer aging test method according to claim 2, characterized in that, The process for determining the temperature variation range is as follows: The aging time corresponding to the maximum point on the charge accumulation rate time series is used as the reference time. Starting from the reference time, the values ​​of two adjacent aging times on the time sequence of temperature change rate are compared point by point forward and backward along the aging time axis, and the start and end times are determined based on the comparison results. The candidate temperature change range for each measurement point is defined by the start time and the end time. From the candidate temperature change ranges of all measurement points on the same wafer, the earliest start time is taken as the common start time and the latest end time is taken as the common end time. The temperature change range is formed by the common start time and the common end time.

4. The lithium tantalate wafer aging test method according to claim 2, characterized in that, The process for determining the point at which the charge accumulation reaches its peak is as follows: In the time series of charge accumulation rate at each measurement point, the aging time corresponding to the maximum value point is taken as the peak value time of charge accumulation. The latest occurrence of the charge accumulation peak at all measurement points on the same wafer is selected as the reference point. Using the reference time point as the boundary, all measurement points are divided into a set that reaches the peak value earlier than the reference time point and a set that reaches the peak value later than the reference time point; Calculate the average values ​​of the peak charge accumulation times at the measurement points in the two sets to obtain the first and second average times. The midpoint between the first and second average time points is calculated as the point at which the charge accumulation reaches its peak.

5. The lithium tantalate wafer aging test method according to claim 1, characterized in that, The calculation process for low-frequency dielectric constant degradation and high-frequency dielectric constant degradation is as follows: The aging time range before the start of the pyroelectric effect concentration interval is considered as the outer region; the aging time range between the start and end of the pyroelectric effect concentration interval is considered as the inner region. The dielectric constant was measured using multiple low-frequency test electric fields at different frequencies, both externally and internally. The average value of the dielectric constant measured at all frequencies was used as the reference value. Calculate the deviation rate of the dielectric constant value relative to the reference value at each frequency, and sum the deviation rates to obtain the low-frequency dielectric constant degradation. The dielectric constant values ​​were measured using multiple high-frequency test electric fields of different frequencies, both externally and internally. The high-frequency dielectric constant degradation was calculated similarly, following the same process used to obtain the low-frequency dielectric constant degradation.

6. The lithium tantalate wafer aging test method according to claim 1, characterized in that, The process of determining the dominant degradation location is as follows: If the degradation of the low-frequency dielectric constant is greater than that of the high-frequency dielectric constant, the dominant degradation location is determined to be on the wafer surface based on the dominant degradation type. If the degradation of the low-frequency dielectric constant is less than or equal to the degradation of the high-frequency dielectric constant, the dominant degradation location is determined to be inside the wafer based on the dominant degradation type.

7. The lithium tantalate wafer aging test method according to claim 2, characterized in that, The process of obtaining the wafer aging test results is as follows: Divide the value of the electrical damage risk point by the value of the total duration of the heating and cooling cycle to obtain the ratio; determine the risk level of the point in time based on the ratio. Determine the risk level of the type based on the dominant degradation type; Determine the location risk level based on the dominant degradation location; The overall aging risk level of the wafer is obtained by superimposing the risk level at a specific time, the risk level based on the type of risk, and the risk level based on the location. The conclusion of wafer aging test is composed of the comprehensive aging risk level, the corresponding electrical damage risk time point, the dominant degradation type, and the dominant degradation location.

8. A lithium tantalate wafer aging test system, characterized in that, include: The timing determination module is used to determine the temperature range in which the temperature change rate reaches its peak and the time point in which the charge accumulation reaches its peak, based on the temporal correspondence between the real-time temperature change rate and the surface charge accumulation during the aging temperature cycle of the wafer; the time point is marked as the time point of electrical damage risk, and the temperature change range is marked as the pyroelectric effect concentration range; The degradation analysis module is used to calculate and compare the electric field strength value and dielectric loss value measured before and after the polarization reversal electric field is applied, based on the electric field strength value and dielectric loss value before and after the electrical damage risk point, and thereby determine the dominant degradation type. The process of calculating the evolution rate of electric field strength value with aging time and the degradation rate of dielectric loss value is as follows: multiple aging time points are selected before and after the electrical damage risk point. A polarization reversal electric field is applied to the wafer at each selected aging time point, and the electric field strength value measured at each aging time point is recorded. The electric field strength values ​​are arranged in chronological order of aging time to form an intensity sequence. The electric field strength values ​​of two adjacent aging time points before the electrical damage risk point are selected from the intensity sequence, and the ratio of the difference between the two selected electric field strength values ​​to the difference in aging time is calculated as the evolution rate of the first stage. The electric field intensity values ​​of the two aging time points adjacent to the electrical damage risk point are selected from the intensity sequence. The ratio of the difference between the two selected electric field intensity values ​​to the difference in aging time is calculated as the evolution rate of the latter stage. The average of the evolution rate of the former stage and the evolution rate of the latter stage is taken as the evolution rate of the electric field intensity value with aging time. The electric field strength value and dielectric loss value are recorded at each aging time point. The dielectric loss values ​​are arranged in chronological order of aging time to form a dielectric sequence. The dielectric loss values ​​of multiple aging time points continuously distributed after the electrical damage risk point are selected from the dielectric sequence. The selected multiple dielectric loss values ​​are linearly fitted with the corresponding aging time. The regression coefficient obtained by fitting is used as the degradation rate of dielectric loss value with aging time. The process of determining the dominant degradation type is as follows: compare the rate of evolution of electric field strength with aging time with the rate of degradation of dielectric loss to determine the dominant degradation type; the dominant degradation types include polarization damage type degradation and dielectric fatigue type degradation; The degradation calculation module is used to calculate the low-frequency dielectric constant degradation and high-frequency dielectric constant degradation measured inside and outside the pyroelectric effect concentration range of the same wafer; The location determination module is used to determine the dominant degradation location based on the relationship between the low-frequency dielectric constant degradation and the high-frequency dielectric constant degradation, combined with the dominant degradation type. The conclusion generation module is used to output wafer aging test conclusions based on the electrical damage risk time point, dominant degradation type, and dominant degradation location.

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