Power adaptive control method of megasonic generator based on load impedance monitoring

Abstract

The application provides a megasonic generator power adaptive control method based on load impedance monitoring, relates to the technical field of megasonic generators and comprises the following steps: a drive adjustable DC source outputs an initial bus voltage while outputting a square wave signal consistent with a megasonic fundamental wave frequency; fixed suppression of high-order harmonics is completed; current load impedance and a phase difference are calculated, and parameters of a post-stage adjustable parameter multi-stage LC matching circuit are adjusted; dynamic load impedance, a phase difference, a power reflection coefficient and a reflected power ratio are calculated; parameters of the post-stage adjustable parameter multi-stage LC matching circuit are adjusted; and output power is adjusted to an actual target output power. The application establishes a system reference impedance through no-load static calibration, suppresses main low-order harmonics by using a front-stage fixed LC trap circuit, realizes dynamic impedance matching and residual harmonic suppression in combination with a post-stage adjustable LC matching circuit, and finally realizes adaptive adjustment of output power through a double-mode cooperative strategy of bus voltage coarse adjustment plus duty cycle fine adjustment.

Description

Technical Field

[0001] This invention relates to the field of megasonic wave generator technology, and in particular to a power adaptive control method for megasonic wave generators based on load impedance monitoring. Background Technology

[0002] With the surge in demand for nanoscale non-destructive high-precision cleaning in precision manufacturing fields such as semiconductors, MEMS, and high-end optoelectronics, traditional 20kHz-100kHz low-frequency ultrasonic cleaning is unable to meet the requirements of advanced processes due to the excessive energy of cavitation bubbles, which can easily damage precision microstructures and cannot effectively remove submicron-sized contaminant particles. Megasonic cleaning technology, which operates in the 350kHz-3MHz frequency band, has become an indispensable key process in the industry due to its gentle microbubble cavitation and stable acoustic flow effect near the wall. The megasonic generator, which is the core control and drive unit, is mainly responsible for converting industrial power frequency power into a high-frequency power signal that matches the transducer. The mainstream approach is to use a self-excited DDS signal source combined with power amplification, impedance matching, and state feedback control architecture.

[0003] Typical megasonic generators use a single adjustment method for power control, which cannot simultaneously achieve rapid coarse adjustment and precise fine adjustment. Open-loop control does not consider the impact of load impedance on the actual effective power, and is prone to large power overshoot or drop when the load changes abruptly. Summary of the Invention

[0004] This invention provides a power adaptive control method for megasonic generators based on load impedance monitoring, which solves the defect in the open-loop power control of megasonic generators in the prior art that does not consider the influence of load impedance on the actual effective power.

[0005] On one hand, the present invention provides a power adaptive control method for a megasonic generator based on load impedance monitoring, comprising: S1: Load the preset megason fundamental frequency, target cleaning power, allowable impedance drift range and total harmonic distortion threshold, and perform system self-test and no-load static calibration; S2: Start the cleaning process, call the target cleaning power and total harmonic distortion threshold according to the preset cleaning mode, drive the adjustable DC source to output the initial bus voltage, and output a square wave signal with the same frequency as the mega-sound fundamental wave. S3: Input the square wave signal into the pre-stage fixed parameter multi-stage LC matching circuit to complete the fixed suppression of the 3rd, 5th and 7th higher harmonics, and output the signal after preliminary filtering. S4: Collect the fundamental voltage and fundamental current at the output of the adjustable multi-stage LC matching circuit, calculate the current load impedance and phase difference, adjust the parameters of the adjustable multi-stage LC matching circuit to complete the initial impedance matching. S5: Based on the fundamental voltage and fundamental current, calculate the dynamic load impedance, phase difference, power reflection coefficient and reflected power ratio, and simultaneously collect the total content of the remaining 9th and above higher harmonics. S6: When the total content of higher harmonics exceeds the total harmonic distortion threshold or the reflection power ratio exceeds the preset threshold, adjust the parameters of the subsequent adjustable multi-stage LC matching circuit until the total content of higher harmonics and the reflection power ratio both meet the requirements. S7: Calculate the actual target output power based on the current dynamic load impedance, and adopt a dual-mode collaborative strategy of coarse adjustment of adjustable DC source bus voltage and fine adjustment of power transistor duty cycle to adjust the output power to the actual target output power.

[0006] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S1, the step of performing no-load static calibration includes: S11: Disconnect the load of the megasonic transducer and drive the power tube amplifier module to output a low-power fundamental signal; S12: Detect the open-circuit voltage and current at the output of the adjustable multi-stage LC matching circuit and calculate the system's no-load reference impedance; S13: Fine-tune the initial parameters of the adjustable multi-stage LC matching circuit to ensure that the fundamental impedance matching degree reaches the preset standard under no-load conditions, and record the calibrated initial parameters as the reference value.

[0007] According to the megasonic generator power adaptive control method based on load impedance monitoring provided by the present invention, in step S12, the calculation formula for the system no-load reference impedance is expressed as follows:

[0008] In the formula, The system's unloaded reference impedance; The effective value of the fundamental open-circuit voltage at the output of the adjustable parameter multi-stage LC matching circuit under no-load conditions; This represents the effective value of the fundamental no-load current at the output of the multi-stage LC matching circuit with adjustable parameters under no-load conditions.

[0009] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S2, the step of outputting a square wave signal with the fundamental frequency of the megasonic wave includes: S21: Generate a PWM drive signal with the same frequency as the preset mega-sound fundamental frequency; S22: Input the PWM drive signal into the power transistor drive circuit to precisely control the switching timing and conduction duration of the power transistor; S23: Enables the power transistor to output a square wave signal with the same frequency and similar waveform characteristics as the original high-frequency signal.

[0010] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S3, the step of fixed suppression of higher harmonics includes: S31: Input the square wave signal output by the power transistor into the input terminal of the pre-amplifier fixed-parameter multi-stage LC matching circuit; S32: The square wave signal first flows through the first-stage fixed-parameter LC parallel notch filter branch. The inductance and capacitance parameters of the first-stage notch filter branch are pre-calibrated to a resonant frequency equal to 3 times the fundamental frequency of the mega-sound wave. The high impedance characteristics of the parallel LC circuit at the resonant frequency are used to reflect the energy of the 3rd higher harmonic back to the power transistor side. S33: The signal after the first stage of filtering is input into the second stage fixed parameter LC parallel notch branch. The resonant frequency of the second stage notch branch is pre-calibrated to 5 times the fundamental frequency of the mega-sound wave, and the 5th higher harmonics, which account for the second largest proportion of the signal, are filtered out. S34: The signal after the second stage of filtering is input into the third stage fixed parameter LC parallel notch branch. The resonant frequency of the third stage notch branch is pre-calibrated to 7 times the fundamental frequency of the mega-sound wave to filter out the 7th higher harmonic in the signal. S35: After processing by a three-stage series fixed notch filter branch, the output is a pre-filtered sinusoidal fundamental signal.

[0011] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S4, the step of fixed suppression of higher harmonics includes: S41: Determine whether the current load impedance is within the allowable impedance drift range and whether the absolute value of the phase difference is less than or equal to the first preset threshold. S42: If not satisfied, adjust the capacitor array parameters of the subsequent adjustable multi-stage LC matching circuit according to the preset step size so that the load impedance gradually falls into the allowable range. S43: Keep the capacitor array parameters unchanged, adjust the inductor array parameters of the subsequent adjustable multi-stage LC matching circuit by a preset step size, so that the absolute value of the phase difference is less than or equal to the second preset threshold. S44: Repeat steps S41 to S43 until the load impedance and phase difference meet the requirements, thus completing the initial impedance matching.

[0012] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S41, the step of determining whether the current load impedance is within the allowable impedance drift range, includes: S411: Calculate the magnitude of the current load impedance based on the collected effective values ​​of the fundamental voltage and fundamental current; S412: Calculate the difference between the current load impedance magnitude and the system no-load reference impedance to obtain the impedance deviation value; S413: Calculate the ratio of the impedance deviation value to the system no-load reference impedance to obtain the impedance drift rate; S414: Determine whether the impedance drift rate is less than or equal to the preset allowable impedance drift rate threshold. If yes, determine that the current load impedance is within the allowable impedance drift range; otherwise, determine that it exceeds the allowable range.

[0013] According to the megasonic generator power adaptive control method based on load impedance monitoring provided by the present invention, in step S5, the formula for calculating the reflection power ratio is expressed as follows:

[0014]

[0015] In the formula, The reflected power ratio, The power reflection coefficient, This represents the complex value of the current dynamic load impedance. This is the system's unloaded reference impedance.

[0016] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S7, the step of dual-mode cooperative strategy for coordinated power adjustment includes: S71: Calculate the actual target output power based on the current dynamic load impedance and the system no-load reference impedance; S72: When the power deviation between the actual output power and the actual target output power is greater than the preset range of the rated power, adjust the output bus voltage of the adjustable DC source to make the output power equal to the actual target output power. S73: When the difference between the actual output power and the actual target output power is less than or equal to the preset range of the rated power, keep the output bus voltage of the adjustable DC source unchanged and adjust the duty cycle of the power transistor. S74: During the adjustment process, the frequency of the power transistor output signal is always kept strictly synchronized with the fundamental frequency of the mega-sound wave.

[0017] According to the power adaptive control method for megasonic wave generator based on load impedance monitoring provided by the present invention, step S73, the step of adjusting the duty cycle of the power transistor includes: S731: Determine the duty cycle adjustment direction based on the sign of the power deviation value, and determine the duty cycle adjustment step size based on the magnitude of the power deviation value; S732: Adjust the duty cycle of the power transistor in a single adjustment according to the adjustment direction and adjustment step size, keep the switching frequency of the power transistor strictly consistent with the fundamental frequency of the megason, and ensure that the duty cycle does not exceed the preset safe duty cycle range after a single adjustment. S733: After waiting for a complete sampling cycle, re-acquire the fundamental voltage RMS value, fundamental current RMS value, total content of higher harmonics and power reflection coefficient, and calculate the updated actual output power; S734: Determine whether the total content of the updated higher harmonics exceeds the total harmonic distortion threshold and whether the reflection power ratio exceeds the preset threshold. S735: If the total content of higher harmonics or the reflected power ratio exceeds the standard, roll back the current duty cycle adjustment operation, restore the duty cycle to the value before adjustment, and reduce the adjustment step size to the preset micro-adjustment step size before re-executing the adjustment. S736: If the total content of higher harmonics and the reflected power ratio both meet the requirements, then determine whether the difference between the updated actual output power and the actual target output power is less than or equal to the preset power accuracy threshold. S737: If the power deviation is greater than the preset power accuracy threshold, repeat steps S731 to S736 until the power deviation meets the accuracy requirements; if the power deviation is less than or equal to the preset power accuracy threshold, lock the current power transistor duty cycle and enter the power steady-state monitoring mode.

[0018] This invention provides a power adaptive control method for megasonic generators based on load impedance monitoring. It establishes the system reference impedance through no-load static calibration, employs a fixed LC notch filter circuit in the front stage to suppress major low-order harmonics, and combines this with an adjustable LC matching circuit in the rear stage to achieve dynamic impedance matching and residual harmonic suppression. Finally, it achieves adaptive adjustment of output power through a dual-mode collaborative strategy of coarse adjustment of bus voltage and fine adjustment of duty cycle. This method can track the dynamic changes in load impedance in real time during the cleaning process, effectively reducing power reflection and harmonic distortion, improving the uniformity and stability of megasonic cleaning, and extending the service life of power transistors and transducers. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is a flowchart of the power adaptive control method for a megasonic wave generator based on load impedance monitoring provided in an embodiment of the present invention; Figure 2 This is a flowchart illustrating the fixed suppression of higher harmonics in an embodiment of the present invention; Figure 3 This is a flowchart of the dual-mode cooperative strategy for cooperative power adjustment in an embodiment of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention. Example

[0022] The following is combined with Figures 1-3 The present invention describes a power adaptive control method for megasonic wave generators based on load impedance monitoring.

[0023] like Figures 1-3 As shown in the embodiment of the present invention, the power adaptive control method for a megasonic generator based on load impedance monitoring includes: S1: Load the preset megason fundamental frequency, target cleaning power, allowable impedance drift range, and total harmonic distortion threshold, and perform system self-test and no-load static calibration. The steps include: S11: Disconnect the load of the megasonic transducer and drive the power transistor amplifier module to output a low-power fundamental signal. Disconnect the physical connection between the megasonic transducer and the output of the subsequent adjustable parameter multi-stage LC matching circuit, so that the system is in a completely open-circuit state. Control the adjustable DC source to output 5%~10% of the rated bus voltage as a calibration voltage, and drive the power transistor amplifier module to output a low-power fundamental signal with a power not exceeding 2% of the rated power to avoid damage to the power transistors due to overvoltage or overcurrent under no-load conditions.

[0024] S12: Detect the open-circuit voltage and current at the output of the adjustable multi-stage LC matching circuit and calculate the system's no-load reference impedance. This involves synchronously acquiring the instantaneous voltage and current signals at the output of the adjustable multi-stage LC matching circuit using high-precision voltage and current transformers. The sampling frequency is set to at least 16 times the fundamental frequency of the megason, with at least 16 sampling points acquired per fundamental cycle. A Fast Fourier Transform (FFT) is performed on the acquired instantaneous signals to extract the amplitude and phase of the fundamental component, and the effective values ​​of the fundamental voltage and current are calculated. The formulas are as follows:

[0025]

[0026]

[0027] In the formula, This is the system's no-load reference impedance, used to characterize the electrical reference of the system in the open-circuit state. This represents the effective value of the fundamental open-circuit voltage at the output of the adjustable multi-stage LC matching circuit under no-load conditions. This represents the effective value of the fundamental no-load current at the output of the multi-stage LC matching circuit with adjustable parameters under no-load conditions. The value of the fundamental frequency of the no-load output voltage is given by , and T is the period of the fundamental frequency of the megason. This represents the fundamental instantaneous value of the no-load output current.

[0028] S13: Fine-tune the initial parameters of the adjustable multi-stage LC matching circuit to ensure that the fundamental impedance matching degree under no-load conditions reaches the preset standard, i.e., matching degree ≥ 95%. The formula for calculating the fundamental impedance matching degree M is:

[0029] In the formula, The nominal impedance is designed for the system.

[0030] The parameters of the first-stage capacitor array, first-stage inductor array, second-stage capacitor array, and second-stage inductor array of the multi-stage adjustable parameter LC matching circuit are adjusted sequentially. The no-load reference impedance is recalculated after each adjustment until the matching degree meets the requirements. The initial parameters after calibration are recorded as reference values, including the values ​​of each stage of capacitance and inductance. After calibration, the reference values ​​are written to non-volatile memory, which is automatically recalled upon each system power-on. If the matching degree is below 90% for three consecutive calibrations, a system fault alarm is triggered, and the cleaning process is prohibited from starting.

[0031] After completing the open-circuit calibration, connect the standard calibration load and repeat the voltage and current sampling and FFT processing in S12 to calculate the system characteristic impedance reference value. ,in , The fundamental voltage and current RMS values ​​under standard load are used; Z0 obtained from open-circuit calibration is used only as a reference anchor point for impedance drift rate and is not included in the calculation of reflection coefficient and power compensation.

[0032] S2: Initiate the cleaning process, selecting the target cleaning power and total harmonic distortion (THD) threshold according to the preset cleaning mode. The preset cleaning modes include Fine Cleaning Mode, Standard Cleaning Mode, and Powerful Cleaning Mode. Different modes correspond to different target cleaning power, THD thresholds, and allowable impedance drift ranges. Fine Cleaning Mode is suitable for low power and low THD requirements; Powerful Cleaning Mode is suitable for high power and higher THD tolerance. The core parameter relationships for the three cleaning modes are as follows: Fine cleaning mode: Target cleaning power ∈[10%P_r,30%P_r], Total Harmonic Distortion Threshold (i.e., distortion rate of 9th and above harmonics) THD_max≤3%, Allowable Impedance Drift Rate η_max≤5%; Standard cleaning mode: ∈[30%P_r,70%P_r], THD_max≤5%, η_max≤10%; Powerful cleaning mode: ∈[70%P_r,100%P_r], THD_max≤8%, η_max≤15%; where P_r is the rated output power of the megasonic generator.

[0033] The steps include driving an adjustable DC source to output the initial bus voltage and simultaneously outputting a square wave signal with the same frequency as the fundamental frequency of megaacoustic waves, as follows: S21: Two complementary and symmetrical PWM drive signals are generated by a digital signal processor (DSP) or field programmable gate array (FPGA). The signal frequency is completely consistent with the preset mega-sound fundamental frequency. The initial duty cycle is set to 50%, and the dead time is set to 1.5 to 2 times the switching time of the power transistor to prevent shoot-through of the upper and lower bridge arms.

[0034] S22: Inputs the PWM drive signal to the power transistor drive circuit to precisely control the switching timing and conduction duration of the power transistor. The power transistor drive circuit uses an isolated gate driver chip to amplify the PWM drive signal to the required drive voltage amplitude of the power transistor gate (typically 12V~15V) and provide sufficient drive current to ensure rapid turn-on and turn-off of the power transistor.

[0035] S23: Enables the power transistor to output a square wave signal with the same frequency and similar waveform characteristics as the original high-frequency signal. The power transistor operates in switching mode, inverting the DC bus voltage output from the adjustable DC source into a square wave voltage signal with a preset mega-sound fundamental frequency. The amplitude of the output square wave is approximately equal to the DC bus voltage, and the duty cycle is consistent with the duty cycle of the PWM drive signal.

[0036] S3: Input the square wave signal into the pre-stage fixed-parameter multi-stage LC matching circuit to achieve fixed suppression of the 3rd, 5th, and 7th higher harmonics, and output the pre-filtered signal. The function of the pre-stage fixed-parameter multi-stage LC matching circuit is to pre-filter out the lower and higher harmonics with the highest energy proportion in the square wave signal, reduce the harmonic processing pressure of the subsequent adjustable matching circuit, and improve the overall efficiency of the system.

[0037] The steps for fixed suppression of higher harmonics include: S31: Input the square wave signal output by the power transistor into the input terminal of the pre-amplifier fixed-parameter multi-stage LC matching circuit; S32: The square wave signal first flows through the first-stage fixed-parameter LC parallel notch filter branch. The inductance and capacitance parameters of the first-stage notch filter branch are pre-calibrated to a resonant frequency equal to three times the fundamental frequency of megahertz. Utilizing the high impedance characteristics of the parallel LC circuit at the resonant frequency, the energy of the third harmonic is reflected back to the power transistor side. The resonant frequency f_n of each notch filter branch is calculated using the following formula:

[0038] Where n is the harmonic order, taking values ​​of 3, 5, and 7; The inductance value of the nth harmonic notch branch is expressed in ohms (H). The capacitance value of the nth harmonic notch filter branch, in F. The quality factor of the notch filter branch. The value range is 20~30. ,in For inductance The series equivalent resistance.

[0039] S33: The signal after the first stage of filtering is input into the second stage fixed parameter LC parallel notch branch. The resonant frequency of the second stage notch branch is pre-calibrated to 5 times the fundamental frequency of the mega-sound wave, and the 5th higher harmonics, which account for the second largest proportion of the signal, are filtered out. S34: The signal after the second stage of filtering is input into the third stage fixed parameter LC parallel notch branch. The resonant frequency of the third stage notch branch is pre-calibrated to 7 times the fundamental frequency of the mega-sound wave to filter out the 7th higher harmonic in the signal. S35: After processing by a three-stage series fixed notch filter branch, the output is a pre-filtered sinusoidal fundamental signal. The harmonic suppression efficiency requirements of the three-stage notch filter branch are: 3rd harmonic suppression ≥40dB, 5th harmonic suppression ≥35dB, 7th harmonic suppression ≥30dB, and the total content of the 9th and higher harmonics of the processed signal ≤10%.

[0040] S4: Acquire the fundamental voltage and fundamental current at the output of the adjustable multi-stage LC matching circuit, calculate the current load impedance and phase difference, adjust the parameters of the adjustable multi-stage LC matching circuit to complete the initial impedance matching. The steps include: S41: Determine whether the current load impedance is within the allowable impedance drift range and whether the absolute value of the phase difference is less than or equal to the first preset threshold, which is 10°.

[0041] The steps to determine whether the current load impedance is within the allowable impedance drift range include: S411: Calculate the magnitude of the current load impedance based on the acquired RMS values ​​of the fundamental voltage and fundamental current. (Complex value of the current load impedance) ,in This represents the real part of the load impedance, i.e., the resistive component. The imaginary part of the load impedance, i.e., the reactance component; the magnitude of the load impedance. Phase difference .

[0042] S412: Calculate the difference between the current load impedance magnitude and the system no-load reference impedance to obtain the impedance deviation value. .

[0043] S413: Calculate the ratio of the impedance deviation value to the system no-load reference impedance to obtain the impedance drift rate. .

[0044] S414: Determine whether the impedance drift rate is less than or equal to the preset allowable impedance drift rate threshold. If yes, determine that the current load impedance is within the allowable impedance drift range. If no, determine that it exceeds the allowable range.

[0045] S42: If not satisfied, adjust the capacitor array parameters of the subsequent adjustable multi-stage LC matching circuit according to the preset step size, so that the load impedance gradually falls into the allowable range. The capacitor array adopts 8-bit binary digital control, with an adjustment step size ΔC=0.1pF and a total adjustment range of 0~25.5pF; after each adjustment, wait for 1 sampling period T. s =10ms, then recalculate the load impedance.

[0046] S43: Keeping the capacitor array parameters unchanged, adjust the inductor array parameters of the subsequent adjustable multi-stage LC matching circuit by a preset step size, so that the absolute value of the phase difference is less than or equal to the second preset threshold, which is 5°. The inductor array uses 6-bit binary digital control, with an adjustment step size ΔL = 0.01μH and a total adjustment range of 0~0.63μH; wait for one sampling period T after each adjustment. s Then recalculate the phase difference.

[0047] S44: Repeat steps S41 to S43 until the load impedance and phase difference meet the requirements, completing the initial impedance matching. If the requirements are still not met after 50 consecutive adjustments, an impedance matching failure alarm will be triggered, the cleaning process will be stopped, and a prompt will be made to check the transducer and connection lines.

[0048] S5: Based on the fundamental voltage and fundamental current, calculate the dynamic load impedance, phase difference, power reflection coefficient and reflected power ratio, and simultaneously collect the total content of the remaining 9th and above higher harmonics.

[0049] The formula for calculating the power reflection coefficient is as follows:

[0050]

[0051] In the formula, is the power reflection coefficient, is the complex value of the current dynamic load impedance, is the no-load reference impedance of the system, is the reflected power ratio. The calculation formula for the total content of 9th and higher order harmonics, that is, total harmonic distortion THD, is expressed as:

[0052] In the formula, is the root-mean-square value of the nth harmonic voltage, n≥9; is the root-mean-square value of the fundamental voltage.

[0053] S6: when the total content of higher-order harmonics exceeds the total harmonic distortion threshold or the reflected power ratio exceeds the preset threshold, adjust the parameters of the post-stage multi-stage LC matching circuit with adjustable parameters until both the total content of higher-order harmonics and the reflected power ratio meet the requirements. The steps include: S61: target at reducing the total content of higher-order harmonics below the total harmonic distortion threshold, adjust the capacitance array parameters of the post-stage multi-stage LC matching circuit with adjustable parameters. When THD-THD_max>2%, a large step size ΔC_big=0.5pF is used for adjustment; when 0<THD-THD_max≤2%, a small step size ΔC_small=0.1pF is used for adjustment.

[0054] S62: keep the capacitance array parameters unchanged, target at making the phase difference approach 0, adjust the inductance array parameters of the post-stage multi-stage LC matching circuit with adjustable parameters. When | |>3°, a large step size ΔL_big=0.05μH is used for adjustment; when 0<| |≤3°, a small step size ΔL_small=0.01μH is used for adjustment.

[0055] S63: when the total content of higher-order harmonics is lower than the total harmonic distortion threshold for 3 consecutive sampling periods and the absolute value of the phase difference is lower than the second preset threshold, stop adjustment and lock the current parameters of the post-stage multi-stage LC matching circuit with adjustable parameters.

[0056] S7: calculate the actual target output power according to the current dynamic load impedance, and adopt a dual-mode collaborative strategy of coarse adjustment of the adjustable DC source bus voltage and fine adjustment of the power tube conduction duty cycle to adjust the output power to the actual target output power.

[0057] In step S7, the steps of collaborative power adjustment by the dual-mode collaborative strategy include: S71: calculate the actual target output power according to the current dynamic load impedance and the system no-load reference impedance. The calculation formula of the actual target output power is:

[0058] In the formula, The actual target output power.

[0059] S72: When the power deviation between the actual output power and the actual target output power exceeds the preset range of the rated power, adjust the output bus voltage of the adjustable DC source to make the output power equal to the actual target output power. Preset power range ΔP range =±5%P_r; Bus voltage adjustment step ΔU_dc=1V, adjustment range 0~400V; Actual output power The calculation formula is: ,in The power factor.

[0060] S73: When the difference between the actual output power and the actual target output power is less than or equal to the preset range of rated power, keep the output bus voltage of the adjustable DC source constant and adjust the duty cycle of the power transistor. The steps include: S731: Determine the duty cycle adjustment direction based on the sign of the power deviation value, and determine the duty cycle adjustment step size based on the magnitude of the power deviation value.

[0061] Among them, power deviation value If ΔP > 0, increase the duty cycle; if ΔP < 0, decrease the duty cycle. The initial adjustment step size ΔD_initial = 0.5%, and the fine adjustment step size ΔD_micro = 0.1%.

[0062] S732: Adjusts the duty cycle of the power transistor in a single operation according to the adjustment direction and step size, ensuring that the switching frequency of the power transistor is strictly consistent with the fundamental frequency of the megason, and that the duty cycle does not exceed the preset safe duty cycle range after a single adjustment. The preset safe duty cycle range D∈[10%,90%] prevents the power transistor from overheating due to an excessively high duty cycle or the output power from being unstable due to an excessively low duty cycle.

[0063] S733: After waiting for a complete sampling cycle, re-acquire the fundamental voltage RMS value, fundamental current RMS value, total content of higher harmonics and power reflection coefficient, and calculate the updated actual output power.

[0064] S734: Determine whether the total content of the updated higher harmonics exceeds the total harmonic distortion threshold and whether the reflection power ratio exceeds the preset threshold.

[0065] S735: If the total content of higher harmonics or the reflected power ratio exceeds the standard, roll back the current duty cycle adjustment operation, restore the duty cycle to the value before adjustment, and reduce the adjustment step size to the preset micro-adjustment step size before re-executing the adjustment.

[0066] S736: If the total content of higher harmonics and the reflected power ratio both meet the requirements, then determine whether the difference between the updated actual output power and the actual target output power is less than or equal to the preset power accuracy threshold ΔP_accuracy=±0.5%P_r.

[0067] S737: If the power deviation is greater than the preset power accuracy threshold, repeat steps S731 to S736 until the power deviation meets the accuracy requirements. If the power deviation is less than or equal to the preset power accuracy threshold, lock the current power transistor's duty cycle and enter the power steady-state monitoring mode. The steps include: With a preset steady-state monitoring period of T_mon=50ms, the fundamental voltage, fundamental current, total content of higher harmonics, and reflected power ratio are continuously collected.

[0068] When the power deviation exceeds the preset power accuracy threshold, the total content of higher harmonics exceeds the total harmonic distortion threshold, or the power reflection coefficient exceeds the preset threshold, the steady-state monitoring mode is automatically exited, and the duty cycle adjustment process of steps S731 to S737 is re-executed.

[0069] When all parameters meet the requirements for several consecutive steady-state monitoring cycles (usually 5 cycles), the current duty cycle is locked until the cleaning process ends or a sudden change occurs in the load impedance. The criterion for determining a sudden change is an impedance drift rate change ≥3% within a single monitoring cycle.

[0070] S74: During adjustment, the frequency of the power transistor output signal is always strictly synchronized with the fundamental frequency of the mega-sound wave. The frequency synchronization accuracy requirement is ±1ppm, which is achieved through the internal phase-locked loop (PLL) of the FPGA for frequency tracking and locking. When the load phase θ L When the frequency deviates from 0° by more than ±3° for 5 monitoring cycles, the fundamental frequency can be fine-tuned in steps of ≤±0.01% to make the transducer work at the optimal resonance point. The fine-tuning range is limited to ±0.2% of the rated frequency.

[0071] In summary, the megasonic generator power adaptive control method based on load impedance monitoring establishes the system reference impedance through no-load static calibration, employs a fixed LC notch filter circuit in the pre-stage to suppress major low-order harmonics, and combines this with an adjustable LC matching circuit in the post-stage to achieve dynamic impedance matching and residual harmonic suppression. Finally, a dual-mode collaborative strategy of coarse bus voltage adjustment and fine duty cycle adjustment is used to achieve adaptive adjustment of the output power. This method can track the dynamic changes in load impedance in real time during the cleaning process, effectively reducing power reflection and harmonic distortion, improving the uniformity and stability of megasonic cleaning, and extending the lifespan of the power transistors and transducers. Using pre-stage bus voltage adjustment to control power output significantly expands the dynamic range of power regulation compared to traditional PWM control, and achieves linear and smooth power adjustment, improving the accuracy of system control. The introduction of a high-order LC filter architecture significantly attenuates high-order harmonic components in the power amplifier output signal, effectively reducing the negative impact of harmonic interference on the transducer's operational stability and ensuring the reliability of system operation. High-order LC filtering significantly improves the smoothness of the output waveform, ensuring that the amplitude and frequency of the generated sine wave signal are highly stable, thereby making the energy field distribution of the megasonic wave more uniform and improving the cleaning effect.

[0072] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0073] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for power adaptive control of a megasonic generator based on load impedance monitoring, characterized in that, include: S1: Load the preset megason fundamental frequency, target cleaning power, allowable impedance drift range and total harmonic distortion threshold, and perform system self-test and no-load static calibration; S2: Start the cleaning process, call the target cleaning power and the total harmonic distortion threshold according to the preset cleaning mode, drive the adjustable DC source to output the initial bus voltage, and output a square wave signal with the same frequency as the mega-sound fundamental wave. S3: Input the square wave signal into the front-end fixed-parameter multi-stage LC matching circuit to complete the fixed suppression of the 3rd, 5th, and 7th higher harmonics, and output the pre-filtered signal. S4: Collect the fundamental voltage and fundamental current at the output of the adjustable multi-stage LC matching circuit, calculate the current load impedance and phase difference, adjust the parameters of the adjustable multi-stage LC matching circuit to complete the initial impedance matching. S5: Based on the fundamental voltage and fundamental current, calculate the dynamic load impedance, phase difference and power reflection coefficient, and simultaneously collect the total content of the remaining 9th and above higher harmonics; S6: When the total content of the higher harmonics exceeds the total harmonic distortion threshold or the reflection power ratio exceeds the preset threshold, adjust the parameters of the subsequent adjustable parameter multi-stage LC matching circuit until the total content of the higher harmonics and the reflection power ratio both meet the requirements. S7: Calculate the actual target output power based on the current dynamic load impedance, and use a dual-mode collaborative strategy of coarse adjustment of adjustable DC source bus voltage and fine adjustment of power transistor duty cycle to adjust the output power to the actual target output power.

2. The method of claim 1, wherein, Step S1, the steps for performing no-load static calibration include: S11: Disconnect the load of the megasonic transducer and drive the power tube amplifier module to output a low-power fundamental signal; S12: Detect the open-circuit voltage and current at the output of the adjustable multi-stage LC matching circuit and calculate the system's no-load reference impedance; S13: Fine-tune the initial parameters of the adjustable multi-stage LC matching circuit to ensure that the fundamental impedance matching degree reaches the preset standard under no-load conditions, and record the calibrated initial parameters as the reference value.

3. The method of claim 2, wherein the method further comprises: In step S12, the formula for calculating the system's no-load reference impedance is expressed as follows: wherein, Z0 is the system unloaded reference impedance; V0 is the effective value of the fundamental open circuit voltage at the output of the adjustable parameter multistage LC matching circuit in the unloaded state; I0 is the effective value of the fundamental unloaded current at the output of the adjustable parameter multistage LC matching circuit in the unloaded state.

4. The method of claim 1, wherein, Step S2, the step of outputting a square wave signal with the same frequency as the fundamental frequency of the megaacoustic wave, includes: S21: Generate a PWM drive signal with the same frequency as the preset mega-sound fundamental frequency; S22: Input the PWM drive signal into the power transistor drive circuit to precisely control the switching timing and conduction duration of the power transistor; S23: Enables the power transistor to output a square wave signal with the same frequency and similar waveform characteristics as the original high-frequency signal.

5. The method of claim 1, wherein, Step S3, the step of fixed suppression of higher harmonics, includes: S31: Input the square wave signal output by the power transistor into the input terminal of the pre-amplifier fixed-parameter multi-stage LC matching circuit; S32: The square wave signal first flows through the first-stage fixed-parameter LC parallel notch filter branch. The inductance and capacitance parameters of the first-stage notch filter branch are pre-calibrated to a resonant frequency equal to 3 times the fundamental frequency of the megahertz wave. The high impedance characteristics of the parallel LC circuit at the resonant frequency are used to reflect the energy of the 3rd higher harmonic back to the power transistor side. S33: The signal after the first stage of filtering is input into the second stage fixed parameter LC parallel notch branch. The resonant frequency of the second stage notch branch is pre-calibrated to 5 times the fundamental frequency of the mega-sound wave, and the 5th higher harmonics, which account for the second largest proportion of the signal, are filtered out. S34: The signal after the second stage of filtering is input into the third stage fixed parameter LC parallel notch branch. The resonant frequency of the third stage notch branch is pre-calibrated to 7 times the fundamental frequency of the mega-sound wave to filter out the 7th higher harmonic in the signal. S35: After processing by a three-stage series fixed notch filter branch, the output is a pre-filtered sinusoidal fundamental signal.

6. The method of claim 2, wherein the method further comprises: Step S4, the step of fixed suppression of higher harmonics, includes: S41: Determine whether the current load impedance is within the allowable impedance drift range and whether the absolute value of the phase difference is less than or equal to the first preset threshold. S42: If not satisfied, adjust the capacitor array parameters of the subsequent adjustable multi-stage LC matching circuit according to the preset step size so that the load impedance gradually falls into the allowable range. S43: Keep the capacitor array parameters unchanged, adjust the inductor array parameters of the subsequent adjustable multi-stage LC matching circuit by a preset step size, so that the absolute value of the phase difference is less than or equal to the second preset threshold. S44: Repeat steps S41 to S43 until the load impedance and phase difference meet the requirements, thus completing the initial impedance matching.

7. The method of claim 6, wherein the method further comprises: Step S41, the step of determining whether the current load impedance is within the allowable impedance drift range, includes: S411: Calculate the magnitude of the current load impedance based on the collected effective values ​​of the fundamental voltage and fundamental current; S412: Perform a difference calculation between the current load impedance magnitude and the system no-load reference impedance to obtain the impedance deviation value; S413: Calculate the ratio of the impedance deviation value to the system no-load reference impedance to obtain the impedance drift rate; S414: Determine whether the impedance drift rate is less than or equal to a preset allowable impedance drift rate threshold. If yes, determine that the current load impedance is within the allowable impedance drift range; otherwise, determine that it exceeds the allowable range.

8. The power adaptive control method for a megasonic generator based on load impedance monitoring according to claim 2, characterized in that, In step S5, the formula for calculating the reflection power ratio is expressed as follows: In the formula, The reflected power ratio, The power reflection coefficient, This represents the complex value of the current dynamic load impedance. This is the system's unloaded reference impedance.

9. The power adaptive control method for a megasonic generator based on load impedance monitoring according to claim 2, characterized in that, In step S7, the steps of the dual-mode cooperative strategy for coordinated power regulation include: S71: Calculate the actual target output power based on the current dynamic load impedance and the system no-load reference impedance; S72: When the power deviation between the actual output power and the actual target output power is greater than the preset range of the rated power, adjust the output bus voltage of the adjustable DC source so that the output power is equal to the actual target output power. S73: When the difference between the actual output power and the actual target output power is less than or equal to a preset range of rated power, keep the output bus voltage of the adjustable DC source unchanged and adjust the duty cycle of the power transistor. S74: During the adjustment process, the frequency of the power transistor output signal must always be kept strictly synchronized with the fundamental frequency of the mega-sound wave.

10. The power adaptive control method for a megasonic generator based on load impedance monitoring according to claim 9, characterized in that, In step S73, the step of adjusting the duty cycle of the power transistor includes: S731: Determine the duty cycle adjustment direction based on the sign of the power deviation value, and determine the duty cycle adjustment step size based on the magnitude of the power deviation value; S732: Adjust the duty cycle of the power transistor in a single adjustment according to the adjustment direction and adjustment step size, keep the switching frequency of the power transistor strictly consistent with the fundamental frequency of the megason, and ensure that the duty cycle does not exceed the preset safe duty cycle range after a single adjustment. S733: After waiting for a complete sampling cycle, re-acquire the fundamental voltage RMS value, fundamental current RMS value, total content of higher harmonics and power reflection coefficient, and calculate the updated actual output power; S734: Determine whether the total content of the updated higher harmonics exceeds the total harmonic distortion threshold and whether the reflection power ratio exceeds the preset threshold. S735: If the total content of higher harmonics or the reflected power ratio exceeds the standard, roll back the current duty cycle adjustment operation, restore the duty cycle to the value before adjustment, and reduce the adjustment step size to the preset micro-adjustment step size before re-executing the adjustment. S736: If the total content of higher harmonics and the reflected power ratio both meet the requirements, then determine whether the difference between the updated actual output power and the actual target output power is less than or equal to the preset power accuracy threshold. S737: If the power deviation is greater than the preset power accuracy threshold, repeat steps S731 to S736 until the power deviation meets the accuracy requirements; if the power deviation is less than or equal to the preset power accuracy threshold, lock the current power transistor duty cycle and enter the power steady-state monitoring mode.

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