Method and system for controlling tension balance of multi-layer composite fabric

Abstract

The application provides a multi-layer composite fabric layered tension balanced control method and system, the method comprises collecting each layer tension measurement value and driving roller rotation speed code value, calculating tension error, and combining rotation speed deviation to generate preliminary control vector, and obtaining target driving instruction through interlayer tension coupling matrix decoupling. The main control core encapsulates the instruction as a data frame and writes it into the shared memory, generates a summary post bit semaphore and starts a timer, triggers the communication processing core to read the data frame and rewrite the summary, and the main control compares before overflow and executes fault processing when an exception occurs. The communication processing core generates a check base sequence and a polynomial selection factor based on the confirmed historical instruction or the preset initial instruction, XORs the data frame, calculates the CRC, and sends it through the bus; the driving unit reorganizes the message, reproduces the check logic, and feeds back the state, parses the effective instruction after the check passes, and controls the driving roller rotation speed.

Description

Technical Field

[0001] This application belongs to the field of control, and in particular relates to a method and system for controlling the layered tension balance of multilayer composite fabrics. Background Technology

[0002] Multilayer composite fabrics are widely used in textiles, new materials, and medical protective equipment. Their production typically involves continuously laminating multiple layers of fabrics with varying materials, thicknesses, or elasticities through processes such as lamination and bonding. Due to differences in physical properties and stress states among the fabric layers, and their interactions during traction and bonding by multiple drive rollers, significant correlations and coupling effects often exist between the tensions of each layer. Existing tension control methods often treat each fabric layer as a relatively independent control object for single-loop adjustment, making it difficult to fully consider the mutual interference during interlayer traction, friction, and bonding. This results in insufficient tension balance during high-speed, high-precision composite production, easily leading to problems such as fabric stretching deformation, wrinkling, interlayer slippage, and even breakage, affecting composite quality and increasing the scrap rate.

[0003] Meanwhile, the control systems of modern high-performance textile equipment are increasingly adopting a multi-core processing architecture. The main control core handles tension calculation and control command generation, while the communication processing core handles industrial bus message transmission and drive unit interaction. Under this architecture, high-speed and stable data exchange is required between the main control core and the communication processing core, and the external bus must reliably transmit control commands in environments with strong electromagnetic interference. In industrial settings, the frequent start-stop of multiple frequency converters, servo drives, and high-power motors easily introduces electromagnetic noise. If timing anomalies, data conflicts, or transmission errors occur during control command generation, inter-core transmission, or bus distribution, it can lead to abnormal adjustment of the drive roller speed, thereby disrupting the overall tension balance. Existing industrial control communication and verification methods mostly employ relatively fixed transmission and verification mechanisms, which have limited adaptability to data consistency and abnormal message identification under complex interference conditions. Therefore, how to achieve multi-layer tension collaborative control while constructing an inter-core collaborative and bus verification mechanism that balances real-time performance, data consistency, and anti-interference capabilities is a critical technical problem that needs to be solved in the high-speed and stable production of multi-layer composite fabrics. Summary of the Invention

[0004] To address the problems of existing technologies, such as difficulty in suppressing interlayer coupling during independent tension control of multilayer composite fabrics, insufficient consistency in inter-core instruction transmission under high-speed operation, and poor adaptability of bus error checking, this invention provides a method and system for layered tension equalization control of multilayer composite fabrics.

[0005] In a first aspect, the present invention provides a method for controlling the layered tension balance of multi-layer composite fabrics, comprising the following steps:

[0006] Acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values; the preliminary control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command; The main control core encapsulates the target driving instruction into a data frame and stores it in shared memory, and calculates the first digest; it sets the hardware semaphore and starts the timer, triggering an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and if they are inconsistent or time out, it performs fault handling. The communication processing core generates a check base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command during the initial and resynchronization phases. The communication processing core XORs the data frame with the check base sequence to generate a garbled data frame, and selects and generates a cyclic redundancy check (CRC) code based on the polynomial selection factor. The garbled data frame and the CRC code are then sent to each drive unit via the bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the garbled data frame, and restores the target drive command and controls the drive roller speed after the verification is successful.

[0007] On the other hand, the present invention also provides a multi-layer composite fabric layer tension equalization control system, comprising the following modules: The decoupling module is used to acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values; the preliminary control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command; The calculation module is used by the main control core to encapsulate the target driving instruction into a data frame and store it in shared memory, calculate the first digest; set the hardware semaphore and start the timer to trigger an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and performs fault handling if they are inconsistent or time out. The control module is used to generate a check base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command during the initial and resynchronization phases. The communication processing core XORs the data frame with the check base sequence to generate a confused data frame, and selects and generates a cyclic redundancy check (CRC) code based on the polynomial selection factor. The confused data frame and the CRC code are then sent to each drive unit via a bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the confused data frame, and restores the target drive command and controls the drive roller speed after the verification is successful.

[0008] This invention decouples the control vector through an interlayer tension coupling coefficient matrix, matching the driving speed adjustment of each layer with the corresponding tension compensation requirements, thereby reducing tension cross-interference during multi-layer fabric lamination. A collaborative interaction process between the main control core and the communication processing core is established through shared memory, digest comparison, hardware semaphores, and timing monitoring mechanisms, improving the consistency and real-time performance of control command transmission between cores. In the bus-based transmission phase, a verification base sequence and a polynomial selection factor are generated based on confirmed historical commands, and combined with frame transmission, reassembly verification, and feedback confirmation mechanisms, dynamic cyclic redundancy check processing is performed on the messages. This helps improve the anti-interference capability and abnormal message identification capability of control command transmission in complex industrial environments, reduces the risk of drive unit malfunctions, and enhances the tension control stability during high-speed equipment operation. Attached Figure Description

[0009] Figure 1 A flowchart for a method of controlling the layered tension balance of multi-layer composite fabrics; Figure 2 A line chart showing the countdown trend of a watchdog timer. Detailed Implementation

[0010] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0011] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0012] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0013] References to "one embodiment" or "some embodiments" as described in this application specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in another embodiment," "in yet another embodiment," etc., appearing in different parts of this application specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0014] In this application, a method for controlling the layered tension balance of a multi-layer composite fabric is provided, such as... Figure 1 As shown, the method includes: S1, acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values; the preliminary control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command.

[0015] The analog signals from the tension sensors of each layer are read from the high-precision analog-to-digital converter chip via the serial peripheral interface SPI to obtain the tension measurement values ​​of each layer. At the same time, the encoder interface register value of the general-purpose timer is read to obtain the coded speed values ​​of each drive roller.

[0016] Subtract the measured tension values ​​of each layer from the preset tension target value to obtain the tension error of each layer; differentiate the coded speed values ​​of the drive rollers of each layer with the corresponding coded speed values ​​of the reference speeds to obtain the speed deviation of each layer; generate a feedback compensation component based on the tension error and a feedforward compensation component based on the speed deviation; superimpose the two to form the tension compensation requirement of each layer, and combine them in hierarchical order to output the preliminary control vector.

[0017] The interlayer tension coupling coefficient matrix of the multilayer composite fabric is identified and established in advance by the system and stored in non-volatile memory. After reading the matrix, the inverse matrix or pseudo-inverse matrix of the interlayer tension coupling coefficient matrix is ​​calculated to obtain the decoupling matrix. The decoupling matrix is ​​multiplied by the preliminary control vector to obtain the driving speed compensation amount corresponding to each layer. The driving speed compensation amount is superimposed with the current reference driving speed to generate the target driving command for each driving unit.

[0018] In some embodiments, the main control core calculates the tension error based on the tension measurement value and the target value, and generates a preliminary control vector by combining the speed encoding value, including: Calculate the difference between the corresponding target value and the tension measurement value for each layer of fabric to obtain the tension error for each layer; The speed deviation of each layer is obtained by comparing the coded value of the drive roller speed of each layer with the corresponding coded value of the reference speed speed. Multiply the rotational speed deviation of each layer by a preset tension feedforward coefficient to obtain the corresponding tension feedforward compensation amount; The tension error of each layer is superimposed with the corresponding tension feedforward compensation amount to generate the tension compensation requirement of each layer; The tension compensation requirements of each layer are combined in hierarchical order to construct the preliminary control vector.

[0019] On a composite fabric production line, assuming the production of a three-layer composite fabric—top layer, middle layer, and bottom layer—with a control cycle of 10ms, tension sensors acquire the tension measurements of each layer. For example, the surface layer, middle layer, and bottom layer are set to 45.2N, 50.1N, and 60.5N respectively. Simultaneously, target tension values ​​are set. The values ​​are 45.0N, 50.0N, and 60.0N, respectively.

[0020] The tension error of each layer is calculated by subtracting the measured value from the target value. In this example, these values ​​are -0.2N, -0.1N, and -0.5N, respectively. In parallel, the incremental encoder speed values ​​of each layer of drive rollers are read. The unit is pulses per second, assuming the current periods are 2000pps, 1990pps, and 2005pps respectively. Simultaneously, the reference speed encoding values ​​for each layer are read or set. For example, all are 2000pps. The current speed encoding value is differiated from the reference speed encoding value to obtain the speed deviation ΔV for each layer, which are 0pps, -10pps, and 5pps, respectively. During the equipment calibration phase, the main control unit applies preset forward and reverse speed perturbations, records the corresponding tension changes, and determines the tension feedforward coefficient based on the ratio of the tension change to the speed deviation. For example, 0.02 N / pps; during operation, the speed deviation is multiplied by the calibrated tension feedforward coefficient. The tension feedforward compensation amount is obtained, and the corresponding tension feedforward compensation amount for each layer is calculated. The values ​​are 0N, -0.2N, and 0.1N, respectively.

[0021] The calculated tension error With tension feedforward compensation These values ​​are added together to generate the required tension compensation for each fabric layer in the current cycle, which in this example are -0.2N, -0.3N, and -0.4N respectively. Based on the spatial physical hierarchy from the surface layer to the bottom layer, this set of one-dimensional discrete data is encapsulated and combined into a 3×1 column vector matrix, thus constructing the preliminary control vector. This combination of using speed deviation feedforward can improve the stability of the tension reference and the speed of step response during adjustment, and reduce the response lag or local oscillation that may occur when adjusting based solely on tension error feedback.

[0022] In some embodiments, the step of decoupling the initial control vector using the interlayer tension coupling coefficient matrix to obtain the target driving command includes: Obtain a pre-calibrated interlayer tension coupling coefficient matrix, wherein the elements of the coefficient matrix represent the degree of influence of the speed change of each layer of drive roller on the tension change of each layer of fabric. Calculate the inverse of the interlayer tension coupling coefficient matrix to obtain the decoupling matrix; Perform matrix multiplication between the decoupling matrix and the preliminary control vector to obtain the driving speed compensation amount for each layer. The driving speed compensation amount corresponding to each layer is superimposed with the current baseline driving speed to obtain the independent target driving speed for each layer; The independent target drive speeds of each layer are converted into corresponding drive motor control words to generate the target drive instructions.

[0023] During the static debugging phase of the equipment, a preset speed step disturbance is applied to each layer of drive rollers using the multivariable step response identification method. The change in tension response of each layer of fabric is recorded, and the influence relationship between the speed changes of different drive rollers on the tension changes of each layer is extracted to construct an N×N interlayer tension coupling coefficient matrix C. Taking a three-layer fabric as an example, a 3×3 interlayer tension coupling coefficient matrix C is constructed.

[0024] To facilitate matrix operations, a preset tension calibration value is used to normalize the tension compensation requirement, and a preset speed calibration value is used to normalize the speed compensation. This allows the interlayer tension coupling coefficient matrix C to represent the degree of influence of the normalized speed change on the normalized tension change. The main diagonal elements of this matrix represent the influence coefficient of the corresponding layer's own speed change on its own tension change, preferably ranging from 0.8 to 1.0; the off-diagonal elements represent the interlayer cross-interference coefficients caused by friction, traction, and adhesion transmission, preferably ranging from 0.05 to 0.3. For example, the main diagonal elements of the calibrated matrix C are all 0.90, the adjacent layer interference elements are 0.15, and the cross-layer interference elements are 0.05.

[0025] During the control operation phase, the interlayer tension coupling coefficient matrix C is inverted using the LU decomposition method or the Gaussian-Jordan elimination method to generate the decoupling matrix. When the interlayer tension coupling coefficient matrix C is close to singular or does not meet the direct inversion condition, a decoupling matrix is ​​generated by using a pseudo-inverse matrix or a matrix solution method with regularization terms.

[0026] The main control unit first normalizes the 3×1 preliminary control vector U generated in the previous steps according to the preset tension calibration value to obtain the normalized tension compensation vector. Then decouple the 3×3 matrix. With normalized tension compensation vector Perform matrix multiplication to obtain the normalized velocity compensation vector. Then, according to the preset speed calibration value, Perform inverse normalization to obtain the actual drive speed compensation amount. And the actual driving speed compensation amount is compared with the current reference driving speed. Superimpose to generate independent target driving velocity vectors for each layer. .

[0027] For example, if the reference drive speed vector is [1500.0, 1500.0, 1500.0] rpm, after decoupling calculation and speed calibration value conversion, the actual drive speed compensation is [-5.5, -3.2, -1.8] rpm. Then, after superposition, the target drive speed vector is [1494.5, 1496.8, 1498.2] rpm.

[0028] According to the servo motor's fieldbus communication protocol, the main control unit uses a speed conversion coefficient, which includes the gear reduction ratio and the equivalent of the driver pulse, to convert the target drive speed into a 32-bit integer drive control word. Specifically, assuming the speed conversion coefficient is 27.306, the target drive speed is multiplied by the speed conversion coefficient, and a speed data word is generated according to a preset rounding rule; for example, the speed data word corresponding to 1494.5 rpm is round(1494.5 × 27.306). Subsequently, according to the control word bit fields specified in the driver protocol, the speed data word is combined with the servo enable mask to generate the target drive command to be sent to the drive actuator.

[0029] S2, the main control core encapsulates the target driving instruction into a data frame and stores it in the shared memory, calculates the first digest; sets the hardware semaphore and starts the timer, triggering an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and if they are inconsistent or time out, it performs fault handling.

[0030] The main control core packages and encapsulates the target driving instructions according to a custom communication protocol format that includes a frame header, device address, data length identifier, instruction payload, and frame tail identifier to obtain a data frame. Then, it uses the memory access controller DMA to move the data frame to the static random access shared memory inside the dual-core architecture microcontroller.

[0031] The cryptographic algorithm implementation program or on-chip hashing module performs SHA-256 hashing on the core payload data in the data frame, generates a 256-bit hash value, and extracts a preset bit segment as the first digest and stores it in the local internal cache.

[0032] The main control core sets the hardware semaphore peripheral register HSEM, configures and starts the internal hardware timer, triggers an inter-core interrupt by a hardware semaphore or IPC event, and receives the interrupt request signal from the interrupt controller on the communication processing core side.

[0033] After the communication processing core responds to the inter-core interrupt request signal, it reads the data frame from the static random access shared memory using pointer addressing. It also calls the same hash operation method to perform SHA-256 hash operation on the core payload data in the read data frame to generate a 256-bit hash value. It then extracts a bit segment with the same position and length as the first digest as the second digest and writes the second digest into the designated state area of ​​the static random access shared memory.

[0034] Before the internal hardware timer generates an overflow interrupt, the main control core continuously polls the specified state area. When the second digest update is detected, it compares the first digest in the local internal cache with the read second digest byte by byte.

[0035] If the comparison results are inconsistent, or if the internal hardware timer overflows and causes a timeout, the main control core enters the fault handling process, performs a fast shutdown or cuts off the enable protection according to the safe shutdown method supported by the servo driver, and sends a serious system fault alarm information to the human-machine interface.

[0036] In some embodiments, the main control core encapsulates the target driving instructions into data frames and stores them in shared memory, and calculates a first digest, including: Add a frame header identifier, device address identifier, data length identifier, and frame tail identifier to the target driving instruction to construct the original data frame; The original data frame is moved to a specified address area of ​​the dual-port random access memory shared by the main control core and the communication processing core via memory access. A secure hash algorithm is used to perform a hash operation on the core payload data of the original data frame, and a specified bit segment of the operation result is extracted as the first digest.

[0037] After the main control core completes the target driver instruction calculation at the application layer, it assembles the frame according to the proprietary IPC communication protocol format agreed upon within the multi-core architecture. For a target driver instruction sequence of 64 bytes in length, i.e., the core payload data, a 2-byte fixed frame header identifier (e.g., configured as 0xAA55), a 2-byte device address identifier (e.g., configured as 0x0001), and a 2-byte data length identifier (e.g., configured as 0x0040) are appended at the beginning, indicating 64 valid bits. At the same time, a 2-byte frame tail check identifier (e.g., 0x55AA) is appended at the end, thus assembling a complete original data frame with a total length of 72 bytes.

[0038] The main control unit initializes the internal DMA controller channel, setting the source address to the frame buffer array pointer in the RAM area and the destination address to a fixed base address in the dual-port SRAM, such as the shared communication area starting from 0x40000000. After configuration, the DMA single burst transfer mode is triggered, using a hardware channel independent of the CPU to move the 72-byte data frame to the designated shared memory, thereby improving inter-core throughput.

[0039] During the DMA data transfer synchronization cycle, the main control core uses the standard SHA-256 secure hash algorithm to perform a one-way hash operation on the 64 bytes of core payload data, generating a 256-bit hash value. The last 32 bits, or the last 4 bytes, are extracted from the generated 256-bit result, for example, 0x8F3C2B1A, as the first digest. The main control core stores this 32-bit digital digest in its local cache or writes it to a dedicated digest exchange register address in the DPRAM, such as 0x40000100, to serve as a data fingerprint for control instructions, aiding in the identification of memory bit flips or data transfer anomalies that may occur in industrial electromagnetic noise environments.

[0040] In some embodiments, setting the hardware semaphore and starting the timer to trigger an interrupt to the communication processing core includes: Write a preset trigger flag bit into the hardware semaphore register inside the dual-core processor to generate an inter-core interrupt request through hardware semaphores or IPC events; The general-purpose timer inside the main control core is activated as a monitoring timer to begin the countdown; If the main control core reads the second digest written by the communication processing core in the shared memory before the general-purpose timer overflows, and it is consistent with the first digest, then the hardware semaphore is cleared and the general-purpose timer is reset. If the general timer overflows or the digest comparison is inconsistent, a system fault interrupt is triggered, and the drive roller emergency stop and alarm process are executed.

[0041] After the data frame and first digest are written to disk, the main control core writes a high-level flag '1' to the hardware semaphore register via the internal high-speed interconnect bus. This action triggers the processor's internal inter-core interrupt routing, causing the interrupt controller on the communication processing core side to receive an interrupt request, and causing the communication core to suspend its idle task and enter the data read interrupt service function.

[0042] Simultaneously, the main control core configures and starts an internal dedicated 32-bit down-counting general-purpose timer as a timeout watchdog, setting the countdown period threshold to 500μs. The preferred range for this threshold is 200μs to 800μs, adapting to the overall control cycle of 10ms. The timer begins its high-frequency countdown along with the system clock. The timer count trends under two typical operating conditions are as follows: Figure 2 As shown.

[0043] During the watchdog countdown window, the main control core enters a polling and listening state, continuously monitoring the digest write-back address area in the dual-port SRAM allocated to the communication processing core for acknowledgment, such as 0x40000104. If, before the timer overflows at 500μs, the main control core successfully detects that the communication processing core has calculated and written back the 32-bit second digest based on the read data, the main control core executes a bitwise XOR instruction to compare the first and second digests. If the XOR result is zero, indicating lossless data transmission, the main control core writes '1' to the hardware semaphore clear register or IPC event clear register to clear the hardware semaphore, stops and reloads the timer, and ends the current handshake.

[0044] Conversely, if the general-purpose timer count reaches zero and triggers an overflow interrupt, or if the response does not time out but a mismatch is found between the two summary segments, it will be determined that an inter-core communication abnormality or memory data abnormality has occurred. The main control core triggers a hardware-level system fault interrupt, transfers the error code and bus status context to non-volatile FRAM, and performs a safe stop according to the stop interface supported by the driver: if the servo driver can receive a fast stop command, the driver remains enabled and outputs a zero-speed or fast stop command, causing the motor to decelerate according to the preset deceleration ramp; if there is a communication abnormality or the driver is uncontrollable, the servo driver enable signal is cut off or a safe torque cut-off input is triggered, causing the system to enter a safe stop state.

[0045] S3, the communication processing core generates a verification base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command during the initial and resynchronization phases. The communication processing core XORs the data frame with the verification base sequence to generate a garbled data frame, and selects and generates a cyclic redundancy check (CRC) code based on the polynomial selection factor. The garbled data frame and the CRC code are then sent to each drive unit via the bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the garbled data frame, and restores the target drive command and controls the drive roller speed after the verification is successful.

[0046] The communication processing core determines the verification benchmark based on the current operating state. When the system is in the initial or resynchronization phase, it reads the preset initial instruction as the state feature vector; when the system is in the normal operation phase, it reads the target drive instruction that was successfully received by the drive unit in the previous cycle as the state feature vector. When a verification failure, communication timeout, or bus disconnection and reconnection occurs, the corresponding drive unit is marked as resynchronization state, and the verification benchmark is re-established using the preset initial instruction in subsequent cycles.

[0047] The communication processing core organizes the state feature vector into 64-bit data. If the length is less than 64 bits, it is extended to 64 bits by padding with zeros in the high bits, repeating concatenation, or using a preset constant concatenation method. Subsequently, the high 32 bits and low 32 bits of the 64-bit data are XORed and folded to obtain a 32-bit initial seed, which is then input into the linear feedback shift register.

[0048] The linear feedback shift register generates a parity base sequence with the same length as the data frame by continuously outputting or cyclically expanding based on the initial seed. Simultaneously, the communication processing core sums the 8 bytes of the 64-bit state feature vector and takes the remainder modulo N of a preset number of polynomials to obtain a polynomial selection factor, where N is the number of polynomials in the preset generator polynomial set.

[0049] The communication processing core performs a bitwise XOR operation on each byte of the data frame with the corresponding byte of the parity base sequence to generate a garbled data frame. Based on the polynomial selection factor, it selects a corresponding polynomial from a set of N preset generator polynomials. This set of preset generator polynomials is written into the non-volatile memory of the communication processing core and each driver unit during device factory configuration or system initialization, and an index table is created from 0 to N-1. Each index entry corresponds to a cyclic redundancy check (CRC) generator polynomial, its initial value, XOR output value, and bit-inversion configuration parameters. Subsequently, the garbled data frame is input into the hardware CRC calculation unit, and the selected generator polynomial parameters are configured. A 16-bit CRC code is generated through hardware shift register operations.

[0050] The communication processing core appends the 16-bit cyclic redundancy check (CRC) code to the end of the obfuscated data frame, forming a complete message to be sent. The communication processing core then segments the complete message according to a preset framing rule. Preferably, a CAN FD bus is used for segmented transmission. Each segmented message includes a segment number, a total number of segments, a cycle number, a driver unit address, and a segment payload, and the data field length of each CAN FD segmented message does not exceed 64 bytes.

[0051] Each drive unit receives fragmented messages according to the cycle number and fragment number, and reassembles them into a complete message after receiving all fragments of the same cycle. If not all fragments arrive within the preset reassembly time, the fragment numbers are not consecutive, or the cycle numbers do not match, the message for that cycle is deemed invalid, and a resynchronization request is sent to the communication processing core.

[0052] After receiving and reassembling the complete message, the driver unit performs a re-verification using the same verification base generation logic as the communication processing core. Specifically, during normal operation, the driver unit reads the target driver instruction successfully received in the previous cycle from its local cache as a state feature vector; during the initialization or resynchronization phase, it reads the preset initialization instruction stored in read-only memory as a state feature vector. The driver unit regenerates a verification base sequence consistent with the length of the obfuscated data frame using the same 64-bit sorting, 32-bit XOR folding, and linear feedback shift register operations, and generates a polynomial selection factor according to the same byte summation and modulo rules.

[0053] The driving unit directly performs cyclic redundancy check (CRC) calculation on the reassembled obfuscated data frame, and uses the generator polynomial corresponding to the polynomial selection factor to compare the calculated checksum with the checksum attached to the complete message to confirm the message's validity. If the checksum fails, the driving unit does not execute the target driving instruction for this cycle, enters a resynchronization waiting state, and returns a checksum failure flag, cycle number, and driving unit address to the communication processing core via a feedback message.

[0054] If the verification passes, the drive unit performs a bitwise XOR operation between the obfuscated data frame and the verification base sequence to reconstruct the original data frame, and then parses the target drive instruction from the original data frame. Based on the parsed target drive instruction, the drive unit generates motor control parameters and outputs them to the servo drive module to adjust the electromagnetic torque and actual speed of the servo motor, thereby controlling the drive roller speed. After the target drive instruction passes verification and is written to the execution buffer, the drive unit returns a reception success flag, cycle number, and drive unit address to the communication processing core via a feedback message.

[0055] After receiving a successful reception feedback from the corresponding driver unit, the communication processing core updates the target driver instruction for that period to the target driver instruction of the previous period used to generate the verification base sequence for the next period. If the communication processing core does not receive a successful reception feedback within a preset waiting time, or receives a verification failure feedback, it does not update the historical instruction cache of the corresponding driver unit and switches the driver unit to resynchronization state.

[0056] In some embodiments, the communication processing core generates a check base sequence and a polynomial selection factor based on the target driving instruction successfully received by the driving unit in the previous cycle, or based on a preset initial instruction during the initial and resynchronization phases, including: Extract the target drive command that was successfully received by the corresponding drive unit in the previous control cycle or the preset initial command in the initial and resynchronization phases as the state feature vector. The state feature vectors are uniformly organized into 64-bit state feature vectors, and a 32-bit shift register initial seed value is generated based on the 64-bit state feature vectors. The initial seed value of the 32-bit shift register is input into the linear feedback shift register. After continuous shifting operations and output according to the data frame length or cyclic expansion, a parity base sequence consistent with the data frame length is generated. The state feature vector is summed and moduloed, and the resulting remainder value is mapped to a preset polynomial set index table. The corresponding generator polynomial is selected. The polynomial set contains multiple different generator polynomials, and the remainder value is used as the polynomial selection factor.

[0057] At the beginning of each control communication cycle, the communication processing core reads the actual target drive instruction that has been successfully received by the corresponding drive unit in the previous cycle from the cache. For example, an 8-byte instruction might be 0x1A2B3C4D5E6F7A8B. If it's the initial stage of a cold start or the resynchronization stage after a bus disconnection and reconnection, since there are no historical instructions from the previous cycle, the communication core reads a preset initial instruction hard-coded in the microcontroller's Flash memory, such as 0x55AA55AAA5A55A5A. This instruction content serves as a 64-bit state feature vector, which changes with the tension adjustment instructions of each control cycle during normal operation, causing the subsequent checksum sequence to have periodic variations.

[0058] The communication processing core XORs and folds the high 32 bits and low 32 bits of the extracted 64-bit state feature vector to obtain a 32-bit initial seed value, which is then loaded into a Galois linear feedback shift register array. When the XOR folding result is 0, a preset non-zero seed value is used instead, or the folding result is XORed again with a preset non-zero perturbation constant to obtain the 32-bit initial seed value. A preset 32-bit feedback polynomial is used, for example, with the tap coefficients configured as follows. The clock drive causes the shift register to perform logical left shift and bitwise XOR operation.

[0059] The linear feedback shift register continuously outputs pseudo-random bytes and truncates them according to the length of the current data frame. When the length of a single output is insufficient, a byte sequence with the same length as the current data frame is generated by continuous shift output or cyclic expansion, which serves as the parity base sequence for this period and is used for pre-XOR obfuscation with the current data frame.

[0060] Simultaneously, the state feature vector is divided into 8 independent segments by bytes, and an unsigned integer byte-level accumulation operation is performed, such as the sum of the above 8 bytes of data being 0x2A0. This accumulation is then used to perform a modulo operation on a preset constant N, which is set to N=8 here, representing the total number of available CRC polynomials, i.e., 0x2A0(mod8)=0.

[0061] The generated modulo remainder serves as a polynomial selection factor and is stored as an index pointer in an internally fixed lookup table containing eight different generator polynomials. This allows for the adaptive selection of a generator polynomial using the changing selection factor each cycle for cyclic redundancy check (CRC) code calculation. This feature vector-driven polynomial variation verification method helps improve the diversity of error detection for messages in different cycles and reduces the risk of missed detections under specific interference patterns using fixed verification rules.

[0062] In this application, a multi-layer composite fabric layer tension equalization control system is disclosed, the system comprising: The decoupling module is used to acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values; the preliminary control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command; The calculation module is used by the main control core to encapsulate the target driving instruction into a data frame and store it in shared memory, calculate the first digest; set the hardware semaphore and start the timer to trigger an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and performs fault handling if they are inconsistent or time out. The control module is used to generate a check base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command during the initial and resynchronization phases. The communication processing core XORs the data frame with the check base sequence to generate a confused data frame, and selects and generates a cyclic redundancy check (CRC) code based on the polynomial selection factor. The confused data frame and the CRC code are then sent to each drive unit via a bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the confused data frame, and restores the target drive command and controls the drive roller speed after the verification is successful.

[0063] In some embodiments, the main control core calculates the tension error based on the tension measurement value and the target value, and generates a preliminary control vector by combining the speed encoding value, including: Calculate the difference between the corresponding target value and the tension measurement value for each layer of fabric to obtain the tension error for each layer; The speed deviation of each layer is obtained by comparing the coded value of the drive roller speed of each layer with the corresponding coded value of the reference speed speed. Multiply the rotational speed deviation of each layer by a preset tension feedforward coefficient to obtain the corresponding tension feedforward compensation amount; The tension error of each layer is superimposed with the corresponding tension feedforward compensation amount to generate the tension compensation requirement of each layer; The tension compensation requirements of each layer are combined in hierarchical order to construct the preliminary control vector.

[0064] In some embodiments, the step of decoupling the initial control vector using the interlayer tension coupling coefficient matrix to obtain the target driving command includes: Obtain a pre-calibrated interlayer tension coupling coefficient matrix, wherein the elements of the coefficient matrix represent the degree of influence of the speed change of each layer of drive roller on the tension change of each layer of fabric. Calculate the inverse of the interlayer tension coupling coefficient matrix to obtain the decoupling matrix; Perform matrix multiplication between the decoupling matrix and the preliminary control vector to obtain the driving speed compensation amount for each layer. The driving speed compensation amount corresponding to each layer is superimposed with the current baseline driving speed to obtain the independent target driving speed for each layer; The independent target drive speeds of each layer are converted into corresponding drive motor control words to generate the target drive instructions.

[0065] In some embodiments, the main control core encapsulates the target driving instructions into data frames and stores them in shared memory, and calculates a first digest, including: Add a frame header identifier, device address identifier, data length identifier, and frame tail identifier to the target driving instruction to construct the original data frame; The original data frame is moved to a specified address area of ​​the dual-port random access memory shared by the main control core and the communication processing core via memory access. A secure hash algorithm is used to perform a hash operation on the core payload data of the original data frame, and a specified bit segment of the operation result is extracted as the first digest.

[0066] In some embodiments, setting the hardware semaphore and starting the timer to trigger an interrupt to the communication processing core includes: Write a preset trigger flag bit into the hardware semaphore register inside the dual-core processor to generate an inter-core interrupt request through hardware semaphores or IPC events; The general-purpose timer inside the main control core is activated as a monitoring timer to begin the countdown; If the main control core reads the second digest written by the communication processing core in the shared memory before the general-purpose timer overflows, and it is consistent with the first digest, then the hardware semaphore is cleared and the general-purpose timer is reset. If the general timer overflows or the digest comparison is inconsistent, a system fault interrupt is triggered, and the drive roller emergency stop and alarm process are executed.

[0067] In some embodiments, the communication processing core generates a check base sequence and a polynomial selection factor based on the target driving instruction successfully received by the driving unit in the previous cycle, or based on a preset initial instruction during the initial and resynchronization phases, including: Extract the target drive command that was successfully received by the corresponding drive unit in the previous control cycle or the preset initial command in the initial and resynchronization phases as the state feature vector. The state feature vectors are uniformly organized into 64-bit state feature vectors, and a 32-bit shift register initial seed value is generated based on the 64-bit state feature vectors. The initial seed value of the 32-bit shift register is input into the linear feedback shift register. After continuous shifting operations and output according to the data frame length or cyclic expansion, a parity base sequence consistent with the data frame length is generated. The state feature vector is summed and moduloed, and the resulting remainder value is mapped to a preset polynomial set index table. The corresponding generator polynomial is selected. The polynomial set contains multiple different generator polynomials, and the remainder value is used as the polynomial selection factor.

[0068] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for controlling the layered tension balance of a multi-layer composite fabric, characterized in that, include: Acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values; The initial control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command; wherein, the elements of the interlayer tension coupling coefficient matrix represent the degree of influence of the speed change of each layer of drive roller on the tension change of each layer of fabric. The main control core encapsulates the target driving instruction into a data frame and stores it in shared memory, and calculates the first digest; it sets the hardware semaphore and starts the timer, triggering an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and if they are inconsistent or time out, it performs fault handling. The communication processing core generates a verification base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command during the initial and resynchronization phases. The communication processing core XORs the data frame with the verification base sequence to generate a garbled data frame, and selects and generates a cyclic redundancy check (CRC) code based on the polynomial selection factor. The garbled data frame and the CRC code are then sent to each drive unit via the bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the garbled data frame, and restores the target drive command and controls the drive roller speed after the verification passes. The main control core calculates the tension error based on the measured tension value and the target value, and generates a preliminary control vector by combining the speed encoding value, including: Calculate the difference between the corresponding target value and the tension measurement value for each layer of fabric to obtain the tension error for each layer; The speed deviation of each layer is obtained by comparing the coded value of the drive roller speed of each layer with the corresponding coded value of the reference speed speed. Multiply the rotational speed deviation of each layer by a preset tension feedforward coefficient to obtain the corresponding tension feedforward compensation amount; The tension error of each layer is superimposed with the corresponding tension feedforward compensation amount to generate the tension compensation requirement of each layer; The tension compensation requirements of each layer are combined in hierarchical order to construct the preliminary control vector.

2. The method according to claim 1, characterized in that, The step of decoupling the initial control vector using the interlayer tension coupling coefficient matrix to obtain the target driving command includes: Obtain the pre-calibrated interlayer tension coupling coefficient matrix; Calculate the inverse of the interlayer tension coupling coefficient matrix to obtain the decoupling matrix; Perform matrix multiplication between the decoupling matrix and the preliminary control vector to obtain the driving speed compensation amount for each layer. The driving speed compensation amount corresponding to each layer is superimposed with the current baseline driving speed to obtain the independent target driving speed for each layer; The independent target drive speeds of each layer are converted into corresponding drive motor control words to generate the target drive instructions.

3. The method according to claim 2, characterized in that, The main control core encapsulates the target driving instructions into data frames and stores them in shared memory, and calculates the first digest, including: Add a frame header identifier, device address identifier, data length identifier, and frame tail identifier to the target driving instruction to construct the original data frame; The original data frame is moved to a specified address area of ​​the dual-port random access memory shared by the main control core and the communication processing core via memory access. A secure hash algorithm is used to perform a hash operation on the core payload data of the original data frame, and a specified bit segment of the operation result is extracted as the first digest.

4. The method according to claim 1, characterized in that, The process of setting the hardware semaphore and starting the timer to trigger an interrupt to the communication processing core includes: Write a preset trigger flag bit into the hardware semaphore register inside the dual-core processor to generate an inter-core interrupt request through hardware semaphores or IPC events; The general-purpose timer inside the main control core is activated as a monitor timer to begin the countdown; If the main control core reads the second digest written by the communication processing core in the shared memory before the general-purpose timer overflows, and it is consistent with the first digest, then the hardware semaphore is cleared and the general-purpose timer is reset. If the general timer overflows or the digest comparison is inconsistent, a system fault interrupt is triggered, and the drive roller emergency stop and alarm process are executed.

5. The method according to claim 1, characterized in that, The communication processing core generates a check base sequence and a polynomial selection factor based on the target drive instruction successfully received by the drive unit in the previous cycle, or based on a preset initial instruction during the initial and resynchronization phases, including: Extract the target drive command that was successfully received by the corresponding drive unit in the previous control cycle or the preset initial command in the initial and resynchronization phases as the state feature vector. The state feature vectors are uniformly organized into 64-bit state feature vectors, and a 32-bit shift register initial seed value is generated based on the 64-bit state feature vectors. The initial seed value of the 32-bit shift register is input into the linear feedback shift register. After continuous shifting operations and output according to the data frame length or cyclic expansion, a parity base sequence consistent with the data frame length is generated. The state feature vector is summed and moduloed, and the resulting remainder value is mapped to a preset polynomial set index table. The corresponding generator polynomial is selected. The polynomial set contains multiple different generator polynomials, and the remainder value is used as the polynomial selection factor.

6. A layered tension equalization control system for multi-layer composite fabrics, characterized in that, include: The decoupling module is used to acquire the tension measurement values ​​of each layer and the speed encoding values ​​of each drive roller; the main control core calculates the tension error based on the tension measurement values ​​and the target values, and generates a preliminary control vector by combining the speed encoding values. The initial control vector is decoupled using the interlayer tension coupling coefficient matrix to obtain the target drive command; wherein, the elements of the interlayer tension coupling coefficient matrix represent the degree of influence of the speed change of each layer of drive roller on the tension change of each layer of fabric. The calculation module is used by the main control core to encapsulate the target driving instruction into a data frame and store it in shared memory, calculate the first digest; set the hardware semaphore and start the timer to trigger an interrupt to the communication processing core; the communication processing core reads the data frame, calculates the second digest and writes it into the shared memory; the main control core compares the digests before the timer overflows, and performs fault handling if they are inconsistent or time out. The control module is used to generate a check base sequence and a polynomial selection factor based on the target drive command successfully received by the drive unit in the previous cycle, or based on a preset initial command in the initial and resynchronization phases. The communication processing core XORs the data frame with the check base sequence to generate a confused data frame, and selects and generates a polynomial cyclic redundancy check (CRC) code according to the polynomial selection factor. The confused data frame and the CRC code are then sent to each drive unit via the bus. Each drive unit reproduces the verification process based on the target drive command successfully received in the previous cycle or the preset initial command, verifies the confused data frame, and restores the target drive command and controls the drive roller speed after the verification is successful. The main control core calculates the tension error based on the measured tension value and the target value, and generates a preliminary control vector by combining the speed encoding value, including: Calculate the difference between the corresponding target value and the tension measurement value for each layer of fabric to obtain the tension error for each layer; The speed deviation of each layer is obtained by comparing the coded value of the drive roller speed of each layer with the corresponding coded value of the reference speed speed. Multiply the rotational speed deviation of each layer by a preset tension feedforward coefficient to obtain the corresponding tension feedforward compensation amount; The tension error of each layer is superimposed with the corresponding tension feedforward compensation amount to generate the tension compensation requirement of each layer; The tension compensation requirements of each layer are combined in hierarchical order to construct the preliminary control vector.

7. The system according to claim 6, characterized in that, The step of decoupling the initial control vector using the interlayer tension coupling coefficient matrix to obtain the target driving command includes: Obtain the pre-calibrated interlayer tension coupling coefficient matrix; Calculate the inverse of the interlayer tension coupling coefficient matrix to obtain the decoupling matrix; Perform matrix multiplication between the decoupling matrix and the preliminary control vector to obtain the driving speed compensation amount for each layer. The driving speed compensation amount corresponding to each layer is superimposed with the current baseline driving speed to obtain the independent target driving speed for each layer; The independent target drive speeds of each layer are converted into corresponding drive motor control words to generate the target drive instructions.

8. The system according to claim 6, characterized in that, The main control core encapsulates the target driving instructions into data frames and stores them in shared memory, and calculates the first digest, including: Add a frame header identifier, device address identifier, data length identifier, and frame tail identifier to the target driving instruction to construct the original data frame; The original data frame is moved to a specified address area of ​​the dual-port random access memory shared by the main control core and the communication processing core via memory access. A secure hash algorithm is used to perform a hash operation on the core payload data of the original data frame, and a specified bit segment of the operation result is extracted as the first digest.

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