Multi-modal puf generation method and system based on dynamic filter order regulation

Abstract

This invention discloses a multimodal PUF generation method and system based on dynamic filter order control, belonging to the fields of hardware security and integrated circuit technology. The method includes: pausing the conventional filtering task and putting the digital signal processor (DSP) into a timing violation state; obtaining the current chip junction temperature and the filter order of the conventional filtering task, and determining the maximum allowable total filter order that meets reliability requirements using a temperature-total filter order-reliability lookup table; determining the filter order of the PUF modulation filtering task and setting other parameters, and executing the PUF modulation filtering task; acquiring the metastable output signal generated by the DSP, performing quantization processing, and obtaining the PUF response sequence. This invention can dynamically adjust the filter order of the PUF modulation filtering task according to the real-time temperature of the DSP and the filter order of the conventional filtering task, significantly improving the randomness under low load while ensuring that the PUF response reliability is not lower than a preset threshold.

Description

Technical Field

[0001] This invention relates to the fields of hardware security and integrated circuit technology, and in particular to a method and system for generating multimodal PUF (Physical Unclonable Function) based on dynamic filter order control, which is especially suitable for identity authentication and key generation of IoT devices with limited resources. Background Technology

[0002] Physically Unclonable Functions (PUFs) leverage unavoidable process variations in integrated circuit manufacturing to extract unique "fingerprint" information from a chip, possessing physical unclonability. This provides a lightweight authentication method for resource-constrained IoT devices. Based on whether they rely on dedicated custom circuitry, PUFs can be categorized into hardware PUFs (PUFs based on custom hardware circuitry) and software PUFs (PUFs that reuse existing hardware modules in the processor or memory). While hardware PUFs offer better randomness, they require additional custom circuitry, increasing area overhead; software PUFs, on the other hand, do not require additional custom circuitry and offer advantages in terms of cost and flexibility.

[0003] As the core unit for processing sensor data in IoT nodes, the Digital Signal Processor (DSP) provides abundant entropy sources for timing violation-based software push-form flow (PUF) design through its integrated register array, combinational logic paths, and flexible clock management module. The basic principle of timing violation-based PUF is that in synchronous circuits, data transmission between registers must satisfy setup and hold time constraints. When the operating frequency exceeds the rated operating frequency (normal operating clock frequency), i.e., when an overclocked clock is used, the data transmission path between registers violates the setup time constraint. The register output enters a metastable state and eventually stabilizes at a logic value determined by the microscopic differences in path delay, thus generating a random response unique to the chip.

[0004] PUF based on timing violations is an important technical approach to achieving intrinsic PUF response in DSPs. However, current research mostly focuses on PUF response extraction under static or fixed load conditions, failing to fully consider the dual impact of dynamic changes in DSP workload on the randomness and reliability of PUF response in real-world IoT applications. In practical IoT scenarios, DSPs typically continuously perform routine filtering tasks, such as audio filtering, communication channel equalization, and sensor noise reduction. When online PUF response generation is required, the DSP must complete this within milliseconds, without allowing for chip cooling. In this situation, when the filter order of the routine filtering task is low, overclocking timing violations are mainly caused by a few short paths, causing the ratio of logic "0" to logic "1" in the register output to deviate from the ideal value (50%), resulting in insufficient randomness in the PUF response and vulnerability to modeling attacks. Conversely, when the filter order of the routine filtering task is high and the ambient temperature is high, the chip junction temperature rises, timing violations worsen, and the reliability of the PUF response may drop to a level that fails to meet security certification requirements.

[0005] When a DSP performs filtering tasks of varying complexity, the difference in filter order leads to a linear change in the number of multiply-accumulate operations, thereby activating combinational logic paths of different lengths and types. Simultaneously, variations in filtering task complexity also cause differences in the dynamic power consumption within the DSP, which in turn alters the DSP temperature and ultimately affects the probability of timing violations and metastable output characteristics. These dynamic effects have been generally overlooked in existing research.

[0006] In summary, existing solutions cannot dynamically adjust PUF generation parameters based on the current DSP temperature and the filter order of the routine filtering task. They cannot proactively improve PUF response randomness under low load, nor can they effectively maintain PUF response reliability under high load and high temperature. Therefore, it is necessary to provide a technique that can dynamically adjust PUF generation parameters based on the real-time DSP temperature and the filter order of the routine filtering task, so as to significantly improve randomness under low load while ensuring that PUF response reliability does not fall below a preset threshold. Summary of the Invention

[0007] This invention aims to solve the problem that existing digital signal processor (DSP) PUF schemes cannot dynamically adjust PUF generation parameters according to the real-time temperature of the DSP and the filter order of the conventional filtering task, resulting in insufficient randomness of PUF response under low load and reliability that may be lower than the preset threshold under high load and high temperature. The invention provides a multimodal PUF generation method and system based on dynamic filter order control.

[0008] To solve the above-mentioned technical problems, the present invention provides the following technical solution: Firstly, the present invention provides a multimodal PUF generation method based on dynamic filter order control. When a digital signal processor is performing a conventional filtering task and needs to generate a PUF response online without waiting for the chip to cool down, the following steps are performed: First, the regular filtering task is paused, and the operating clock frequency of the digital signal processor is configured to be higher than its rated operating frequency, that is, the operating clock frequency of the digital signal processor is an overclocked clock; at this time, the data transmission paths between most registers inside the digital signal processor violate the setup time constraint, and the digital signal processor enters a timing violation state. Then, when the digital signal processor is in a timing violation state, the current chip junction temperature (current temperature of the digital signal processor) and the filter order of the regular filtering task are obtained. Based on the chip junction temperature, the maximum value of the total filter order with a reliability not less than a preset reliability threshold at the corresponding temperature is selected from the pre-calibrated temperature-total filter order-reliability lookup table as the maximum allowable total filter order. Next, the difference between the maximum allowed total filtering order and the filter order of the conventional filtering task is calculated, and it is determined whether the difference is less than zero. If the difference is less than zero, zero is taken as the filter order of the PUF modulation filtering task; otherwise, the difference is taken as the filter order of the PUF modulation filtering task. The PUF modulation filtering task is an independently controlled filtering task that is actively injected with the purpose of generating a physically unclonable function (PUF) response, independent of the conventional filtering task. Finally, other parameters of the PUF modulation and filtering task are set, the PUF modulation and filtering task is executed, the metastable output signal generated by timing violations during the execution of the PUF modulation and filtering task by the digital signal processor is collected, and the metastable output signal is quantized to obtain the PUF response sequence. After that, the regular filtering task is resumed. The length of the PUF response sequence (i.e., the number of data bits) is a preset value, which is set according to the actual usage requirements.

[0009] Compared with the prior art, the advantages of the present invention are as follows: (i) Wide-temperature reliability maintenance. This invention selects the maximum value of the total filtering order with a reliability not less than a preset reliability threshold from a pre-calibrated temperature-total filtering order-reliability lookup table based on the chip junction temperature, so that the PUF response can maintain the preset reliability threshold under different temperature conditions.

[0010] (ii) Improving randomness under low load while ensuring reliability. This invention calculates the difference between the maximum allowable total filtering order and the filter order of a conventional filtering task. When the difference is positive, the filter order of the PUF modulation filtering task is set to this difference, thereby improving randomness under low load while ensuring that the total filtering order does not exceed the reliability threshold.

[0011] (III) Support for multimodal PUF response generation. In this invention, when the filter order or chip junction temperature changes in a conventional filtering task, the difference between the maximum allowable total filter order and the filter order of the conventional filtering task changes accordingly. The filter order of the PUF modulation filtering task changes accordingly. The digital signal processor activates different combinations of logic paths under PUF modulation filtering tasks with different filter orders, thereby generating metastable output signals with different statistical characteristics. After quantization processing, PUF response sequences with different statistical characteristics can be obtained, realizing multimodal response generation.

[0012] (iv) Online PUF generation without waiting for chip cooling. This invention uses a temperature sensing and lookup table control mechanism to directly generate the PUF response at the current chip temperature, without waiting for the chip to cool down.

[0013] In summary, this invention can dynamically adjust the PUF generation parameters (i.e., the filter order of the PUF modulation filtering task) according to the real-time temperature of the DSP and the filter order of the conventional filtering task, thereby significantly improving the randomness of the PUF response sequence under low load and maintaining the reliability stably above the preset reliability threshold under different temperature and load conditions, thus solving the problems existing in the prior art.

[0014] In a further technical solution, other parameters of the PUF modulation filtering task include the filter type, which is selected from one of the following: Finite Impulse Response (FIR) filter, Infinite Impulse Response (IIR) filter, low-pass filter, high-pass filter, band-pass filter, and band-stop filter.

[0015] As a preferred technical solution, the operating clock frequency is located in the range of 1.3 to 2.5 times the rated operating frequency.

[0016] In a further technical solution, the chip junction temperature is obtained through a temperature sensor, and the filter order of the conventional filtering task is obtained through a task scheduler.

[0017] In a further technical solution, the quantization process includes: binarizing the metastable output signal to obtain a binarized data sequence; dividing the binarized data sequence into data groups from high to low bits according to a preset grouping length L, with each L bits of data forming a data group, and discarding any data with fewer than L bits remaining at the end, wherein the grouping length L is an odd number greater than 1; using a majority decision method within each data group, taking the value that appears most frequently in each data group as the logical value of that data group, and concatenating the logical values ​​of all data groups in sequence to form a PUF response sequence.

[0018] Preferably, L = 3, 5, or 7.

[0019] Secondly, the present invention also provides a multimodal PUF generation system based on dynamic filter order control. This system is used to implement the aforementioned multimodal PUF generation method based on dynamic filter order control, and includes a digital signal processor, wherein the digital signal processor includes: The core of a digital signal processor includes a register array, an arithmetic logic unit, and at least one combinational logic path; Programmable phase-locked loop (PLL) for providing configurable overclocking clocks to digital signal processors; The task scheduler is used to set the filter order of the PUF modulation filtering task based on the current chip junction temperature and the filter order of the regular filtering task. A response acquisition unit is used to acquire the metastable output signal generated by the digital signal processor during the execution of the PUF modulation and filtering task. A temperature sensor is used to detect the temperature of the digital signal processor on-chip. And a quantization output unit, used to quantize the metastable output signal to obtain a PUF response sequence.

[0020] In a further technical solution, the task scheduler determines the filter order of the PUF modulation filtering task based on the temperature fed back by the temperature sensor and the current filter order of the conventional filtering task, according to its pre-stored temperature-total filter order-reliability lookup table, so that the sum of the filter orders of the conventional filtering task and the PUF modulation filtering task does not exceed the maximum allowable total filter order that meets the preset reliability threshold.

[0021] In a further technical solution, the quantization output unit includes a comparator and a majority decision unit; the comparator is used to binarize the metastable output signal to obtain a binarized data sequence; the majority decision unit is used to first divide the binarized data sequence into data groups from high to low bits according to a preset grouping length L, with each L bits of data forming a data group, and discarding any data with fewer than L bits remaining at the end, where the grouping length L is an odd number greater than 1; then, within each data group, the majority decision method is used, with the value that appears most frequently in each data group being taken as the logical value of that data group, and then the logical values ​​of all data groups are concatenated in sequence to form a PUF response sequence.

[0022] Preferably, L = 3, 5, or 7. Attached Figure Description

[0023] Figure 1 This is a flowchart of the multimodal PUF generation method based on dynamic filter order control of the present invention; Figure 2 This is a simplified diagram of the DSP internal timing violation analysis of the multi-modal PUF generation method based on dynamic filter order control according to the present invention; wherein, the upper part is a schematic diagram of the data transmission path inside the DSP, and the lower part is a schematic diagram of the timing violation metastable output under overclocking clock. Figure 3 This is a bar chart comparing the percentage of logic "0" in the baseline and experimental groups under different filtering orders for a conventional filtering task at 20℃; the left bar represents the baseline group and the right bar represents the experimental group. Figure 4 The graph shows the reliability comparison between the baseline group and the experimental group (conventional 15th-order adaptive control) at different temperatures. Detailed Implementation

[0024] With the deep penetration of IoT technology into smart cities, industrial automation, and smart homes, the massive number of devices connecting to the network has led to increasingly serious security threats such as data privacy leaks and device identity forgery. IoT edge devices typically face strict constraints in terms of computing power, storage resources, and power consumption, making traditional high-complexity encryption schemes difficult to deploy directly due to their high resource consumption. Therefore, implementing lightweight, highly secure identity authentication and key generation mechanisms on resource-constrained hardware platforms has become a core issue that urgently needs to be addressed in the current IoT security field.

[0025] In view of this, the present invention generates multiple PUF response modes with independent statistical characteristics on the same DSP chip by actively changing the parameters of the internal PUF modulation and filtering task, including filter order and filter type. At the same time, by sensing the external application load (i.e., the conventional filtering task) and temperature in real time, the optimal parameters of the internal modulation load (i.e., the PUF modulation and filtering task) are dynamically determined, so that the synthesis load is always maintained within the preset reliability target range. Thus, high reliability is maintained under a wide temperature range and dynamic external application load, without additional hardware overhead. Finally, a lightweight and highly secure identity authentication and key generation mechanism is realized on a resource-constrained hardware platform.

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be described in detail and completely below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can understand and implement them. The embodiments described in this section are only used to illustrate the technical solutions of this invention and are not intended to limit the scope of protection of this invention.

[0027] Example 1: This example provides a multimodal PUF generation method based on dynamic filter order control. This multimodal PUF generation method is used when a digital signal processor is performing a routine filtering task, requires online generation of PUF responses, and cannot wait for the digital signal processor to cool down. Figure 1 This is a flowchart of the multimodal PUF generation method.

[0028] In this embodiment, the digital signal processor uses Texas Instruments' TMS320F28335 DSP chip as its hardware platform. This chip employs a 90 nm CMOS process and has a rated operating frequency of 150 MHz. The DSP chip integrates a C28x32-bit CPU core, a 32×32-bit multiplier, an arithmetic logic unit (ALU), a 32-bit floating point unit (FPU), and multiple sets of general-purpose registers. The combinational logic cascaded between the D flip-flops within the DSP chip forms multiple data transmission paths (path 1, path 2, ..., path m, where m represents the total number of data transmission paths formed within the DSP chip). Under overclocking conditions, each path exhibits different timing violation sensitivities due to differences in propagation delay, providing a hardware basis for the generation of timing violation entropy sources. In addition, the digital signal processor includes a programmable phase-locked loop for generating a configurable overclocking clock; a temperature sensor for on-chip junction temperature detection; a task scheduler for obtaining the filter order for regular filtering tasks; a response acquisition unit for acquiring metastable output signals; and a quantization output unit for converting the acquired signals into a PUF response sequence.

[0029] likeFigure 1 As shown, the multimodal PUF generation method of this embodiment performs the following steps when the digital signal processor is performing a conventional filtering task, needs to generate the PUF response online, and cannot wait for the chip to cool down: Step 1: Pause the regular filtering task and configure the operating clock frequency of the digital signal processor to be 1.3 to 2.5 times the rated operating frequency of the digital signal processor; at this time, the data transmission paths between most registers inside the digital signal processor violate the setup time constraint, and the digital signal processor enters a timing violation state. Step 2: When the digital signal processor is in a timing violation state, obtain the current chip junction temperature (real-time temperature of the digital signal processor) through the temperature sensor and obtain the filter order of the regular filtering task through the task scheduler. Based on the chip junction temperature, look up the pre-calibrated temperature-total filter order-reliability lookup table to determine the corresponding temperature of the current chip junction temperature. Select the maximum value among all total filter orders with a reliability not less than the preset reliability threshold from the row where the corresponding temperature is located, and take the maximum value as the maximum allowable total filter order. Step 3: Calculate the difference between the maximum allowable total filtering order and the filter order of the conventional filtering task, and determine whether the difference between the maximum allowable total filtering order and the filter order of the conventional filtering task is less than zero. If it is less than zero, then zero is taken as the filter order of the PUF modulation filtering task; otherwise, the difference is taken as the filter order of the PUF modulation filtering task. The PUF modulation filtering task is an independent filtering task that is actively injected with the purpose of generating a physically unclonable function (PUF) response and whose parameters can be independently adjusted, independent of the conventional filtering task. Step 4: Set the filter type for the PUF modulation and filtering task. The filter type is selected from one of the following: FIR filter, IIR filter, low-pass filter, high-pass filter, band-pass filter, and band-stop filter. Execute the PUF modulation and filtering task, collect the metastable output signal generated by timing violations during the execution of the PUF modulation and filtering task by the digital signal processor, binarize the metastable output signal to obtain a binarized data sequence. Divide the binarized data sequence into multiple data groups according to a preset fixed odd grouping length L (L is 5 in this embodiment) (if the remaining bits at the end are less than L, they are discarded). In each data group, the majority decision method is used, and the logic value that appears most frequently in the group is taken as the logic value of the data group. Concatenate the logic values ​​of all data groups in order to form the PUF response sequence.

[0030] In this embodiment, the temperature-total filter order-reliability lookup table can be pre-calibrated as follows: The chip junction temperature range from 0℃ to 90℃ is divided into 10 temperature points in 10℃ increments: 0℃, 10℃, 20℃, 30℃, 40℃, 50℃, 60℃, 70℃, 80℃, and 90℃. For each temperature point, the total filtering order is set to 5, 10, 15, 20, and 25 respectively. At this point, multiple combinations of temperature points and total filter order are obtained: 0℃ and 5th order, 0℃ and 10th order, 0℃ and 15th order, 0℃ and 20th order, 0℃ and 25th order, 10℃ and 5th order, 10℃ and 10th order, 10℃ and 15th order, 10℃ and 20th order, 10℃ and 25th order, 20℃ and 5th order, 20℃ and 10th order, 20℃ and 15th order, 20℃ and 20th order, 20℃ and 25th order, 30℃ and 5th order, 30℃ and 10th order, 30℃ and 15th order, 30℃ and 20th order, 30℃ and 25th order, 40℃ and 5th order, 40℃ and 10th order, 40℃ and 15th order, 40℃ and 20th order, 4 0℃ and 25th order, 50℃ and 5th order, 50℃ and 10th order, 50℃ and 15th order, 50℃ and 20th order, 50℃ and 25th order, 60℃ and 5th order, 60℃ and 10th order, 60℃ and 15th order, 60℃ and 20th order, 60℃ and 25th order, 70℃ and 5th order, 70℃ and 10th order, 70℃ and 15th order, 70℃ and 20th order, 70℃ and 25th order, 80℃ and 5th order, 80℃ and 10th order, 80℃ and 15th order, 80℃ and 20th order, 80℃ and 25th order, 90℃ and 5th order, 90℃ and 10th order, 90℃ and 15th order, 90℃ and 20th order, 90℃ and 25th order.

[0031] For each temperature point, the junction temperature of the digital signal processor chip is first heated or cooled to that temperature point and kept stable using an external temperature chamber. After the chip junction temperature stabilizes, for each total filter order setting value at that temperature point, the filter order of the regular filtering task is set to 0, and the filter order of the PUF modulation filtering task is set to be equal to the total filter order setting value. The filter type of the PUF modulation filtering task is set to a finite impulse response low-pass filter. The test is repeated less than 100 times. The digital signal processor is run under an overclocked clock and enters a timing violation state. The metastable output signal generated by the timing violation during the execution of the PUF modulation filtering task is collected. The metastable output signal is binarized to obtain a binarized data sequence. The binarized data sequence is divided into multiple data groups according to a group length of 5, in order from the high bit to the low bit (if the remaining bits at the end are less than 5 bits, they are discarded). In each data group, the majority decision method is used, and the value that appears most frequently in the data group is used as the logical value of the data group. The logical values ​​of all data groups are concatenated in order to form a PUF response sequence.

[0032] For each temperature point and total filter order combination, the obtained PUF response sequence is compared with the global reference PUF response sequence, and the Hamming distance between the two is calculated, resulting in 100 Hamming distances. The arithmetic mean of these 100 Hamming distances is then taken. Press [1-( The reliability corresponding to each temperature point and the total filter order combination is calculated by multiplying the length of the PUF response sequence by 100%.

[0033] A lookup table is constructed using temperature points as row indices (0℃, 10℃, 20℃, 30℃, 40℃, 50℃, 60℃, 70℃, 80℃, 90℃) and total filter order as column indices (5, 10, 15, 20, 25). The reliability corresponding to each temperature point and total filter order combination is filled into the corresponding position in the lookup table to form a temperature-total filter order-reliability lookup table.

[0034] The global reference PUF response sequence is obtained as follows: Under preset standard calibration environmental conditions (temperature 25℃±2℃, digital signal processor does not perform conventional filtering tasks), the digital signal processor is configured as an overclocked clock, running a PUF modulation filtering task with a filter order of 5, repeatedly acquiring 100 sets of metastable output signals. For each set of metastable output signals, binarization is performed to obtain a binarized data sequence. The binarized data sequence is then grouped according to a preset grouping length of 5. Within each group, the majority decision method is used, and the logic value that appears most frequently in the group is taken as the logic value of that group. The logic values ​​of all groups are concatenated in order to obtain the PUF response sequence of that group, thus obtaining 100 sets of PUF response sequences. After aligning the 100 sets of PUF response sequences bit by bit, for each bit, the number of times the logic value "0" appears and the number of times the logic value "1" appears in that bit are counted. The logic value that appears more frequently is taken as the final logic value of that bit. The final logic values ​​of all bits are concatenated in their original order to obtain the global reference PUF response sequence.

[0035] In practical applications, the number and interval of temperature points, as well as the number and interval of the total filter order, can be set according to requirements to obtain the corresponding number of temperature point and total filter order combinations. Theoretically, the smaller the temperature point interval and the larger the number of temperature points, the smaller the total filter order interval for each temperature point and the larger the number of temperature points, thus covering more temperature point and total filter order combinations in the temperature-total filter order-reliability lookup table. However, in practical applications, it is impossible to cover all temperature point and total filter order combinations. Therefore, for other temperature points not listed in the temperature-total filter order-reliability lookup table, the nearest neighbor conservative value method is used to determine the maximum allowable total filter order, specifically: If the chip junction temperature falls between two temperature points in the temperature-total filter order-reliability lookup table, then the maximum value of the total filter order at each of these two temperature points is obtained, provided that the reliability is not less than the preset reliability threshold. If the maximum value of the total filter order at one temperature point is less than the maximum value of the total filter order at the other temperature point, then that temperature point is the corresponding temperature of the chip junction temperature, and the maximum value of the total filter order at that corresponding temperature is taken as the maximum allowable total filter order. If the maximum values ​​of the total filter order at two temperature points are equal, then either of these two temperature points is the corresponding temperature of the chip junction temperature, and the maximum value of the total filter order at that corresponding temperature is taken as the maximum allowable total filter order. If the chip junction temperature is lower than the lowest temperature point in the reference table, then the lowest temperature point is the corresponding temperature of the chip junction temperature. The maximum value of the total filtering order at the lowest temperature point under the condition that the reliability is not lower than the preset reliability threshold is taken as the maximum allowable total filtering order. If the chip junction temperature is higher than the highest temperature point in the reference table, then the highest temperature point is the corresponding temperature of the chip junction temperature. The maximum total filter order at the highest temperature point is taken as the maximum allowable total filter order under the condition that the reliability is not lower than the preset reliability threshold.

[0036] Example 2: Verification of Stochasticity and Reliability under Bivariate Adaptive Control of Temperature and Load To verify the effectiveness of the present invention, the multimodal PUF generation method of Example 1 was systematically tested under baseline conditions without regulation (baseline group) and experimental conditions with adaptive regulation (experimental group).

[0037] Benchmark group: The filter order of the PUF modulation filtering task is zero, that is, only the conventional filtering task is performed, the temperature range is 0℃ to 90℃, the step size is 10℃, and the filter order of the conventional filtering task is 5th, 10th, 15th, 20th and 25th. At each temperature point and at each filter order combination, the metastable output signal generated by the digital signal processor due to timing violations is repeatedly acquired 100 times. The metastable output signal acquired each time is quantized to obtain a 32,000-bit PUF response sequence, which is used to characterize the performance of the existing scheme under dynamic load.

[0038] Experimental Group: Introducing the adaptive control mechanism of this invention, the test consisted of two parts: First, a randomness test, using the multimodal PUF generation method of Example 1. At 20°C, for five different conventional filtering tasks (5th, 10th, 15th, 20th, and 25th order), the DSP chip automatically calculated and injected the corresponding PUF modulation filtering task's filter order. For each filter order, the metastable output signal generated by the digital signal processor due to timing violations was repeatedly acquired 100 times. Each acquired metastable output signal was quantized. The first step was to obtain a 32,000-bit PUF response sequence and measure the proportion of logic "0". The second step was to test reliability. The filter order of the conventional filtering task was fixed at 15. At each temperature point from 0℃ to 90℃ (step size 10℃), the corresponding PUF modulation filtering task was injected using an adaptive control mechanism. At each temperature point, the metastable output signal generated by the digital signal processor due to timing violations was repeatedly collected 100 times. The metastable output signal collected each time was quantized to obtain a 32,000-bit PUF response sequence, and the reliability of the PUF response sequence was measured.

[0039] When online PUF response generation is required, the experimental group's multimodal PUF generation method first pauses the regular filtering task and configures an overclocking clock to put the DSP into a timing violation state. A simplified diagram of the DSP's internal timing violation analysis is shown below. Figure 2 As shown; then, the current chip junction temperature and the filter order of the regular filtering task are obtained. The corresponding temperature of the current chip junction temperature is determined from the pre-calibrated temperature-total filter order-reliability lookup table, and the maximum value of the total filter orders with a reliability not less than a preset reliability threshold (set to 90% in this embodiment) at the corresponding temperature is selected as the maximum allowable total filter order; then, the filter order of the PUF modulation filtering task is determined according to the difference between the maximum allowable total filter order and the filter order of the regular filtering task; then, the filter type of the PUF modulation filtering task is set (an FIR low-pass filter is selected in this embodiment), the PUF modulation filtering task is executed, the metastable output signal is collected and quantized to obtain the PUF response sequence, and finally, the randomness and reliability data at each filter order are calculated through the PUF response sequence. For the benchmark group, the PUF modulation filtering task is not injected in the overclocking state, and only a very simple empty loop is run, so that the filter order of the PUF modulation filtering task is zero, and the rest is the same as the experimental group.

[0040] Randomness results: At 20℃, the percentage of logic "0" measured in the benchmark group gradually approaches 50% with increasing filter order, specifically 42.12% for 5th order, 44.61% for 10th order, 47.14% for 15th order, 49.29% for 20th order, and 49.76% for 25th order. Figure 3As shown in the baseline group, it can be seen that the randomness is poor at lower orders, making it susceptible to modeling attacks. After adaptive adjustment, the proportion of logic "0" in the experimental group increased to 49.6%~49.8% (49.69% for 5th order, 49.68% for 10th order, 49.75% for 15th order, 49.74% for 20th order, and 49.76% for 25th order) for different filter orders in various conventional filtering tasks. Figure 3 As shown in the bar chart of the experimental group, the randomness was significantly improved to nearly the ideal value of 50%.

[0041] Reliability results: The reliability of the benchmark group at different temperatures is as follows: Figure 4 As shown in the baseline curves, reliability decreases with increasing filter order and temperature. For example, at 20℃, the reliability of the 5th order is 98.93%, the 15th order is 97.82%, and the 25th order is 95.87%; at 90℃, the reliability of the 5th order is 92.06%, the 15th order is 90.27%, and the 25th order is 87.96% (below the 90% threshold). The reliability curves of the experimental group are shown below. Figure 4 As shown in the experimental group curves, the reliability was not lower than 90% threshold at all temperature points, with the lowest point being 90.04% at 90℃. Meanwhile, the randomness data from the experimental group indicate that injecting high-order PUF modulation tasks under low load can achieve a significant improvement in randomness by sacrificing a small amount of reliability, while the reliability remains above the 90% threshold.

[0042] The above results show that the present invention can improve randomness to near ideal value under low load by increasing the filter order of the PUF modulation and filtering task, while keeping the reliability stable above 90% by limiting the total filter order; under high load and high temperature, the reliability is avoided from further decreasing by reducing the filter order of the PUF modulation and filtering task, thus effectively solving the problem of insufficient randomness under low load while ensuring that the reliability is not lower than the preset threshold.

[0043] Example 3: Verification of Multimodal PUF Response Generation Capability This embodiment aims to highlight one of the core inventive points of the present invention: by dynamically changing the filter order of the PUF modulation and filtering task in the multimodal PUF generation method of Embodiment 1, multiple PUF response sequences with different statistical characteristics are generated autonomously without relying on changes in external load, thereby providing a massive response space for multimodal identity authentication and challenge-response extension.

[0044] The experiment was conducted under the condition that the order of the conventional filtering task was zero. In this case, the total filtering order was entirely determined by the order of the PUF modulation filtering task, thus allowing for an independent examination of the impact of different PUF modulation filtering task orders on the randomness of the PUF response. The temperature was fixed at 20℃, and PUF modulation filtering tasks with filter orders of 5, 10, 15, 20, and 25 were executed respectively.

[0045] To demonstrate the good randomness of PUF response sequences with different statistical properties, metastable output signals obtained from PUF modulation and filtering tasks with filter orders of 15, 20, and 25 were quantized to obtain the corresponding PUF response sequences. Then, NIST SP800-22 randomness testing was conducted according to the NIST SP800-22 randomness testing standard. Taking the 15th order as an example, the test results are shown in Table 1.

[0046] Table 1. NIST randomness test results for PUF modulation filtering task at 20℃ with filter order of 15.

[0047] Analysis of the data in Table 1 shows that the p-values ​​(significance probability, which represents the probability of the current result or a more extreme result when the test sequence is a true random sequence) of all test items are greater than 0.01, and all of them passed. Similar results were obtained for other orders.

[0048] The multimodal generation capability demonstrated in this embodiment is independent of the adaptive control mechanism in Embodiment 2, but they can work together.

[0049] In practical applications, users can actively change the filter order of the PUF modulation and filtering task to generate multiple different PUF response sequences under the condition of fixing the filter order of the conventional filtering task, for use with multiple keys or different authentication channels. Alternatively, they can first stabilize the total filter order within the reliable region through adaptive adjustment, and then change the filter order within the reliable region to further expand the PUF response space. Therefore, by changing the filter order of the PUF modulation and filtering task, this invention enables the same digital signal processor chip to generate multiple PUF response sequences with different statistical characteristics, and each PUF response sequence has good randomness, providing a rich key source and challenge-response pair space for lightweight IoT identity authentication.

Claims

1. A method for generating multimodal PUFs based on dynamic filter order control, characterized in that, When a digital signal processor is performing a routine filtering task, needs to generate a PUF response online, and cannot wait for the chip to cool down, the following steps are performed: First, the regular filtering task is paused, and the operating clock frequency of the digital signal processor is configured to be higher than its rated operating frequency, so that the digital signal processor enters a timing violation state. Then, obtain the current chip junction temperature and the filter order of the conventional filtering task. Based on the chip junction temperature, select the maximum value of the total filter order with a reliability not less than the preset reliability threshold at the corresponding temperature from the pre-calibrated temperature-total filter order-reliability lookup table as the maximum allowable total filter order. Next, the difference between the maximum allowed total filter order and the filter order of the conventional filtering task is calculated. If the difference is less than zero, zero is taken as the filter order of the PUF modulation filtering task; otherwise, the difference is taken as the filter order of the PUF modulation filtering task. Finally, other parameters of the PUF modulation and filtering task are set, the PUF modulation and filtering task is executed, the metastable output signal generated by timing violations during the execution of the PUF modulation and filtering task by the digital signal processor is collected, the metastable output signal is quantized to obtain the PUF response sequence, and then the regular filtering task is resumed.

2. The multimodal PUF generation method according to claim 1, characterized in that, Other parameters of the PUF modulation filtering task include the filter type, which is selected from one of the following: FIR filter, IIR filter, low-pass filter, high-pass filter, band-pass filter, and band-stop filter.

3. The multimodal PUF generation method according to claim 1, characterized in that, The operating clock frequency is in the range of 1.3 to 2.5 times the rated operating frequency.

4. The multimodal PUF generation method according to claim 1, characterized in that, The chip junction temperature is obtained through a temperature sensor, and the filter order of the conventional filtering task is obtained through a task scheduler.

5. The multimodal PUF generation method according to claim 1, characterized in that, The quantization process includes: binarizing the metastable output signal to obtain a binarized data sequence; dividing the binarized data sequence into data groups from high to low bits according to a preset grouping length L, with each L bits forming a data group, and discarding any data with fewer than L bits remaining at the end; using a majority decision method within each data group, taking the value that appears most frequently in each data group as the logical value of that data group, and concatenating the logical values ​​of all data groups in sequence to form a PUF response sequence; the grouping length L is an odd number greater than 1.

6. A multimodal PUF generation system based on dynamic filter order control, used to implement the multimodal PUF generation method according to any one of claims 1 to 5, characterized in that, Includes a digital signal processor, the digital signal processor comprising: The core of a digital signal processor includes a register array, an arithmetic logic unit, and at least one combinational logic path; Programmable phase-locked loop (PLL) for providing configurable overclocking clocks to digital signal processors; The task scheduler is used to set the filter order of the PUF modulation filtering task based on the current chip junction temperature and the filter order of the regular filtering task. A response acquisition unit is used to acquire the metastable output signal generated by the digital signal processor during the execution of the PUF modulation and filtering task. A temperature sensor is used to detect the temperature of the digital signal processor on-chip. And a quantization output unit, used to quantize the metastable output signal to obtain a PUF response sequence.

7. The multimodal PUF generation system according to claim 6, characterized in that, The task scheduler determines the filter order of the PUF modulation filtering task based on the temperature fed back by the temperature sensor and the current filter order of the regular filtering task, according to its pre-stored temperature-total filter order-reliability lookup table, so that the sum of the filter orders of the regular filtering task and the PUF modulation filtering task does not exceed the maximum allowable total filter order that meets the preset reliability threshold.

8. The multimodal PUF generation system according to claim 6, characterized in that, The quantization output unit includes a comparator and a majority decision unit. The comparator is used to binarize the metastable output signal to obtain a binarized data sequence. The majority decision unit is used to first divide the binarized data sequence into data groups from high to low bits according to a preset grouping length L. Each L bits of data is divided into a data group. If the remaining data bits at the end are less than L bits, they are discarded. The grouping length L is an odd number greater than 1. Then, within each data group, the majority decision method is used, and the value that appears most frequently in each data group is taken as the logical value of the data group. The logical values ​​of all data groups are then concatenated in order to form a PUF response sequence.

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