A control method of a photovoltaic module monitoring and intelligent shutdown circuit and a control circuit thereof

Abstract

This invention discloses a control method and control circuit for photovoltaic module monitoring and intelligent shutdown, relating to the field of photovoltaic module control technology. The method includes steps S1: power-on initialization and configuration reading; S2: multi-threaded concurrent operation; S3: real-time multi-dimensional data acquisition; and S4: intelligent shutdown and hysteresis recovery logic. In the output voltage shutdown control circuit, the main power loop adopts an execution architecture of two NMOS transistors connected in parallel. The parallel circuit effectively halves the on-resistance and shares the power consumption heat source, avoiding the hot spot effect caused by the heating of a single device, and improving the working life of the equipment in outdoor high-temperature environments. The main control chip only needs to trigger a clock combination action once, and the D flip-flop can latch the current shutdown or enable state through hardware physical level. This circuit structure cuts off the dependence of the control state on real-time software operation, effectively preventing accidental relay state flipping caused by strong electromagnetic interference, instantaneous voltage fluctuations, or soft reset.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic module control technology, and in particular to a control method, control circuit and device for photovoltaic module monitoring and intelligent shutdown circuit. Background Technology

[0002] With the large-scale application of distributed photovoltaic power stations, component-level safety monitoring and rapid shutdown technology have become crucial. Currently, the control strategies and circuits used in existing shutdown devices suffer from several drawbacks. Traditional shutdown devices lack multi-dimensional, high-precision ADC sampling circuits, making it impossible to intuitively provide real-time data on voltage, current, temperature, and other parameters of each component. Furthermore, traditional shutdown circuits based on simple hardware comparators are prone to frequent start-stop cycles when voltage and current fluctuate due to shading or sudden load changes, resulting in an extremely high false trigger rate. Summary of the Invention

[0003] The purpose of this invention is to provide a control method, control circuit and device for monitoring and intelligent shutdown circuits of photovoltaic modules.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a control method for photovoltaic module monitoring and intelligent shutdown circuits, comprising the following steps: Step S1, Power-on initialization and configuration reading: After the system is powered on, the main control chip of model BL702L reads the internal Flash information, determines the 1V shutdown configuration status in the Flash, and drives the output voltage shutdown control circuit through its pin IO0_CP_CLK, and drives the 1V voltage output control circuit through its pin IO10_1V_Switch to perform the initial action of output shutdown or startup. Step S2: Multi-threaded concurrent execution: After the main control chip is initialized, it simultaneously starts multiple task threads, including the SPI thread that drives the LoRa radio frequency communication circuit for networking, the BLE thread that drives the built-in radio frequency for near-field communication, the UART thread that communicates through the UART DW interface circuit, and the ADC sampling thread that drives the multi-channel ADC sampling circuit. Step S3: Real-time acquisition of multi-dimensional data: In the ADC sampling thread, ADC-AI1-V sampling is performed in real time through an input voltage sampling circuit constructed by an operational amplifier to obtain the input voltage Vin, ADC-AI1-I sampling is performed through an input current sampling circuit containing a sampling micro-resistor to obtain the input current Iin, ADC-AI-T sampling is performed through a temperature sampling circuit containing an NTC thermistor to obtain the device operating temperature T, and ADC-AO1-V sampling is performed through an output voltage sampling circuit. Step S4, Intelligent Shutdown and Hysteresis Recovery Logic: The main control chip compares the collected input voltage Vin, input current Iin, and device operating temperature T with the preset voltage safety threshold Vth, current safety threshold Ith, and temperature safety threshold Tth, respectively. If any parameter exceeds the corresponding threshold, the main control chip will trigger the output enable shutdown action, controlling the output voltage shutdown control circuit to cut off the main circuit; The state switch is triggered only when the voltage fed back by the acquisition circuit falls back to the voltage recovery threshold Vx and Vx satisfies Vx < Vth, or the temperature falls back to the temperature recovery threshold Tx and Tx satisfies Tx < Tth. In this case, the main control chip re-controls the output voltage shutdown control circuit to restore output enable.

[0005] As an optional implementation, in step S1, after reading the Flash 1V shutdown configuration Flash_OUT1V_EN: If the configuration is enabled, the 1V state is enabled (OUT1V_EN=1). Then, the main control chip executes the output enable shutdown (OUT_EN=0), triggers a GPIO action through IO0_CP_CLK to the output voltage shutdown control circuit, and then executes the 1V state enable (1V_EN=1), triggering a combination of GPIO and CLK actions through IO10_1V_Switch to the D flip-flop in the 1V voltage output control circuit. If configured to disable, the output 1V is turned off (OUT1V_EN=0), then the output is enabled (OUT_EN=1), triggering a PWM square wave action to keep the NMOS transistor on. Then, the 1V state is turned off (1V_EN=0), triggering a GPIO action.

[0006] As an optional implementation, the LoRa radio frequency communication circuit driven by the SPI thread in step S2 includes a radio frequency chip of model RA-01SCH and a PCB ANT antenna. The main control chip configures and transmits data through the IO24_LORA_BUSY, IO25_SPI_MISO, IO26_SPI_SS, IO27_SPI_SCLK and IO28_SPI_MOSI pins.

[0007] A control circuit for a photovoltaic module monitoring and intelligent shutdown circuit includes a multi-stage DC / DC step-down power tree for sequentially stepping down a wide range of DC voltages to 13V, 3.3V and 1.0V. The main control chip is a BL702L control chip with integrated BLE function; A multi-channel ADC sampling circuit is connected to each ADC multiplexing pin of the main control chip; The LoRa radio frequency communication circuit uses a radio frequency module of model RA-01SCH, which is connected to the main control chip via the SPI bus. The main power hardware execution circuit includes an output voltage shutdown control circuit controlled by the IO0_CP_CLK pin of the main control chip and a 1V voltage output control circuit controlled by the IO10_1V_Switch pin.

[0008] As an optional implementation, the multi-stage DC / DC buck power tree includes: The first-stage step-down circuit uses a step-down chip of model XL7046E1 to step down the input voltage DC_75VIN from 15V to 80V and output a 13VDD voltage with a current of 0.1~0.7A. The second-stage step-down circuit uses a step-down chip of model JW5017 or JW5026 to step down the 13VDD to output DC_3V3IN and 3.3V voltages, with a rated output current of 1.2A. The third-stage step-down circuit uses a JW5250 step-down chip to step down the 3.3V voltage to output DC_1VIN and 1.0V voltages, with a rated output current of 1A.

[0009] As an optional implementation, the multi-channel ADC sampling circuit includes an input current sampling circuit constructed from an operational amplifier of model SGM8631 and an R53 shunt resistor with a resistance of 1mR, and its output is connected to the IO7_ADC7_AI1_I pin of the main control chip. The input voltage sampling circuit based on SGM8631 has its output connected to the IO8_ADC8_AI1_V pin of the main control chip. The temperature sampling circuit is constructed from a 100K resistance RT1 thermistor, and its output is connected to the IO11_ADC10_AI_T pin of the main control chip.

[0010] As an optional implementation, the output voltage shutdown control circuit includes transistors MMBT4401LT1G and MMBT4403LT1G, which are controlled by the IO0_CP_CLK pin of the main control chip, and are cascaded to drive the parallel high-side switch array composed of multiple NMOS transistors of model JMSH1008AGQ on the main circuit. The 1V voltage output control circuit includes a D flip-flop of model SN74LVC1G80DCKR. Its clock input terminal CLK is controlled by the IO10_1V_Switch pin of the main control chip, and its output terminal drives transistors Q2 and Q25 to generate a 1V enable action.

[0011] As an optional implementation, it also includes a 3.3V undervoltage detection circuit and a reference source circuit; the 3.3V undervoltage detection circuit uses a reset chip of model DIO6810S, which has an internally fixed threshold voltage of 2.93V and resets the main control chip with its output pin; The reference source circuit uses a reference chip of model LTR3012T20YT3 to provide a high-precision reference voltage IO18_ADC3_REF for the multi-channel ADC sampling circuit.

[0012] The technical effects and advantages of this invention are as follows: 1. In the output voltage shutdown control circuit, the main power circuit adopts an execution architecture with two NMOS transistors connected in parallel. Under the high current condition of tens of amperes when the photovoltaic module is turned on, the parallel circuit effectively halves the on-resistance and shares the heat source of power consumption, avoiding the hot spot effect caused by the heating of a single device, and improving the working life of the equipment in outdoor high-temperature environments.

[0013] 2. The main control chip only needs to trigger a clock combination action once, and the D flip-flop can latch the current shutdown or enable state through hardware physical level. This circuit structure cuts off the dependence of the control state on the real-time operation of the software, effectively preventing the relay state from accidentally flipping due to strong electromagnetic interference, instantaneous voltage fluctuations or soft reset. Attached Figure Description

[0014] Figure 1 This is a circuit block diagram of the overall system structure of the present invention; Figure 2 This is a schematic diagram of the first-stage buck converter and output voltage shutdown control circuit of the present invention; Figure 3 This is the circuit schematic diagram of the subsequent two-stage buck converter, multi-channel ADC sampling, and 1V control output of the present invention; Figure 4 This is a schematic diagram of the LoRa radio frequency communication circuit of the present invention; Figure 5 This is a schematic diagram of the main control chip, negative pressure detection circuit, and high-precision reference source of the present invention. Figure 6 This is a flowchart of the steps of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] like Figure 1As shown, a control circuit for a photovoltaic module monitoring and intelligent shutdown circuit is based on a main control chip MCU equipped with a BLE Bluetooth module. After the photovoltaic power input, it flows to two branches. One branch enters the main shutdown circuit controlled by the POWER pin of the main control chip. The main shutdown circuit includes an NMOS upper transistor array to realize the on / off control of OUT+ and OUT-. Another path enters a multi-stage DC / DC power tree, sequentially converting 13VOUT, 3.3VOUT, and 1.0VOUT to power each stage of the system. In addition, the system integrates an ADC network to capture voltage, current, and temperature samples in real time, and drives external LoRa modules via the SPI bus and GPIO.

[0017] A multi-stage DC / DC step-down power supply tree is used to sequentially step down a wide range of input DC voltages to 13V, 3.3V, and 1.0V. like Figure 2 As shown, the first-stage step-down circuit uses a step-down chip of model XL7046E1 to step down the input voltage DC_75VIN from 15V to 80V and output a 13VDD voltage with a current of 0.1~0.7A, which is used as the intermediate bus of the subsequent voltage regulation module.

[0018] See Figure 3 The second-stage step-down circuit uses a step-down chip of model JW5017 or JW5026 to step down 13VDD to output DC_3V3IN and 3.3V voltages, with a rated output current of 1.2A. The third-stage step-down circuit uses a JW5250 step-down chip to step down the 3.3V voltage to output DC_1VIN and 1.0V voltages, with a rated output current of 1A.

[0019] The 13VDD is further stepped down to the system core operating voltage of 3.3V using the JW5017 or JW5026 chip U2; the 3.3V is then stepped down to the 1.0V logic core voltage using the JW5250 chip U1.

[0020] The main power hardware execution circuit includes an output voltage shutdown control circuit controlled by the IO0_CP_CLK pin of the main control chip and a 1V voltage output control circuit controlled by the IO10_1V_Switch pin. The main control chip is a BL702L control chip with integrated BLE function. See Figure 2The output voltage shutdown control circuit includes MMBT4401LT1G and MMBT4403LT1G transistors, controlled by the IO0_CP_CLK pin of the main control chip. These transistors are cascaded to drive a parallel high-side switch array in the main circuit, consisting of multiple JMSH1008AGQ NMOS transistors. The IO0_CP_CLK control signal from the main control chip is amplified by a push-pull driver stage composed of N-channel MOSFET Q8, transistors Q6 and Q7, and then drives a parallel array of dual NMOS transistors (Q3 and Q4) in the main circuit. Figure 1 The NMOS upper transistor in the block diagram. This dual-transistor parallel design effectively distributes the heat generated by the tens of amperes of photovoltaic conduction current, significantly increasing the heat dissipation pathways.

[0021] See Figure 3 The 1V voltage output control circuit includes a D flip-flop of model SN74LVC1G80DCKR. Its clock input terminal CLK is controlled by the IO10_1V_Switch pin of the main control chip, and its output terminal drives transistors Q2 and Q25 to generate a 1V enable action.

[0022] Combined with appendix Figure 5 To ensure the accuracy of the ADC sampling reference and the reliability of the system's power-on timing, the main control chip is equipped with two core protection circuits on this page: First, the undervoltage detection circuit uses a reset IC chip U3 with a built-in 2.93V threshold, model DIO6810S. When the system power supply is at risk of dropping, the RESET pin of the reset IC chip U3 is immediately pulled low to ensure that the main control chip is safely reset and does not run away. Secondly, a high-precision reference source is used, employing chip U7, model LTR3012T20YT3, which continuously and stably provides a reference voltage to the main control's internal ADC module.

[0023] participate Figure 3 A multi-channel ADC sampling circuit is connected to each ADC multiplexing pin of the main control chip; The multi-channel ADC sampling circuit includes an input current sampling circuit constructed from an operational amplifier of model SGM8631 and an R53 shunt resistor with a resistance of 1mR. Its output is connected to the IO7_ADC7_AI1_I pin of the main control chip. The input voltage sampling circuit based on SGM8631 has its output connected to the IO8_ADC8_AI1_V pin of the main control chip. The temperature sampling circuit is constructed from a 100K resistance RT1 thermistor, and its output is connected to the IO11_ADC10_AI_T pin of the main control chip.

[0024] Specifically, the input current is sampled through an ultra-low resistance sampling resistor R53 of 1mR on the main circuit, and the weak voltage drop is sent to the high-precision operational amplifier chip U8, model SGM8631, which is amplified and then connected to the IO7_ADC7_AI1_I pin of the main control chip.

[0025] Input voltage sampling: After voltage division by a resistor network, the voltage is sent to the IO8_ADC8_AI1_V pin of the main control chip through another precision operational amplifier SGM8631.

[0026] Temperature sampling: Composed of a 100K NTC thermistor RT1 and a fixed resistor voltage divider network, the sample is sent to the IO11_ADC10_AI_T pin of the main control chip.

[0027] Output voltage sampling: The signal is sent to the IO17_ADC2_AO1_V pin and controlled by the 1V voltage output control circuit. The IO10_1V_Switch signal from the main control chip is connected to the clock input CLK of the D flip-flop U9 (model SN74LVC1G80DCKR). Since the D input of chip U9 is grounded, when the clock is triggered, the Q input of chip U9 stably outputs a high or low level, driving the cascaded transistors Q2 and Q25 to operate. This hardware latching mechanism can prevent malfunctions caused by logic flipping when exposed to strong electric fields.

[0028] See Figure 4 The LoRa RF communication circuit uses a RA-01SCH RF module, which connects to the main control chip via an SPI bus and is equipped with a PCB ANT RF antenna. The main control chip uses dedicated SPI bus pins, including IO24_LORA_BUSY, IO25_SPI_MISO, IO26_SPI_SS, IO27_SPI_SCLK, IO28_SPI_MOSI, and the reset pin IO22_LORA_RST, for interrupt, transmit, and synchronization.

[0029] See Figure 6 A control method for a photovoltaic module monitoring and intelligent shutdown circuit includes the following steps: Step S1, Power-on initialization and configuration reading: After the system is powered on, the main control chip of model BL702L reads the internal Flash information, determines the 1V shutdown configuration status in the Flash, and drives the output voltage shutdown control circuit through its pin IO0_CP_CLK, and drives the 1V voltage output control circuit through its pin IO10_1V_Switch to perform the initial action of output shutdown or startup. In step S1, after reading the Flash 1V shutdown configuration Flash_OUT1V_EN: If the configuration is enabled, the 1V output state is enabled (OUT1V_EN=1). Then, the main control chip executes the output enable shutdown (OUT_EN=0), triggers a GPIO action through IO0_CP_CLK to the output voltage shutdown control circuit, and then executes the 1V state enable (1V_EN=1), triggering the combined action of GPIO and CLK through IO10_1V_Switch to the D flip-flop in the 1V voltage output control circuit. If configured to disable, the output 1V is turned off (OUT1V_EN=0), then the output is enabled (OUT_EN=1), triggering a PWM square wave action to keep the NMOS transistor on. Then, the 1V state is turned off (1V_EN=0), triggering a GPIO action.

[0030] Step S2: Multi-threaded concurrent execution: After the main control chip is initialized, it simultaneously starts multiple task threads, including the SPI thread that drives the LoRa radio frequency communication circuit for networking, the BLE thread that drives the built-in radio frequency for near-field communication, the UART thread that communicates through the UART DW interface circuit, and the ADC sampling thread that drives the multi-channel ADC sampling circuit. In step S2, the LoRa RF communication circuit driven by the SPI thread includes an RF chip of model RA-01SCH and a PCB ANT antenna. The main control chip configures and transmits data through the IO24_LORA_BUSY, IO25_SPI_MISO, IO26_SPI_SS, IO27_SPI_SCLK and IO28_SPI_MOSI pins.

[0031] Step S3: Real-time acquisition of multi-dimensional data: In the ADC sampling thread, ADC-AI1-V sampling is performed in real time through the input voltage sampling circuit built by the operational amplifier to obtain the input voltage Vin, ADC-AI1-I sampling is performed through the input current sampling circuit containing the sampling resistor to obtain the input current Iin, ADC-AI-T sampling is performed through the temperature sampling circuit containing the NTC thermistor to obtain the device operating temperature T, and ADC-AO1-V sampling is performed through the output voltage sampling circuit. Step S4, Intelligent Shutdown and Hysteresis Recovery Logic: The main control chip compares the collected input voltage Vin, input current Iin, and device operating temperature T with the preset voltage safety threshold Vth, current safety threshold Ith, and temperature safety threshold Tth, respectively. If any parameter exceeds the corresponding threshold, the main control chip will trigger the output enable shutdown action, control the output voltage to shut down the control circuit and cut off the main circuit, such as OUT_EN=0; The state switch is triggered only when the voltage fed back by the acquisition circuit falls back to the voltage recovery threshold Vx and Vx satisfies Vx < Vth, or the temperature falls back to the temperature recovery threshold Tx and Tx satisfies Tx < Tth. The main control chip then re-controls the output voltage to shut down the control circuit and restores the output enable, such as OUT_EN=1.

[0032] Specifically, the program enters a loop for judgment: (1) Overvoltage protection: Determine if the acquired Vin is less than the threshold Vth, such as 70V. If it exceeds the threshold (i.e., Vin≥70V), immediately issue OUT_EN=0 to shut down the NMOS transistor, i.e., the pin performs a GPIO action. If the voltage drops but has not yet reached the low hysteresis limit, it remains off. Only when it is determined that Vin<Vx, Vx=70V×(1-7.14%)≈65V, is it allowed to set 1V_EN=0 and restart the main circuit.

[0033] (2) Over-temperature protection: Determine if the temperature T is less than Tth, such as 110℃. If T≥110℃, forcibly cut off the output OUT_EN=0. Restart is only allowed when the system cools down naturally due to the cut-off of the heat source and the temperature T<Tx is satisfied, i.e., Tx=110℃×(1-4.35%)≈105.2℃.

[0034] (3) Overcurrent anti-jitter filtering judgment: Determine whether the collected current Iin is less than the threshold Ith, calibrated to 18.5A or 21.5A. When the current Iin exceeds the limit, the count variable nIb increments automatically; and it judges in real time whether the number of consecutive over-limit cycles nIb satisfies nIb≥nI0, setting nI0=50 times. After satisfying 50 times, it is judged as a real fault, the main control chip forcibly issues the OUT_EN=0 instruction, sets the flag nTb=1, and performs a second check after a 5s delay. If the current is found to be lower than Ith and returns to normal during the check or midway, the count value is cleared and reset by judging "0!=nIb" to "nIb=0".

[0035] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A control method for a photovoltaic module monitoring and intelligent shutdown circuit, characterized in that, Includes the following steps: Step S1, Power-on initialization and configuration reading: After the system is powered on, the main control chip of model BL702L reads the internal Flash information, determines the 1V shutdown configuration status in the Flash, and drives the output voltage shutdown control circuit through its pin IO0_CP_CLK, and drives the 1V voltage output control circuit through its pin IO10_1V_Switch to perform the initial action of output shutdown or startup. Step S2: Multi-threaded concurrent execution: After the main control chip is initialized, it simultaneously starts multiple task threads, including the SPI thread that drives the LoRa radio frequency communication circuit for networking, the BLE thread that drives the built-in radio frequency for near-field communication, the UART thread that communicates through the UART DW interface circuit, and the ADC sampling thread that drives the multi-channel ADC sampling circuit. Step S3: Real-time acquisition of multi-dimensional data: In the ADC sampling thread, ADC-AI1-V sampling is performed in real time through an input voltage sampling circuit constructed by an operational amplifier to obtain the input voltage Vin; ADC-AI1-I sampling is performed through an input current sampling circuit containing a sampling resistor R53 to obtain the input current Iin; ADC-AI-T sampling is performed through a temperature sampling circuit containing an NTC thermistor to obtain the device operating temperature T; and ADC-AO1-V sampling is performed through an output voltage sampling circuit. Step S4, Intelligent Shutdown and Hysteresis Recovery Logic: The main control chip compares the collected input voltage Vin, input current Iin, and device operating temperature T with the preset voltage safety threshold Vth, current safety threshold Ith, and temperature safety threshold Tth, respectively. If any parameter exceeds the corresponding threshold, the main control chip will trigger the output enable shutdown action, controlling the output voltage shutdown control circuit to cut off the main circuit; The state switch is triggered only when the voltage fed back by the acquisition circuit falls back to the voltage recovery threshold Vx and Vx satisfies Vx < Vth, or the temperature falls back to the temperature recovery threshold Tx and Tx satisfies Tx < Tth. In this case, the main control chip re-controls the output voltage shutdown control circuit to restore output enable.

2. The control method and control circuit for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 1, characterized in that, In step S1, after reading the Flash 1V shutdown configuration Flash_OUT1V_EN: If the configuration is enabled, the 1V state is enabled (OUT1V_EN=1). Then, the main control chip executes the output enable shutdown (OUT_EN=0), triggers a GPIO action through IO0_CP_CLK to the output voltage shutdown control circuit, and then executes the 1V state enable (1V_EN=1), triggering a combination of GPIO and CLK actions through IO10_1V_Switch to the D flip-flop in the 1V voltage output control circuit. If configured to disable, the output 1V is turned off (OUT1V_EN=0), then the output is enabled (OUT_EN=1), triggering a PWM square wave action to keep the NMOS transistor on. Then, the 1V state is turned off (1V_EN=0), triggering a GPIO action.

3. The control method for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 2, characterized in that, In step S2, the LoRa RF communication circuit driven by the SPI thread includes an RF chip of model RA-01SCH and a PCB ANT antenna. The main control chip configures and transmits data through the IO24_LORA_BUSY, IO25_SPI_MISO, IO26_SPI_SS, IO27_SPI_SCLK and IO28_SPI_MOSI pins.

4. A control circuit for a photovoltaic module monitoring and intelligent shutdown circuit, applied to the control method for a photovoltaic module monitoring and intelligent shutdown circuit as described in claim 3, characterized in that, It includes a multi-stage DC / DC step-down power supply tree for sequentially stepping down a wide range of DC voltages to 13V, 3.3V and 1.0V; The main control chip is a BL702L control chip with integrated BLE function; A multi-channel ADC sampling circuit is connected to each ADC multiplexing pin of the main control chip; The LoRa radio frequency communication circuit uses a radio frequency module of model RA-01SCH, which is connected to the main control chip via the SPI bus. The main power hardware execution circuit includes an output voltage shutdown control circuit controlled by the IO0_CP_CLK pin of the main control chip and a 1V voltage output control circuit controlled by the IO10_1V_Switch pin.

5. The control circuit for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 4, characterized in that, The multi-stage DC / DC buck power supply tree includes: The first-stage step-down circuit uses a step-down chip of model XL7046E1 to step down the input voltage DC_75VIN from 15V to 80V and output a 13VDD voltage with a current of 0.1~0.7A. The second-stage step-down circuit uses a step-down chip of model JW5017 or JW5026 to step down 13VDD to output DC_3V3IN and 3.3V voltages, with a rated output current of 1.2A. The third-stage step-down circuit uses a JW5250 step-down chip to step down the 3.3V voltage to output DC_1VIN and 1.0V voltages, with a rated output current of 1A.

6. The control circuit for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 5, characterized in that, The multi-channel ADC sampling circuit includes an input current sampling circuit constructed from an operational amplifier of model SGM8631 and an R53 shunt resistor with a resistance of 1mR, and its output is connected to the IO7_ADC7_AI1_I pin of the main control chip. The input voltage sampling circuit based on SGM8631 has its output connected to the IO8_ADC8_AI1_V pin of the main control chip. The temperature sampling circuit is constructed from a 100K resistance RT1 thermistor, and its output is connected to the IO11_ADC10_AI_T pin of the main control chip.

7. The control circuit for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 6, characterized in that, The output voltage shutdown control circuit includes transistors MMBT4401LT1G and MMBT4403LT1G, which are controlled by the IO0_CP_CLK pin of the main control chip and are cascaded to drive the parallel high-side switch array composed of multiple NMOS transistors of model JMSH1008AGQ in the main circuit. The 1V voltage output control circuit includes a D flip-flop of model SN74LVC1G80DCKR. Its clock input terminal CLK is controlled by the IO10_1V_Switch pin of the main control chip, and its output terminal drives transistors Q2 and Q25 to generate a 1V enable action.

8. The control circuit for a photovoltaic module monitoring and intelligent shutdown circuit according to claim 7, characterized in that, The main power hardware execution circuit also includes a 3.3V undervoltage detection circuit and a reference source circuit; the 3.3V undervoltage detection circuit uses a reset chip of model DIO6810S, which has an internal threshold voltage of 2.93V and outputs a pin to reset the main control chip. The reference source circuit uses a reference chip of model LTR3012T20YT3 to provide a high-precision reference voltage IO18_ADC3_REF for the multi-channel ADC sampling circuit.

Images