High power limiter with double layer substrate

CN122717596APending Publication Date: 2026-09-08INST OF ELECTRONICS ENG CHINA ACAD OF ENG PHYSICS
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Patent Information

Application Number
CN202610827391.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-09
Publication Date
2026-09-08

AI Technical Summary

Technical Problem

[0005]所以,现有技术方案存在双重局限:一是单层高导热基板仅能改善器件下方散热,上方热堆积问题仍未解决;二是基板材料的高硬度所导致的通孔工艺难题,迫使采用高寄生跳线接地,制约了高频电性能

Benefits of technology

[0017]Beneficial Effects: This invention replaces the traditional circuit board through-hole grounding and gold wire jumper grounding schemes with an upper substrate grounding structure, which can reduce parasitic parameters, improve signal integrity, and enhance the high-frequency performance of the limiter. This invention achieves double-sided heat dissipation for semiconductor devices through two layers of high thermal conductivity circuit boards, significantly reducing heat accumulation and avoiding the risk of thermal breakdown. Simultaneously, the integrated structural design combining upper substrate grounding, circuit surface dielectric passivation, and metal shielding achieves comprehensive improvements in the electrical performance, thermal performance, and environmental reliability of the high-power limiter.

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Abstract

The application belongs to the technical field of semiconductor devices, and specifically discloses a high-power limiter with double-layer substrates, which comprises a first layer of circuit substrate containing surface metal wiring and a second layer of circuit substrate, the first layer of circuit substrate transmits microwave signals, the second layer of circuit substrate is electrically grounded with a metal shell, and a semiconductor device is connected between the first layer of circuit substrate and the second layer of circuit substrate. The application replaces the traditional circuit substrate processing via grounding and gold wire jumper grounding scheme with the upper substrate grounding structure, which helps to improve signal integrity, reduce parasitic parameters, and improve the high-frequency performance of the limiter. The application can significantly reduce heat accumulation and avoid the risk of thermal breakdown by setting the upper and lower two layers of high-thermal-conductivity circuit substrates to perform double-sided heat dissipation on the limiter. In combination with the integrated design of the upper substrate grounding, the circuit surface dielectric passivation and the metal shielding structure, the comprehensive performance of the high-power limiter in terms of electrical, thermal and environmental reliability is improved.
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Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and specifically relates to a high-power limiter with a double-layer substrate. Background Technology

[0002] In modern electronic systems, radio frequency (RF) front-ends face increasingly sophisticated threats from high-power microwaves, making them highly susceptible to failure due to instantaneous strong electromagnetic energy surges. Limiters, as key components in power protection, can quickly respond and clamp input signals under overvoltage conditions, thereby protecting sensitive components such as downstream low-noise amplifiers from damage.

[0003] Under high-power continuous wave or pulse conditions, the core diode element in the limiter experiences a rapid rise in junction temperature due to self-heating. This temperature rise leads to a decrease in carrier mobility and a further increase in on-resistance, resulting in increased insertion loss, higher limiting level, and reduced power capacity. Continued heat accumulation can also cause thermal stress concentration, material interface failure, and even thermal breakdown, ultimately leading to permanent device damage. Therefore, efficient thermal management is crucial for ensuring reliable operation of the limiter under high-power conditions.

[0004] To improve heat dissipation, existing technologies typically use a single-layer high thermal conductivity substrate (such as diamond, aluminum nitride, or silicon carbide) as the circuit carrier. While these materials significantly improve the heat conduction path beneath the device, their effect on heat dissipation above the device is limited, thus restricting overall heat dissipation efficiency. Furthermore, the extremely hard mechanical hardness of ultra-hard materials like diamond and silicon carbide substrates makes precision machining difficult. Fabricating high-precision, low-loss metallized vias on these substrates is not only complex but also costly and results in low mass production yields. Due to the limited processing cost and feasibility of high aspect ratio vias, vertical via grounding structures are conventionally avoided in engineering practice. Instead, gold wire jumpers are used to lead the device grounding terminal to the edge of the substrate for grounding. This method introduces significant parasitic parameters, degrading key RF parameters such as insertion loss, isolation, and operating bandwidth of the limiter, thus reducing the overall performance of the limiter.

[0005] Therefore, existing technical solutions have two limitations: first, a single-layer high thermal conductivity substrate can only improve heat dissipation at the bottom of the device, while the problem of heat accumulation at the top remains unresolved; second, the high hardness of the substrate material leads to difficulties in the via process, forcing the use of high parasitic jumper grounding, which restricts high-frequency electrical performance. Therefore, there is an urgent need for a limiter packaging structure that can simultaneously achieve efficient heat dissipation on both sides of the device and reliable grounding with low parasitics, in order to comprehensively improve its overall performance under high power and high frequency conditions. Summary of the Invention

[0006] The purpose of this invention is to provide a high-power limiter with a double-layer substrate to solve the above-mentioned problems existing in the prior art.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: This invention provides a high-power limiter with a double-layer substrate, comprising a metal housing, an interior cavity within the metal housing, a first circuit board with surface metal wiring and a second circuit board with surface metal wiring disposed within the cavity, and a semiconductor device of the high-power limiter connected between the surface metal wiring of the first circuit board and the surface metal wiring of the second circuit board, wherein the surface metal wiring of the first circuit board is used to transmit microwave signals, the surface metal wiring of the second circuit board is electrically grounded to the metal housing, and a metal layer is electroplated on the non-grounded plane of the second circuit board.

[0008] In one possible design, the first and second circuit boards are made of diamond, silicon carbide, or aluminum nitride.

[0009] In one possible design, the semiconductor device includes a diode.

[0010] In one possible design, the semiconductor device adopts a vertical or planar structure and is electrically connected between the surface metal wiring of the first circuit substrate and the surface metal wiring of the second circuit substrate.

[0011] In one possible design, the diodes with a vertical structure are either silicon PIN diodes or gallium nitride diodes.

[0012] In one possible design, a planar semiconductor device is electrically connected to the surface metal wiring of the first and second circuit boards by means of metal solder balls or metal pillars.

[0013] In one possible design, the side of the second-layer circuit board connected to the metal housing forms a surface contact and bonding connection with the metal housing.

[0014] In one possible design, the side of the second-layer circuit board connected to the metal housing is covered with a thin metal film.

[0015] In one possible design, the side of the first circuit board connected to the semiconductor device has a passivation dielectric layer.

[0016] In one possible design, the passivation dielectric layer is made of silicon dioxide, silicon nitride, or BCB material.

[0017] Beneficial Effects: This invention replaces the traditional circuit board through-hole grounding and gold wire jumper grounding schemes with an upper substrate grounding structure, which can reduce parasitic parameters, improve signal integrity, and enhance the high-frequency performance of the limiter. This invention achieves double-sided heat dissipation for semiconductor devices through two layers of high thermal conductivity circuit boards, significantly reducing heat accumulation and avoiding the risk of thermal breakdown. Simultaneously, the integrated structural design combining upper substrate grounding, circuit surface dielectric passivation, and metal shielding achieves comprehensive improvements in the electrical performance, thermal performance, and environmental reliability of the high-power limiter. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic cross-sectional view of the first type of double-layer substrate structure limiter; Figure 2 This is a schematic cross-sectional view of the second type of double-layer substrate structure limiter; Figure 3 This is a schematic diagram of the overall structure of the double-layer substrate; Figure 4 This is a schematic diagram of the metal casing.

[0020] In the diagram: 1. Metal casing; 2. Cavity; 3. First circuit board; 4. Second circuit board; 5. Semiconductor device. Detailed Implementation

[0021] It should be noted that the descriptions of these embodiments are intended to aid in understanding the invention and do not constitute a limitation thereof. The specific structural and functional details disclosed herein are merely for describing exemplary embodiments of the invention. However, the invention may be embodied in many alternative forms and should not be construed as being limited to the embodiments described herein.

[0022] It should be understood that, unless otherwise explicitly specified and limited, the corresponding terms should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be an electrical connection, a direct connection, or an indirect connection through an intermediate medium; it can also refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments according to the specific circumstances.

[0023] Specific details are provided in the following description to provide a complete understanding of the exemplary embodiments. However, those skilled in the art will understand that the exemplary embodiments can be implemented without these specific details. For example, the system may be shown in block diagrams to avoid obscuring the example with unnecessary details. In other embodiments, well-known processes, structures, and techniques may be shown without non-essential details to avoid obscuring the embodiments.

[0024] Example: This embodiment provides a high-power limiter with a double-layer substrate, such as Figures 1 to 4 As shown, the device includes a metal housing 1, and a cavity 2 is provided inside the metal housing 1. A first circuit board 3 with surface metal wiring and a second circuit board 4 with surface metal wiring are provided inside the cavity 2. A semiconductor device 5 with a high-power limiter is connected between the surface metal wiring of the first circuit board 3 and the surface metal wiring of the second circuit board 4. The surface metal wiring of the first circuit board 3 is used to transmit microwave signals. The surface metal wiring of the second circuit board 4 is electrically grounded to the metal housing 1, and a metal layer is electroplated on the non-grounded plane of the second circuit board 4.

[0025] In practice, the first circuit board 3 and the second circuit board 4 are arranged parallel to each other and vertically opposite each other, with a gap in between for mounting the semiconductor device 5. The two boards together form a double-sided heat dissipation path, allowing heat to be rapidly conducted to both boards simultaneously, then transferred through the second circuit board 4 to the metal housing 1 for outward dissipation, preventing heat buildup on one side of the device. The metal housing 1, serving as the mechanical support and electromagnetic shielding housing for the limiter, is typically made of aluminum, giving it good thermal conductivity and electromagnetic shielding performance. The limiter circuit structure inside the cavity 2 can be customized according to the circuit layout to accommodate the mounting of the double-layer board and the semiconductor device 5. The surface metal wiring of the first circuit board 3 and the second circuit board 4 can be 2µm thick.

[0026] The main function of the first-layer circuit board 3 is to carry microwave signal transmission and to achieve electrical connection with the electrodes of the semiconductor device 5. It can be made of materials with high thermal conductivity, low dielectric loss and high resistance, such as diamond, silicon carbide or aluminum nitride, with diamond material preferred to improve heat dissipation performance.

[0027] A passivation dielectric layer can be applied to the surface of the microwave circuit on which the semiconductor device 5 is connected to the first circuit substrate 3. The passivation dielectric layer is made of silicon dioxide, silicon nitride, or BCB (benzocyclobutene) material, and is used to improve the breakdown voltage of the circuit and suppress electrical spark discharge, thereby improving the power capacity and reliability of the limiter. Silicon nitride is preferred.

[0028] The second-layer circuit board 4 can be 200µm thick and electrically connected to the electrodes of the semiconductor device 5 via surface metal wiring. It is also electrically grounded to the metal housing 1 to further enhance heat dissipation. The side of the second-layer circuit board 4 connected to the metal housing 1 forms a surface contact connection (e.g., flush with or slightly lower than the surface of the metal housing 1) to facilitate low thermal resistance integration of the heat dissipation structure later. The non-grounded plane of the second-layer circuit board 4 is plated with a metal layer, forming a near-metal sealed cavity with the metal housing 1, providing excellent electromagnetic shielding and radiation resistance. This structure also possesses moisture-proof and salt spray corrosion-proof capabilities, making it suitable for high-humidity, high-salt environments such as marine vessels and carrier-based aircraft. Alternatively, a thin metal film can be covered on the side of the second-layer circuit board 4 connected to the metal housing 1 to further enhance electromagnetic shielding.

[0029] The semiconductor device 5 of the high-power limiter is connected at one end to the metal wiring of the first circuit board 3 and at the other end to the metal wiring of the second circuit board 4, achieving electrical interconnection. The semiconductor device 5 includes a diode, and may also include a resistor, capacitor, and / or inductor. The semiconductor device 5 adopts a vertical or planar structure, electrically connected between the surface metal wiring of the first circuit board 3 and the surface metal wiring of the second circuit board 4. The diode with a vertical structure is a silicon PIN diode or a gallium nitride diode. The semiconductor device 5 with a planar structure is electrically connected to the surface metal wiring of the first and second circuit boards 3 and 4 by means of metal solder balls or metal pillars.

[0030] The first circuit board 3 connects to the corresponding input and output signal ports. The limiter can be connected to the signal ports through the corresponding microwave circuit topology. The microwave circuit topology can be a passive multi-stage limiter, a semi-active coupled detector limiter, an active limiter, etc., with a passive multi-stage limiter being preferred.

[0031] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A high-power limiter with a double-layer substrate, characterized in that, The device includes a metal housing (1), inside which is a cavity (2). Inside the cavity (2) are a first circuit board (3) with surface metal wiring and a second circuit board (4) with surface metal wiring. A semiconductor device (5) with a high-power limiter is connected between the surface metal wiring of the first circuit board (3) and the surface metal wiring of the second circuit board (4). The surface metal wiring of the first circuit board (3) is used to transmit microwave signals. The surface metal wiring of the second circuit board (4) is electrically grounded to the metal housing (1). The non-grounded plane of the second circuit board (4) is plated with a metal layer.

2. A high-power limiter with a double-layer substrate according to claim 1, characterized in that, The first circuit board (3) and the second circuit board (4) are made of diamond, silicon carbide or aluminum nitride.

3. A high-power limiter with a double-layer substrate according to claim 1, characterized in that, The semiconductor device (5) includes a diode.

4. A high-power limiter with a double-layer substrate according to claim 3, characterized in that, The semiconductor device (5) adopts a vertical or planar structure and is electrically connected between the surface metal wiring of the first circuit substrate (3) and the surface metal wiring of the second circuit substrate (4).

5. A high-power limiter with a double-layer substrate according to claim 4, characterized in that, The diodes with a vertical structure are silicon PIN diodes or gallium nitride diodes.

6. A high-power limiter with a double-layer substrate according to claim 4, characterized in that, The semiconductor device (5) with a planar structure is electrically connected to the surface metal wiring of the first circuit board (3) and the second circuit board (4) by means of metal solder balls or metal pillars.

7. A high-power limiter with a double-layer substrate according to claim 1, characterized in that, The second layer circuit board (4) is connected to the metal housing (1) on one side, and the metal housing (1) is in surface contact and bonded.

8. A high-power limiter with a double-layer substrate according to claim 1, characterized in that, The second layer circuit board (4) is covered with a metal film on one side of the metal housing (1).

9. A high-power limiter with a double-layer substrate according to claim 1, characterized in that, The first layer of circuit board (3) has a passivation dielectric layer on the side that connects to the semiconductor device (5).

10. A high-power limiter with a double-layer substrate according to claim 9, characterized in that, The passivation dielectric layer is made of silicon dioxide, silicon nitride, or BCB material.