Machine learning library for recipe setup
Patent Information
- Application Number
- CN202580013738.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-02-09
- Filing Date
- 2025-02-05
- Publication Date
- 2026-09-08
AI Technical Summary
换句话说,当前使用的方法可能未利用不同ML架构的应用特定特性
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Figure CN122720002A_ABST
Abstract
Description
Technical Field
[0001] This invention generally relates to methods and systems for constructing machine learning (ML) libraries. Some embodiments involve using ML libraries to build application-specific ML architectures for processes such as wafer inspection or metrology. The embodiments described herein can be advantageously used to improve the flexibility and scalability of ML architectures to achieve application-specific architectures in a variety of application-specific challenge scenarios for metrology solutions. Background Technology
[0002] The following descriptions and examples are not acknowledged as prior art simply because they are included in this section.
[0003] Manufacturing semiconductor devices (such as logic and memory devices) typically involves processing a substrate (such as a semiconductor wafer) using numerous semiconductor processes to form the various features and multiple layers of the semiconductor device. For example, photolithography is a semiconductor process that involves transferring a pattern from a photomask to a photoresist disposed on a semiconductor wafer. Additional examples of semiconductor processes include (but are not limited to) chemical mechanical polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices can be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
[0004] Inspection processes are used at various steps during semiconductor manufacturing to detect defects in samples, driving higher throughput and thus higher profits. Inspection has always been a crucial part of manufacturing semiconductor devices. However, as the size of semiconductor devices shrinks, inspection becomes even more critical for successfully manufacturing acceptable semiconductor devices, because even small defects can cause device failure.
[0005] Defect inspection typically involves re-examining defects so detected through the inspection process and using high-magnification optical systems or scanning electron microscopy (SEM) to generate additional information about the defects at higher resolution. Therefore, defect inspection is performed at discrete locations on the sample where defects were detected through inspection. The higher-resolution data of defects generated through defect inspection are better suited for determining defect properties such as profile, roughness, and more accurate dimensional information. Compared to inspection, defects can often be more accurately classified into defect types based on the information determined through defect inspection.
[0006] Metrology processes are also used to monitor and control the various steps during semiconductor manufacturing. Metrology processes differ from inspection processes in that, unlike inspection processes which detect defects on samples, metrology processes are used to measure one or more characteristics of a sample that cannot be determined using currently available inspection tools. For example, metrology processes measure one or more characteristics of a sample, such as the dimensions (e.g., linewidth, thickness, etc.) of features formed on the sample during the process, so that the performance of the process can be determined from these characteristics. Furthermore, if one or more characteristics of a sample are unacceptable (e.g., outside a predetermined range), the measurement of these characteristics can be used to modify one or more parameters of the process, resulting in additional samples manufactured through the process having acceptable characteristics.
[0007] The metrology process differs from the defect inspection process in that, unlike the defect inspection process where defects detected by inspection are revisited, the metrology process can be performed at locations where no defects were detected. In other words, unlike defect inspection, the location on which the metrology process is performed on a sample can be independent of the results of the inspection process performed on the sample. Specifically, the location for performing the metrology process can be selected independently of the inspection results. Furthermore, because the location on the sample where metrology can be performed can be selected independently of the inspection results, unlike defect inspection where the location on the sample to be performed cannot be determined until the inspection results of the sample are generated and available, the location for performing the metrology process can be determined before the inspection process is performed on the sample.
[0008] One challenge associated with processes (such as those described above) is generating suitable recipes that can be used to successfully identify the information that users care about. Sometimes, one or more ML architectures are used to develop econometric recipes. Typically, in this recipe setting, the training algorithm, loss function, data preprocessing, etc., are fixed and independent of the available data and performance objectives (e.g., robustness, tool fit, accuracy, etc.).
[0009] Therefore, the current approach has several significant drawbacks. For example, the same architecture can be used for all applications. In other words, the current approach may not take advantage of the application-specific characteristics of different ML architectures. Furthermore, the current approach may only use one of a very limited number of available architectures. The current approach may also use hard-coded architectures, meaning there is no ability to modify existing architectures or add new ones. Additionally, the current approach may only use predetermined loss functions and predetermined hyperparameters.
[0010] Therefore, it would be advantageous to develop systems and methods for constructing ML libraries that can be used for recipe setting without having one or more of the aforementioned disadvantages. Summary of the Invention
[0011] The following description of the various embodiments should not be construed in any way as limiting the subject matter of the appended claims.
[0012] One embodiment relates to a system configured for constructing a machine learning (ML) library. The system includes one or more computer systems configured to define a plurality of architecture blocks, each of which is a reusable ML architecture fragment. The computer systems are also configured to define a plurality of architecture templates, each of which is a reusable template configured to include one or more of the plurality of architecture blocks. Additionally, the computer systems are configured to assign metadata to the plurality of architecture templates in response to input data metrics and performance goals applicable to the templates. The computer systems are further configured to store the plurality of architecture blocks, the plurality of architecture templates, and the metadata in an ML library configured to select one or more of the plurality of architecture templates for an Application-Specific ML Architecture (ASMLA) based on the input data metrics and application-specific performance goals. The system may be further configured as described herein.
[0013] Another embodiment relates to a computer-implemented method for constructing an ML library. The method includes the steps described above, performed via one or more computer systems. Each of the steps of the method may be performed as further described herein. The method may include any other steps of any other method described herein. The method may be performed via any of the systems described herein.
[0014] Additional embodiments relate to a non-transitory computer-readable medium storing program instructions that can be executed on a computer system to perform a computer-implemented method for constructing an ML library. The computer-implemented method includes the steps of the methods described above. The computer-readable medium may be further configured as described herein. The steps of the computer-implemented method may be performed as further described herein. Additionally, the computer-implemented method to which the program instructions can be executed may include any other steps of any other method described herein. Attached Figure Description
[0015] Further advantages of the invention will become apparent to those skilled in the art upon the following detailed description of preferred embodiments and upon reference to the accompanying drawings, wherein:
[0016] Figures 1 to 3 This is a schematic diagram of a side view illustrating an embodiment of a system configured as described herein;
[0017] Figure 4 This is a flowchart illustrating the concepts of architectural blocks and templates, as well as an embodiment of the steps that can be performed through the system embodiments described herein;
[0018] Figure 5 This is a flowchart illustrating an example of the concept of selecting a loss function;
[0019] Figure 6 This is a flowchart illustrating an embodiment of the process for training a library by selecting modular architecture blocks and plug-in losses as well as a set of function hyperparameters;
[0020] Figure 7 This is a flowchart illustrating examples of using function hyperparameter sets in different architectures;
[0021] Figure 8 This is a flowchart illustrating an embodiment of wavelength-based signal processing;
[0022] Figure 9 This is a flowchart illustrating an embodiment of measuring stacked pairs based on Mueller component processing of signals;
[0023] Figure 10 This is a flowchart illustrating an embodiment of signal processing based on a subsystem;
[0024] Figure 11 This is a flowchart illustrating an embodiment of data feedforward to an architecture template;
[0025] Figure 12 This is a flowchart illustrating an example of transfer learning using a pre-trained model;
[0026] Figure 13 This is a flowchart illustrating an embodiment of domain adaptation;
[0027] Figure 14 This is a flowchart illustrating an embodiment of a high aspect ratio structural template; and
[0028] Figure 15 This is a block diagram illustrating an embodiment of a non-transitory computer-readable medium storing program instructions for causing a computer system to perform the computer-implemented methods described herein.
[0029] While the invention is open to various modifications and alternatives, specific embodiments of the invention are shown by way of example in the drawings and described in detail herein. The drawings may not be to scale. However, it should be understood that the drawings and their detailed description are not intended to limit the invention to the specific forms disclosed; on the contrary, they are intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims. Detailed Implementation
[0030] Referring now to the figures, it should be noted that the figures are not drawn to scale. In particular, the scale of some elements in the figures is greatly exaggerated to highlight the characteristics of the elements. It should also be noted that the figures are not drawn to the same scale. The same reference numerals have been used to indicate elements that may be similarly configured and shown in more than one figure. Unless otherwise mentioned herein, any element described and shown may include any suitable commercially available element.
[0031] Generally, the embodiments described herein are systems and methods for building machine learning (ML) libraries. Additionally, the embodiments described herein are configured for advanced neural network (NN) architectures. Although some embodiments may be described herein with respect to one or more NNs, the embodiments are not limited to ML models that can be used with them. For example, the embodiments described herein provide flexibility and scalability in NN architecture and training algorithms. Therefore, the embodiments can use application-specific architectures that are well-matched to application data and performance objectives.
[0032] In some embodiments, the sample is a wafer. The wafer may comprise any wafer known in the semiconductor field. Although some embodiments may be described herein with respect to one or more wafers, these embodiments are not limited to samples that can be used. For example, the embodiments described herein can be used as samples such as photomasks, flat panels, printed circuit boards (PCBs), and other semiconductor samples.
[0033] Figure 1 An embodiment of a system configured to determine information about a sample is shown. The system includes an output acquisition subsystem 100. The output acquisition subsystem includes and / or is coupled to a computer subsystem (e.g., computer subsystem 36) and / or one or more computer systems 102.
[0034] Generally, the output acquisition subsystem described herein includes at least one energy source, a detector, and a scanning subsystem. The energy source is configured to generate energy directed to the sample via the output acquisition subsystem. The detector is configured to detect energy from the sample and generate an output in response to the detected energy. The scanning subsystem is configured to change the position on the sample from which energy is directed and from which energy is detected.
[0035] As in Figure 1 As shown, the output acquisition subsystem can be configured as a light-based output acquisition subsystem. The energy directed to the sample includes light, and the energy detected from the sample also includes light. The output acquisition subsystem includes an illumination subsystem configured to direct light to sample 14. The illumination subsystem includes at least one light source 16. The illumination subsystem is configured to direct light to the sample at one or more incident angles (which may include one or more tilt angles and / or one or more normal angles). For example, as in... Figure 1As shown, light from light source 16 is guided through optical element 18 and then through lens 20 at an oblique angle of incidence to reach sample 14. The oblique angle of incidence may include any suitable oblique angle of incidence that may vary depending on, for example, the characteristics of the sample and the process performed on the sample.
[0036] The illumination subsystem can be configured to direct light onto the sample at different incident angles at different times. For example, the output acquisition subsystem can be configured to change one or more characteristics of one or more components of the illumination subsystem, so as to allow for different... Figure 1 The incident angle shown guides the light to the sample. In one example, the output acquisition subsystem can be configured to move the light source 16, optical element 18, and lens 20 to guide the light to the sample at different tilted incident angles or normal (or near-normal) incident angles.
[0037] The output acquisition subsystem can be configured to simultaneously guide light to the sample at more than one incident angle. For example, the illumination subsystem may include more than one illumination channel, one of which may include, for example, […]. Figure 1 The light source 16, optical element 18, and lens 20 are shown in the diagram, and another element in the illumination channel (not shown) may contain similar elements that may be configured differently or identically, or may contain at least one light source and possibly one or more other components (such as those further described herein). If this light is directed to the sample simultaneously with other light, one or more characteristics (e.g., wavelength, polarization, etc.) of the light directed to the sample at different incident angles may be different, such that the light produced by illuminating the sample at different incident angles can be distinguished from each other at the detector.
[0038] In another example, the lighting subsystem may contain only one light source (e.g., Figure 1 The light from source 16 shown in the diagram can be separated into different optical paths by one or more optical elements (not shown) of the illumination subsystem (e.g., based on wavelength, polarization, etc.). The light from each of the different optical paths can then be directed to the sample. Multiple illumination channels can be configured to direct light to the sample simultaneously or at different times (e.g., when different illumination channels are used to sequentially illuminate the sample). In another example, the same illumination channel can be configured to direct light with different characteristics to the sample at different times. For example, optical element 18 can be configured as a spectral filter, and the properties of the spectral filter can be changed in various ways (e.g., by replacing one spectral filter with another) so that light of different wavelengths can be directed to the sample at different times. The illumination subsystem can have any other suitable configuration known in the art for sequentially or simultaneously directing light with different or the same characteristics to the sample at different or the same incident angles.
[0039] Light source 16 may comprise a broadband plasma (BBP) source. In this way, the light generated by the source and directed to the sample may comprise broadband light. However, the source may comprise any other suitable source, such as any suitable laser known in the art configured to produce light of any suitable wavelength. The laser may be configured to produce monochromatic or near-monochromatic light. In this way, the laser may be a narrow-band laser. The source may also comprise a multicolor source that produces light of multiple discrete wavelengths or bands.
[0040] Light from optical element 18 can be focused onto sample 14 by lens 20. Although lens 20 is... Figure 1 While shown as a single refractive optical element, lens 20 may actually comprise several refractive and / or reflective optical elements that combine to focus light from the optical element onto the sample. Figure 1 The illumination subsystem shown and described herein may include any other suitable optical element (not shown). Examples of such optical elements include, but are not limited to, polarizing components, spectral filters, spatial filters, reflective optics, apodizers, beam splitters, apertures, and the like, which may include any such suitable optical element known in the art. Additionally, the system may be configured to change one or more elements of the illumination subsystem based on the type of illumination to be used to generate the output.
[0041] The output acquisition subsystem may also include a scanning subsystem configured to change the position of light directed to and from which it is detected on the sample and may enable the light to scan across the sample. For example, the output acquisition subsystem may include a stage 22 on which the sample 14 is placed during output generation. The scanning subsystem may include any suitable mechanical and / or robotic assembly (including the stage 22) configured to move the sample such that light can be directed to and detected from different positions on the sample. Alternatively, the output acquisition subsystem may be configured such that one or more optical elements of the output acquisition subsystem perform some form of scanning of the light across the sample, such that light can be directed to and detected from different positions on the sample. The light can be scanned across the sample in any suitable manner (e.g., in a serpentine or helical path).
[0042] Any of the output acquisition subsystems described herein can be configured to generate an output of the sample at one or more target locations on the sample. The one or more target locations may be predetermined target locations stored in a recipe for a process performed on the sample using the output acquisition subsystem. The one or more target locations may also be discrete locations, such as those used in mobile acquisition measurement processes or defined by a region on the sample to be scanned, as in inspection or scanning processes. In this way, the target locations indicate the locations on the sample where the process should be performed.
[0043] The output acquisition subsystem includes one or more detection channels. At least one of the detection channels includes a detector configured to detect light from the sample due to illumination of the sample by the output acquisition subsystem and to generate an output in response to the detected light. Figure 1 The output acquisition subsystem shown includes two detection channels: one detection channel is formed by light collector 24, element 26, and detector 28, and the other detection channel is formed by light collector 30, element 32, and detector 34. (As shown in...) Figure 1 The diagram illustrates two detection channels configured to collect and detect light at different collection angles. In some examples, the two detection channels are configured to detect scattered light, and the detection channels are configured to detect light scattered from the sample at different angles. However, one or more of the detection channels may be configured to detect another type of light from the sample (e.g., reflected light).
[0044] As in Figure 1 The diagram further illustrates that the two detection channels are positioned within the plane of the paper, and the illumination subsystem is also positioned within the plane of the paper. Therefore, in this embodiment, the two detection channels are positioned (e.g., centered) in the plane of incidence. However, one or more of the detection channels may be positioned outside the plane of incidence. For example, the detection channel formed by the light collector 30, element 32, and detector 34 may be configured to collect and detect light scattered out of the plane of incidence. Therefore, this detection channel may generally be referred to as a "side" channel, and this side channel may be centered in a plane substantially perpendicular to the plane of incidence.
[0045] The output acquisition subsystem may contain a different number of detection channels (e.g., only one detection channel or two or more detection channels). In one example, the detection channel formed by the condenser 30, element 32, and detector 34 may form a side channel as described above, and the output acquisition subsystem may contain an additional detection channel (not shown) formed as another side channel positioned on the opposite side of the incident plane. Thus, the output acquisition subsystem may contain a detection channel containing the condenser 24, element 26, and detector 28, centered in the incident plane and configured to collect and detect light scattered at or near the normal to the sample surface. Therefore, this detection channel may generally be referred to as the "top" channel, and the output acquisition subsystem may also contain two or more side channels configured as described above. Thus, the output acquisition subsystem may contain at least three channels (i.e., one top channel and two side channels), and each of the at least three channels has its own condenser, each condenser configured to collect light at a different scattered angle compared to each other condenser.
[0046] As further described above, each detection channel included in the output acquisition subsystem can be configured to detect scattered light. Therefore, the output acquisition subsystem can be configured for dark-field (DF) imaging of the sample. However, the output acquisition subsystem may also, or alternatively, include detection channels configured for bright-field (BF) imaging of the sample. In other words, the output acquisition subsystem may include at least one detection channel configured to detect light reflected from the specular surface of the sample. Therefore, the output acquisition subsystem described herein can be configured for DF-only imaging, BF-only imaging, or both DF and BF imaging. Although each of the light collectors in… Figure 1 The optical element is shown as a single refractive optical element, but each of the optical collectors may contain one or more refractive optical elements and / or one or more reflective optical elements.
[0047] One or more detection channels may contain any suitable detector known in the art, such as a photomultiplier tube (PMT), charge-coupled device (CCD), and time-delay integration (TDI) camera. The detector may also contain non-imaging detectors or imaging detectors. If the detector is a non-imaging detector, each of the detectors may be configured to detect specific characteristics (e.g., intensity) of the scattered light, but may not be configured to detect such characteristics that vary depending on the position within the imaging plane. Therefore, the output generated by each detector contained in each detection channel may be a signal or data, rather than an image signal or image data. In such examples, a computer subsystem (e.g., computer subsystem 36) may be configured to generate an image of the sample using the non-imaging output of this detector. However, in other examples, the detector may be configured as an imaging detector, which is configured to generate an imaging signal or image data. Therefore, the output acquisition subsystem may be configured to generate images in several ways.
[0048] Provided in this article Figure 1 The configuration of the output acquisition subsystem that may be included in the system embodiments described herein is explained in general terms. It is evident that the arrangement of the output acquisition subsystem described herein can be modified to optimize its performance as is typically done when designing commercial systems. Alternatively, the system described herein can be implemented using existing systems (e.g., by adding the functionality described herein to an existing system) (e.g., tools from the 29xx / 39xx series available from KLA Corporation, Milpitas, California). For some such systems, the methods described herein may be provided as optional functionality of the system (e.g., in addition to other system functionalities). Alternatively, the system described herein can be designed "from scratch" to provide a completely new system.
[0049] Computer subsystem 36 may be coupled to the detector of the output acquisition subsystem in any suitable manner (e.g., via one or more transmission media, which may include “wired” and / or “wireless” transmission media), such that the computer subsystem can receive the output generated by the detector. Computer subsystem 36 may be configured to perform certain functions (including the steps and functions further described herein) with or without using the output of the detector. Thus, the steps described herein may be performed “on the tool” by a computer subsystem coupled to or as part of the output acquisition subsystem. Alternatively or concurrently, computer system 102 may perform one or more of the steps described herein. Therefore, one or more of the steps described herein may be performed “outside the tool” by a computer system not directly coupled to the output acquisition subsystem. Computer subsystem 36 and computer system 102 may be further configured as described herein.
[0050] Computer subsystem 36 (and other computer subsystems described herein) may also be referred to herein as a computer system. Each of the computer subsystems or systems described herein may take various forms, including personal computer systems, graphics computers, mainframe computer systems, workstations, network devices, Internet devices, or other devices. Generally, the term "computer system" may be broadly defined to cover any device having one or more processors that execute instructions from memory media. A computer subsystem or system may also include any suitable processor known in the art, such as a parallel processor. Additionally, a computer subsystem or system may include a computer platform (as a standalone tool or a networked tool) with high-speed processing and software.
[0051] If the system comprises more than one computer subsystem, the different computer subsystems can be coupled to each other to enable the transmission of images, data, information, instructions, etc., between the computer subsystems. For example, computer subsystem 36 can be coupled to computer system 102 via any suitable transmission medium (which may include any suitable wired and / or wireless transmission medium known in the art), such as via... Figure 1 The dashed lines in the diagram illustrate this. Two or more of these computer subsystems can also be effectively coupled by sharing a computer-readable storage medium (not shown).
[0052] The output acquisition subsystem can alternatively be configured as an electron beam-based output acquisition subsystem. In the electron beam subsystem, the energy guided to the sample contains electrons, and the energy detected from the sample also contains electrons. For example, in... Figure 2 As shown, the output acquisition subsystem includes an electron column 122, and the system includes a computer subsystem 124 coupled to the output acquisition subsystem. The computer subsystem 124 can be configured as described above. Additionally, this output acquisition subsystem can be configured as described above and... Figure 1It is coupled to one or more other computer systems in the same way as shown in the diagram.
[0053] Similarly, as in Figure 2 As shown, the electron column includes an electron beam source 126 configured to generate electrons that are focused onto the sample 128 through one or more elements 130. The electron beam source may include, for example, a cathode source or an emitter tip, and the one or more elements 130 may include, for example, a gun lens, an anode, a beam-limiting aperture, a gate valve, a beam current selection aperture, an objective lens, and a scanning subsystem, all of which may include any such suitable elements known in the art.
[0054] Electrons (e.g., secondary electrons) returning from the sample can be focused onto detector 134 by one or more elements 132. One or more elements 132 may include, for example, a scanning subsystem, which may be the same scanning subsystem included in element 130.
[0055] The electron column may comprise any other suitable element known in the art. Furthermore, the electron column may be configured as described in U.S. Patent No. 8,664,594, issued April 4, 2014 to Jiang et al., U.S. Patent No. 8,692,204, issued April 8, 2014 to Kojima et al., U.S. Patent No. 8,698,093, issued April 15, 2014 to Gubbens et al., and U.S. Patent No. 8,716,662, issued May 6, 2014 to MacDonald et al., all of which are incorporated herein by reference as if fully described herein.
[0056] Despite the electron column Figure 2 The diagram illustrates a configuration where electrons are guided to the sample at an angle of incidence and scattered from the sample at another angle; however, the electron beam can be guided to and scattered from the sample at any suitable angle. Furthermore, the electron beam subsystem can be configured to generate sample output using multiple modes as further described herein (e.g., employing different illumination angles, collection angles, etc.). These multiple modes of the electron beam subsystem can differ in any output generation parameters of the output acquisition subsystem.
[0057] Computer subsystem 124 may be coupled to detector 134 as described above. The detector detects electrons returning from the surface of the sample, thereby forming an electron beam image (or other output) of the sample. The electron beam image may include any suitable electron beam image. Computer subsystem 124 may be configured to use the output generated by detector 134 to determine information about the sample, as may be performed as further described herein. Computer subsystem 124 may be configured to perform any additional steps described herein. Figure 2 The output acquisition subsystem shown in the document can be further configured as described in this document.
[0058] Provided in this article Figure 2 The configuration of the electron beam subsystem that may be included in the embodiments described herein is explained in general terms. As with the optical subsystem described above, the arrangement of the electron beam subsystem described herein can be modified to optimize the performance of the output acquisition subsystem, as is typically done when designing commercial systems. Alternatively, the systems described herein can be implemented using existing systems (e.g., by adding the functionality described herein to an existing system) (e.g., tools available from KLA). For some such systems, the methods described herein may provide optional functionality for the system (e.g., in addition to other system functionalities). Alternatively, the systems described herein can be designed "from scratch" to provide entirely new systems.
[0059] Although the output acquisition subsystem is described above as a light or electron beam subsystem, the output acquisition subsystem may be an ion beam output acquisition subsystem. For example... Figure 2 The output acquisition subsystem is configured as shown in the diagram, except that any suitable ion beam source known in the art can be used instead of the electron beam source. Additionally, the output acquisition subsystem may include any other suitable ion beam system, such as those found in commercially available focused ion beam (FIB) systems, helium ion microscopy (HIM) systems, and secondary ion mass spectrometry (SIMS) systems.
[0060] Figure 3 This describes another embodiment of a system that includes various light-based output acquisition subsystems. Figure 3 The output acquisition subsystem shown herein is described in more detail in U.S. Patent No. 6,515,746 to Opsal et al., which is incorporated herein by reference as if its entirety were described herein. Some non-essential details of the system presented in this patent have been removed from the corresponding patents presented herein. Figure 3 The description is omitted. However, it should be understood that... Figure 3 The system described herein can be further configured as described in this patent. Furthermore, it will become apparent after reading the description of the several embodiments provided herein that… Figure 3 The system described herein has been modified to improve the system described in U.S. Patent No. 6,515,746 to Opsal et al.
[0061] One of the output acquisition subsystems is configured as a broadband reflectance spectrometer. The broadband reflectance spectrometer (BRS) 230 simultaneously probes the sample 226 with light of multiple wavelengths. The BRS 230 uses a lens 232 and includes a broadband spectrometer 234 (which can be of any type commonly known and used in the art). The lens 232 can be a transmission optical element formed of a material such as calcium fluoride (CaF2). This lens can be a spherical microscope objective with a high numerical aperture (approximately 0.90 NA) to produce a wide range of incident angles relative to the sample surface and to produce a spot size of approximately 1 micrometer in diameter. Alternatively, the lens 232 can be a reflective optical assembly. This lens can have a lower numerical aperture (approximately 0.4 NA) and can be able to focus light to a spot size of approximately 10 to 15 micrometers. Figure 3 The spectrometer 234 shown includes a lens 236, an aperture 238, a dispersive element 240, and a detector array 242. The lens 236 may be formed of CaF2.
[0062] During operation, the probe beam 244 from light source 246 is collimated by lens 245, guided by mirror 243 through mirror 266 to reach mirror 286, mirror 286 guides the light through mirror 248 to reach lens 232, and then lens 232 focuses the light onto sample 226. The light source may include any of the light sources described above. Lens 245 may be formed of CaF2.
[0063] Light reflected from the sample surface passes through lens 232 and is guided by mirror 248 (through mirror 250) to spectrometer 234. Lens 236 focuses the probe beam through aperture 238, which defines a spot of light in the field of view on the sample surface to be analyzed. Dispersive elements 240 (e.g., diffraction gratings, prisms, or holographic plates) angularly disperse the beam according to wavelength to individual detector elements included in detector array 242.
[0064] Different detector elements preferably measure the optical intensity of light of different wavelengths contained in the probe beam simultaneously. Alternatively, detector 242 may be a charge-coupled device (“CCD”) camera or a photomultiplier tube with appropriate dispersion or other wavelength selectivity. It should be noted that a monochromator can be used to continuously measure different wavelengths (one wavelength at a time) using a single detector assembly. Furthermore, dispersive element 240 may be configured to disperse light according to wavelength in one direction and according to incident angle relative to the sample surface in orthogonal directions, making simultaneous measurement according to both wavelength and incident angle possible. Computer subsystem 252 processes the intensity information measured by detector array 242.
[0065] The broadband spectral ellipsometer (BSE) 254 is also configured to perform sample measurements using light. The BSE 254 includes a polarizer 256, a focusing lens 258, a collimating lens 260, a rotation compensator 262, and an analyzer 264. In some embodiments, the BSE 254 may be configured to perform sample measurements using light supplied by a light source 246, a light source 283, or another light source (not shown).
[0066] In operation, mirror 266 guides at least a portion of the probe beam 244 to polarizer 256, which produces a known polarization state (preferably linear polarization) of the probe beam. Mirror 258 focuses the beam onto the sample surface at an angle (ideally approximately 70 degrees to the normal to the sample surface). Based on well-known ellipsometric measurement principles, and considering the composition and thickness of the film 268 and substrate 270 of the sample, the reflected beam will typically have a mixed state of linear and circular polarization after interacting with the sample.
[0067] The reflected beam is collimated by mirror 260, which guides the beam to rotary compensator 262. Compensator 262 introduces a relative phase delay δ (phase delay) between a pair of mutually orthogonal polarized beam components. Compensator 262 is preferably rotated at an angular velocity c by electric motor 272 about an axis substantially parallel to the beam propagation direction. Analyzer 264 (preferably another linear polarizer) mixes the polarization state of the incident light. The polarization state of the reflected probe beam can be determined by measuring the light transmitted through analyzer 264.
[0068] Mirror 250 directs the light beam to spectrometer 234, which simultaneously measures the intensity of light at different wavelengths in the reflected probe beam passing through the compensator / analyzer combination. Computer subsystem 252 receives the output of detector 242 and processes the intensity information measured by detector 242, which varies according to wavelength and according to the azimuth (rotation) angle of compensator 262 about its rotation axis, to solve for ellipsometric measurements ψ and Δ, as described in U.S. Patent No. 5,877,859 to Aspnes et al., which is incorporated herein by reference as if fully described herein.
[0069] Systems incorporating the BRS and BSE described above may also include additional output acquisition subsystems configured to perform additional measurements of the sample using light. For example, the system may include an output acquisition subsystem configured as a beam profiler, beam profile reflectometer, another optical subsystem, or a combination thereof.
[0070] A beam profiler (BPE) is described in U.S. Patent No. 5,181,080 to Fanton et al., which is incorporated herein by reference as if fully described herein. BPE 274 includes a laser 283 that generates a probe beam 284. Laser 283 may be a solid-state laser diode from Toshiba Corporation, emitting a 3 mW beam of linearly polarized light at 673 nm. BPE 274 also includes a quarter-wave plate 276, a polarizer 278, a lens 280, and a quadrangular detector 282. In operation, the linearly polarized probe beam 284 is focused onto a sample 226 by lens 232. Light reflected from the sample surface passes upward through lens 232 and mirrors 248, 286, and 288, and is guided into BPE 274 by mirror 290.
[0071] The position of the light rays within the reflected probe beam corresponds to a specific angle of incidence relative to the sample surface. A quarter-wave plate 276 delays the phase of one polarization state of the beam by 90 degrees. A linear polarizer 278 causes the two polarization states of the beam to interfere with each other. For the maximum signal, the axis of polarizer 278 should be oriented at a 45-degree angle relative to the fast and slow axes of the quarter-wave plate 276. Detector 282 is a four-element detector with four radially arranged quadrants, each quadrant intercepting a quarter of the probe beam and generating a separate output signal proportional to the power of the portion of the probe beam impacting said quadrant.
[0072] The output signal from each quadrant is sent to the computer subsystem 252. By monitoring changes in the polarization state of the beam, ellipsometric measurement information, such as ψ and Δ, can be determined. To determine this information, the computer subsystem 252 takes the difference between the sums of the output signals from the quadrants with opposite diameters, i.e., a value that varies linearly with the film thickness for very thin films.
[0073] A beam profiler (BPR) is described in U.S. Patent No. 4,999,014 to Gold et al., which is incorporated herein by reference as if fully described herein. BPR 292 includes a laser 283 for measuring the reflectivity of a sample, a lens 294, a beam splitter 296, and two linear detector arrays 298 and 300. In operation, a linearly polarized probe beam 284 is focused onto a sample 226 by lens 232, with various rays within the beam striking the sample surface at a range of incident angles. Light reflected from the sample surface passes upward through lens 232 and mirrors 248 and 286, and is guided into BPR 292 by mirror 288. The position of the rays within the reflected probe beam corresponds to a specific incident angle relative to the sample surface. Lens 294 spatially disperses the beam in two dimensions. Beam splitter 296 separates the S and P components of the beam, and detector arrays 298 and 300 are orthogonally oriented to isolate information regarding the S and P polarized light. A higher incident angle will cause the light beam to fall closer to the opposite ends of the array. The output from each element in the diode array will correspond to a different incident angle. Detector arrays 298 and 300 measure the intensity of the transreflective probe beam, which varies according to the incident angle relative to the sample surface. Computer subsystem 252 receives the outputs from detector arrays 298 and 300 and derives the thickness and refractive index of thin film layer 268 based on these angle-dependent intensity measurements using various types of modeling algorithms. Typically, optimization routines using iterative processes (e.g., least-squares fitting routines) are employed.
[0074] Figure 3 The system shown may also include additional components, such as detector / camera 302. Detector / camera 302 is positioned above mirror 290 and can be used to view the beam of light reflected off sample 226 for symmetry and focusing purposes.
[0075] To calibrate BPE 274, BPR 292, BRS 230 and BSE 254, the system may include a wavelength-stabilized calibration reference ellipsometer 304 used in conjunction with a reference sample (not shown), which may be any suitable sample with known parameters.
[0076] The ellipsometer 304 includes a light source 306, a polarizer 308, lenses 310 and 312, a rotation compensator 314, an analyzer 316, and a detector 318. The compensator 314 is preferably rotated by an electric motor 322 about an axis substantially parallel to the propagation direction of the light beam 320. The compensator can be positioned between the sample and the analyzer (e.g., in...). Figure 3 (As shown in the image) or between the sample and polarizer 308. Polarizer 308, lenses 310 and 312, compensator 314 and polarizer 316 are all optimized in their construction for light of a specific wavelength generated by light source 306, which maximizes the accuracy of the ellipsometer.
[0077] Light source 306 generates a quasi-monochromatic probe beam 320 with a known stable wavelength and stable intensity. This can be done passively, where light source 306 generates a very stable output wavelength that does not change over time (i.e., changes less than 1%). Examples of passively stabilized light sources are helium-neon lasers or other gas discharge laser systems. Alternatively, a non-passive system can be used, where the light source includes a light generator (not shown) that generates light with a wavelength that is not precisely known or stable over time, and a monochromator (not shown) that precisely measures the wavelength of the light generated by said light generator. Examples of such light generators include laser diodes, or multicolor light sources used in conjunction with color filters (e.g., gratings). In either case, the wavelength of beam 320 (which is a known constant or measured by the monochromator) is provided to computer subsystem 252 so that ellipsometer 304 can accurately calibrate the optical measuring devices in the system.
[0078] The operation of the ellipsometer 304 during calibration is further described in U.S. Patent No. 6,515,746. In simple terms, beam 320 enters detector 318, which measures the intensity of the beam passing through the compensator / analyzer combination. Computer subsystem 252 processes the intensity information measured by detector 318 to determine the polarization state of the light after interaction with the analyzer, and thus the ellipsometric parameters of the sample. This information processing includes measuring the beam intensity as it varies according to the azimuth (rotation) angle of the compensator about its rotation axis. This measurement of the intensity varying according to the compensator rotation angle is actually a measurement of the intensity of beam 320 varying over time, since the compensator angular velocity is generally known and constant.
[0079] By knowing the composition of the reference sample and the exact wavelength of the light generated by the light source 306, the optical properties of the reference sample, such as film thickness d, refractive index, and extinction coefficient, can be determined by ellipsometer 304. Once the film thickness d is determined by ellipsometer 304, the same sample is probed by other optical measuring devices BPE 274, BPR 292, BRS 230, and BSE 254, which measure various optical parameters of the sample. Next, computer subsystem 252 calibrates the processing variables used to analyze the results from these optical measuring devices, thereby producing accurate results. In the above calibration technique, the phase shift and reflectance normalization factor described in U.S. Patent No. 6,515,746 are used to determine and compensate for all system variables affecting phase and intensity, thereby making the optical measurements performed by these calibrated optical measuring devices absolute.
[0080] The above-described calibration techniques are primarily based on calibration using the derived thickness d of the thin film. However, calibration using ellipsometer 304 can be based on any of the optical properties of the reference sample, which can be measured or determined by ellipsometer 304 and / or otherwise known, whether the sample has a single film on it, has multiple films on it, or even has no film on it (naked sample).
[0081] In some embodiments, the output acquisition subsystem may have at least one common optical component. For example, lens 232 is common to BPE 274, BPR 292, BRS 230, and BSE 254. Similarly, lenses 243, 266, 286, and 248 are common to BPE 274, BPR 292, BRS 230, and BSE 254. Figure 3 As shown, the ellipsometer 304 does not have any optical components common to the other output acquisition subsystems. This separation from the other output acquisition subsystems is appropriate because the ellipsometer is used to calibrate the other output acquisition subsystems.
[0082] As further mentioned above, the output acquisition subsystem can be configured to have multiple modes. Generally, a "mode" is defined by the values of the parameters of the output acquisition subsystem used to generate the output of the sample. Therefore, different modes can differ in the values of at least one of the output generation parameters of the output acquisition subsystem (other than the position on the sample where the output is generated). For example, for a light-based output acquisition subsystem, different modes can use light of different wavelengths. Modes can differ in the wavelength of the light directed to the sample, as further described herein (e.g., by using different light sources, different illumination channels, different spectral filters, etc., for different modes).
[0083] Multiple modes can also differ in illumination and / or collection / detection. For example, as further described above, the output acquisition subsystem may include multiple detectors. One detector may be used in one mode and another detector may be used in another mode. Furthermore, modes can differ from each other in more than one way as described herein (e.g., different modes may have one or more different illumination parameters and one or more different detection parameters). Additionally, multiple modes may differ in viewing angle, meaning they may have any or both of different incident angles and collection angles that can be achieved as further described above. The output acquisition subsystem can be configured to scan the sample in different modes in the same scan or different scans, for example, depending on the ability to scan the sample simultaneously using multiple modes.
[0084] In some examples, the systems described herein can be configured as inspection systems. However, the systems described herein can also be configured as other types of semiconductor-related quality control systems (e.g., defect inspection systems and metrology systems). For example, the systems described herein and Figures 1 to 3 The embodiment of the output acquisition subsystem shown can be modified in one or more parameters to provide different output generation capabilities depending on the application it will be used for. In one embodiment, the output acquisition subsystem is configured as an electron beam defect inspection subsystem. For example, Figure 2 The output acquisition subsystem shown can be configured to have higher resolution when it is intended for defect inspection or measurement rather than for testing. In other words, Figures 1 to 3 The embodiments of the output acquisition subsystem shown in the text describe some general configurations and various configurations for the output acquisition subsystem, which can be customized in several ways that will be obvious to those skilled in the art to produce output acquisition subsystems with different output acquisition capabilities that are more or less suitable for different applications.
[0085] As mentioned above, the output acquisition subsystem can be configured to direct energy (e.g., light, electrons) to a physical version of the sample and / or to scan the energy across said physical version of the sample, thereby producing an actual output from the physical version of the sample. In this way, the output acquisition subsystem can be configured as an "actual" output acquisition system rather than a "virtual" system. However, storage media (not shown) and Figure 1 The computer system 102 shown herein and / or other computer subsystems shown and described herein may be configured as “virtual” systems. Specifically, the storage media and computer system 102 are not part of the output acquisition subsystem 100 and do not have any capability to dispose of a physical version of the sample, but may be configured to use a virtual inspector performing inspection functions via the output of a storage detector, a virtual metrology system performing metrology functions, a virtual defect inspection tool performing defect inspection functions, etc. Systems and methods configured as “virtual” systems are described in U.S. Patent No. 8,126,255, jointly assigned to Bhaskar et al., dated February 28, 2012; U.S. Patent No. 9,222,895, issued to Duffy et al., dated December 29, 2015; and U.S. Patent No. 9,816,939, issued to Duffy et al., dated November 14, 2017, all of which are incorporated herein by reference as if described in their entirety. The embodiments described herein may be further configured as described in these patents.
[0086] In one embodiment, the output acquisition subsystem is configured as a metering subsystem. As described above, Figures 1 to 3The output acquisition subsystem shown herein can be configured as a metrology subsystem, and the system described herein can be configured as a metrology tool. In the field of semiconductor metrology, a metrology tool may comprise an illumination subsystem for illuminating a target, a light-gathering subsystem for capturing relevant information provided by the interaction (or lack thereof) between the illumination subsystem and the target, device, or feature, and a computer subsystem for analyzing the information using one or more algorithms. Metrology tools can be used to measure structural and material properties associated with various semiconductor processes (e.g., material composition of structures and films, dimensional properties (e.g., film thickness and / or critical dimensions (CD), stacking, etc.)). These measurements are used to facilitate process control and / or yield efficiency in the manufacture of semiconductor dies.
[0087] The metrology tool may include one or more hardware configurations that can be used in conjunction with certain embodiments described herein (e.g., to measure various semiconductor structures and material properties described above). Examples of such hardware configurations include (but are not limited to) the following.
[0088] 1. Spectral Ellipsometry (SE)
[0089] 2. SE with multiple lighting angles
[0090] 3. Measure the SE of the Mueller matrix elements (e.g., using a rotation compensator).
[0091] 4. Single-wavelength ellipsometer
[0092] 5. Beam profile ellipsometer (angularly resolved ellipsometer)
[0093] 6. Beam profile reflectometer (angle-resolved reflectometer)
[0094] 7. Broadband reflectance spectrometer (spectral reflectometer)
[0095] 8. Single-wavelength reflectometer
[0096] 9. Angle-resolved reflectometer
[0097] 10. Imaging System
[0098] 11. Pyrometer (e.g., speckle analyzer)
[0099] Hardware configurations can be categorized into discrete operating systems. On the other hand, one or more hardware configurations can be combined into a single tool. One example of combining multiple hardware configurations into a single tool is... Figure 3 The system described herein can be further configured as described in U.S. Patent No. 7,933,026 to Opsal et al., which is incorporated herein by reference in its entirety. The system described herein can be further configured as described in the references herein.
[0100] Figure 3 The diagram illustrates, for example, exemplary metrological instruments including: a) a BSE (i.e., 254); b) an SE (i.e., 304) with a rotation compensator (i.e., 314); c) a BPE (i.e., 274); d) a BPR (i.e., 292); e) a BRS (i.e., 230); and f) a deep ultraviolet reflectance spectrometer (i.e., 230). Furthermore, such systems typically contain numerous optical elements, including specific lenses, collimators, mirrors, quarter-wave plates, polarizers, detectors, cameras, apertures, and / or light sources. The wavelengths of the optical systems can vary from approximately 120 nm to 3 micrometers. For non-ellipsometer systems, the collected signals can be resolved by polarized light or unpolarized light. Figure 3 Descriptions are provided for integrating multiple metrological heads onto the same tool. However, in many cases, multiple metrological tools are used for measuring a single or multiple metrological targets, as described, for example, in U.S. Patent No. 7,478,019 to Zangooie et al., which is incorporated herein by reference as if its entirety were described. The embodiments described herein may be further configured as described in the references herein.
[0101] A lighting subsystem with a specific hardware configuration includes one or more light sources. The light source can produce light with only one wavelength (i.e., monochromatic light), light with several discrete wavelengths (i.e., polychromatic light), light with multiple wavelengths (i.e., broadband light), and / or light sweeping wavelengths continuously or abruptly between wavelengths (i.e., tunable or frequency-sweeping sources). Examples of suitable light sources include (but are not limited to) white light sources, ultraviolet (UV) lasers, arc lamps or electrodeless lamps, laser continuous plasma (LSP) sources (e.g., LSP sources available from Energetiq Technology, Woburn, Massachusetts), supercontinuum sources (e.g., broadband laser sources) (e.g., supercontinuum sources available from NKT Photonics, Morganville, New Jersey), or shorter wavelength sources (e.g., X-ray sources), extreme UV sources, or combinations thereof. The light source can also be configured to provide light with sufficient brightness, which in some cases may be greater than about 1 W / (nm cm⁻¹). 2 The luminance of the light source (Sr). The metering system may also include rapid feedback of the power and wavelength of the light source for stabilization. The output of the light source may be delivered via free space propagation, or in some cases via any type of optical fiber or optical guide.
[0102] Metrology tools can be designed to perform many different types of measurements related to semiconductor manufacturing. Certain embodiments described herein are applicable to such measurements. For example, in some embodiments, the tool can measure characteristics of one or more targets, such as CD, stacking, sidewall angles, film thickness, process-related parameters (e.g., focus and / or dose). Targets may comprise inherently periodic regions of interest, such as gratings in a memory die. Targets may comprise multiple layers (or films) whose thickness can be measured by the metrology tool. Targets may comprise a target design placed on (or already present in) a sample for use (e.g., using alignment and / or stacking registration operations). Specific targets can be located at various locations on the sample. For example, targets can be located within scribing lines (e.g., between dies) and / or within the die itself. Multiple targets can be measured (at the same time or at different times) by the same or multiple metrology tools as described in U.S. Patent No. 7,478,019 to Zangooie et al. Data from such measurements can be combined. Data from metrology tools are used in semiconductor manufacturing processes (e.g.) for feedforward, feedback, and / or side-feedback correction of processes (e.g., photolithography, etching), and thus, complete process control solutions can be generated.
[0103] As semiconductor device pattern sizes continue to shrink, smaller metrological targets are increasingly required. The need for measurement accuracy and matching to actual device characteristics increases the demand for device-like targets, as well as measurements on dies and even on devices. Various metrological implementations have been proposed to achieve these goals. For example, a focused beam ellipsometer, primarily based on reflective optics, is one such example and is described in U.S. Patent No. 5,608,526 to Piwonka-Corle et al., which is incorporated herein by reference as if described in its entirety. The embodiments described herein can be further configured as described in this patent. Apodizers can be used to mitigate optical diffraction effects that cause illumination spot dispersion to exceed the size defined by geometric optics. The use of apodizers is described in U.S. Patent No. 5,859,424 to Norton, which is incorporated herein by reference as if described in its entirety. The embodiments described herein can be further configured as described in this patent. The use of high numerical aperture tools with simultaneous multi-incident angle illumination is another way to achieve small target capability. This technology is described, for example, in U.S. Patent No. 6,429,943 to Opsal et al., which is incorporated herein by reference as if it were described in its entirety. The embodiments described herein may be further configured as described in this patent.
[0104] Other measurement examples may include measuring the composition of one or more layers of a semiconductor stack or sample, measuring specific defects on (or within) a sample, and measuring the amount of photolithographic radiation exposed to a sample. In some cases, metrology tools and algorithms may be configured to measure aperiodic targets, for example, see U.S. Patent No. 9,291,554 to Kuznetsov et al., March 22, 2016, and U.S. Patent No. 9,915,522 to Jiang et al., March 13, 2018, both of which are incorporated herein by reference as if described in their entirety. The embodiments described herein may be further configured as described in this patent.
[0105] The measurement of the parameters of interest typically involves multiple algorithms. For example, the optical interaction between the incident beam and the sample is modeled using an EM (electromagnetic) solver, employing algorithms such as RCWA, FEM, dynamical method, surface integration method, volume integration method, FDTD, and others of this kind. The target of interest is typically modeled (parameterized) using a geometry engine or, in some cases, a process modeling engine, or a combination of both. The use of process modeling is described in U.S. Patent No. 10,769,320, issued to Kuznetsov et al. on September 8, 2020, which is incorporated herein by reference as if its entirety were described. The embodiments described herein can be further configured as described in this patent. For example, a geometry engine is implemented in the AcuShape software product from KLA Corporation.
[0106] The collected data can be analyzed using a number of data fitting and optimization techniques and technologies, including libraries, fast degradation models; regression; machine learning algorithms such as neural networks and support vector machines (SVM); dimensionality reduction algorithms such as PCA (principal component analysis), ICA (independent component analysis), and LLE (local linear embedding); sparse representations such as Fourier transform or wavelet transform; Kalman filters; algorithms that facilitate matching from the same or different tool types; and others.
[0107] The collected data can also be analyzed using algorithms that do not involve modeling, optimization, and / or fitting, such algorithms as described (for example) in U.S. Patent No. 10,591,406 to Bringoltz et al., issued March 17, 2020, which is incorporated herein by reference as if fully described herein. The embodiments described herein can be further configured as described in this patent.
[0108] Computational algorithms are typically optimized for metrology applications, employing one or more methods such as the design and implementation of computing hardware, parallelization, distributed computing, load balancing, multi-service support, and dynamic load optimization. Different implementations of the algorithms can be implemented in firmware, software, FPGAs, programmable optical components, and other applications.
[0109] Data analysis and fitting steps typically aim to achieve one or more of the following objectives:
[0110] 1. Measure CD, sidewall angle (SWA), shape, stress, composition, film, band gap, electrical properties, focus / dose, stacking, generation process parameters (e.g., resist state, partial pressure, temperature, focusing model) and / or any combination thereof;
[0111] 2. Modeling and / or designing a measurement system; and
[0112] 3. Modeling, designing, and / or optimizing measurement objectives.
[0113] The embodiments configured for use in the field of semiconductor metrology described in this article are not limited to the hardware, algorithm / software implementations and architectures and use cases outlined above.
[0114] In another embodiment, the output acquisition subsystem is configured as a verification subsystem. The verification subsystem may be configured to perform verification using light, electrons, or another energy type (e.g., ions). For example, this output acquisition subsystem may be configured as follows: Figure 1 and 2 The following is a typical configuration. In a system where the output acquisition subsystem is configured as an inspection subsystem, the computer subsystem can be configured to detect defects on a sample based on the output generated by the output acquisition subsystem. For example, in perhaps the simplest scenario, the computer subsystem can subtract a reference from the output to generate a differential signal or image, and then apply a threshold to the differential signal or image. The computer subsystem can determine that any differential signal or image with a value higher than the threshold is a defect or potential defect, and that any other differential signal or image is not a defect or potential defect. Of course, many defect detection methods and algorithms used in commercially available inspection tools are far more complex than this example, and any such method or algorithm can be applied to the output generated by the output acquisition subsystem configured as an inspection subsystem.
[0115] Similarly, the process can be a defect inspection process. Unlike an inspection process, a defect inspection process typically revisits discrete locations on a sample where defects have been detected. An output acquisition subsystem configured for defect inspection can generate sample images as described herein, which can be used to determine one or more attributes of the defect (such as defect shape, size, roughness, background pattern information, etc.) and / or defect classification (e.g., bridging defects, missing feature defects, etc.). For defect inspection applications, the computer subsystem can be configured to use any suitable defect inspection method or algorithm to determine information about the defect or sample from the output generated by the output acquisition subsystem.
[0116] The system contains one or more components that execute through a computer subsystem. For example, as in... Figure 1 As shown, the system includes one or more components 104 executed by computer subsystem 36 and / or computer system 102. One or more components may include a machine learning model 106, which may include any of the architectures, architecture templates, architecture blocks, etc., further described herein. Systems shown in other figures described herein may be configured to include similar elements. Components may be executed by the computer subsystem as further described herein or in any other suitable manner known in the art. At least a portion of executing one or more components may involve inputting one or more inputs (e.g., acquired measurements, inspection images or signals, defect inspection images, etc.) into one or more components. The computer subsystem may be configured to input any such measurements, images, signals, etc., into one or more components in any suitable manner. As used herein, the term "component" may be generally defined as any software and / or hardware executable by a computer system.
[0117] The embodiments described herein provide an important framework for advanced ML architectures. Furthermore, the embodiments described herein provide a framework for constructing arbitrary architectures.
[0118] ML can be broadly defined as a type of artificial intelligence (AI) that provides computers with the ability to learn without explicit programming. ML focuses on the development of computer programs that can teach themselves to grow and change when exposed to new data. In other words, ML can be defined as a subfield of computer science that "gives computers the ability to learn without explicit programming." ML explores the research and construction of algorithms that can learn and predict data, overcoming strictly static program instructions by building models from sample inputs to make data-driven predictions or decisions.
[0119] The ML described herein can be further performed as described in each of the following: Morgan Kaufmann, 2016, 534 pages, Sugiyama, "Introduction to Statistical Machine Learning"; Jebara, 2002, 212 pages, MIT Thesis, "Discriminative, Generative, and Imitative Learning"; and Hand et al., 2001, 578 pages, MIT Press, "Principles of Data Mining (Adaptive Computation and Machine Learning)"; these references are incorporated herein by reference as if they were quoted in their entirety. The embodiments described herein can be further configured as described in these references.
[0120] Generally, "deep learning" (DL) (also known as deep structured learning, hierarchical learning, or deep ML) is a branch of ML based on algorithms that attempt to model higher-order abstractions in data. In a simple case, there might be two sets of neurons: one set that receives input signals and another set that sends output signals. When an input layer receives input, it passes a modified version of that input to the next layer. In DL-based models, there are typically many layers between the input and output, allowing the algorithm to use multiple processing layers consisting of multiple linear and / or nonlinear transformations.
[0121] ML models can be configured as generative models. A “generative” model can be broadly defined as a model that is inherently probabilistic. In other words, a generative model is not a model that performs forward simulations or rule-based methods, and therefore, a model of the physics of the processes involved is not necessary. Instead, as further described in this paper, a generative model can be learned based on a suitable training dataset (because its parameters can be learned). ML models can also be configured as deep generative models. For example, a model can be configured to have a DL architecture, as the model can contain multiple layers that perform several algorithms or transformations.
[0122] Any of the architectures, architectural templates, architectural blocks, etc., described in this document may include neural networks (NNs). NNs can be broadly defined as computational methods based on a relatively large set of neural units. Each neural unit is connected to many other neural units, and these connections enforce or suppress their effects on the activation states of the connected neural units. These systems are self-learning and trained rather than explicitly programmed, and excel in domains where solutions or feature detection are difficult to express in traditional computer programs.
[0123] Any of the architectures, architecture templates, architecture blocks, etc., described in this document may contain convolutional neural networks (CNNs). CNNs may contain any suitable type of layers, such as convolutional, pooling, fully connected, soft max, etc. layers with any suitable configuration known in the relevant domain. CNNs may have any suitable CNN configuration or architecture known in the relevant domain.
[0124] The system comprises one or more computer systems configured to define multiple architectural blocks (e.g., Figure 1 The computer subsystem 36 and / or computer system 102 shown herein, each of the architecture blocks is a reusable ML architecture fragment. For example, an architecture library may contain multiple architecture blocks defined as common reusable architecture fragments. For ease of use, architectures can be constructed using architecture blocks, which enhance the capabilities of the embodiments described herein by simplifying the definition of the architecture.
[0125] The computer system is also configured to define multiple architecture templates, each of which is a reusable template configurable to include one or more of a plurality of architecture blocks. For example, the computer system may be configured to define multiple architecture templates that can use architecture-related architecture blocks and hyperparameters (HP) definitions. Figure 4 This section explains the concepts of architecture blocks and templates. Architecture template 406 and architecture block 404 may each contain user-defined descriptions of the template and block, respectively.
[0126] Architecture block 404 can be input into architecture template 406. In other words, one or more architecture blocks can be contained within any one of the templates. In a sense, one or more architecture blocks can be inserted into an architecture template. Since both blocks and templates are reusable, any architecture block can be contained within one or more architecture templates. Similarly, depending on the application's input data metrics and performance goals, the same architecture template can be reused with different architecture blocks. Furthermore, a combination of an architecture template and one or more blocks can be reused across multiple layers, applications, etc., by training it separately for different layers, applications, etc., so that different examples of the same architecture have (or are allowed to have) different values for the architecture's parameters.
[0127] In one embodiment, multiple architecture templates include at least one layer-specific, application-specific, or user-defined architecture template, and one or more features of the at least one architecture template can be modified for different layers or applications. For example, an architecture template defines an architecture and can be modified or extended for a specific purpose without requiring code compilation or a new version. Architecture templates can also be plugins for the main software. In one such example, an architecture template specific to a layer on a single sample can be modified for use on different layers on different samples. In another such example, an architecture template specific to determining the structure of a CD in metrological data can be extended to determine the defect or structure of a CD in a defect inspection image.
[0128] In another embodiment, the plurality of architecture blocks include at least one layer-specific, application-specific, or user-defined architecture block, and during the selection steps described herein, one or more features of the at least one architecture block may be modified for different layers or applications. As described above, architecture blocks can be modifiable and extensible.
[0129] The computer system is also configured to assign metadata to multiple architecture templates in response to input data metrics and performance objectives applicable to those templates. In this way, each architecture template may have metadata describing a use case in which it can be used. The computer system may be configured to assign metadata to the templates in any suitable manner known in the relevant field, and the metadata may have any suitable form or format known in the relevant field. The input data metrics and performance objectives to which the metadata responds may include any of the such metrics and objectives described herein. The computer system may be configured to determine the input data metrics and performance objectives applicable to the template in any suitable manner (e.g., from a recipe previously used with the template, based on input from a user, etc.). More specifically, the metadata may respond to data previously input into the template and the objective (e.g., purpose) of producing output using the template.
[0130] The computer system is further configured to store multiple architecture blocks, multiple architecture templates, and metadata in an ML library, which is configured to select one or more of multiple architecture templates for an Application-Specific ML Architecture (ASMLA) (hereinafter simply referred to as "architecture") based on input data metrics and application-specific performance goals. In this way, embodiments can build libraries of advanced ML or NN architectures. For example, all available (previously used or at least previously established) architecture templates and blocks can form a possible architecture library. The selection of ASMLA can be manual (user-selected) or automatic (computer system-selected) based on application and performance goals.
[0131] Although the stored blocks, templates, metadata, etc., are referred to herein as an ML library, computer systems may store blocks, templates, metadata, etc., in any suitable data structure having any suitable form and format known in the relevant field. Computer systems may be configured to store blocks, templates, metadata, etc., as further described herein and / or in any suitable manner known in the relevant field.
[0132] In one embodiment, a computer system is configured to perform the selection step. For example, the same computer system that generates the ML library may also use the ML library to select blocks, templates, etc., for ASMLA. However, a computer system may only build the ML library, while different computer systems may use the ML library to build one or more ASMLAs. Any of such computer systems may be further configured as described herein.
[0133] In another embodiment, the computer system is configured to define multiple architecture templates of HPs, assign additional metadata to HPs in response to input data metrics and performance goals applicable to the HPs, and store the HPs and additional metadata in an ML library configured to select one or more HPs for the ASMLA based on input data metrics and application-specific performance goals. HPs may include any of the HPs further described herein, and additional metadata may be assigned to HPs as further described herein. HPs and their corresponding metadata may be stored in an ML library, as further described herein. One or more HPs may be selected for the ASMLA, as further described herein.
[0134] Figure 4 An embodiment of a method for building a specific architecture is shown. In the ML architecture building step 410, an ASMLA can be built based on an architecture template 406 using architecture block 404. A user can, for example, use interface 400 to select a specific configuration of the ASMLA (e.g., configuration 402) (e.g., iDO-specific configuration, NAND-specific configuration, etc.). For example, a user can select from an advanced architecture library of configuration 402. Figure 4 As shown, interface 400 may include an architecture drop-down menu 400a from which a user can select a specific configuration. Although the architecture drop-down menu contains some specific configurations (e.g., from top to bottom, “Custom_Architecture_with_ResBlocks”, “MultiHead”, “MultiHeadEnsemble”, “Simple_Architecture”, “Simple_Architecture_PCA”, and “Wafer_Location_Conditional”), the architecture drop-down menu may contain any configuration applicable to the application for which it is built in ASMLA.
[0135] Interface 400 may also include a hyperparameter section 400b configurable for displaying the HP of a prominently displayed or selected configuration. In this way, the HP section 400b can be switched depending on the configuration prominently displayed or selected by the user. Alternatively, the HP section can be configured to allow the user to input a value for the HP of the selected configuration. Although Figure 4 The section displays specific HP types (e.g., from left to right, "PC", "N1", and "N2"), each with specific values, but the HP section can contain any HP type and its values that can be used for the selected configuration and for applications built on it using ASMLA.
[0136] After constructing the ASMLA in step 410, the ASMLA can be trained with data 408 in training the ML architecture step 412. The computer system can be configured to train the ASMLA using a training set containing training inputs and training outputs. The training set can contain any appropriate data that may vary depending on the application for which the ASMLA is selected and set. For example, the training input may contain spectra measured on metrology tools used for one or more training wafers, and the training output may contain real data measured using real data methods such as CD scanning electron microscopy (CDSEM), such as CDs of structures formed on the training wafers. In various instances, the training input may contain images generated for one or more training wafers by wafer inspection tools, and the training output may contain real data defect information of the training wafers generated using real data tools such as CDEM or defect inspection SEM.
[0137] Training may involve feeding training inputs into an ASMLA and changing one or more parameters of the ASMLA until the output produced by the ASMLA matches (or substantially matches) the training output. Training may involve changing one or more trainable parameters of the ASMLA. The trained parameters of the ASMLA may include one or more weights from any layer of the ASMLA with trainable weights. In one such instance, the weights may include the weights of convolutional layers, but not the weights of pooling layers.
[0138] ASMLA can be trained either through a computer system or through a component executed by a computer system. For example, another method or system can train ASMLA, which can then be stored for use as a component executed by a computer system. In this way, ASMLA can be built by a system and trained by the same or different systems.
[0139] In one embodiment, the computer system is configured to select one or more of a plurality of architecture templates and one or more HPs for ASMLA based on input data metrics and application-specific performance goals. For example, the type of HP can be selected based on architecture and data, as well as performance goals. Some architectures may have very application-specific HPs. The computer system or other computer system can be configured to select templates and HPs, as further described herein.
[0140] The embodiments described herein allow for the definition of higher-order HPs as functions of other HPs. In other words, an HP can be a function HP. In one of these embodiments, an HP comprises functions HP, and each of the functions HP is a function of two or more HPs having similar roles. For example, an HP can be a function of other HPs (e.g., the number of neurons, the number of layers, etc.). In this way, an HP can be a function HP, and each of these (or two or more) can be a function of multiple HPs (e.g., the number of neurons, the number of layers, etc.) having similar roles. HPs having “similar roles” are generally defined herein as HPs of the same type. Instances of such function HPs include (but are not limited to) Neurons_L1, Neurons_L2, Neurons_L3 = f(HP_Capacity, HP_Regularization), Dropout_L1, Dropout_L2, Dropout_L3, L2_Norm_L1, L2_Norm_L2, and L2_Norm_L3 = f(HP_Capacity, HP_Regularization). All master HPs depend on the function HP (a user-defined function): HP_Capacity and HP_Regularization. In this way, the HP optimizations further described in this paper can explore the space of master HPs by changing only some function HPs. Furthermore, function HPs with similar roles have a stronger relationship with performance metrics. This allows users to easily interpret the results and thus optimize models or fast-tuning libraries given less HP search time (time to solution improvement).
[0141] In this additional embodiment, at least one of the HPs is configured to select one or more of a plurality of architecture templates for ASMLA based on input data metrics and application-specific performance goals. For example, the HP may select a specific architecture or subset of architectures. More specifically, the embodiment allows defining an HP that acts as a switcher during HP optimization when selecting different architectures or portions of architectures. This capability allows for a comprehensive exploration of architectures and combinations thereof. Figure 7 The presentation showcases HP architectures using different selected architectures.
[0142] Figure 7The use of the HP function set in different architectures is also demonstrated. Input 700, which may contain input data, input data metrics, and performance targets, is provided to CNN architecture 702, PCA 704, and encoder architecture 706 (each of which can have any suitable configuration). The outputs of PCA 704 and encoder architecture 706 can be input to HP_Feature_Extractor 708. The output of HP_Feature_Extractor 708 can be passed through ResNet architecture 710, and the outputs of this architecture and CNN architecture 702 can be input to HP_Architecture 712. The shaded blocks (HP_Feature_Extractor 708 and HP_Architecture 712) are HPs that determine the architecture and the type of feature extractor used for a specific instance of the architecture.
[0143] The output of HP_Architecture 712 can be passed through a Dense(100) layer 714, which in turn produces output 716. "Dense" layer or block architectures are common basic ML architectures. Such architectures are also known as fully connected layers. In this layer, each neuron is connected to every neuron in the previous layer. All dense layers or architectures described in this paper are merely examples to illustrate what ASMLA might look like.
[0144] In a further embodiment, at least one of the HPs is configured to control one or more characteristics and one or more capabilities of the ASMLA. For example, the HP can control specific higher-order aspects of the ASMLA's architecture and capabilities. Such HPs can be further configured as described herein.
[0145] In some such embodiments, at least one of the HPs includes a capacity HP configured to control the total capacity of the ASMLA by changing one or more properties of the ASMLA. For example, HP_Capacity controls the total capacity of the ASMLA by changing properties such as the number of layers, the number of neurons per layer, input features, etc. In other words, HP_Capacity is a function HP that controls the number of parameters (weights) of the ASMLA.
[0146] In another embodiment, at least one of the HPs includes a regularization HP configured to control the regularization of the ASMLA by changing one or more properties of the ASMLA. For example, HP_Regularization controls regularization in the ASMLA by changing properties such as dropout rate, L2 and L1 regularization coefficients, layer normalization, and batch normalization parameters. In other words, HP_Regularization is a function HP that controls elements of the ASMLA related to regularization (L1 and L2 regularization, dropout, batch or layer normalization, bottleneck layer, etc.).
[0147] In an additional embodiment, at least one of HPs includes an aspect ratio HP configured to control the depth and width of the layers in the ASMLA, as well as the total number of layers. For example, HP_Aspect_Ratio controls the depth-to-width ratio of the ASMLA layers while maintaining a similar total number of parameters (weights). In other words, HP_Depth is a function HP that controls the depth of the ASMLA and can change parameters related to the architecture (e.g., CNN and residual layers). HP_AspectRatio is a function HP similar to HP_Depth but maintaining the total ASMLA in a similar manner.
[0148] In a further embodiment, the computer system is configured to define multiple loss functions, assign additional metadata to the multiple loss functions in response to input data metrics and performance objectives to which the multiple loss functions are applicable, and store the multiple loss functions and additional metadata in an ML library configured to select one or more of the multiple loss functions for ASMLA based on input data metrics and application-specific performance objectives. In this manner, the architecture library can include the definition of multiple loss functions, each with metadata describing the use case it will be used for. Loss functions can include any of the loss functions further described herein, and additional metadata can be assigned to loss functions as further described herein. Loss functions and their corresponding metadata can be stored in an ML library, as further described herein. One or more loss functions can be selected for ASMLA, as further described herein.
[0149] In one embodiment, the computer system is configured to select one or more of a plurality of architectural templates and one or more of a plurality of loss functions for ASMLA based on input data metrics and application-specific performance objectives. The loss function can be selected before training the selected ASMLA, such as in... Figure 5The following is an example of the configuration options provided. For instance, a user can select a configuration (e.g., configuration 502) as further described above, and architecture block 504 and architecture template 506 can be configured and selected as described above. An ASMLA can be built based on configuration 502, architecture block 504, and architecture template 506 in the ML architecture building step 510, as further described above. As described above, data 508 can be input into the built ASMLA for training, but before the ML architecture training step 516, the computer system can perform a loss function selection step 512. In step 512, a loss function can be selected from a user interface 514 that may contain a drop-down menu of loss functions. The loss function dropdown menu in Interface 514 displays some non-limiting instances of the types of loss functions that can be used for the applications described herein (e.g., from top to bottom, “mse”, “A1”, “regularized A1”, “A2”, and “A3”), but the loss functions displayed in the dropdown menu and interface may include any suitable loss function that may vary depending on the application for which ASMLA is built.
[0150] In another embodiment, at least two of the multiple loss functions are configured to implement different regularization methods that would not normally be possible in ASMLA. For example, the loss functions may implement different regularization techniques that would not normally be possible in the ASMLA architecture. Specifically, different loss functions typically implement different types of regularization or constraints. In one example, if the data analysis shows insufficient sample size and a risk of overfitting, the loss function preferably contains some form of regularization (e.g., L2). Another option is that the selected architecture contains some form of regularization (e.g., Dropout, LayerNormalization, or others).
[0151] In a further embodiment, at least one of the multiple loss functions is pluggable and extensible. For example, the selectable loss functions shown in Interface 514 can be a loss function plug-in architecture. In this way, the loss function can be implemented in a plug-in framework, and therefore it is extensible.
[0152] Some embodiments are configured to develop recipes for 1) a measurement library to be used in a process or 2) a process using ML. For example, in some embodiments, the application includes performing a process on a sample, and one or more computer systems are configured to generate recipes for a process that includes selection steps. Figure 6 An example of a method for selecting an architecture is shown. Additionally, Figure 6 This demonstrates the process of training a library by selecting modular architecture blocks, plug-in loss functions, and the HP set of functions.
[0153] In one embodiment, generating a formulation includes collecting data from one or more samples and reference data for parameters of the one or more samples generated by a reference tool, and determining input data metrics for the collected data. For example, a computer system may be configured to collect data from a wafer and reference data for parameters from a reference tool. This step can be used... Figures 1 to 3 The system can be executed by any entity within it, as shown in the diagram. The computer system can also perform steps 600, such as analyzing training data. Figure 6 This step, as shown in the diagram, may involve analyzing the data and determining metrics such as sample size, parameter range, number of references, degrees of freedom (DOF) in the data, etc. Therefore, the data analysis step can provide information about the number of samples in the training data, the type of data (e.g., Design of Experiments (DOE) data, nominal data, etc.), whether the data is labeled or unlabeled, the DOF of the data, accuracy, or tool-to-tool matching data.
[0154] In another embodiment, generating a recipe further includes determining application-specific performance objectives. As shown in step 602, the computer system can provide or determine performance objectives. For example, the computer system can be configured to provide performance objectives for a measurement library or recipe, such as robustness, tool-to-tool matching, training time, accuracy, etc. Based on data analysis and performance objectives, the computer system, a decision-making algorithm executed by the computer system, or a user-selectable architecture, as shown in step 604, can be performed as further described herein.
[0155] In an additional embodiment, the selection step includes selecting a loss function and HP from an ML library based on input data metrics and application-specific performance objectives. As shown in steps 606 and 608, a computer system, a decision algorithm executed by the computer system, or a user may select the loss function and HP optimization based on the data analysis in step 600, the architecture selected in performance objectives 602, and the architecture selected in step 604, respectively. For example, a computer system may be configured to select an architecture, loss function, and HP from an architecture library based on performance objectives and training data metrics. This selection step may also be performed based on user input and / or data analysis and application objectives, as further described herein.
[0156] In a further embodiment, the computer system is configured to perform training and HP optimization using one or more selected architecture templates, a selected loss function, and a selected HP. For example, the computer system may be configured to perform training and HP optimization using a selected architecture, loss function, and HP. HP is used during HP optimization. Depending on the number and type of HP, the HP optimization exploration space may be relatively large and difficult to explore, or relatively small and easier to manage. A relatively small number of HPs is preferred, but may limit the options for finding the optimal architecture.
[0157] When training and HP optimization time are not a concern, a relatively large number of HPs can be selected (or defined) for each layer, such as the number of neurons, regularization, dropout rate, layer normalization, residual connections, etc. This allows HP optimization to explore a larger space of HPs and find the model with the best performance. If training and HP optimization time are relatively limited, the computer system can select HPs that still explore the entire space but have a limited number of HPs. In this case, HPs can be grouped based on their impact on performance metrics.
[0158] In some embodiments, the selection step further includes identifying the best ML model after HP optimization. In other words, the computer system can be configured to select the best model after HP optimization. For example, as shown in step 610, the computer system can instantiate an architecture, which may include an instance of ASMLA built with the selected architecture, loss function, and HP. The instantiated architecture may be the best ML model identified through HP optimization. In this way, the "best" ML model may be the best version of the selected architecture, loss function, and HP considered during HP optimization. Which of the ML models constitutes the best can be determined based on any performance metric of the model and the extent to which possible performance metrics meet the performance objective. The computer system can then train the instantiated architecture in step 612, which may be performed as further described herein.
[0159] In yet another embodiment, the computer system is configured to collect new datasets from different samples, determine the values of one or more parameters for the different samples using an optimal ML model, and monitor the process performed on the different samples based on the determined values of the one or more parameters. For example, the computer system is configured to collect new datasets from new wafers, as shown in step 614, use an optimal model to determine the values of parameters, and use the determined values for process monitoring and control. This can be used... Figures 1 to 3 Any of the systems shown in the diagram that perform step 614 may input the output generated by one of these systems into the optimal model to determine the values of the parameters for different samples, and perform process monitoring and / or control in any suitable manner known in the art.
[0160] In a further embodiment, the computer system is configured to modify the optimal ML model based on determined values of one or more parameters or information about the process performed on the sample. For example, process monitoring and control may require library refactoring and retraining triggered by KPIs or quality metrics or task changes (including function HP set optimization, and modifications to architecture blocks and templates). In other words, defense metrics (KPIs) or quality metrics can be used to determine or trigger ML library refactoring. In this way, once the optimal model is released for use, information determined by the model and / or information about the processes monitored or controlled by the model can be used to update, modify, retrain, etc., the model. Specifically, since the architecture described herein is intentionally built using plug-ins and extensible elements, the same methods can be used to modify, update, retrain, etc., the released optimal architecture.
[0161] Architecture blocks and architecture templates can have specific interfaces that provide information on the size and type of input data and the format of output data. They can also provide metadata about the input and output, so ASMLA can be constructed to process specific parts of the input differently (e.g., spectrum, wavelength, Mueller elements, subsystems, etc.).
[0162] Figure 8 This illustrates a method for wavelength-based signal processing. This figure shows an example of an architecture that processes different portions of a spectrum 800 using separate PCA blocks. Sometimes, based on wavelength determinism, only specific regions of the spectrum may be of interest. Figure 8 The non-limiting example shown in the diagram involves three wavelength windows of interest: window 1 (802), window 2 (804), and window 3 (806). The architecture allows filtering out signals falling within one of these three windows and performing PCA separately on each of these windows. For example, the architecture can be configured to allow a signal selection block (808) for window 1, a signal selection block (810) for window 2, and a signal selection block (812) for window 3. The signals selected by each block can then be fed separately into separate PCA steps, such as PCA (window 1) 814, PCA (window 2) 816, and PCA (window 3) 818. Depending on the sensitivity, each window block can use a different number of significant principal components, which are concatenated and passed through a consistent dense architecture, thus learning to predict key parameters. For example, the output of each PCA step can be input into concatenated step 820 and then passed through dense architecture 822 to produce output 824, which may contain predicted key parameters and / or learned dense architecture.
[0163] The signal can be extracted not only based on wavelength but also based on Mueller components. In some embodiments, the architecture can be processed by performing operations between different Mueller elements to extract signal asymmetry for the purpose of measuring stacking pairs. Figure 9 This illustrates one embodiment of signal processing based on Mueller components to measure stack pairs. For example, in Figure 9 In this process, signal selection blocks 904 and 906 are used to extract two Mueller components, “M01” and “M10”, from the spectrum 900, and these signals undergo a linear combination 908. The signal selection and the linear operation between the two signals can be considered as a Mueller combination block 902. These types of blocks are used to extract asymmetries from signals of a specific structure to measure superposition. The output of the linear combination step can be passed through a compact architecture 910, which can produce an output 912.
[0164] In another embodiment, the architecture may handle different subsystems (or patterns) individually. Each of the different subsystems (or patterns) may be as follows: Figures 1 to 3 The configuration is typically shown in the image. For example, Figure 10 This illustrates an embodiment of signal processing based on a subsystem. Figure 10 In this process, signals are extracted from the spectrum 1000 based on the measurement signal by subsystem selection block 1002 of subsystem 1 and selection block 1004 of subsystem 2. By processing these subsystem-specific signals, feature extraction can be performed individually by feature extractors 1006 and 1008, respectively. The outputs of the individual feature extractors are then combined and passed to ML or NN layers or architectures (e.g., dense architecture 1010) to predict key parameters (output 1012).
[0165] In some embodiments, the application is a metrological process performed on a sample. In another embodiment, the application is an inspection process performed on a sample. For example, the embodiments described herein are particularly suitable for building ASMLAs for semiconductor quality control type processes (e.g., inspection, metrology, and defect inspection) using constructed ML libraries, each of which can be used Figures 1 to 3 One or more of the systems shown herein are executed as further described herein. The embodiments are not limited to the types of processes, tools, and samples that can be built as ASMLA. For example, the embodiments described herein are particularly advantageous because they can be readily used to rapidly generate new application-specific architectures based on an arbitrary set of blocks, templates, loss functions, HPs, and their associated metadata stored in an ML library constructed as described herein.
[0166] The embodiments described herein may include or use layer-specific and / or application-specific architecture templates. Additionally, in some embodiments, the ML library is specific to a first layer, a first application, a first user, or a first input data metric, and the computer system is configured to construct additional ML libraries specific to a second layer, a second application, a second user, or a second input data metric, and to construct an ML model gallery containing said ML libraries and said additional ML libraries. In this manner, a selected architecture template may include multiple architecture blocks and / or templates from the stored model libraries in the architecture template library as extensible layers and / or application-specific or user-defined.
[0167] The architecture template model library can contain a relatively large number of proven architecture template libraries that fit specific layers and / or specific applications or specific data availability conditions. Each specific library template can contain one or more architecture blocks connected by multiple operations (e.g., seeding, concatenation, residuals, addition, and filtering). Layer-specific architecture templates are proven to cover specific layer problems. For wider use, application architecture templates can be developed, which are easily pluggable and scalable given any recipe development or recipe retraining. Figures 11 to 14 Depict various architectural templates covering different applications. Storing layers and / or applying specific architectural templates can advantageously and significantly reduce recipe training time.
[0168] Figure 11 This illustrates an example of a data feedforward architecture template. This data feedforward configuration can be used for highly correlated parameter applications. For example, when a particular set of shape parameters is highly correlated (e.g., common underlying structural parameters in previous step layers) or when the structure contains many highly correlated parameters, parametric data feedforward can break down the correlations among these parameters and improve robustness by feeding additional information into the recipe training, as in... Figure 11 The data feedforward can be modularized into architecture block 1108 and can be easily inserted into any intermediate stage (feedforward in the original input, after PCA, or in any intermediate compaction layer). Similarly, the spectrum in the pre-step can be fed forward in this way. For example, the training spectrum 1100 and the feedforward spectrum or parameter 1110 from the data feedforward block 1108 can be input into the concatenation step 1112 in block 1108. The training spectrum can also be input into the signal PCA architecture block 1102. The results produced by the concatenation step 1112 and the signal PCA architecture block 1102 can be input together or separately into the compaction block 1104, which can produce the output 1106.
[0169] Some embodiments of scenarios where there is a lack of data to apply specific templates include the use of, for example Figure 12 The transfer learning of the pre-trained model shown in the example and how Figure 13Domain adaptation is illustrated in the example. For instance, when the availability of real-world data is relatively low, synthetically generated data from well-defined parameterized structures can be used in various ways, including building pre-trained models or domain adaptation from real to synthetic data. Large batches of data or synthetic data collected in pre-steps or similar layers can be used to train models that can be reused as pre-trained models. On the other hand, synthetic data can be used for domain adaptation.
[0170] As in Figure 12 As shown, for example, synthetic data 1200 from a parameterized structure and real data 1202 from similar layers and / or previous steps can be input into a pre-trained model 1204. The results generated by the pre-trained model and real training data 1206 (which, as described above, may be relatively scarce) can then be used to produce output 1208.
[0171] As in Figure 13 As shown, synthetic data 1300 from the parameterized structure and real training data 1302 can be input into the domain adaptation block 1304. The output of the domain adaptation block can be passed through the compact architecture 1306 to generate output 1308.
[0172] Figure 14 This describes an embodiment of a template application for high aspect ratio structures. This embodiment can be used for high aspect ratio structures with oscillating spectra. This embodiment may include inputting spectrum 1400 into signal compression block 1402 to transform the spectrum to the frequency domain. For example, to address the challenges of high aspect ratio 3D NAND metering with oscillating spectra, discrete cosine transform (DCT), discrete wavelet transform (DWT), fast Fourier transform (FFT), etc., can be used to compress and transform the signal in the frequency domain. The output of the signal compression block can be passed through compact architecture 1404 to generate output 1406.
[0173] In some embodiments, the computer system is configured to store information at least of an ML library, but may also store any other results generated as described herein (e.g., ASMLA, trained models, etc.). In the case of an ML library, the computer system may be configured to store the library such that it can be used to generate recipes, which may contain libraries used by the recipe or one or more steps performed with the recipe. In the case of ASMLA or a trained model, the computer system may be configured to store either of this information in a recipe, or by generating a recipe for a process that will use ASMLA or a trained model. A “recipe” as used herein may be broadly defined as a set of instructions that can be used by a tool to perform a process. In this way, generating a recipe may include information on how to perform the process, which can then be used to generate instructions for performing the process. The information stored by the computer system may include any information that can be generated by the computer system as further described herein.
[0174] A computer system can be configured to store information in any suitable computer-readable storage medium. The information can be stored in any manner known in the art. The storage medium can include any storage medium described herein or any other suitable storage medium known in the art. After the information has been stored, it can be accessed in the storage medium and used by any of the methods or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc. For example, the embodiments described herein can generate a recipe as described above. The recipe can then be stored and used by a system or method (or another system or method) to perform a process.
[0175] The computer system can also be configured to generate results containing information about the sample, which may include any of the results or information described herein. For example, as further described above, the computer system may be included in a system that determines information about the sample by inputting sample images, data, signals, etc., during execution into a trained ASMLA or model. The results generated in this manner may be output by the computer system in any suitable manner. All embodiments described herein can be configured to store the results of one or more steps of the embodiments in a computer-readable storage medium. The results may include any of the results described herein and may be stored in any manner known in the art. The results may have any suitable form or format (e.g., standard file types). The storage medium may include any storage medium described herein or any other suitable storage medium known in the art.
[0176] After the results have been stored, they may be accessed in storage media and used by any of the methods or systems described herein, formatted for display to a user, used by another software module, method, or system, etc., to perform one or more functions of the sample or another sample of the same type. Such results generated by a computer system may include information about any defects detected on the sample, such as the location of the bounding box of the detected defects, inspection scores, information about defect classification (e.g., category labels or IDs), any defect attributes determined from any image, sample structural measurements, dimensions, shape, etc., or any such suitable information known in the art. This information may be used by the computer system or another system or method to perform additional functions of the sample and / or the detected defects (e.g., sampling defects for defect analysis, determining the root cause of defects, etc.).
[0177] Such functionality also includes (but is not limited to) modifying processes (e.g., manufacturing processes or steps) that have been or will be performed on a sample in a feedback or feedforward manner. For example, a computer system may be configured to determine one or more modifications to processes already performed on and / or to be performed on a sample based on information determined for the sample. The modifications to the process may include any suitable changes to one or more parameters of the process. In one such example, the computer system preferably determines these modifications such that defects can be reduced or prevented on other samples to which the revised process is performed, defects can be corrected or eliminated on the sample in another process performed on the sample, defects can be compensated for in another process performed on the sample, etc. The computer system may determine such modifications in any suitable manner known in the art.
[0178] These changes can then be sent to a semiconductor manufacturing system (not shown) or a storage medium (not shown) accessible to both the computer system and the semiconductor manufacturing system. The semiconductor manufacturing system may or may not be part of the system embodiments described herein. For example, the system described herein may be coupled to the semiconductor manufacturing system via one or more common elements (e.g., housing, power supply, sample handling device, or mechanism). The semiconductor manufacturing system may include any semiconductor manufacturing system known in the art, such as lithography tools, etching tools, CMP tools, deposition tools, and the like.
[0179] In addition to the advantages already described, the embodiments described herein offer numerous other advantages. For example, the embodiments described herein provide libraries for layer / application-specific ML architectures. Furthermore, the embodiments provide the ability to modify existing architectures, loss functions, preprocessing steps, etc., or to add new architectures, loss functions, preprocessing steps, etc. The embodiments described herein are also advantageous in terms of implementing architecture blocks, which are easy to use (e.g., by non-senior application engineers) to construct arbitrary architectures. The embodiments described herein further provide a reduction in the number of easily understood HPs (e.g., capacity, regularization, depth, etc.). Moreover, the embodiments provide arbitrary and application-specific HPs. The embodiments may also include or use HPs from explorable architecture families. Additionally, functional HPs with similar roles have a stronger relationship with performance metrics. This allows users to easily interpret results and thus optimize models or quickly tune libraries given fewer HP searches (time for solution improvement).
[0180] Each embodiment of each system described above can be combined together to form a single embodiment.
[0181] Another embodiment relates to a computer-implemented method for constructing an ML library. The method includes defining a plurality of architecture blocks, each of which is a reusable ML architecture fragment. The method also includes defining a plurality of architecture templates, each of which is a reusable template configured to include one or more of the plurality of architecture blocks. Additionally, the method includes assigning metadata to the plurality of architecture templates in response to input data metrics and performance goals applicable to the plurality of architecture templates. The method further includes storing the plurality of architecture blocks, the plurality of architecture templates, and the metadata in an ML library configured to select one or more of the plurality of architecture templates for ASMLA based on the input data metrics and application-specific performance goals. The steps are performed via one or more computer systems.
[0182] Each step of the method may be performed as further described herein. The method may also include any other steps that can be performed by the system, output acquisition subsystem, model, computer system, etc., described herein. The system, output acquisition subsystem, model, computer system, etc., may be configured according to any embodiment described herein. The method may be performed by any of the system embodiments described herein.
[0183] Additional embodiments relate to a non-transitory computer-readable medium storing program instructions that can be executed on a computer system to perform a computer-implemented method for constructing an ML library. Figure 15 An example of this embodiment is shown in [the document / example]. Specifically, as in [the document / example]... Figure 15 As shown, the non-transitory computer-readable medium 1500 contains program instructions 1502 that can be executed on a computer system 1504. The computer-implemented method includes the steps of the method described herein.
[0184] Program instructions 1502 for implementing methods such as those described herein may be stored on a computer-readable medium 1500. The computer-readable medium may be a storage medium, such as a disk or optical disc, magnetic tape, or any other suitable non-transitory computer-readable medium known in the art.
[0185] Program instructions can be implemented in any of a variety of ways, including program-based technologies, component-based technologies, and / or object-oriented technologies. For example, program instructions can be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (“MFC”), SSE (Streaming SIMD Extensions), or other technologies or methods as needed.
[0186] Computer system 1504 may be configured according to any of the embodiments described herein.
[0187] In view of this description, those skilled in the art will understand further modifications and alternative embodiments of various aspects of the invention. For example, methods and systems for constructing ML libraries are provided. Therefore, this description should be construed as illustrative only and for the purpose of teaching those skilled in the art the general manner of implementing the invention. It should be understood that the forms of the invention shown and described herein are to be considered the present preferred embodiments. As those skilled in the art will appreciate the benefits of this description of the invention, elements and materials may be substituted for those described herein, parts and processes may be reversed, and certain features of the invention may be utilized separately. Changes may be made to the elements herein without departing from the spirit and scope of the invention as set forth in the appended claims.
Claims
1. A system configured for building machine learning libraries, comprising: One or more computer systems configured for: Define multiple architecture blocks, each of which is a reusable fragment of machine learning architecture; Define multiple architecture templates, each of which is a reusable template configured to include one or more of the multiple architecture blocks; Metadata is assigned to the multiple architecture templates in response to the input data metrics and performance targets applicable to the multiple architecture templates; and The plurality of architecture blocks, the plurality of architecture templates, and the metadata are stored in a machine learning library, which is configured to select one or more of the plurality of architecture templates for the application-specific machine learning architecture based on the input data metrics and application-specific performance targets.
2. The system of claim 1, wherein the one or more computer systems are further configured to perform the selection.
3. The system according to claim 1, wherein the plurality of architecture templates includes at least one architecture template that is layer-specific, application-specific, or user-defined, and wherein one or more features of the at least one architecture template can be modified for different layers or applications.
4. The system of claim 1, wherein the plurality of architecture blocks include at least one layer-specific, application-specific, or user-defined architecture block, and wherein one or more features of the at least one architecture block are modifiable for different layers or applications during the selection.
5. The system of claim 1, wherein the machine learning library is specific to a first layer, a first application, a first user, or a first input data metric, and wherein the one or more computer systems are further configured to construct additional machine learning libraries specific to a second layer, a second application, a second user, or a second input data metric, and to construct a machine learning model library including the machine learning library and the additional machine learning libraries.
6. The system of claim 1, wherein the one or more computer systems are further configured to define hyperparameters of the plurality of architecture templates, assign additional metadata to the hyperparameters in response to input data metrics and performance targets to which the hyperparameters are applicable, and store the hyperparameters and the additional metadata in the machine learning library, the machine learning library being further configured to select one or more of the hyperparameters for the application-specific machine learning architecture based on the input data metrics and the application-specific performance targets.
7. The system of claim 6, wherein the one or more computer systems are further configured to select one or more of the plurality of architecture templates and one or more of the hyperparameters for the application-specific machine learning architecture based on the input data metric and the application-specific performance objective.
8. The system of claim 6, wherein the hyperparameters include function hyperparameters, and wherein each of the function hyperparameters is a function of two or more of the hyperparameters having similar roles.
9. The system of claim 6, wherein at least one of the hyperparameters is configured to select one or more of the plurality of architecture templates for an application-specific machine learning architecture based on the input data metric and the application-specific performance objective.
10. The system of claim 6, wherein at least one of the hyperparameters is configured to control one or more features and one or more capabilities of the application-specific machine learning architecture.
11. The system of claim 10, wherein at least one of the hyperparameters includes a capacity hyperparameter configured to control the total capacity of the application-specific machine learning architecture by changing one or more properties of the application-specific machine learning architecture.
12. The system of claim 10, wherein at least one of the hyperparameters includes a regularization hyperparameter configured to control the regularization of the application-specific machine learning architecture by changing one or more properties of the application-specific machine learning architecture.
13. The system of claim 10, wherein at least one of the hyperparameters includes an aspect ratio hyperparameter configured to control the depth and width of the layers of the application-specific machine learning architecture and the total number of parameters of the layers.
14. The system of claim 1, wherein the one or more computer systems are further configured to define a plurality of loss functions, assign additional metadata to the plurality of loss functions in response to input data metrics and performance objectives to which the plurality of loss functions are applicable, and store the plurality of loss functions and the additional metadata in the machine learning library, the machine learning library being further configured to select one or more of the plurality of loss functions for the application-specific machine learning architecture based on the input data metrics and application-specific performance objectives.
15. The system of claim 14, wherein the one or more computer systems are further configured to select one or more of the plurality of architecture templates and one or more of the plurality of loss functions for the application-specific machine learning architecture based on the input data metric and the application-specific performance objective.
16. The system of claim 14, wherein at least two of the plurality of loss functions are configured to implement different regularization methods that would otherwise not be implemented in the application-specific machine learning architecture.
17. The system of claim 14, wherein at least one of the plurality of loss functions is pluggable and scalable.
18. The system of claim 1, wherein the application includes performing a process on a sample, and wherein the one or more computer systems are further configured to generate a recipe for the process including the selection.
19. The system of claim 18, wherein the generation further comprises collecting data from one or more samples and reference data of parameters of the one or more samples generated by a reference tool, and determining input data metrics of the collected data.
20. The system of claim 19, wherein the generation further includes determining the performance target specific to the application.
21. The system of claim 20, wherein the selection includes selecting a loss function and hyperparameters from the machine learning library based on the input data metric and the application-specific performance objective.
22. The system of claim 21, wherein the one or more computer systems are further configured to perform training and hyperparameter optimization using one or more of the plurality of architectural templates, a selected loss function, and selected hyperparameters.
23. The system of claim 22, wherein the selection further comprises identifying the optimal machine learning model after the hyperparameter optimization.
24. The system of claim 23, wherein the one or more computer systems are further configured to collect new datasets from different samples, determine the values of one or more parameters of the different samples using the optimal machine learning model, and monitor the process performed on the different samples based on the determined values of the one or more parameters.
25. The system of claim 24, wherein the one or more computer systems are further configured to modify the optimal machine learning model based on the determined values of the one or more parameters or information from the process performed on the sample.
26. The system of claim 1, wherein the application is a metrological process performed on a sample.
27. The system of claim 1, wherein the application is an inspection process performed on a sample.
28. A non-transitory computer-readable medium storing program instructions executable on a computer system to perform a computer-implemented method for constructing a machine learning library, wherein the computer-implemented method includes: Define multiple architecture blocks, each of which is a reusable fragment of machine learning architecture; Define multiple architecture templates, each of which is a reusable template configured to include one or more of the multiple architecture blocks; Metadata is assigned to the multiple architecture templates in response to the input data metrics and performance targets applicable to the multiple architecture templates; and The plurality of architecture blocks, the plurality of architecture templates, and the metadata are stored in a machine learning library, which is configured to select one or more of the plurality of architecture templates for the application-specific machine learning architecture based on the input data metrics and application-specific performance targets.
29. A computer-implemented method for constructing a machine learning library, comprising: Define multiple architecture blocks, each of which is a reusable fragment of machine learning architecture; Define multiple architecture templates, each of which is a reusable template configured to include one or more of the multiple architecture blocks; Metadata is assigned to the multiple architecture templates in response to the input data metrics and performance targets applicable to the multiple architecture templates; and The plurality of architecture blocks, the plurality of architecture templates, and the metadata are stored in a machine learning library configured to select one or more of the plurality of architecture templates for an application-specific machine learning architecture based on the input data metrics and application-specific performance targets, wherein the definition of the plurality of architecture blocks, the definition of the plurality of architecture templates, the assignment, and the storage are performed by one or more computer systems.
Citation Information
Patent Citations
Symmetric target design in scatterometry overlay metrology
US10591406B2
Integrated use of model-based metrology and a process model
US10769320B2
Method and apparatus for measuring thickness of thin films
US4999014A
Method and apparatus for evaluating the thickness of thin films
US5181080A
Focused beam spectroscopic ellipsometry method and system
US5608526A