System and method for testing and controlling a single event of a p-type depletion transistor

Abstract

The application discloses a single-particle test system and a test control method of a P-type depletion transistor, and the system comprises a test circuit board, a positive voltage power supply and a monitoring output module connected with the test circuit board respectively, and the test circuit board is provided with a measured transistor, a first resistor, a second resistor and a battery, the measured transistor is a P-type depletion transistor, a signal acquisition channel of the monitoring output module is connected with the measured transistor and the second resistor, so as to monitor the drain voltage of the measured transistor when a heavy ion beam irradiates the measured transistor and capture and store the transient signal of the drain voltage, and the positive electrode of the positive voltage power supply is connected with the negative electrode of the battery and the source electrode of the measured transistor. The system only needs one positive voltage power supply to supply power for the single-particle test of the P-type depletion transistor, the control method can quickly and accurately monitor whether SEB or SET occurs, and accurately identify the SEB failure reason and capture the SET waveform.

Description

Technical Field

[0001] This invention relates to the field of radiation testing technology for P-type depletion transistors, and more particularly to a single-event testing system and testing control method for P-type depletion transistors. Background Technology

[0002] With the expansion of aerospace applications, the demand for high-voltage semiconductor devices continues to grow, driving the widespread application of P-type depletion-mode transistors (PTTs) in space radiation environments. However, existing single-event effect (SEE) testing systems for transistors are primarily designed for non-depletion-mode transistors, facing significant challenges when testing high-voltage P-type depletion-mode devices, particularly due to a lack of bias adaptability. Specifically, since P-type depletion-mode devices are in the on-state at zero gate voltage, a positive gate voltage (VGS>0) is required to establish the cutoff region. Existing testing systems for P-type depletion-mode devices typically employ mechanical rotation mechanisms, which require the simultaneous application of both positive and negative voltages, resulting in complexity and high cost.

[0003] For example, patent application CN103063961A discloses a single-event effect testing device and system. In this system, the rotating test platform realizes parallel testing of multiple sub-boards through a mechanical rotating mechanism. Although it can reduce the vacuum operation time, its bias circuit requires the power supply to provide both positive and negative voltages at the same time. The test equipment is expensive and costly, and requires a long time for on-site deployment, resulting in low test efficiency. Summary of the Invention

[0004] The technical problem to be solved by this invention is as follows: In view of the technical problems existing in the prior art, this invention provides a single-event test system for P-type depletion transistors that is simple in structure, low in cost, high in test accuracy and flexibility. It can provide power for single-event tests of P-type depletion transistors with only one power supply that provides positive voltage, thereby reducing test costs and complexity. It also provides a test control method that can quickly and accurately monitor whether SEB (single-event burn-out) or SET (single-event transient effect) occurs.

[0005] To solve the above-mentioned technical problems, the technical solution proposed by this invention is as follows: A single-event test system for a P-type depletion-type transistor includes a test circuit board and a positive voltage power supply and a monitoring output module connected to the test circuit board. The positive voltage power supply has a positive voltage output capability. The test circuit board is equipped with a transistor under test, a first resistor, a second resistor, and a battery. The transistor under test is a P-type depletion-type transistor. The signal acquisition channel of the monitoring output module is connected to the transistor under test and the second resistor to monitor the drain voltage VD of the transistor under test when a heavy ion beam emitted from a heavy ion accelerator irradiates it, and to capture and store the transient signal of the drain voltage VD. The positive terminal of the positive voltage power supply is connected to the negative terminal of the battery and the source S of the transistor under test. The ground terminal of the positive voltage power supply is connected to the other end of the second resistor and the ground terminal of the monitoring output module.

[0006] Furthermore, the source S of the transistor under test is connected to the positive terminal of the positive voltage power supply and the negative terminal of the battery, the gate G of the transistor under test is connected to one end of the first resistor, and the other end of the first resistor is connected to the positive terminal of the battery.

[0007] Furthermore, one end of the second resistor is connected to the drain D of the transistor under test, and the other end is connected to the ground terminal of the positive voltage power supply and the ground terminal of the monitoring output module. Furthermore, the resistance values ​​of the first resistor and the second resistor are equal.

[0008] Furthermore, it also includes a monitoring and management module connected to the positive voltage power supply and the monitoring output module respectively, for real-time monitoring and saving the voltage and current of the positive voltage power supply and the voltage waveform data collected by the monitoring output module.

[0009] Furthermore, it also includes a remote monitor connected to the monitoring and management module, for receiving monitoring data from the monitoring and management module and sending control commands to the monitoring and management module.

[0010] Furthermore, when the voltage provided by the positive terminal of the positive voltage power supply is higher than the maximum withstand voltage of the signal acquisition channel of the monitoring output module, the drain D of the transistor under test is connected to the signal acquisition channel of the monitoring output module after the signal is attenuated by the high voltage probe.

[0011] A test control method for a single-event test system utilizing the above-mentioned P-type depletion-mode transistor, comprising the following steps: Step S1: Install the battery, output voltage VH from the positive voltage power supply to put the transistor under test in the cutoff state, and apply the heavy ion beam emitted by the heavy ion accelerator to the transistor under test on the test circuit board. Step S2: Irradiate the transistor under test with a heavy ion beam and begin to count the total heavy ion fluence Q; Step S3: Determine whether the total heavy ion flux Q has reached the predetermined value. If yes, proceed to step S5; otherwise, proceed to step S4. Step S4: Monitor the drain voltage VD of the transistor under test and capture and store the transient signal of the drain voltage VD. Determine the change state of the drain voltage VD. Determine whether SEB has occurred based on the change state of the drain voltage VD and whether SET has occurred based on the captured transient signal. Proceed to step S3. Step S5: Control the operation of the positive voltage power supply to turn off, and stop the heavy ion beam irradiation of the transistor under test.

[0012] Further, in step S4, if the monitoring output module detects that the drain voltage VD rises to VH / 2 within a specified time and remains unchanged within a specified duration, it determines that SEB has occurred and diagnoses the corresponding failure cause as SEGR (Single Event Gate Rupture). If the monitoring output module detects that the drain voltage VD suddenly rises to VH and remains unchanged within a specified duration, it determines that SEB has occurred and diagnoses the corresponding failure cause as SECP (Single Event Channel Punch-through). If a voltage change pulse is captured, it determines that SET has occurred.

[0013] Furthermore, in step S4, when it is determined that an SEB or SET occurs, the method further includes: when an SEB occurs, displaying and storing the SEB waveform data collected by the monitoring output module through the monitoring management module, and controlling the positive voltage power supply to be powered off; when an SET occurs, displaying and storing the SET waveform data collected by the monitoring output module through the monitoring management module.

[0014] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention provides a single-event test system for P-type depletion transistors, consisting of a test circuit board, a positive voltage power supply connected to the test circuit board, a monitoring output module, a first resistor, a second resistor, and a battery. The positive voltage power supply provides a positive voltage output, and the first resistor, the second resistor, and the battery provide power for the single-event test of the P-type depletion transistor under test. There is no need to use a power supply that provides a negative voltage. Only a positive voltage power supply is needed to support the single-event effect test of P-type depletion transistors. The system has a simple structure, is easy to install, and has low cost.

[0015] 2. The present invention further monitors the drain voltage of the transistor under test and captures the transient signal of the drain voltage through an experimental control method. Based on the change state of the drain voltage and the captured transient signal of the drain voltage, it determines whether single-event burn-out or single-event transient effect has occurred. This eliminates the need for complex electrical characteristic tests, significantly improves the efficiency and accuracy of the test, and reduces the complexity of the test.

[0016] 3. The test control method of the present invention further combines the change state of the drain voltage VD and the magnitude of the change in the drain voltage VD. When determining that a single-event burnout has occurred, it can also accurately distinguish whether the failure cause of the single-event burnout is single-event gate breakdown or single-event source drain breakdown. This facilitates rapid support for the next step of operation decision-making at the test site. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structural principle of the single-event test system for the P-type depletion-type transistor in this embodiment.

[0018] Figure 2 This is a schematic diagram of the structural principle of a single-event test system for a P-type depletion-type transistor in a specific application embodiment of the present invention.

[0019] Legend: 1. Test circuit board; 11. Transistor under test; 12. First resistor; 13. Second resistor; 14. Battery; 2. Positive voltage power supply; 3. Monitoring output module; 4. Monitoring and management module; 5. Remote monitor. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings and specific preferred embodiments, but this does not limit the scope of protection of the present invention.

[0021] As disclosed in this invention, unless the context clearly indicates otherwise, words such as "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. The terms "first," "second," and similar terms used in this invention disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, words such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connected" or "linked" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0022] like Figure 1As shown, the single-event test system for the P-type depletion-type transistor in this embodiment includes a test circuit board 1 and a positive voltage power supply 2 and a monitoring output module 3 connected to the test circuit board 1. The positive voltage power supply 2 has a positive voltage output capability but does not need to have a negative voltage output capability. The test circuit board 1 is provided with a transistor under test 11, a first resistor 12, a second resistor 13, and a battery 14. The transistor under test 11 is a P-type depletion-type transistor. The signal acquisition channel of the monitoring output module 3 is connected to the transistor under test 11 and the second resistor 13 to monitor the drain voltage VD of the transistor under test 11 when the heavy ion beam emitted by the heavy ion accelerator irradiates it and to capture and store the transient signal of the drain voltage VD. The positive terminal of the positive voltage power supply 2 is connected to the negative terminal of the battery 14 and the source S of the transistor under test 11. The ground terminal of the positive voltage power supply 2 is connected to the other end of the second resistor 13 and the ground terminal of the monitoring output module 3.

[0023] This embodiment uses the above-described single-event test system, which does not require a power supply that provides a negative voltage. It only requires a power supply that provides one positive voltage to support the single-event effect (SEE) test of P-type depletion-type transistors. The system is not only simple in structure, easy to install and low in cost, but also can easily and accurately distinguish the cause of single-event burn-out (SEB) failure and reliably capture single-event transient (SET) waveforms.

[0024] In this embodiment, the source S of the transistor under test 11 is connected to the positive terminal of the positive voltage power supply 2 and the negative terminal of the battery 14, and the gate G of the transistor under test 11 is connected to one end of the first resistor 12, and the other end of the first resistor 12 is connected to the positive terminal of the battery 14.

[0025] In this embodiment, one end of the second resistor 13 is connected to the drain D of the transistor 11 under test, and the other end is connected to the ground terminal of the positive voltage power supply 2 and the ground terminal of the monitoring output module 3. The resistance values ​​of the first resistor 12 and the second resistor 13 are equal, for example, the resistance value can be 1MΩ. The monitoring output module 3 can specifically be an oscilloscope or the like.

[0026] In this embodiment, a monitoring and management module 4 is also included, which is connected to the positive voltage power supply 2 and the monitoring output module 3 respectively. This module is used to monitor and save the voltage and current of the positive voltage power supply 2 and the voltage waveform data collected by the monitoring output module 3 in real time. Specifically, the monitoring and management module 4 can be a test computer. The monitoring output module 3 can control the power supply and power-off of the positive voltage power supply 2.

[0027] In this embodiment, a remote monitor 5 connected to the monitoring and management module 4 is also included to receive monitoring data from the monitoring and management module 4 and send control commands to the monitoring and management module 4. Specifically, the remote monitor 5 can be a monitoring computer.

[0028] like Figure 2As shown, in a specific application embodiment, the monitoring output module 3 uses an oscilloscope, and the monitoring and management module 4 uses a test computer. That is, the P-type depletion-mode transistor single-event experimental system consists of the test circuit board 1, positive voltage power supply 2, oscilloscope, test computer, and monitoring computer. The test circuit board 1, positive voltage power supply 2, oscilloscope, and test computer are located in the irradiation chamber. The remote monitor 5 uses a monitoring computer located in the monitoring room. The transistor under test 11 mounted on the test circuit board 1 faces the heavy ion beam emitted by the heavy ion accelerator. The positive voltage power supply 2 and oscilloscope are connected to the test circuit board 1 via cables. The test computer connects to and controls the positive voltage power supply 2 and the oscilloscope. The monitoring computer remotely connects to the test computer via a network to control the entire system.

[0029] Preferably, when the voltage provided by the positive terminal of the positive voltage power supply 2 is higher than the maximum withstand voltage of the signal acquisition channel of the monitoring output module 3, the drain D of the transistor under test 11 is connected to the signal acquisition channel of the monitoring output module 3 after the signal is attenuated by the high voltage probe.

[0030] Preferably, the voltage of the battery 14 can be between 0.1V and 50V to ensure that the P-type depletion-type transistor under test 11 is in the off state.

[0031] Preferably, the resistance values ​​of the first resistor 12 and the second resistor 13 can be between 100KΩ and 10MΩ.

[0032] Preferably, the highest positive voltage that the positive voltage power supply 2 can output is not lower than the withstand voltage of the transistor 11 under test, and the output voltage VH is between 100V and 10000V.

[0033] This embodiment further provides a test control method for a single-event test system utilizing the above-described P-type depletion-type transistor, the steps of which include: Step S1: After installing battery 14, the positive voltage power supply 2 outputs voltage VH to put the transistor under test 11 in the cutoff state, and the heavy ion beam emitted by the heavy ion accelerator is applied to the transistor under test 11 on the test circuit board 1. Step S2: Irradiate the transistor under test 11 with a heavy ion beam and start counting the total heavy ion fluence Q; Step S3: Determine whether the total heavy ion flux Q has reached the predetermined value. If yes, proceed to step S5; otherwise, proceed to step S4. Step S4: Monitor the drain voltage VD of the transistor under test 11 and capture and store the transient signal of the drain voltage VD. Determine the change state of the drain voltage VD. Determine whether SEB occurs based on the change state of the drain voltage VD and whether SET occurs based on the captured transient signal. Proceed to step S3. Step S5: Control the operation of the positive voltage power supply 2 to turn off, and stop the heavy ion beam irradiation of the transistor under test 11.

[0034] The above-described method in this embodiment effectively captures voltage transient characteristics by monitoring the drain voltage of the transistor under test and capturing the transient signal of the drain voltage. It makes full use of the changing state of the drain voltage and the captured transient signal of the drain voltage to determine whether an SEB (single-event burn-out) or SET (single-event transient) has occurred. Without the need for complex electrical characteristic tests, it can quickly and accurately monitor whether an SEB (single-event burn-out) or SET (single-event transient) has occurred, significantly improving the efficiency and accuracy of the test while reducing the complexity of the test.

[0035] If SEGR occurs, the gate G and drain D of the transistor under test 11 will be short-circuited. The voltage monitored by the monitoring output module 3 will be the voltage of the positive terminal of the positive voltage power supply 2 connected in series with the battery 14 and the voltage divided by the first resistor 12 and the second resistor 13. This voltage is approximately VH / 2. If SECP occurs, the drain D and source S of the transistor under test 11 will be short-circuited. The voltage monitored by the monitoring output module 3 will be the positive terminal voltage of the positive voltage power supply 2. This voltage is approximately VH.

[0036] This embodiment fully utilizes the above-mentioned characteristics. In step S4, if the monitoring output module 3 detects that the drain voltage VD rises to VH / 2 within a specified time and remains unchanged within a specified duration, that is, if the drain voltage VD suddenly rises to VH / 2 and remains unchanged, then it is determined that SEB has occurred, and the corresponding failure cause is diagnosed as SEGR. If the monitoring output module 3 detects that the drain voltage VD rises to VH within a specified time and remains unchanged within a specified duration, that is, if the drain voltage VD suddenly rises to VH and remains unchanged, then it is determined that SEB has occurred, and the corresponding failure cause is diagnosed as SECP. If the transient signal of the drain voltage VD is captured and is a recoverable voltage pulse signal, then it is determined that SET has occurred.

[0037] Specifically, when SEB or SET does not occur, the monitored drain voltage VD is approximately 0V. When SET occurs, the monitored drain voltage VD will rise and then return to 0V, forming a pulse. Therefore, if the drain voltage VD waveform monitored by the monitoring output module 3 is a recoverable pulse signal, it can be determined that SET has occurred.

[0038] Traditional testing systems for P-type depletion-mode devices cannot distinguish in real time whether the cause of single-event burnout (SEB) is SEGR or SECP. This embodiment, upon detecting an SEB, further combines the change in drain voltage VD and the magnitude of that change to accurately differentiate the cause of the SEB failure, determining whether it is SEGR or SECP. This allows for rapid support for subsequent operational decisions at the testing site.

[0039] In step S4 of this embodiment, when it is determined that an SEB or SET has occurred, the method further includes: when an SEB occurs, displaying and storing the SEB waveform data collected by the monitoring output module 3 through the monitoring management module 4 and controlling the positive voltage power supply 2 to be powered off; when an SET occurs, displaying and storing the SET waveform data collected by the monitoring output module 3 through the monitoring management module 4, so as to reliably capture the single-event transient SET waveform when an SET is detected.

[0040] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Therefore, any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention should fall within the protection scope of the present invention.

Claims

1. A single-event testing system for a P-type depletion-mode transistor, characterized in that, The test circuit board (1) includes a positive voltage power supply (2) and a monitoring output module (3) connected to the test circuit board (1). The positive voltage power supply (2) has a positive voltage output capability. The test circuit board (1) is provided with a transistor under test (11), a first resistor (12), a second resistor (13) and a battery (14). The transistor under test (11) is a P-type depletion transistor. The signal acquisition channel of the monitoring output module (3) is connected to the transistor under test (11) and the second resistor (13) to monitor the drain voltage VD of the transistor under test (11) when the heavy ion beam emitted by the heavy ion accelerator irradiates it and to capture and store the transient signal of the drain voltage VD. The positive terminal of the positive voltage power supply (2) is connected to the negative terminal of the battery (14) and the source terminal S of the transistor under test (11). The ground terminal of the positive voltage power supply (2) is connected to the other end of the second resistor (13) and the ground terminal of the monitoring output module (3).

2. The single event test system of a P-type depletion mode transistor according to claim 1, wherein, The source S of the transistor under test (11) is connected to the positive terminal of the positive voltage power supply (2) and the negative terminal of the battery (14). The gate G of the transistor under test (11) is connected to one end of the first resistor (12), and the other end of the first resistor (12) is connected to the positive terminal of the battery (14).

3. The single event test system of a P-type depletion mode transistor according to claim 1, wherein One end of the second resistor (13) is connected to the drain D of the transistor under test (11), and the other end of the second resistor (13) is connected to the ground of the positive voltage power supply (2) and the ground of the monitoring output module (3).

4. The single event test system of a P-type depletion mode transistor according to claim 1, wherein, The resistance values ​​of the first resistor (12) and the second resistor (13) are equal.

5. The single event test system of a P-type depletion mode transistor according to claim 1, wherein It also includes a monitoring and management module (4) connected to the positive voltage power supply (2) and the monitoring output module (3) respectively, for real-time monitoring and saving the voltage and current of the positive voltage power supply (2) and the voltage waveform data collected by the monitoring output module (3).

6. The single event test system of a P-type depletion mode transistor according to claim 5, wherein It also includes a remote monitor (5) connected to the monitoring management module (4) for receiving monitoring data from the monitoring management module (4) and sending control commands to the monitoring management module (4).

7. The single-event testing system for a P-type depletion-mode transistor according to any one of claims 1 to 6, characterized in that, When the voltage provided by the positive terminal of the positive voltage power supply (2) is higher than the maximum withstand voltage of the signal acquisition channel of the monitoring output module (3), the drain D of the transistor under test (11) is connected to the signal acquisition channel of the monitoring output module (3) after the signal is attenuated by the high voltage probe.

8. A test control method for a single-event test system using a P-type depletion-mode transistor according to any one of claims 1 to 7, characterized in that the steps include... include: Step S1: After installing the battery (14), the positive voltage power supply (2) outputs voltage VH to make the transistor under test (11) in the cutoff state, and the heavy ion beam emitted by the heavy ion accelerator is applied to the transistor under test (11) on the test circuit board (1); Step S2: Irradiate the transistor under test (11) with a heavy ion beam and start counting the total heavy ion fluence Q; Step S3: Determine whether the total heavy ion flux Q has reached the predetermined value. If yes, proceed to step S5; otherwise, proceed to step S4. Step S4: Monitor the drain voltage VD of the transistor under test (11) and capture and store the transient signal of the drain voltage VD. Determine the change state of the drain voltage VD. Determine whether SEB occurs based on the change state of the drain voltage VD and whether SET occurs based on the captured transient signal. Proceed to step S3. Step S5: Control the operation of the positive voltage power supply (2) to turn off and stop the heavy ion beam irradiation of the transistor under test (11).

9. The test control method according to claim 8, characterized in that, In step S4, if the monitoring output module (3) detects that the drain voltage VD increases to VH / 2 within a specified time and remains unchanged within a specified duration, it determines that SEB has occurred and diagnoses the corresponding failure cause as SEGR. If the monitoring output module (3) detects that the drain voltage VD increases to VH within a specified time and remains unchanged within a specified duration, it determines that SEB has occurred and diagnoses the corresponding failure cause as SECP. If the transient signal of the drain voltage VD is captured and is a voltage pulse signal, it determines that SET has occurred.

10. The test control method according to claim 8 or 9, characterized in that, In step S4, when it is determined that an SEB or SET occurs, the following steps are also included: when an SEB occurs, the monitoring management module (4) displays and stores the SEB waveform data collected by the monitoring output module (3), and controls the positive voltage power supply (2) to be powered off; when an SET occurs, the monitoring management module (4) displays and stores the SET waveform data collected by the monitoring output module (3).

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