A temperature measuring method and device for a press-pack IGBT

Abstract

The application provides a press-pack IGBT temperature measurement method and device, and relates to the technical field of temperature measurement. The method comprises collecting temperature data of each chip temperature measurement point through a temperature measurement channel invasive temperature measurement method; the surface junction temperature distribution of the measured chip is calculated based on the temperature data and operating environment parameters, and the surface junction temperature distribution of the press-pack IGBT is obtained through a model. The application collects the temperature of the chip feature point by means of the oblique temperature measurement channel and the invasive temperature measurement, acquires reliable temperature measurement data without damaging the main structure of the device, restores the complete junction temperature distribution of the single chip, replaces the manual simulation operation of multiple software through the automatic junction temperature distribution calculation and generation process, simplifies the operation process, improves the analysis efficiency, realizes the automatic acquisition of the junction temperature distribution, deduces the junction temperature distribution of the whole device from the chip junction temperature distribution through the junction temperature distribution prediction model, can completely acquire the junction temperature distribution state from the chip level to the device level, and supports the overall thermal state evaluation and analysis of the device.

Description

Technical Field

[0001] This application relates to the field of temperature measurement technology, specifically to a method and apparatus for measuring the temperature of a press-fit IGBT. Background Technology

[0002] Press-fit insulated-gate bipolar transistors (IGBTs) are important power electronic devices in high-voltage, high-power applications, widely used in flexible DC transmission, rail transit traction, and new energy grid connection. Among these applications, the junction temperature is a key parameter that directly reflects the device's operating status and determines its reliability and lifespan. Therefore, obtaining the junction temperature distribution on the chip surface and throughout the device is one of the main bases for optimizing thermal management design and formulating operational control strategies.

[0003] Currently, junction temperature analysis for press-fit IGBTs commonly employs multiphysics coupling simulation, requiring personnel to sequentially perform device modeling, parameter configuration, and calculations across multiple software programs. This process is highly dependent on manual intervention, cumbersome, and time-consuming, making it difficult to achieve rapid and automated acquisition of junction temperature distribution. In actual temperature measurement, the stacked structure of press-fit packages limits the ability of conventional measurement methods to obtain accurate chip surface temperature data without affecting the main device structure. Non-contact measurements only reflect localized temperature values ​​and lack sufficient accuracy to reconstruct the complete temperature distribution on the chip surface. Furthermore, existing temperature measurement and analysis solutions primarily focus on single-chip-level temperature detection, failing to leverage limited chip temperature measurements to obtain the junction temperature distribution across the entire device, thus hindering device-level thermal state assessment and analysis.

[0004] In summary, existing technologies for measuring and analyzing junction temperature in press-fit IGBTs suffer from cumbersome procedures, low automation, and an inability to fully obtain chip-level and device-level junction temperature distributions based on limited temperature measurement data. Summary of the Invention

[0005] This application addresses the problems existing in the prior art by providing an accurate and efficient method and apparatus for measuring the temperature of press-fit IGBTs, capable of acquiring junction temperature distribution data.

[0006] To achieve the above objectives, the technical solution adopted in this application is as follows: On the one hand, this application provides a method for measuring the temperature of a press-fit IGBT, which includes: Multiple oblique temperature measurement channels are processed on the copper plate of the press-fit IGBT; the outlet of the temperature measurement channel corresponds to the temperature measurement point of the press-fit IGBT chip. Temperature data at each chip's temperature measurement point was collected using an invasive temperature measurement method, and operating environment parameters were collected simultaneously. Based on the temperature data and the operating environment parameters, the surface junction temperature distribution of the chip under test is calculated, and the corresponding junction temperature distribution image is generated. Based on the surface junction temperature distribution image of the chip under test, the surface junction temperature distribution image of the press-fit IGBT is obtained through a junction temperature distribution prediction model.

[0007] Optionally, the processing of the temperature measurement channel includes: Obtain the device parameters of the press-fit IGBT and set the chip temperature measurement point; Based on processing constraints, the processing point closest to the temperature measurement point of each chip is selected on the side edge or side of the copper plate using a geometric algorithm or exhaustive method. The temperature measurement channel is processed based on the connection between the processing point and the corresponding chip temperature measurement point; The processing constraints include the tilt angle of the temperature measuring channel, which is the angle between the axis of the temperature measuring channel and the surface of the copper plate; the tilt angle of the temperature measuring channel is in the range of 15°~30°.

[0008] Optionally, the temperature measurement point of the chip is located on the molybdenum sheet of the press-fit IGBT; In the press-fit type IGBT, each chip is provided with 0 to 9 chip temperature measurement points based on the number of chips, and at least one chip is provided with 9 chip temperature measurement points.

[0009] Optionally, obtaining an image of the surface junction temperature distribution of the chip under test includes: Call the single-chip thermal resistance model that matches the press-fit IGBT; The single-chip thermal resistance model is calibrated based on the operating environment parameters to obtain a calibration model; Based on the calibration model, the surface junction temperature distribution data of the chip under test is obtained by spatial interpolation calculation of the temperature data; Based on the surface junction temperature distribution data of the chip under test, an image of the surface junction temperature distribution of the chip under test is obtained.

[0010] Optionally, the surface junction temperature distribution data of the chip under test can be mapped into a visual image according to a preset temperature color scale to obtain the surface junction temperature distribution image of the chip under test.

[0011] Optionally, the construction of the junction temperature distribution prediction model includes: Multiple sets of historical images of surface junction temperature distribution of single chips and corresponding historical images of surface junction temperature distribution of all press-fit IGBT devices were collected, along with the device parameters and operating environment parameters of the press-fit IGBT corresponding to each set of images, to form a training set; A U-Net neural network model with a fused physical constraint layer is constructed, wherein the physical constraint layer embeds constraint terms of the heat conduction equation. The U-Net neural network model is trained by taking the historical image of the surface junction temperature distribution of the single chip, the parameters of the press-fit IGBT device, and the operating environment parameters as inputs, and using the corresponding historical image of the surface junction temperature distribution of the entire device as labels. The parameters of the U-Net neural network model are adjusted using a joint loss function that includes data loss terms and physical loss terms until the U-Net neural network model converges, and the junction temperature distribution prediction model is obtained.

[0012] Optionally, the junction temperature distribution prediction model includes an encoder, a bottleneck layer, and a decoder; The encoder is used to extract multi-scale temperature features and spatial location features of the input image; The bottleneck layer is used to fuse the extracted features with the input device parameters and operating environment parameters; The decoder is used to reconstruct the features and output a surface junction temperature distribution image of the press-fit IGBT; The physical constraint layer is connected to the output of the decoder to constrain the temperature distribution of the output image and satisfy the heat conduction continuity equation.

[0013] On the other hand, this application also provides a press-fit type IGBT temperature measuring device, which mainly includes an input module, a calculation module and an output module; the output terminal of the input module is electrically connected to the input terminal of the calculation module, and the output terminal of the calculation module is electrically connected to the input terminal of the output module; The input module is used to receive device parameters, chip temperature measurement point data, and operating environment parameters of the press-fit IGBT; The calculation module is equipped with a junction temperature distribution prediction model, which is used to calculate the surface junction temperature distribution of the chip under test based on the data received by the input module, and generate a corresponding junction temperature distribution image. The junction temperature distribution image of the chip under test is input into the junction temperature distribution prediction model, and the surface junction temperature distribution image of the press-fit IGBT is output. The output module is used to output the surface junction temperature distribution image of the chip under test and the surface junction temperature distribution image of the press-fit IGBT.

[0014] Optionally, the input module further includes an input panel; the input panel is configured with a human-computer interaction interface for receiving operation commands. The input panel is connected to the computing module; The calculation module includes a parameter storage unit and a calculation unit; the parameter storage unit is connected to the input module and the calculation unit respectively.

[0015] Optionally, the computing unit includes a single-chip junction temperature calculation subunit and a device-level junction temperature prediction subunit; The single-chip junction temperature calculation subunit is electrically connected to the parameter storage unit and the device-level junction temperature prediction subunit, respectively. The single-chip junction temperature calculation subunit is equipped with a single-chip thermal resistance model that matches the various types of press-fit IGBTs. The device-level junction temperature prediction subunit is equipped with the junction temperature distribution prediction model. The input terminal of the input module is connected to a thermocouple, and the thermocouple is embedded in each temperature measurement channel.

[0016] Compared with the prior art, this application has the following advantages: This application obtains reliable temperature data without damaging the main structure of the device by setting an oblique temperature measurement channel on the copper plate of the press-fit IGBT and using invasive temperature measurement to acquire the temperature of the chip's characteristic points. This allows for the reconstruction of the complete junction temperature distribution of a single chip. The automated junction temperature distribution calculation and generation process replaces manual simulation operations using multiple software programs, simplifying the operation process, improving analysis efficiency, and achieving automated acquisition of the junction temperature distribution. By using a junction temperature distribution prediction model to deduce the junction temperature distribution of the entire device from the chip junction temperature distribution, the complete junction temperature distribution state from the chip level to the device level can be obtained, supporting the overall thermal state assessment and analysis of the device. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart of the method in this application; Figure 2 This is a diagram of the apparatus system of this application; Figure 3 This is a distribution diagram of the press-fit IGBT chip in Embodiment 1 of this application; Figure 4 This is a temperature measurement point diagram of Embodiment 1 of this application; Figure 5 This is a longitudinal sectional view of the collector copper plate of Embodiment 1 of this application; Figure 6 This is an image of the surface junction temperature distribution of the chip under test in Embodiment 1 of this application; Figure 7 This is a surface junction temperature distribution image of the press-fit IGBT in Embodiment 1 of this application.

[0019] In the picture: 1. Collector copper plate; 101. Temperature measurement channel; 2. Molybdenum sheet, 211. Chip center, 221. Midpoint of top edge, 222. Midpoint of right edge, 223. Midpoint of bottom edge, 224. Midpoint of left edge, 231. Top left corner vertex, 232. Top right corner vertex, 233. Bottom right corner vertex, 234. Bottom left corner vertex; 3. Chip #12; Detailed Implementation To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0020] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0021] It is worth noting that, unless otherwise specified, the methods used in this application are all conventional methods; and the raw materials and equipment used are all conventional commercially available products, and their sources are not specifically limited.

[0022] It should also be noted that, for ease of understanding, the method steps in the specific embodiments of this application are described in a certain order, but those skilled in the art can change the order of the steps according to actual needs, so this should not be used as a limiting condition; further, in the description of the following specific embodiments, the superscripts and subscripts of each parameter should be understood as distinguishing marks of similar identifiers in accordance with common interpretations, representing the parameters of the related or corresponding devices, and should not be understood as specific models or special marks.

[0023] like Figure 1 As shown, this application provides a method for measuring the temperature of a press-fit IGBT, which relates to the field of power semiconductor device temperature measurement technology, and is specifically applied to press-fit insulated gate bipolar transistors (IGBTs).

[0024] In implementing the temperature measurement method for press-fit IGBTs in this application, the first step is to complete the fabrication and preparation of the temperature measurement channel. Specifically, before implementation, the device structure parameters of the target press-fit IGBT are obtained, including the number of chips, chip layout position, copper plate thickness, molybdenum sheet thickness, overall package size, and other information. Corresponding chip temperature measurement points are then set on the chip surface.

[0025] The temperature measurement points are located on the surface of the molybdenum sheet of the press-fit IGBT. The molybdenum sheet is situated between the chip and the copper plate, which can transfer pressure and heat without damaging the active area of ​​the chip. Zero to nine temperature measurement points can be set for a single chip, with at least one chip having nine measurement points. These nine points correspond to the center of the chip, the midpoints of its four sides, and the vertices of its four corners. This layout can completely cover the core distribution characteristics of the chip's temperature field. The center captures the highest junction temperature, the midpoints reflect temperature gradients in different directions, and the vertices represent the temperature boundaries under the combined effects of edge heat dissipation and pressure distribution. It is understood that the number of temperature measurement points can be adaptively adjusted according to the number of chips in the press-fit IGBT package. For example, in some embodiments, when there is only a single chip, nine temperature measurement points are set for that chip; when there are multiple chips and the chip distribution adopts a symmetrical structure, nine temperature measurement points are set for chips in typical locations, while one temperature measurement point is set at the center of the other chips. The typical locations are the corners and the center of the multi-chip distribution area.

[0026] After setting the temperature measurement points, based on preset processing constraints, a processing point closest to each chip's temperature measurement point is selected on the side edge or side of the copper plate using a geometric algorithm or exhaustive method. Then, an oblique temperature measurement channel is processed along the line connecting the processing point and the corresponding chip's temperature measurement point. Specifically, the processing constraints include the tilt angle of the temperature measurement channel, defined as the angle between the axis of the temperature measurement channel and the surface of the copper plate. The angle range is controlled between 15° and 30°. This angle range allows for sufficient drilling depth within the limited space of the copper plate's side edge, while avoiding excessively long channels that could cause temperature measurement lag, and ensuring that the processing process does not damage the chip's main structure or the packaging's pressure resistance.

[0027] Furthermore, the temperature measurement channel can be processed using precision electrical discharge machining (EDM). This process is suitable for machining deep small holes in metal sheets, with high processing accuracy and smooth inner walls. It will not generate mechanical stress that could damage the internal chip structure. The outlet of the temperature measurement channel precisely corresponds to the chip's temperature measurement point, ensuring that subsequent temperature measurement elements can directly contact the temperature measurement area.

[0028] After the temperature measurement channel is fabricated, temperature data at each chip's temperature measurement point is collected using an invasive temperature measurement method, while simultaneously acquiring the device's current operating environment parameters. In this application, the invasive temperature measurement method uses a thermocouple as an example. The thermocouple is embedded inside the temperature measurement channel as a temperature sensing element, allowing the thermocouple's sensing end to directly contact the temperature measurement point on the molybdenum sheet surface. This directly obtains the actual temperature data of the chip surface, offering higher measurement accuracy compared to non-contact infrared temperature measurement, and is unaffected by the packaging shell or surface condition.

[0029] The synchronously acquired operating environment parameters include clamping force, operating current value, and water cooling temperature. These three types of parameters together determine the heat transfer characteristics and loss level of the press-fit IGBT, and are necessary boundary conditions in the junction temperature calculation process.

[0030] After acquiring temperature data and operating environment parameters, the surface junction temperature distribution of the chip under test is calculated, and a corresponding junction temperature distribution image is generated. The calculation process includes: First, a single-chip thermal resistance model matching the current press-fit IGBT model is invoked. The single-chip thermal resistance model adopts a Cauer-type thermal resistance network architecture, which can equivalently characterize the series heat transfer path of multi-layer structures such as chip, molybdenum sheet, and copper plate, accurately reflect the thermal resistance and thermal capacity characteristics of each layer of material, and each network node corresponds to the temperature node of a certain physical layer inside the device, which has a clear physical meaning.

[0031] Subsequently, the single-chip thermal resistance model is calibrated based on operating environment parameters to obtain a calibration model adapted to the current operating conditions. The calibration process mainly adjusts the contact thermal resistance coefficient in the model. The clamping force of the fixture directly affects the contact thermal resistance between the chip and the molybdenum sheet, and between the molybdenum sheet and the copper plate. The operating current determines the chip's heat dissipation level, and the water cooling temperature determines the temperature baseline of the heat dissipation boundary. The combined effect of these three types of parameters allows the calibrated model to accurately match the actual heat transfer characteristics under the current operating conditions. One example is to assign a value to the contact thermal resistance coefficient based on engineering experience or historical experimental data, according to the combination of clamping force, operating current value, and water cooling temperature.

[0032] After model calibration, spatial interpolation is performed on the collected temperature data based on the calibrated model to obtain the junction temperature distribution data of the entire surface of the chip under test. Spatial interpolation employs a bicubic interpolation algorithm with thermal conduction continuity constraints. The heat transfer law provided by the calibrated thermal resistance model is used as a physical constraint to avoid abrupt temperature gradient changes and abnormal results that violate the laws of thermal conduction, which can occur with purely mathematical interpolation. Ultimately, a continuous, smooth, and physically consistent dataset of the chip's entire surface junction temperature distribution is obtained. Specifically, the above constraint is implemented as follows: first, the temperature of discrete measurement points is fitted using conventional bicubic interpolation to obtain the initial temperature field of the chip surface; then, using the steady-state heat conduction equation without internal heat sources as a constraint condition, and with the measured temperature points as fixed boundary values, the internal node temperatures of the initial temperature field are iteratively corrected until the residual of the heat conduction equation of the temperature field is lower than a preset threshold, resulting in a junction temperature distribution result that conforms to the laws of thermal conduction.

[0033] When calculating the temperature value of any target point in the temperature field, bicubic interpolation achieves higher surface smoothness by weighted fitting of 16 discrete grid nodes in a 4×4 grid around the target point. Specifically, the discrete grid is generated from the basic temperature field by the calibrated single-chip thermal resistance model and then corrected by the constraints of measured temperature data. Compared with bilinear interpolation, it is more suitable for the continuous and gradual change characteristics of the chip temperature field, and the edge transition of the reconstructed temperature field is more natural, and the temperature gradient calculation is more accurate.

[0034] After obtaining the junction temperature distribution data, the data is mapped into a visual image according to a preset temperature color scale, resulting in a surface junction temperature distribution image of the chip under test, i.e., a junction temperature distribution cloud map. The preset temperature color scale typically uses a continuous gradient mapping from blue to red, with low-temperature areas corresponding to blue and high-temperature areas corresponding to red. The temperature values ​​and color values ​​correspond one-to-one, which can intuitively display the temperature distribution pattern and hot spot locations on the chip surface, making it convenient for operators to quickly identify the highest temperature point and temperature uniformity.

[0035] After obtaining the surface junction temperature distribution image of the chip under test, the surface junction temperature distribution image of the entire press-fit IGBT is obtained through the junction temperature distribution prediction model.

[0036] The junction temperature distribution prediction model of this application takes the U-Net neural network architecture with integrated physical constraint layer as an example. It can predict the junction temperature distribution state of all chips in the entire device based on the junction temperature distribution image of a single chip, combined with device structural parameters and operating conditions. It does not require separate temperature measurement points for each chip, which greatly reduces the temperature measurement cost and complexity.

[0037] Specifically, the construction of the junction temperature distribution prediction model includes model building and training.

[0038] For model building: The main body of the model is a U-Net neural network with an integrated physical constraint layer. The network consists of three parts: an encoder, a bottleneck layer, and a decoder. The encoder employs a multi-level convolutional pooling structure to extract multi-scale temperature and spatial location features from the input image, capturing temperature distribution patterns across different dimensions. The bottleneck layer, located between the encoder and decoder, fuses the image features extracted by the encoder with the input device parameters and operating environment parameters, enabling the model to make predictions based on device structure and operating condition information. The decoder uses a multi-level upsampling convolutional structure to progressively reconstruct the fused features into a temperature distribution image matching the full device dimensions. The physical constraint layer is connected to the decoder's output and embeds Fourier heat conduction equation constraints to constrain the temperature distribution of the output image, ensuring compliance with the heat conduction continuity equation. This prevents purely data-driven models from producing predictions that violate physical laws, improving the model's prediction accuracy and generalization performance. These heat conduction continuity constraints are also incorporated into the joint loss function during the training phase as physical loss terms. Both use the same heat conduction equation, corresponding to output verification during the model inference phase and parameter constraints during the training phase, respectively.

[0039] For model training: The training process begins by collecting multiple sets of historical data to form a training set. Each set includes historical images of the surface junction temperature distribution of a single chip, historical images of the surface junction temperature distribution of the corresponding press-fit IGBT, and the corresponding parameters of the press-fit IGBT device and its operating environment. The historical data can be obtained through a combination of finite element simulation and experimental measurement, covering the junction temperature distribution characteristics of different models and operating conditions, ensuring the diversity and generalization ability of the training set.

[0040] Furthermore, during model training, historical images of the junction temperature distribution on the surface of a single chip, parameters of the press-fit IGBT device, and operating environment parameters are used as inputs, while corresponding historical images of the junction temperature distribution across all devices are used as labels. The network is iteratively trained using these inputs. Training employs a joint loss function that includes data loss and physical loss terms to adjust the network parameters. The data loss term uses mean squared error to calculate the numerical deviation between the predicted image and the true labeled image, while the physical loss term calculates the residual between the output temperature field and the heat conduction equation. By jointly optimizing these two types of losses, the model simultaneously satisfies both data fitting accuracy and consistency with physical laws. Iterative training continues until the network loss converges, ultimately yielding a usable junction temperature distribution prediction model.

[0041] Therefore, the surface junction temperature distribution image of the current chip under test is input into the junction temperature distribution prediction model to obtain the surface junction temperature distribution image of the current press-fit IGBT, and the surface junction temperature distribution image of the press-fit IGBT is fed back to the user.

[0042] On the other hand, such as Figure 2As shown, this application also provides a press-fit type IGBT temperature measuring device for implementing the above method. The device adopts an integrated portable housing structure and integrates an input module, a calculation module and an output module.

[0043] The output of the input module is electrically connected to the input of the calculation module via an internal data bus, and the output of the calculation module is electrically connected to the input of the output module via an internal data bus, thereby enabling the orderly transmission and processing of data.

[0044] The input module receives device parameters, chip temperature measurement point data, and operating environment parameters from the press-fit IGBT. The input module includes an input panel and an input display. The input panel features a human-machine interface with a touch-sensitive design, allowing operators to input parameters and commands. Operators can input various information such as device model, chip number, temperature measurement point, and operating conditions through the input panel. The input display, located above the input panel, shows the parameters to be input and the already entered parameters in real time, facilitating verification and preventing errors.

[0045] The computing module is the processing unit of the device, internally containing a parameter storage unit and a computing unit. The parameter storage unit is electrically connected to both the input module and the computing unit, and is used to classify and store various input parameters and intermediate data generated during the calculation process. The parameter storage unit can be further subdivided into IGBT parameter storage partitions, operating environment parameter storage partitions, single-chip junction temperature storage partitions, and device-level junction temperature storage partitions, corresponding to the storage of basic device parameters, operating condition parameters, single-chip junction temperature calculation results, and full device junction temperature prediction results, respectively, enabling classified management and rapid retrieval of data.

[0046] The computing unit comprises a single-chip junction temperature calculation subunit and a device-level junction temperature prediction subunit. The input of the single-chip junction temperature calculation subunit is connected to the output of the parameter storage unit, and the output of the single-chip junction temperature calculation subunit is connected to the input of the device-level junction temperature prediction subunit, forming a hierarchical computing architecture. The single-chip junction temperature calculation subunit is equipped with a single-chip thermal resistance model matching various types of press-fit IGBTs. It can call the corresponding model's benchmark model, perform model calibration based on operating environment parameters, and then perform spatial interpolation calculations and contour map generation, outputting single-chip junction temperature distribution data and images. The device-level junction temperature prediction subunit is equipped with a pre-trained junction temperature distribution prediction model. It can receive single-chip junction temperature distribution images and corresponding parameters, outputting junction temperature distribution images for the entire device, completing the junction temperature distribution extension from the chip level to the device level.

[0047] The input terminal of the input module is also electrically connected to several thermocouples. The number of thermocouples corresponds one-to-one with the number of temperature measurement channels. One thermocouple is embedded in each temperature measurement channel. The temperature measuring end of the thermocouple can extend into the temperature measurement channel to contact the chip's temperature measuring point, directly collect temperature data and transmit it to the input module, which then forwards it to the calculation module for further processing.

[0048] The output module outputs surface junction temperature distribution images of the tested chip and press-fit IGBTs. The output module includes an output display and an external storage interface. The output display shows the calculated single-chip or device-level junction temperature distribution cloud map in real time, allowing operators to directly view the temperature measurement results. The external storage interface uses a Universal Serial Bus (USB) interface, which can connect to external storage devices such as USB flash drives and portable hard drives, supporting the export and storage of junction temperature distribution data and cloud map images for subsequent analysis and archiving.

[0049] The device is also equipped with multiple heat dissipation vents, which form a convection cooling channel to promptly dissipate the heat generated by the internal computing modules, ensuring stable operation over extended periods. Furthermore, the device integrates an energy storage unit, such as a battery, and is equipped with a power interface for connecting to an external power source to power the entire device or charge the energy storage unit.

[0050] Example 1; The implementation process of the above temperature measurement method and device is explained below with reference to specific operating parameters.

[0051] This embodiment uses a certain type of press-fit IGBT device, such as... Figure 3 As shown, the device contains multiple IGBT chips connected in parallel. Chip number 12#3 is selected as the chip under test. Combined with... Figure 4 As shown, nine temperature measuring points are set on the molybdenum sheet 2 on the surface of chip 3, corresponding to the chip center 211, the upper edge midpoint 221, the right edge midpoint 222, the lower edge midpoint 223, the left edge midpoint 224, the upper left corner vertex 231, the upper right corner vertex 232, the lower right corner vertex 233, and the lower left corner vertex 234, respectively.

[0052] like Figure 5 As shown, an oblique temperature measurement channel 101 is machined on the side edge of the collector copper plate 1 of the device. The optimal machining point is selected through a geometric algorithm, and the angle between the axis of the temperature measurement channel and the surface of the copper plate is controlled, such as α=26.77° and β=19.45°. The end of the channel is aligned with the position of each temperature measurement point. Precision electrical discharge machining is used to ensure that the inner wall of the channel is smooth and does not damage the internal chip structure. A T-type armored thermocouple is embedded in each temperature measurement channel. The temperature measuring end of the thermocouple is in close contact with the temperature measuring point on the surface of the molybdenum plate 2 to ensure the accuracy of the temperature measurement data.

[0053] The temperature data of each measuring point collected by thermocouples during the test in this embodiment are shown in Table 1: Table 1

[0054] The synchronously collected operating environment parameters include: clamping force of the fixture is the rated clamping force, operating current is the rated operating current, and water cooling temperature is the set cooling temperature. These three types of parameters are synchronously entered into the temperature measuring device as calculation boundary conditions.

[0055] During the device's calculation process, the single-chip junction temperature calculation subunit first calls the Cauer-type single-chip thermal resistance network model matched with this type of press-fit IGBT. Combined with the input operating environment parameters, the contact thermal resistance coefficient in the calibration model is calibrated to obtain a calibration thermal resistance model adapted to the current operating conditions. Then, using the calibration model as a physical constraint, bicubic interpolation calculations with thermal conduction constraints are performed on the temperature data from nine temperature measurement points to obtain a junction temperature distribution dataset covering the entire surface of the chip. This dataset covers discrete temperature nodes across the entire chip surface, and the resolution can be adjusted as needed. Finally, the junction temperature distribution dataset is mapped to a color junction temperature distribution cloud map according to a preset blue-red gradient temperature scale, as shown below. Figure 6 As shown, the cloud map can intuitively display the temperature rise trend of the chip surface from the edge to the center, and clearly identify the hot spot location corresponding to the highest temperature of the chip.

[0056] After completing the single-chip junction temperature distribution calculation, the device-level junction temperature prediction subunit inputs the single-chip junction temperature distribution cloud map, device model parameters, and operating environment parameters into the pre-trained junction temperature distribution prediction model. The model extracts the spatial distribution features and temperature gradient laws of the single-chip temperature field through the encoder, fuses the image features with the device structure and operating parameters at the bottleneck layer, and then gradually upsamples and restores the junction temperature distribution cloud map of all chips in the entire device through the decoder. The physical constraint layer simultaneously performs physical compliance verification on the output results to ensure that the output temperature field conforms to the laws of heat conduction.

[0057] The final junction temperature distribution cloud map of the entire device is as follows: Figure 7 As shown, the junction temperature differences of chips at different locations can be intuitively displayed, reflecting the overall temperature distribution uniformity of the device.

[0058] After the calculation is completed, the output display can switch between displaying the junction temperature distribution cloud map of a single chip and the junction temperature distribution cloud map of the entire device in real time. Operators can also export the junction temperature distribution data and cloud map files to an external storage device through the external storage interface for subsequent device reliability analysis, thermal management scheme optimization and other work.

[0059] The above implementation method fully covers the entire process from temperature measurement channel fabrication, data acquisition, single-chip junction temperature calculation to device-level junction temperature prediction. It eliminates the need for manual modeling and simulation using multiple software programs. Only basic parameters need to be input to automatically complete the junction temperature distribution measurement from the chip level to the device level. The operation process is simple and the calculation efficiency is high. It can realize automated measurement of junction temperature distribution from the chip level to the device level. It is suitable for multiple engineering scenarios such as factory quality inspection of high-power press-fit IGBT devices, online monitoring of operating status, and optimization of thermal management solutions, effectively improving the convenience and accuracy of junction temperature distribution detection of press-fit IGBTs.

[0060] Finally, it should be noted that the above content is only used to illustrate the technical solution of this application, and is not intended to limit the scope of protection of this application. Simple modifications or equivalent substitutions made by those skilled in the art to the technical solution of this application shall not depart from the substance and scope of the technical solution of this application.

Claims

1. A method for temperature measurement of a press-fit IGBT, characterized in that, include: Multiple oblique temperature measurement channels are machined on the copper plate of the press-fit IGBT; The outlet of the temperature measurement channel corresponds to the chip temperature measurement point of the press-fit IGBT; Temperature data at each chip's temperature measurement point was collected using an invasive temperature measurement method, and operating environment parameters were collected simultaneously. Based on the temperature data and the operating environment parameters, the surface junction temperature distribution of the chip under test is calculated, and the corresponding junction temperature distribution image is generated. Based on the surface junction temperature distribution image of the chip under test, the surface junction temperature distribution image of the press-fit IGBT is obtained through a junction temperature distribution prediction model.

2. The method according to claim 1, characterized in that, The processing of the temperature measurement channel includes: Obtain the device parameters of the press-fit IGBT and set the chip temperature measurement point; Based on processing constraints, the processing point closest to the temperature measurement point of each chip is selected on the side edge or side of the copper plate using a geometric algorithm or exhaustive method. The temperature measurement channel is processed based on the connection between the processing point and the corresponding chip temperature measurement point; The processing constraints include the tilt angle of the temperature measuring channel, which is the angle between the axis of the temperature measuring channel and the surface of the copper plate; the tilt angle of the temperature measuring channel ranges from 15° to 30°.

3. The method according to claim 2, characterized in that, The temperature measurement point of the chip is located on the molybdenum sheet of the press-fit IGBT; In the press-fit type IGBT, each chip is provided with 0 to 9 chip temperature measurement points based on the number of chips, and at least one chip is provided with 9 chip temperature measurement points.

4. The method according to claim 1, characterized in that, Obtaining the surface junction temperature distribution image of the chip under test includes: Call the single-chip thermal resistance model that matches the press-fit IGBT; The single-chip thermal resistance model is calibrated based on the operating environment parameters to obtain a calibration model; Based on the calibration model, the surface junction temperature distribution data of the chip under test is obtained by spatial interpolation calculation of the temperature data; Based on the surface junction temperature distribution data of the chip under test, an image of the surface junction temperature distribution of the chip under test is obtained.

5. The method according to claim 4, characterized in that, The surface junction temperature distribution data of the chip under test is mapped into a visual image according to a preset temperature color scale to obtain the surface junction temperature distribution image of the chip under test.

6. The method according to claim 1, characterized in that, The construction of the junction temperature distribution prediction model includes: Multiple sets of historical images of surface junction temperature distribution of single chips and corresponding historical images of surface junction temperature distribution of all press-fit IGBT devices were collected, along with the device parameters and operating environment parameters of the press-fit IGBT corresponding to each set of images, to form a training set; A U-Net neural network model with a fused physical constraint layer is constructed, wherein the physical constraint layer embeds constraint terms of the heat conduction equation. The U-Net neural network model is trained using the historical image of the single-chip surface junction temperature distribution, the parameters of the press-fit IGBT device, and the operating environment parameters as inputs, and the corresponding historical image of the surface junction temperature distribution of the entire device as labels. The parameters of the U-Net neural network model are adjusted using a joint loss function that includes data loss terms and physical loss terms until the U-Net neural network model converges, and the junction temperature distribution prediction model is obtained.

7. The method according to claim 6, characterized in that, The junction temperature distribution prediction model includes an encoder, a bottleneck layer, and a decoder; The encoder is used to extract multi-scale temperature features and spatial location features of the input image; The bottleneck layer is used to fuse the extracted features with the input device parameters and operating environment parameters; The decoder is used to reconstruct the features and output a surface junction temperature distribution image of the press-fit IGBT; The physical constraint layer is connected to the output of the decoder to constrain the temperature distribution of the output image and satisfy the heat conduction continuity equation.

8. A press-fit type IGBT temperature measuring device, characterized in that, It includes an input module, a calculation module, and an output module; the output terminal of the input module is electrically connected to the input terminal of the calculation module, and the output terminal of the calculation module is electrically connected to the input terminal of the output module. The input module is used to receive device parameters, chip temperature measurement point data, and operating environment parameters of the press-fit IGBT; The calculation module is equipped with a junction temperature distribution prediction model, which is used to calculate the surface junction temperature distribution of the chip under test based on the data received by the input module, and generate a corresponding junction temperature distribution image. The junction temperature distribution image of the chip under test is input into the junction temperature distribution prediction model, and the surface junction temperature distribution image of the press-fit IGBT is output. The output module is used to output the surface junction temperature distribution image of the chip under test and the surface junction temperature distribution image of the press-fit IGBT.

9. The apparatus according to claim 8, characterized in that, The input module is also equipped with an input panel; the input panel is configured with a human-computer interaction interface for receiving operation commands; The input panel is connected to the computing module; The calculation module includes a parameter storage unit and a calculation unit; the parameter storage unit is connected to the input module and the calculation unit respectively.

10. The apparatus according to claim 9, characterized in that, The computing unit includes a single-chip junction temperature calculation subunit and a device-level junction temperature prediction subunit; The single-chip junction temperature calculation subunit is electrically connected to the parameter storage unit and the device-level junction temperature prediction subunit, respectively. The single-chip junction temperature calculation subunit is equipped with a single-chip thermal resistance model that matches the various types of press-fit IGBTs. The device-level junction temperature prediction subunit is equipped with the junction temperature distribution prediction model. The input terminal of the input module is connected to a thermocouple, and the thermocouple is embedded in each temperature measurement channel.

Images