A diamond color center logic gate structure

Abstract

This invention discloses a diamond color center logic gate structure, which, from bottom to top, comprises a global optical pump layer, a filter and frequency selection layer, a single-crystal diamond active layer, a surface plasmon polariton (SPT) logic functional layer, and a silicon-based photoelectric conversion interface layer. The SPT signal output from the logic modulation node in the SPT logic functional layer is transmitted through a SPT transmission waveguide and subjected to intensity superposition and / or phase interference to form the logic output. With the structure provided by this invention, the filter and frequency selection layer can improve the purity of the target excitation light and reduce background light interference; the cross-coupling structure formed by the modulation electrode line and the SPT transmission waveguide enables the operation, modulation, and transmission of logic signals; and the silicon-based photoelectric conversion interface layer enables interface connection with silicon-based circuits, overcoming the shortcomings of existing silicon-based logic devices in terms of interconnect delay, thermal management, and hybrid interfaces.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic hybrid integrated circuit technology, and in particular to a diamond color center logic gate structure. Background Technology

[0002] Currently, existing silicon-based logic devices primarily rely on the switching on and off of semiconductor transistors to perform logic operations. With the continuous increase in integration density and the shrinking of feature sizes, the bottlenecks faced by traditional silicon-based devices under high-speed operating conditions, such as interconnect delay, escalating power consumption, and heat dissipation, are becoming increasingly prominent. Especially in high-density integration and high-frequency applications, signal transmission based on electrical interconnects is not only limited by RC delay, but the accompanying Joule heating effect also leads to a dense distribution of local hot spots, severely restricting further expansion of device performance. Currently, the explosive growth in demand for AI computing power places extremely high demands on the energy efficiency of underlying hardware, and the heat dissipation problem of silicon-based logic devices has become one of the key obstacles restricting the improvement of computing power density and scale.

[0003] Meanwhile, existing silicon-based logic devices generally suffer from poor compatibility with hybrid interfaces, making it difficult to meet the needs of heterogeneous integration and multi-module collaborative operation, further limiting the improvement of chip computing speed and integration scale. To overcome the inherent limitations of silicon-based devices, related technical fields have begun to explore optical logic modulation schemes based on color center radiation. However, existing schemes still have significant shortcomings: insufficient selectivity and controllability of pump light, making it impossible to achieve precise and efficient excitation and modulation; low integration density of logic modulation structure units, making it difficult to achieve high-density array arrangement, which is not conducive to large-scale applications; and poor compatibility of the overall structure with the process interface of existing silicon-based integrated circuits, making it impossible to efficiently integrate with silicon-based processes to achieve monolithic integration. This hinders the integration of optical logic devices with silicon-based electronic circuits, making it difficult to meet the application requirements of high-performance on-chip optical logic systems. Summary of the Invention

[0004] Therefore, the purpose of this invention is to overcome the shortcomings of existing silicon-based logic devices in terms of interconnect delay, thermal management and hybrid interfaces, and to solve the problems of insufficient pump light selectivity, low integration of logic modulation structure and poor compatibility with silicon-based circuit interfaces in the prior art, thereby proposing a diamond color center logic gate structure.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] This invention provides a diamond color center logic gate structure, comprising, from bottom to top:

[0007] A global optical pump layer is used to provide excitation light;

[0008] A filter-selective layer is disposed on the light output path of the global optical pump layer, and is used to transmit excitation light of the target wavelength corresponding to the color center absorption energy level and suppress excitation light of non-target wavelengths.

[0009] A single-crystal diamond active layer is disposed on the light-emitting side of the light-filtering and frequency-selective layer, and a color center luminescent region is provided in the single-crystal diamond active layer;

[0010] A surface plasmon polariton logic functional layer is near-field coupled to the single-crystal diamond active layer. The surface plasmon polariton logic functional layer includes at least two modulation electrode lines and at least one surface plasmon polariton transmission waveguide. The modulation electrode lines and the surface plasmon polariton transmission waveguide are intersected, and at least two logic modulation nodes are formed at the intersection. The modulation electrode lines are used to modulate the color center radiation generated by the color center emitting region. The surface plasmon polariton transmission waveguide is used to couple the modulated color center radiation and form the surface plasmon polariton signal. The surface plasmon polariton signal output by the logic modulation node is transmitted through the surface plasmon polariton transmission waveguide and subjected to intensity superposition and / or phase interference to form a logic output.

[0011] A silicon-based photoelectric conversion interface layer is disposed at the output end of the surface plasmon polariton transmission waveguide and coupled to it in the near field. The silicon-based photoelectric conversion interface layer includes a silicon-based photodetector unit for converting the surface plasmon polariton signal into a current signal.

[0012] Furthermore, the global optical pump layer includes a pump light source array, which includes one or more of the following: a VCSEL array, a microlaser array, and a light-emitting diode array.

[0013] Furthermore, the single-crystal diamond active layer is a single-crystal diamond thin film; the color center luminescent region forms a planar structure, an array distribution structure, or a strip distribution structure within the single-crystal diamond active layer, and the color center luminescent region includes at least one of NV color centers and SiV color centers.

[0014] Furthermore, the thickness of the single-crystal diamond film is 100-500 nm; the concentration of the NV color centers is 10. 15 -10 17 cm -3 .

[0015] Furthermore, the filter frequency selection layer is one or more combinations of a dielectric interference filter structure, a photonic crystal filter structure, and a micro / nano resonant cavity filter structure, used to transmit pump light of a predetermined excitation wavelength.

[0016] Furthermore, the modulation electrode line is used to apply a local electrostatic field or an alternating electric field to the color center emitting region below the corresponding logic modulation node to modulate the color center radiation generated by the color center emitting region; the modulation electrode line includes at least a first modulation electrode line and a second modulation electrode line, the first modulation electrode line and the second modulation electrode line are respectively intersected with the surface plasmon resonance waveguide, forming at least two logic modulation nodes with the intersection position, the at least two logic modulation nodes including the first logic modulation node and the second logic modulation node.

[0017] Furthermore, the surface plasmon polariton transmission waveguide is one of a metal nanowire, a metal-dielectric composite waveguide, or a slot-type plasmon waveguide; the modulation electrode line is used to provide a driving signal of pulse voltage, DC bias voltage, or a superposition of both, to change the luminescence intensity, charge state, emission spectrum position, or phase response of the color center luminescent region.

[0018] Furthermore, the silicon-based photoelectric conversion interface layer includes one of a silicon-based photodiode, an avalanche photodiode, or a metal-semiconductor-metal photodetector disposed corresponding to the end of the surface plasmon resonance waveguide. The output terminal of the silicon-based photoelectric conversion interface layer is electrically connected to a CMOS logic circuit, and the CMOS logic circuit is also connected to at least two of the modulation electrode lines.

[0019] Furthermore, the silicon-based photoelectric conversion interface layer also includes a threshold comparison circuit electrically connected to the silicon-based photoelectric detection unit, which is disposed at the output end of the surface plasmon resonance waveguide and coupled to it in the near field.

[0020] Furthermore, the width of the surface plasmon polariton transmission waveguide is 5-100 nm, and the thickness is 5-50 nm; the spacing between the modulation electrode line and the surface plasmon polariton transmission waveguide is 5-100 nm.

[0021] This invention provides a diamond color center logic gate structure, comprising, from bottom to top: a global optical pump layer for providing excitation light; a filter and frequency selection layer disposed on the light-emitting path of the global optical pump layer for transmitting excitation light of a target wavelength corresponding to the absorption energy level of the color center and suppressing excitation light of non-target wavelengths; a single-crystal diamond active layer disposed on the light-emitting side of the filter and frequency selection layer, wherein the single-crystal diamond active layer has a color center emitting region; and a surface plasmon logic functional layer, which is near-field coupled to the single-crystal diamond active layer, wherein the surface plasmon logic functional layer includes at least two modulation electrode lines and at least one surface plasmon transmission waveguide, wherein the modulation electrode lines and the surface plasmon transmission waveguide are connected. Waveguides are arranged in a cross configuration, forming at least two logic modulation nodes at the intersection. The modulation electrode line is used to modulate the color center radiation generated by the color center emitting region. The surface plasmon polariton transmission waveguide is used to couple the modulated color center radiation and form the surface plasmon polariton signal. The surface plasmon polariton signal output by the logic modulation node is transmitted through the surface plasmon polariton transmission waveguide and subjected to intensity superposition and / or phase interference to form a logic output. A silicon-based photoelectric conversion interface layer is disposed at the output end of the surface plasmon polariton transmission waveguide and coupled to it in the near field. The silicon-based photoelectric conversion interface layer includes a silicon-based photodetector unit for converting the surface plasmon polariton signal into a current signal. The structure provided by this invention allows for improved target excitation light purity and reduced background light interference through a filter-selective layer. The cross-coupling structure formed by the modulation electrode line and the surface plasmon polariton waveguide enables the computation, modulation, and transmission of logic signals. The silicon-based photoelectric conversion interface layer facilitates interface connection with silicon-based circuits, enabling the structure to be applied to high-speed, low-heat-dissipation, and highly integrated logic devices. This overcomes the shortcomings of existing silicon-based logic devices in terms of interconnect delay, thermal management, and hybrid interfaces, while also addressing the problems of insufficient pump light selectivity, low integration of logic modulation structures, and poor interface compatibility with silicon-based circuits in existing technologies. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the overall structure of the diamond color center logic gate structure of the present invention.

[0024] Figure 2 This is a schematic diagram of the planar structure of the surface plasmon logic functional layer of the diamond color center logic gate structure of the present invention.

[0025] Figure 3 This is a schematic diagram of the planar structure of the silicon-based photoelectric conversion interface layer of the diamond color center logic gate structure of the present invention.

[0026] Figure 4 This is a logic diagram of the diamond color center logic gate structure of the present invention;

[0027] Figure 5 This is a schematic diagram of the signal transmission of the diamond color center logic gate structure of the present invention;

[0028] Figure 6 This is a schematic diagram of signal transmission for a surface plasmonic laser logic functional layer disposed on a single-crystal diamond active layer of the diamond color center logic gate structure of the present invention.

[0029] The reference numerals in the figure are as follows: 1. Global pump layer; 11. Pump source array; 2. Filter and frequency selection layer; 3. Single crystal diamond active layer; 31. Color center luminescent region; 4. Surface plasmon logic functional layer; 41. Modulation electrode line; 411. First modulation electrode line; 412. Second modulation electrode line; 42. Surface plasmon transmission waveguide; 43. Logic modulation node; 431. First logic modulation node; 432. Second logic modulation node; 5. Silicon-based photoelectric conversion interface layer; 51. Silicon-based photodetector unit; 52. Output terminal; 6. CMOS logic circuit. Detailed Implementation

[0030] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0031] Please refer to Figures 1 to 6 This invention provides a diamond color center logic gate structure, comprising, from bottom to top:

[0032] Global optical pump layer 1 is used to provide excitation light;

[0033] The light filtering and frequency selection layer 2 is set on the light output path of the global light pump layer 1, and is used to transmit the excitation light of the target wavelength corresponding to the color center absorption energy level and suppress the excitation light of non-target wavelengths.

[0034] A single-crystal diamond active layer 3 is disposed on the light-emitting side of the light-selective filter layer 2, and a color center light-emitting region 31 is provided in the single-crystal diamond active layer 3;

[0035] The surface plasmon logic functional layer 4 is near-field coupled to the single-crystal diamond active layer 3. The surface plasmon logic functional layer 4 includes at least two modulation electrode lines 41 and at least one surface plasmon transmission waveguide 42. The modulation electrode lines 41 and the surface plasmon transmission waveguide 42 are arranged to cross each other, and at least two logic modulation nodes 43 are formed at the intersection. The modulation electrode lines 41 are used to modulate the color center radiation generated by the color center emitting region 31. The surface plasmon transmission waveguide 42 is used to couple the modulated color center radiation and form a surface plasmon signal. The surface plasmon signal output by the logic modulation node 43 is transmitted through the surface plasmon transmission waveguide 42 and subjected to intensity superposition and / or phase interference to form a logic output.

[0036] The silicon-based photoelectric conversion interface layer 5 is disposed at the output end 52 of the surface plasmon polariton transmission waveguide 42 and coupled to it in the near field. The silicon-based photoelectric conversion interface layer 5 includes a silicon-based photoelectric detection unit 51 for converting the surface plasmon polariton signal into a current signal.

[0037] In this embodiment, the diamond color center logic gate structure includes, from bottom to top, a global optical pump layer 1, a filter and frequency selection layer 2, a single-crystal diamond active layer 3, a surface plasmon resonance (SPR) logic functional layer 4, and a silicon-based photoelectric conversion interface layer 5. This invention integrates the global optical pump layer 1, the filter and frequency selection layer 2, the single-crystal diamond active layer 3, the SPR logic functional layer 4, and the silicon-based photoelectric conversion interface layer 5, achieving a complete functional chain from target wavelength excitation, color center local modulation, SPR signal formation and transmission to electrical logic output. The layers cooperate with each other, jointly solving the problems of low integration, poor signal-to-noise ratio, and poor interface compatibility in existing technologies. Furthermore, this structure possesses optical excitation, near-field transmission, and electrically compatible output capabilities, making it suitable for novel high-speed optoelectronic hybrid logic devices and on-chip integrated computing systems.

[0038] Specifically, the global optical pump layer 1 is used to provide the excitation light required for the device to operate. Preferably, the global optical pump layer includes a pump light source array 11, which includes one or more of a VCSEL array, a micro laser array, and a light-emitting diode array.

[0039] The frequency-selective filter layer 2 is disposed on the light output path of the global optical pump layer 1. It can filter the excitation light emitted from the global optical pump layer 1 to target wavelengths, transmitting excitation light of the target wavelength corresponding to the color center absorption level and suppressing excitation light of non-target wavelengths. This reduces stray light interference to the color center excitation process, improves the stability and signal-to-noise ratio of the logic signal. Specifically, when excitation light is emitted from the global optical pump layer 1, after being filtered through the target wavelength transmission region of the frequency-selective filter layer 2, the frequency-selective filter layer 2 will only transmit excitation light of the target wavelength corresponding to the color center absorption level and suppress excitation light of non-target wavelengths. Preferably, the frequency-selective filter layer 2 is one or more combinations of a dielectric interference filter structure, a photonic crystal filter structure, and a micro / nano resonant cavity filter structure, used to transmit pump light of a predetermined excitation wavelength.

[0040] A single-crystal diamond active layer 3 is disposed on the light-emitting side of the filter and frequency selection layer 2. Preferably, the single-crystal diamond active layer 3 is a single-crystal diamond thin film prepared by MPCVD process. Because the color center defects in diamond have the characteristic that their charge state can be modulated by a local electric field, this electric field modulation effect is analogous to the gate control mechanism of a MOS transistor, thereby mapping external electrical signals into changes in the wavelength or intensity of color center emission, serving as an effective carrier for logic input. Moreover, the thermal conductivity of diamond material is as high as 2000 W / (m·K) or more, far exceeding that of silicon material, which can effectively improve the thermal diffusion conditions during device operation and enhance the operational stability of the device under high-density integration. Therefore, a single-crystal diamond thin film is selected as an effective carrier. The thickness of the single-crystal diamond thin film is 100-500 nm. The color center emission region 31 forms a planar structure, an array distribution structure, or a strip distribution structure within the single-crystal diamond active layer 3, and the color center emission region 31 includes at least one of NV color centers and SiV color centers, with the concentration of NV color centers being 10. 15 -10 17 cm -3 When the laser generated by the global optical pump layer 1 is filtered by the frequency selection filter layer 2 and then acts on the color center emission region 31, it will produce color center radiation, which is also a kind of light wave or electromagnetic wave.

[0041] Please see Figures 4-6 The surface plasmon logic functional layer 4 is near-field coupled to the single-crystal diamond active layer 3. By setting the single-crystal diamond active layer 3 and the surface plasmon logic functional layer 4, the emission intensity, charge state, emission wavelength, or phase of the color center can be modulated using a local electric field, and the modulation result can be converted into a surface plasmon signal to realize the formation and transmission of logic information. The surface plasmon logic functional layer 4 includes at least two modulation electrode lines 41 and at least one surface plasmon transmission waveguide 42. The modulation electrode lines 41 and the surface plasmon transmission waveguide 42 are intersected, and a logic modulation node 43 is formed at each intersection.

[0042] The surface plasmon polariton transport waveguide 42 is used to couple the modulated color center radiation and form a surface plasmon polariton signal. When the color center radiation is matched with the surface plasmon polariton transport waveguide 42, the color center radiation can generate a surface plasmon polariton signal on the surface plasmon polariton transport waveguide 42. This surface plasmon polariton signal will propagate along the surface plasmon polariton transport waveguide 42 and be received by the silicon-based photodetector unit 51. Preferably, the surface plasmon polariton transport waveguide 42 is one of a metal nanowire, a metal-dielectric composite waveguide, or a grooved plasmon waveguide. The width of the surface plasmon polariton transport waveguide 42 is 5-100 nm, and the thickness is 5-50 nm.

[0043] Specifically, the modulation electrode line 41 is used to apply a local electrostatic field or alternating electric field to the corresponding color center luminescent region below the corresponding logic modulation node 43. Specifically, it is used to provide a driving signal of pulse voltage, DC bias voltage, or a superposition of both, to change the luminescence intensity, charge state, emission spectrum position, or phase response of the color center luminescent region 31 to modulate the color center radiation of the luminescent region. Preferably, the spacing between the modulation electrode line 41 and the surface plasmon polariton transmission waveguide 42 is 5-100 nm. The luminescence properties of the color center radiation will change under the influence of the external electric field, that is, they will be affected by the modulation electrode line 41, causing the color center radiation to match or mismatch with the surface plasmon polariton transmission waveguide 42, thereby affecting whether a surface plasmon polariton signal is generated on the surface plasmon polariton transmission waveguide 42, or causing the generated surface plasmon polariton signal to have inconsistent timing. In this embodiment, the modulation electrode line 41 includes at least a first modulation electrode line 411 and a second modulation electrode line 412.

[0044] Specifically, the first modulation electrode line 411 and the second modulation electrode line 412 are respectively arranged to intersect with the surface plasmon polariton transmission waveguide 42, forming at least two logic modulation nodes 43 at the intersection. By setting the logic modulation nodes 43 formed by the intersection of the modulation electrode line 41 and the surface plasmon polariton transmission waveguide 42, it is convenient to realize the layout of multi-input logic structure in a small area and improve the device integration. In this embodiment, the modulation electrode line 41 is used to apply a local electrostatic field or alternating electric field to the corresponding color center emitting region below the corresponding logic modulation node 43 to modulate the color center radiation. The modulated color center radiation is coupled into the surface plasmon polariton transmission waveguide 42, forming a surface plasmon polariton signal with logic information at the logic modulation node 43. At least two logic modulation nodes 43 are arranged along the same surface plasmon polariton transmission waveguide 42, so that the surface plasmon polariton signals generated by multiple logic modulation nodes 43 are superimposed in intensity and / or interfered in phase on the surface plasmon polariton transmission waveguide 42 to form a logic output. That is, each logic modulation node 43 will independently output a surface plasmon polariton signal carrying logic information, thereby achieving intensity superposition and / or phase interference to form a logic output. By superimposing the intensity or interfering the phase of the surface plasmon polariton signals output by multiple logic modulation nodes 43, different logic gate functions can be realized, which has good structural scalability. In this embodiment, the at least two logic modulation nodes 43 are the first logic modulation node 431 and the second logic modulation node 432.

[0045] In this embodiment, the surface plasmon polariton (SPP) signal, as a local electromagnetic mode at the metal-dielectric interface, possesses characteristics such as subwavelength scale constraint and high signal transmission speed, and has application potential in the fields of on-chip high-speed information processing and micro / nano logic units. Based on this, modulated color center radiation can excite the surface plasmon polariton signal in the surface plasmon polariton transmission waveguide 42 through near-field coupling, forming a subwavelength scale optical signal transmission channel. The surface plasmon polariton signal can directly perform logic operations in the surface plasmon polariton transmission waveguide 42 structure using incoherent intensity superposition or coherent phase interference mechanisms, and form a logic discrimination result at the output terminal 52 of the silicon-based photoelectric conversion interface layer 5. Compared to the operating mode of traditional silicon-based logic devices that rely on carrier transport and accumulation, the above logic operation process does not involve long-distance macroscopic migration of carriers between devices, thus theoretically possessing lower dynamic power consumption and heat dissipation potential. Simultaneously, the optical domain logic operation mechanism has inherent advantages in information bandwidth, and is expected to overcome the RC delay bottleneck faced by traditional electrical interconnects.

[0046] A silicon-based photoelectric conversion interface layer 5 is disposed at the output end of the surface plasmon polariton transmission waveguide 42 and coupled to it in the near field. The silicon-based photoelectric conversion interface layer 5 includes a silicon-based photodetector unit 51, which is used to convert the surface plasmon polariton signal into a current signal or a voltage signal for output. Preferably, the silicon-based photoelectric conversion interface layer 5 includes one of a silicon-based photodiode, an avalanche photodiode, or a metal-semiconductor-metal photodetector, which is disposed corresponding to the end of the surface plasmon polariton transmission waveguide 42. The output end 52 of the silicon-based photoelectric conversion interface layer 5 is electrically connected to the CMOS logic circuit 6, so that the present invention forms a hybrid integrated logic unit that can be used with existing silicon-based circuits. The CMOS logic circuit 6 is also connected to the first modulation electrode line 411 and the second modulation electrode line 412 to provide driving signals to the first modulation electrode line 411 and the second modulation electrode line 412. The device internally completes the logic processing based on color center modulation and surface plasmon polariton transmission, and then the output end 52 of the silicon-based photoelectric conversion interface layer 5 outputs the electrical results to the CMOS logic circuit 6 to realize system-level circuit connection. By setting up a silicon-based photoelectric conversion interface layer 5, the surface plasmon resonance signal can be converted into a standard electrical signal output, thereby improving the compatibility between the present invention and existing CMOS circuits and facilitating system-level integration applications.

[0047] Specifically, the silicon-based photoelectric conversion interface layer 5 also integrates a threshold comparison circuit electrically connected to the silicon-based photoelectric detection unit 51, which is used to compare the detected photocurrent signal with a preset threshold and output high and low levels. When the strength of the surface plasmon polariton signal transmitted on the surface plasmon polariton transmission waveguide 42 is higher than the preset decision threshold, a logic high level is output, and when the strength of the surface plasmon polariton signal is lower than the preset decision threshold, a logic low level is output.

[0048] Furthermore, the following are specific embodiments of this application:

[0049] Example 1: AND gate logic based on incoherent strength superposition

[0050] This embodiment provides a diamond color center logic gate structure for implementing logical AND functions. The laser generated by the global optical pump layer 1, after being filtered by the filter and frequency selection layer 2, acts on the color center emitting region 31, generating color center radiation. This color center radiation generates surface plasmon polariton signals carrying logical information at the logic modulation nodes 43 on the surface plasmon polariton transmission waveguide 42. These surface plasmon polariton signals carrying logical information generated at multiple logic modulation nodes 43 propagate along the surface plasmon polariton transmission waveguide 42 and undergo intensity superposition and / or phase interference to form a logic output. Each logic modulation node 43 on the surface plasmon polariton transmission waveguide 42 applies a different level to its corresponding surface plasmon polariton signal according to the logic instruction, thus ensuring that each logic modulation node 43 carries independent logical information. This embodiment mainly provides an AND gate logic gate that performs incoherent intensity superposition of surface plasmon polariton signals generated by multiple logic modulation nodes 43 on the surface plasmon polariton transmission waveguide 42. Incoherent intensity superposition is one specific type of intensity superposition.

[0051] The logic gate structure includes, from bottom to top, a global optical pump layer 1, a filter and frequency selection layer 2, a single-crystal diamond active layer 3, a surface plasmon resonance logic functional layer 4, and a silicon-based photoelectric conversion interface layer 5.

[0052] The global optical pump layer 1 includes a pump light source array 11, which provides the excitation light required for device operation. The filter and frequency selection layer 2 is disposed on the light-emitting side of the global optical pump layer 1. The filter and frequency selection layer 2 can transmit light at the target wavelength, thereby transmitting excitation light at the target wavelength corresponding to the color center absorption energy level.

[0053] A single-crystal diamond active layer 3 is disposed above the frequency-selective filter layer 2, and contains a color center luminescent region 31. The color center luminescent region 31 preferably includes NV color centers and / or SiV color centers. The single-crystal diamond active layer 33 is a single-crystal diamond film prepared by MPCVD with a thickness of 100-500 nm, and the NV color center concentration is 10. 15 -10 17 cm -3 .

[0054] The surface plasmon logic functional layer 4 is disposed above the single-crystal diamond active layer 3 or coupled to it in the near field. The surface plasmon logic functional layer 4 includes two modulation electrode lines 41 and a surface plasmon transmission waveguide 42. The two modulation electrode lines 41 are the first modulation electrode line 411 and the second modulation electrode line 412, respectively. They are arranged to intersect with the surface plasmon transmission waveguide 42 and form two logic modulation nodes 43 at the intersection, namely the first logic modulation node 431 and the second logic modulation node 432.

[0055] During operation, the target laser emitted by the global optical pump layer 1 is filtered by the frequency selection filter layer 2 and then incident on the single-crystal diamond active layer 3 to excite the color center emitting region 31. The logic inputs of the CMOS logic circuit 6 are connected to the first modulation electrode line 411 and the second modulation electrode line 412, respectively. When the logic input of a certain modulation electrode line 41 is high, the corresponding modulation electrode line 41 applies a local electrostatic field or an alternating electric field to the logic modulation node 43. The local electric field acts on the color center emitting region 31, causing changes in the luminous intensity, charge state, emission wavelength, or phase of the color center radiation of the color center emitting region 31. The modulated color center radiation is coupled into the surface plasmon polariton transmission waveguide 42, forming a surface plasmon polariton signal with logic information at the logic modulation node 43. The surface plasmon polariton signals generated by the first logic modulation node 431 and the second logic modulation node 432 are transmitted on the surface plasmon polariton transmission waveguide 42 and undergo incoherent intensity superposition to form a logic output, which is then transmitted to the silicon-based photoelectric conversion interface layer 5.

[0056] In this embodiment, the silicon-based photoelectric conversion interface layer 5 includes a silicon-based photodetector unit 51. When only one logic modulation node 43 is activated, the surface plasmon polariton signal strength reaching the silicon-based photodetector unit 51 is lower than a preset decision threshold, and the output terminal 52 of the silicon-based photoelectric conversion interface layer 5 outputs a low level. When two logic modulation nodes 43 are activated simultaneously, the surface plasmon polariton signals from the two logic modulation nodes 43 are superimposed on the surface plasmon polariton transmission waveguide 42, and the superimposed signal strength is higher than the preset decision threshold, so the output terminal 52 of the silicon-based photoelectric conversion interface layer 5 outputs a high level. This realizes the logic AND function. Specific logic AND gates are shown in Table 1:

[0057] First modulation electrode line Second modulation electrode line Output 0 0 0 1 0 0 0 1 0 1 1 1

[0058] Table 1

[0059] Example 2: XOR gate logic based on coherent phase interference

[0060] This embodiment provides a diamond color center logic gate structure for implementing phase interference type logic output.

[0061] The basic layered structure of this embodiment is the same as that of Embodiment 1, including a global optical pump layer 1, a filter and frequency selection layer 2, a single-crystal diamond active layer 3, a surface plasmon logic functional layer 4, and a silicon-based photoelectric conversion interface layer 5.

[0062] Unlike Embodiment 1, in this embodiment, the first modulation electrode line 411 and the second modulation electrode line 412 are respectively connected to a phase-adjustable driving signal, so that the surface plasmon polariton signals generated by the first logic modulation node 431 and the second logic modulation node 432 have a predetermined phase relationship.

[0063] The specific working process of this embodiment is as follows:

[0064] (1) The global optical pump layer 1 and the filter frequency selection layer 2 provide high-purity monochromatic excitation light to ensure the coherence of the surface plasmon resonance signal.

[0065] (2) When only one of the two modulation electrode lines 41 is at a high level, only one logic modulation node 43 generates a surface plasmon polariton signal, and only one beam of surface plasmon polariton signal exists on the surface plasmon polariton transmission waveguide 42. This signal propagates to the silicon-based photodetector unit 51, generates an effective photocurrent, and the output terminal 52 outputs a high level, which is to say, outputs logic "1".

[0066] (3) When both modulation electrode lines 41 are applied with a low level, no surface plasmon resonance signal is generated, and the output terminal 5252 outputs a low level, corresponding to logic "0".

[0067] (4) When both modulation electrode lines 41 are simultaneously applied with a high level, by finely adjusting the voltage timing of the first modulation electrode line 411 and the second modulation electrode line 412, the surface plasmon polariton signals generated by the first logic modulation node 431 and the second logic modulation node 432 form a precise π phase difference at the convergence point of the surface plasmon polariton transmission waveguide 42. The two coherent surface plasmon polariton signals undergo destructive interference, and the total optical field intensity approaches zero. The silicon-based photodetector unit 51 cannot detect a valid signal, and the output terminal 5252 outputs a low level, corresponding to logic "0".

[0068] This allows for the construction of an XOR-type logic output structure based on phase interference. The specific XOR gates are shown in the table below:

[0069] First modulation electrode line Second modulation electrode line Output 0 0 0 1 0 1 0 1 1 1 1 0

[0070] Table 2

[0071] This invention provides a diamond color center logic gate structure, comprising, from bottom to top: a global optical pump layer for providing excitation light; a filter and frequency selection layer disposed on the light-emitting path of the global optical pump layer for transmitting excitation light of a target wavelength corresponding to the absorption energy level of the color center and suppressing excitation light of non-target wavelengths; a single-crystal diamond active layer disposed on the light-emitting side of the filter and frequency selection layer, wherein the single-crystal diamond active layer has a color center emitting region; and a surface plasmon logic functional layer, which is near-field coupled to the single-crystal diamond active layer, wherein the surface plasmon logic functional layer includes at least two modulation electrode lines and at least one surface plasmon transmission waveguide, wherein the modulation electrode lines and the surface plasmon transmission waveguide are connected. Waveguides are arranged in a cross configuration, forming at least two logic modulation nodes at the intersection. The modulation electrode line is used to modulate the color center radiation generated by the color center emitting region. The surface plasmon polariton transmission waveguide is used to couple the modulated color center radiation and form the surface plasmon polariton signal. The surface plasmon polariton signal output by the logic modulation node is transmitted through the surface plasmon polariton transmission waveguide and subjected to intensity superposition and / or phase interference to form a logic output. A silicon-based photoelectric conversion interface layer is disposed at the output end of the surface plasmon polariton transmission waveguide and coupled to it in the near field. The silicon-based photoelectric conversion interface layer includes a silicon-based photodetector unit for converting the surface plasmon polariton signal into a current signal. The structure provided by this invention allows for improved target excitation light purity and reduced background light interference through a filter-selective layer. The cross-coupling structure formed by the modulation electrode line and the surface plasmon polariton waveguide enables the computation, modulation, and transmission of logic signals. The silicon-based photoelectric conversion interface layer facilitates interface connection with silicon-based circuits, enabling the structure to be applied to high-speed, low-heat-dissipation, and highly integrated logic devices. This overcomes the shortcomings of existing silicon-based logic devices in terms of interconnect delay, thermal management, and hybrid interfaces, while also addressing the problems of insufficient pump light selectivity, low integration of logic modulation structures, and poor interface compatibility with silicon-based circuits in existing technologies.

[0072] It should be noted that the various embodiments in the present invention are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0073] It should also be noted that, in the context of this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0074] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined in the present invention may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown in the present invention, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A diamond color center logic gate structure, characterized in that, From bottom to top, they include: A global optical pump layer is used to provide excitation light; A filter-selective layer is disposed on the light output path of the global optical pump layer, and is used to transmit excitation light of the target wavelength corresponding to the color center absorption energy level and suppress excitation light of non-target wavelengths. A single-crystal diamond active layer is disposed on the light-emitting side of the light-filtering and frequency-selective layer, and a color center luminescent region is provided in the single-crystal diamond active layer; A surface plasmon polariton logic functional layer is near-field coupled to the single-crystal diamond active layer. The surface plasmon polariton logic functional layer includes at least two modulation electrode lines and at least one surface plasmon polariton transmission waveguide. The modulation electrode lines and the surface plasmon polariton transmission waveguide are intersected, and at least two logic modulation nodes are formed at the intersection. The modulation electrode lines are used to modulate the color center radiation generated by the color center emitting region. The surface plasmon polariton transmission waveguide is used to couple the modulated color center radiation and form the surface plasmon polariton signal. The surface plasmon polariton signal output by the logic modulation node is transmitted through the surface plasmon polariton transmission waveguide and subjected to intensity superposition and / or phase interference to form a logic output. A silicon-based photoelectric conversion interface layer is disposed at the output end of the surface plasmon polariton transmission waveguide and coupled to it in the near field. The silicon-based photoelectric conversion interface layer includes a silicon-based photodetector unit for converting the surface plasmon polariton signal into a current signal.

2. The diamond color center logic gate structure according to claim 1, characterized in that, The global optical pump layer includes a pump light source array, which includes one or more of the following: a VCSEL array, a microlaser array, and a light-emitting diode array.

3. The diamond color center logic gate structure according to claim 1, characterized in that, The single-crystal diamond active layer is a single-crystal diamond thin film; the color center luminescent region forms a planar structure, an array distribution structure, or a strip distribution structure within the single-crystal diamond active layer, and the color center luminescent region includes at least one of NV color centers and SiV color centers.

4. The diamond color center logic gate structure according to claim 3, characterized in that, The thickness of the single-crystal diamond film is 100-500 nm; the concentration of the NV color centers is 10. 15 -10 17 cm -3 .

5. The diamond color center logic gate structure according to claim 1, characterized in that, The filter frequency selection layer is one or more combinations of a dielectric interference filter structure, a photonic crystal filter structure, and a micro / nano resonant cavity filter structure, used to transmit pump light of a predetermined excitation wavelength.

6. The diamond color center logic gate structure according to claim 1, characterized in that, The modulation electrode line is used to apply a local electrostatic field or an alternating electric field to the color center luminescent region below the corresponding logic modulation node, so as to modulate the color center radiation generated by the color center luminescent region. The modulation electrode line includes at least a first modulation electrode line and a second modulation electrode line. The first modulation electrode line and the second modulation electrode line are respectively arranged to cross the surface plasmon polariton transmission waveguide, forming at least two logic modulation nodes with the crossing position. The at least two logic modulation nodes include the first logic modulation node and the second logic modulation node.

7. The diamond color center logic gate structure according to claim 1, characterized in that, The surface plasmon polariton transmission waveguide is one of metal nanowires, metal-dielectric composite waveguides, or slotted plasmon waveguides; the modulation electrode line is used to provide a driving signal of pulse voltage, DC bias voltage, or a combination of both, to change the luminescence intensity, charge state, emission spectrum position, or phase response of the color center luminescent region.

8. The diamond color center logic gate structure according to claim 1, characterized in that, The silicon-based photoelectric conversion interface layer includes one of a silicon-based photodiode, an avalanche photodiode, or a metal-semiconductor-metal photodetector, which is disposed corresponding to the end of the surface plasmon resonance waveguide. The output terminal of the silicon-based photoelectric conversion interface layer is electrically connected to a CMOS logic circuit, and the CMOS logic circuit is also connected to at least two of the modulation electrode lines.

9. The diamond color center logic gate structure according to claim 1, characterized in that, The silicon-based photoelectric conversion interface layer also includes a threshold comparison circuit electrically connected to the silicon-based photoelectric detection unit, which is disposed at the output end of the surface plasmon resonance waveguide and coupled to it in the near field.

10. The diamond color center logic gate structure according to claim 1, characterized in that, The width of the surface plasmon polariton transmission waveguide is 5-100 nm and the thickness is 5-50 nm; the spacing between the modulation electrode line and the surface plasmon polariton transmission waveguide is 5-100 nm.

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