A visual programming program logic checking and generating method and system

Abstract

The application discloses a visual programming program logic checking and generating method and system, relates to the technical field of software engineering and visual programming, and receives a visual logic flowchart constructed by a user, converts the visual logic flowchart into an abstract syntax tree and an attribute control flowchart, performs multidimensional static logic checking, generates a checking report, analyzes and optimizes the flowchart that passes the checking to generate intermediate code, further generates multilingual executable source code, automatically generates a unit test case to complete dynamic verification, and feeds back logic optimization suggestions according to the result. The application can comprehensively detect various logic defects, generate multilingual standard codes, automatically complete unit test verification, support intelligent node recommendation and multi-person collaborative development, forms a closed-loop development process, and improves program reliability and development efficiency.

Description

Technical Field

[0001] This invention relates to the fields of software engineering and visual programming technology, and in particular to a method and system for verifying and generating program logic in visual programming. Background Technology

[0002] With the popularization of low-code and no-code development concepts, visual programming technology has been widely used. By dragging and dropping logic nodes and building connections, the barrier to entry for program development has been lowered, allowing non-professional developers to participate in the software development process. However, the logic verification capabilities of existing visual programming tools are generally insufficient. Most tools can only perform basic syntax checks, such as detecting simple problems like mismatched node input / output port numbers or incorrect connection directions. They lack effective means to detect deep logical defects in programs, such as infinite loops, unreachable branches, data races, undefined variables, and type mismatches. Non-professional developers, lacking systematic programming knowledge, are more likely to introduce various errors during the logic design process. These errors often only become apparent during program execution, leading to program crashes or incorrect output results. Furthermore, the debugging process requires repeatedly switching between the generated code and the visual logic diagram, which is difficult and inefficient.

[0003] Existing visual programming tools also have many limitations in their code generation capabilities. Most tools only support generating code in a single programming language, failing to meet the needs of cross-platform and multi-language development. The generated code often lacks necessary comments and formatting, resulting in poor readability and maintainability. It is difficult to directly integrate into existing projects, requiring significant manual adjustments for later modifications and extensions. Regarding logic verification, most tools do not provide automated dynamic verification functions, requiring users to manually write unit test cases to verify the correctness of the program logic. This not only increases the workload for developers but also makes it difficult to guarantee test case coverage, leading to some logical defects not being detected in a timely manner and affecting the reliability of the program.

[0004] Furthermore, existing visual programming tools lack sufficient support for collaborative development and intelligent assistance. Most tools only support single-user editing modes, failing to meet the needs of team collaborative development. The few tools that do support collaborative editing suffer from weak conflict resolution capabilities and inadequate version management, easily leading to lost or inconsistent edited content. Logical node recommendation and auto-completion functions are mostly based on fixed rule bases, unable to intelligently recommend based on the user's current editing context, historical programming behavior, and domain knowledge, still requiring significant manual operation from the user. Simultaneously, most tools lack a complete logic optimization feedback mechanism, failing to proactively provide users with logic improvement suggestions. Users must rely on their own experience to discover and solve problems, resulting in high learning costs and long development cycles. Summary of the Invention

[0005] This invention proposes a method and system for visual programming to verify and generate program logic, in order to solve the problems mentioned in the prior art.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: a method for visual programming logic verification and generation, comprising the following steps: It receives drag-and-drop operations of logical nodes and the construction of connection relationships between nodes from users in the visual programming interface, and generates a visual logic flowchart. The visual logic flowchart is converted into an abstract syntax tree and a control flow graph with attributes, mapping the input and output parameters, execution logic and data type of each logic node; Static logic verification is performed on the abstract syntax tree and control flow graph based on preset multi-dimensional verification rules to detect syntax errors, semantic errors, data flow anomalies and control flow anomalies in the logic flow graph. Generate a logic verification report, visualize and locate the detected anomalies, and label the anomaly type and location; The system performs semantic parsing and structural optimization on the verified visual logic flowchart to generate intermediate representation code. Based on the intermediate representation code, it generates executable source code in multiple programming languages. The system automatically generates a set of unit test cases according to the structure of the visual logic flowchart, executes the unit test cases to complete dynamic logic verification, and generates a dynamic verification report. Based on the static logic verification report and the dynamic verification report, the system provides users with logic optimization suggestions, allowing them to adjust the visual logic flowchart based on the feedback and re-execute the verification and generation process.

[0007] Furthermore, it also includes a context-aware intelligent recommendation and auto-completion mechanism for logical nodes. By analyzing the context information of the logical flowchart currently being edited by the user, historical programming behavior data, and domain knowledge graph, it recommends logical nodes, connection relationships, and parameter configurations that match the current logical context in real time, and automatically completes the default parameters of logical nodes and the data flow connections between nodes.

[0008] Furthermore, it includes a distributed collaborative editing and incremental version control mechanism, which supports multiple users to edit the same visual logic flowchart online at the same time, synchronizes the editing operations of each user in real time and resolves editing conflicts, records the operation content, modification time and modification personnel information of each modification, generates incremental version records, and supports rollback of any historical version, comparison of differences between different versions and version merging operations.

[0009] Furthermore, the process of converting the visual logic flowchart into an abstract syntax tree and a control flow graph includes mapping each visual logic node to a corresponding node in the abstract syntax tree, extracting node type identifiers, input / output parameter lists, execution function bodies, and data type information as tree node attributes; constructing parent-child and sibling node relationships in the abstract syntax tree based on the connection relationships between logic nodes; identifying sequential, branching, looping, and parallel structures based on the abstract syntax tree; and generating an attributed control flow graph that carries the execution order, data flow direction, and control dependencies of nodes.

[0010] Furthermore, the static logic verification based on preset multi-dimensional verification rules includes performing syntax verification to check the legality of logical node connections, performing data flow verification to detect data flow anomalies, performing control flow verification to detect control flow anomalies, and calculating a severity score for each detected anomaly using the following formula: ; In the formula, Rate the severity of the logical anomaly. These are the weighting coefficients. For anomaly type coefficients, This is the coefficient representing the range of impact of the anomaly. This represents the probability coefficient of an anomaly occurring.

[0011] Furthermore, the generation of executable source code in multiple programming languages ​​includes establishing a code generation template library for programming languages, with each code generation template corresponding to the syntax specifications and code structure of a programming language, performing semantic analysis and structural transformation on the intermediate representation code, adjusting the control structure, data type definition, and function call method of the code according to the characteristics of the target programming language, mapping the intermediate representation code to the syntax elements of the corresponding programming language, and automatically generating code comments and code formatting.

[0012] Furthermore, the automatic generation of unit test case sets and execution of dynamic logic verification includes analyzing the control flow graph structure of the visualized logic flowchart, identifying all branch nodes, loop nodes, and boundary conditions, automatically generating a unit test case set covering all branches, statements, and boundary conditions based on equivalence class partitioning and boundary value analysis, automatically generating input parameters and expected output results for each test case, executing the unit test case set in an isolated test environment, recording the execution result, execution time, and resource consumption of each test case, and calculating the overall coverage of the test cases using the following formula: ; In the formula, The overall coverage of test cases. These are the weighting coefficients. For branch coverage, For statement coverage, This represents the boundary condition coverage.

[0013] Furthermore, a visual programming-based program logic verification and generation system includes the following modules: The visual programming interaction module provides a drag-and-drop visual programming interface that receives users' logic node operations and connection construction operations, and displays a visual logic flowchart and real-time editing effects. The logic modeling and transformation module converts the visual logic flowchart into an abstract syntax tree and a control flow graph with attributes, completing the mapping from logic nodes to syntax nodes and the identification of the control flow structure. The static logic verification module performs static logic verification on the abstract syntax tree and control flow graph based on multi-dimensional verification rules, detects various logic anomalies, and generates verification reports. The multilingual code generation module performs semantic parsing and intermediate representation conversion on the validated logic flowchart, and generates executable source code in multiple programming languages ​​based on the code generation template. The dynamic logic verification module automatically generates unit test case sets and executes dynamic tests, calculates test coverage, and generates dynamic verification reports. The collaboration and version management module supports multi-user distributed collaborative editing of visual logic flowcharts, enabling incremental version control and version management operations. The feedback optimization module provides users with logic optimization suggestions based on static and dynamic verification reports, allowing users to adjust the logic flowchart and re-execute the verification and generation process based on the feedback.

[0014] Furthermore, the visual programming interaction module includes a node library management unit, a canvas editing unit, and a real-time preview unit. The node library management unit provides a basic logic node library and a custom logic node library. The canvas editing unit provides unlimited canvas space, supports dragging, moving, copying, deleting, and connecting logic nodes, and provides scaling, panning, and selection functions for the logic diagram. The real-time preview unit displays the execution effect of the visual logic flowchart in real time.

[0015] Furthermore, the static logic verification module includes a verification rule base management unit, an anomaly detection unit, and a report generation unit. The verification rule base management unit is used to maintain the static logic verification rule base, support users to add, modify, and delete verification rules, and customize the trigger conditions and anomaly levels of verification rules. The anomaly detection unit is used to traverse the abstract syntax tree and control flow graph, perform various static logic verification checks, calculate the severity score of logic anomalies, and prioritize them. The report generation unit is used to generate a structured logic verification report, and visually mark the anomaly location and anomaly information in the logic flow diagram.

[0016] Compared with existing technologies, the beneficial effects of this invention are: This invention employs a multi-dimensional static logic verification mechanism to comprehensively detect syntax errors, semantic errors, data flow anomalies, and control flow anomalies in visualized logic flowcharts. This helps developers identify various logical defects during the program design phase, reducing runtime errors. The severity scoring and priority ranking of detected anomalies guides developers to fix problems sequentially according to their importance, improving the efficiency and targeting of logic verification. The visualized anomaly location function directly marks the location and type of anomalies in the logic flowchart, reducing debugging difficulty and making it particularly suitable for non-professional developers.

[0017] This invention supports the generation of executable source code in multiple programming languages, establishing a comprehensive code generation template library that automatically adjusts code structure and format according to the syntax of the target programming language. The generated code features standardized comments and formatting, offering good readability and maintainability. It can be directly compiled and run or integrated into existing projects, reducing the workload of later manual modifications. It also supports user-defined code generation templates and code snippet insertion, meeting the personalized development needs of different projects.

[0018] This invention achieves automated unit test case generation and dynamic logic verification. It can automatically generate test case sets covering all branches, statements, and boundary conditions based on the control flow structure of the logic flowchart, eliminating the need for developers to manually write test code. Through comprehensive coverage statistics, it fully evaluates the adequacy of tests, and the dynamic verification report accurately locates the logical nodes where tests failed and the possible causes of errors, helping developers quickly fix logical problems and improve program reliability.

[0019] The context-aware logical node intelligent recommendation and auto-completion mechanism provided by this invention can combine the user's current editing context, historical programming behavior, and domain knowledge to recommend logically consistent nodes and connections in real time, automatically complete default parameters, reduce manual operations, and improve programming efficiency. The distributed collaborative editing and incremental version control mechanism supports multiple users developing online simultaneously, enabling real-time synchronized editing operations and conflict resolution, preserving a complete version history, supporting version rollback and difference comparison, and ensuring consistency and traceability of team collaboration. A complete logical optimization feedback mechanism can provide users with targeted improvement suggestions based on verification and validation results, forming a closed-loop process of design, verification, generation, validation, and optimization, improving program quality and development efficiency. Attached Figure Description

[0020] Figure 1 A flowchart for visualizing programming logic verification and generating multi-language code; Figure 2 A flowchart for converting a visual logic flowchart into a low-level syntax and control flow structure; Figure 3 A flowchart for multi-dimensional static logic verification and anomaly severity assessment; Figure 4 This is a flowchart of dynamic logic verification based on equivalence class and boundary value analysis; Figure 5 Diagram of the interaction mechanism between context-based intelligent recommendation and distributed collaborative version control. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0023] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. Furthermore, the terms "installed," "connected," and "linked" should be interpreted broadly; for example, they may refer to a fixed connection, a detachable connection, or an integral connection; they may refer to a mechanical connection or an electrical connection; they may refer to a direct connection or an indirect connection through an intermediate medium; and they may refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances. The invention will now be described in further detail with reference to the accompanying drawings.

[0024] Reference Figures 1 to 5 A method for visual programming to verify and generate program logic, comprising the following steps: It receives drag-and-drop operations of logical nodes and the construction of connection relationships between nodes from users in the visual programming interface, and generates a visual logic flowchart. The visual logic flowchart is converted into an abstract syntax tree and a control flow graph with attributes, mapping the input and output parameters, execution logic and data type of each logic node; Static logic verification is performed on the abstract syntax tree and control flow graph based on preset multi-dimensional verification rules to detect syntax errors, semantic errors, data flow anomalies and control flow anomalies in the logic flow graph. Generate a logic verification report, visualize and locate the detected anomalies, and label the anomaly type and location; The system performs semantic parsing and structural optimization on the verified visual logic flowchart to generate intermediate representation code. Based on the intermediate representation code, it generates executable source code in multiple programming languages. The system automatically generates a set of unit test cases according to the structure of the visual logic flowchart, executes the unit test cases to complete dynamic logic verification, and generates a dynamic verification report. Based on the static logic verification report and the dynamic verification report, the system provides users with logic optimization suggestions, allowing them to adjust the visual logic flowchart based on the feedback and re-execute the verification and generation process.

[0025] This invention also includes a context-aware intelligent recommendation and auto-completion mechanism for logical nodes. By analyzing the context information of the logical flowchart currently being edited by the user, historical programming behavior data, and domain knowledge graph, it recommends logical nodes, connection relationships, and parameter configurations that match the current logical context in real time, and automatically completes the default parameters of logical nodes and the data flow connections between nodes, reducing the amount of manual operation by the user and improving the efficiency of visual programming.

[0026] This invention also includes a distributed collaborative editing and incremental version control mechanism, which supports multiple users to edit the same visual logic flowchart online at the same time, synchronizes the editing operations of each user in real time and resolves editing conflicts, records the operation content, modification time and modification personnel information of each modification, generates incremental version records, supports rollback of any historical version, comparison of differences between different versions and version merging operations, and ensures the consistency and traceability of multi-person collaborative development.

[0027] In this invention, the process of converting a visual logic flowchart into an abstract syntax tree and a control flow graph specifically involves mapping each visual logic node to a corresponding node in the abstract syntax tree, extracting the type identifier, input / output parameter list, execution function body, and data type information of the logic node as attributes of the abstract syntax tree node, constructing parent-child node relationships and sibling node relationships of the abstract syntax tree based on the connection relationships between logic nodes, identifying sequential structures, branching structures, loop structures, and parallel structures in the logic flowchart based on the abstract syntax tree, and generating an attributed control flow graph containing the node execution order, data flow direction, and control dependencies, providing a basic data structure for subsequent static logic verification.

[0028] In this invention, the static logic verification based on preset multi-dimensional verification rules specifically includes: performing syntax verification to check the legality of logical node connections, including detecting mismatches in the number of node input / output ports, incorrect connection directions, and isolated nodes; performing semantic verification to check the consistency of data types, including detecting parameter passing type mismatches, undefined variables, and duplicate variable definitions; performing data flow verification to detect data flow anomalies, including detecting unused variables, dead code, and data races; and performing control flow verification to detect control flow anomalies, including detecting infinite loops, unreachable branches, and missing return values. A severity score is calculated for each detected anomaly, using the following formula: ; In the formula, The severity of the logical anomaly is rated on a scale of 1, with a higher value indicating a more severe anomaly. Here, represents the weighting coefficient, with a dimension of 1, and They were set to 0.5, 0.3, and 0.2 respectively. This is the exception type coefficient, with a dimension of 1. Its value ranges from 1 to 10, depending on the degree of impact of the exception on program execution. This is the anomaly impact range coefficient, with a dimension of 1. Its value ranges from 1 to 10, depending on the number of logical nodes affected by the anomaly. This is the probability coefficient of exception occurrence, with a dimension of 1. It ranges from 0 to 1 based on the probability of an exception being triggered during program execution. Exceptions are prioritized according to their severity scores to guide users in repairing logical exceptions in order of priority.

[0029] In this invention, generating executable source code for multiple programming languages ​​specifically involves establishing a code generation template library that includes Python, Java, C++, and JavaScript. Each code generation template corresponds to the syntax and code structure of a programming language. Semantic analysis and structural transformation are performed on the intermediate representation code. The control structure, data type definitions, and function call methods of the code are adjusted according to the characteristics of the target programming language. The intermediate representation code is mapped to the syntax elements of the corresponding programming language. Code comments and code formatting are automatically generated. User-defined code generation templates and code snippet insertion are supported to meet the personalized code generation needs of different projects. The generated executable source code can be directly compiled and run or integrated into existing projects.

[0030] In this invention, the automatic generation of unit test case sets and execution of dynamic logic verification specifically involves analyzing the control flow graph structure of the visualized logic flowchart, identifying all branch nodes, loop nodes, and boundary conditions, and automatically generating a unit test case set covering all branches, statements, and boundary conditions based on equivalence class partitioning and boundary value analysis. Input parameters and expected output results are automatically generated for each test case. The unit test case set is executed in an isolated test environment, and the execution results, execution time, and resource consumption of each test case are recorded. The overall coverage of the test cases is calculated using the following formula: ; In the formula, This represents the overall test case coverage, with a dimension of 1. A higher value indicates more comprehensive test coverage. Here, represents the weighting coefficient, with a dimension of 1, and They were set to 0.4, 0.3, and 0.3 respectively. This represents branch coverage, with a dimension of 1, and a value range from 0 to 1. This represents statement coverage, with a unit of 1 and a value range of 0 to 1. This is the boundary condition coverage, with a dimension of 1 and a value range of 0 to 1. It generates a dynamic verification report that includes test case execution details, coverage statistics, and failed test case analysis. It logically locates failed test cases and prompts the user with the corresponding logical nodes and possible error reasons.

[0031] This invention includes the following modules: The visual programming interaction module provides a drag-and-drop visual programming interface, receives users' logic node operations and connection construction operations, and displays a visual logic flowchart and real-time editing effects. The logic modeling and transformation module is used to convert visual logic flowcharts into abstract syntax trees and control flow graphs with attributes, completing the mapping from logic nodes to syntax nodes and the identification of control flow structures. The static logic verification module is used to perform static logic verification on the abstract syntax tree and control flow graph based on multi-dimensional verification rules, detect various logic anomalies and generate verification reports. The multilingual code generation module is used to perform semantic parsing and intermediate representation conversion on the validated logic flowcharts, and generate executable source code in multiple programming languages ​​based on the code generation template. The dynamic logic verification module is used to automatically generate unit test case sets and execute dynamic tests, calculate test coverage and generate dynamic verification reports. The collaboration and version management module is used to support multi-user distributed collaborative editing of visual logic flowcharts and to implement incremental version control and version management operations. The feedback optimization module provides users with logic optimization suggestions based on static and dynamic verification reports, allowing users to adjust the logic flowchart and re-execute the verification and generation process based on the feedback.

[0032] In this invention, the visual programming interaction module includes a node library management unit, a canvas editing unit, and a real-time preview unit. The node library management unit provides a basic logic node library and a custom logic node library, supporting users to create, edit, and import custom logic nodes. The canvas editing unit provides unlimited canvas space, supports dragging, moving, copying, deleting, and connecting logic nodes, and provides scaling, panning, and selection functions for the logic diagram. The real-time preview unit displays the execution effect of the visual logic flowchart in real time, supports single-step execution and breakpoint debugging, and helps users intuitively understand the execution process of the program logic.

[0033] In this invention, the static logic verification module includes a verification rule base management unit, an anomaly detection unit, and a report generation unit. The verification rule base management unit is used to maintain a multi-dimensional static logic verification rule base, supporting users to add, modify, and delete verification rules, and customize the trigger conditions and anomaly levels of verification rules. The anomaly detection unit is used to traverse the abstract syntax tree and control flow graph, perform various static logic verification checks, calculate the severity score of logic anomalies, and prioritize them. The report generation unit is used to generate a structured logic verification report, visually marking the anomaly location and anomaly information in the logic flow graph, and providing anomaly details and repair reference directions.

[0034] The following two examples further illustrate specific embodiments of the present invention: Example 1: Implementation of Automated Development for Production Order Processing in Manufacturing Enterprises This embodiment is applied to the development of an automated production order processing system for a manufacturing enterprise. The project requires the development of business process logic including order receipt, customer information verification, inventory balance check, production task allocation, and logistics scheduling notification. The personnel involved in the development include business personnel and junior developers, most of whom do not have professional programming skills. The developed process is required to run stably and be able to integrate with the enterprise's existing ERP system.

[0035] Users access the development interface through a visual programming interaction module. The node library management unit provides a basic logic node library and an enterprise-customized business node library. The basic logic node library includes common nodes such as input / output, conditional judgment, loop execution, data calculation, and function calls. The customized business node library includes encapsulated business logic nodes such as order query, inventory update, production task creation, and logistics notification. Users drag and drop corresponding logic nodes onto the infinite canvas in the canvas editing unit, build connections between nodes by connecting them, set the input / output parameters and execution conditions for each node, and generate a visual production order processing logic flowchart. The real-time preview unit supports step-by-step execution of the logic flowchart, allowing users to view the execution results and data flow of each node step by step, intuitively verifying the correctness of the logic. A context-aware intelligent logic node recommendation mechanism analyzes the user's current editing context in real time, recommending logic nodes and connection relationships that match the current business process, and automatically completing the default parameters of the nodes.

[0036] The logic modeling and transformation module receives the user-constructed visual logic flowchart, maps each logic node to a corresponding node in the abstract syntax tree (AST), and extracts the node's type identifier, input / output parameter list, function body, and data type information as attributes of the AST node. Based on the connections between nodes, it constructs parent-child and sibling relationships in the AST, identifying sequential, branching, and looping structures in the logic flowchart. Based on the AST, it generates an attributed control flow graph, where each node corresponds to a logic execution unit, and edges represent control dependencies and data flow directions, providing the basic data structure for subsequent static logic verification.

[0037] The static logic verification module performs static logic verification on the abstract syntax tree and control flow graph based on a multi-dimensional verification rule base. The verification rule base management unit maintains a complete rule set including syntax verification, semantic verification, data flow verification, and control flow verification, and supports enterprises adding custom verification rules according to their own business needs. The anomaly detection unit traverses the abstract syntax tree and control flow graph, performing various verification checks sequentially to examine node connection validity, data type consistency, variable definition and usage, control flow integrity, etc. It calculates a severity score for each detected logical anomaly and prioritizes them according to the score. The report generation unit generates a structured logic verification report, marking the anomaly location in a visual logic flow diagram with different colors, displaying the anomaly type, severity, and suggested remediation directions.

[0038] The multi-language code generation module performs semantic parsing on the validated visual logic flowchart to generate intermediate representation code. The module includes built-in code generation template libraries for Python, Java, C++, and JavaScript, each template corresponding to the syntax and code structure of a specific programming language. Based on the user-selected target programming language, Java, the intermediate representation code is mapped to Java syntax elements, automatically adjusting the code's control structure, data type definitions, and function call methods. The generated code includes standardized class definitions, method implementations, and code comments, and automatically performs code formatting. Users can insert custom code snippets at specified locations to meet specific integration needs with existing ERP systems. The generated Java source code can be directly compiled into an executable program and integrated into the enterprise's production management system.

[0039] The dynamic logic verification module analyzes the control flow graph structure of the logic flowchart, identifying all branch nodes, loop nodes, and boundary conditions. Based on equivalence class partitioning and boundary value analysis, it automatically generates unit test case sets, covering all branches, statements, and boundary conditions, and automatically generates input parameters and expected output results for each test case. The unit test case sets are executed in an isolated test environment, recording the execution result, execution time, and resource consumption of each test case. The overall test case coverage is calculated, generating a dynamic verification report containing test case execution details, coverage statistics, and failed test case analysis. For failed test cases, the module logically locates the faulty logic nodes and prompts the user with the corresponding logical nodes and possible causes of the errors.

[0040] The collaboration and version management module supports multiple users simultaneously editing the same visual logic flowchart online, synchronizing the editing operations of each user in real time. When multiple users modify the same node or connection at the same time, the module automatically detects editing conflicts and uses a conflict resolution algorithm based on operation sequences to merge the edited content, retaining all users' valid modifications. It records the operation content, modification time, and user information for each modification, generating incremental version records. It supports rollback operations for any historical version and provides a difference comparison function between different versions, visually displaying the addition or removal of nodes, changes in connections, and parameter modifications between two versions.

[0041] The feedback optimization module provides users with targeted logic optimization suggestions based on static and dynamic logic verification reports. For detected logic anomalies, it offers specific repair steps and reference examples. For optimizable logic structures, such as redundant conditional statements or inefficient loop structures, it prompts users to simplify and optimize them. Users adjust the visual logic flowchart based on the feedback suggestions and re-execute the verification and generation process, forming a closed-loop development process.

[0042] Table 1: Comparison Table of Static Logic Verification Anomaly Detection

[0043] Table 1 shows the comparison results between this method and traditional visual programming tools in terms of their ability to detect different types of logical anomalies. Traditional tools can only effectively detect basic syntax anomalies, and their ability to detect deep logical defects in semantic, data flow, and control flow categories is insufficient, especially for concurrency-related anomalies such as data races, which are completely undetectable. This method, through a multi-dimensional static logic verification mechanism, can comprehensively cover all kinds of common program logic anomalies, with a detection rate far higher than that of traditional tools. This allows developers to discover most logical defects in advance during the program design phase, preventing these defects from being exposed during runtime and reducing the workload of later debugging and maintenance. For business personnel lacking professional programming knowledge, the visual anomaly localization and repair suggestions can effectively reduce debugging difficulty and improve development efficiency and program quality.

[0044] In this embodiment, a multi-dimensional static logic verification mechanism helps non-professional developers discover and fix multiple logical defects in the production order processing flow in advance, including data type mismatches in inventory check logic and unreachable branches in production task allocation. The multi-language code generation function directly generates Java code that conforms to enterprise standards, allowing for integration into existing systems without extensive manual modifications. Automated unit test generation and dynamic verification functions ensure the correctness of the process logic, while distributed collaborative editing and version control mechanisms support collaborative development between business and development personnel, significantly improving the development efficiency and operational stability of the automated production order processing system.

[0045] Example 2: Implementation Method for Developing Control Programs for Smart Agriculture IoT Devices This embodiment is applied to the development of IoT device control programs for smart agricultural parks. The project requires the development of device control programs that include functions such as temperature and humidity data acquisition, soil moisture monitoring, automatic control of irrigation equipment, light adjustment, and alarm for abnormal conditions. The project involves the joint development of hardware developers, software developers, and agricultural technicians. The control program is required to respond to sensor data in real time, stably control various agricultural equipment, and support remote updates and maintenance.

[0046] Users access the development interface through a visual programming interaction module. The node library management unit provides a basic logic node library and an IoT-specific node library. The IoT-specific node library contains pre-packaged nodes for sensor data reading, device control command sending, data storage, network communication, and scheduled tasks. Agricultural technicians drag and drop corresponding logic nodes in the canvas editing unit according to crop growth needs to build business logic such as temperature and humidity threshold judgment, irrigation duration control, and light intensity adjustment. Hardware developers add logic nodes related to device communication and data parsing, and set communication parameters between sensors and devices. The real-time preview unit connects to a simulation test environment, allowing users to input simulated sensor data and view the execution effect of control logic and the output of device commands. A logic node intelligent recommendation mechanism, combined with an agricultural knowledge graph, recommends logic nodes and parameter configurations suitable for crop growth control.

[0047] The logic modeling and transformation module converts user-built IoT device control logic flowcharts into abstract syntax trees and attributed control flow graphs. It extracts the input / output parameters, execution logic, and data type information for each logic node, constructing the node relationships within the abstract syntax tree. It identifies sequential, branching, looping, and parallel structures in the logic flowchart, generating a control flow graph that includes node execution order, data flow direction, and control dependencies. For parallel-executed device control logic, it marks concurrently executing nodes and data-sharing areas in the control flow graph, providing a basis for subsequent data flow verification and data contention detection.

[0048] The static logic verification module performs multi-dimensional static logic verification, checking the legality of logical node connections, the consistency of data types, and the definition and usage of variables. It focuses on detecting data race issues in concurrent control logic, identifying situations where multiple parallel nodes simultaneously access the same shared variable. It checks the integrity of the control flow, detecting anomalies such as missing return values, infinite loops, and unreachable branches. It calculates the severity score of detected anomalies and sorts them by priority. A logic verification report is generated, marking the location and detailed information of anomalies in a visual flowchart. For high-severity anomalies such as data races, it highlights potential equipment control chaos.

[0049] The multi-language code generation module selects the corresponding C++ code generation template based on the hardware platform of the IoT device. It performs semantic analysis and structural transformation on the intermediate representation code to generate C++ source code that conforms to embedded device development specifications. The generated code includes complete functionality such as device driver calls, data processing, logical judgments, and control command output, automatically adding necessary header files and macro definitions. It supports users inserting hardware-related custom code snippets to adapt to different models of sensors and control devices. After cross-compilation, the generated code can be directly downloaded and run on the IoT control terminal.

[0050] The dynamic logic verification module analyzes the control flow graph structure of the control logic and automatically generates a set of unit test cases covering all branches, statements, and boundary conditions. For core logic such as irrigation control and lighting adjustment, it generates test cases including normal, boundary, and abnormal conditions. The test case set is executed in a simulated testing environment, recording the execution results and control command outputs for each test case. The overall test case coverage is calculated, and a dynamic verification report is generated. For test cases that fail, the module locates the corresponding logic node, analyzes the cause of the failure, and prompts the user for modification.

[0051] The collaboration and version management module supports multiple team members simultaneously editing control logic flowcharts online, with real-time synchronization of each member's editing operations. When agricultural technicians adjust irrigation threshold parameters, hardware developers can simultaneously modify device communication logic, and the module automatically resolves editing conflicts. It records the content and personnel involved in each version's modifications, generating a complete version history. It supports comparisons between different versions, allowing team members to easily view logic changes. When program issues arise, it allows for quick rollback to a previous stable version.

[0052] The feedback optimization module provides users with logic optimization suggestions based on the results of static and dynamic verification. For detected concurrent data contention issues, it suggests adding mutex locks or adjusting the execution order. For logic with long response times, it suggests optimizing the data processing flow or splitting complex nodes. Users adjust the control logic according to the feedback suggestions, re-execute the verification and generation process, and continuously optimize the program's performance and stability.

[0053] Table 2: Comparison of Development Efficiency

[0054] Table 2 shows the efficiency comparison between developing the same IoT device control program using traditional coding methods and this method. Traditional development methods require developers to manually write all code and design test cases, resulting in long development cycles, large code volumes, and significant time spent on debugging and fixing. This method, through a visual logic design approach, significantly reduces the workload of coding, and the automated unit test generation function almost completely replaces the manual writing of test cases. The multi-dimensional logic verification mechanism can detect and fix most logic defects in advance, significantly reducing later debugging time. This greatly shortens the overall project development cycle, significantly reduces the amount of code, and lowers the programming skill requirements for developers, allowing agricultural technicians to participate in the design of the control logic, ensuring that the control program better meets the actual needs of agricultural production.

[0055] In this embodiment, the visual programming approach enables agricultural technicians to directly participate in the design of equipment control logic, avoiding deviations during the demand transmission process. Multi-dimensional static logic verification effectively detects data race issues in concurrent control, ensuring the stability of equipment control. Multi-language code generation directly generates C++ code suitable for embedded devices, and automated testing verifies the correctness of the control logic. Distributed collaborative editing and version control mechanisms support cross-disciplinary team collaboration, improving the development efficiency and quality of smart agriculture IoT equipment control programs and enabling rapid response to changes in actual needs in agricultural production.

[0056] Reference Figure 1 This diagram comprehensively illustrates the entire lifecycle of visual programming logic verification and executable code generation. Users construct visual logic flowcharts by dragging and dropping lines in the interactive visual module, which the system then converts into an abstract syntax tree and a control flow graph with attributes. Next, the system invokes preset multi-dimensional verification rules to perform static scanning of these underlying structures. If an anomaly is detected, the system generates a static verification report and visually locates and annotates it on the canvas, guiding the user to make adjustments. If the static verification passes, the system initiates parallel dual-path processing: on one hand, it performs semantic parsing and structural optimization of the logic, transforming it into intermediate representation code and outputting executable source code in multiple mainstream languages ​​using a code generation template library; on the other hand, the system analyzes the control flow topology, automatically generates unit test case sets, and executes dynamic logic verification in an isolated test environment. Finally, the system integrates the static and dynamic reports, providing users with comprehensive optimization suggestions, forming a closed-loop iterative optimization mechanism.

[0057] Reference Figure 2 This diagram details the process of converting the front-end visual logic diagram into the back-end core modeling data structure. The process begins with extracting attributes from each visual logic node in the canvas. The system captures multi-dimensional attribute information, including node type identifiers, input / output parameter lists, internal execution function bodies, and basic data types, mapping them one by one to corresponding nodes in the abstract syntax tree. Subsequently, based on the topological connections between nodes, the system constructs strict parent-child hierarchies and sibling dependencies within the abstract syntax tree. Building upon this, the control flow recognition engine deeply analyzes the tree-like and graph-like structures, accurately identifying four classic control structures inherent in the program: sequential execution, conditional branching, loop control, and parallel processing. Finally, the system combines these control logics with node attributes to generate an attributed control flow graph containing a clear node execution order, data flow trajectory, and control dependencies, providing robust data structure support for subsequent multi-dimensional verification.

[0058] Reference Figure 3This diagram illustrates the system's multi-dimensional parallel verification mechanism for static scanning and defect quantification assessment of the underlying syntax tree and control flow graph. When the static logic verification module is activated, the system simultaneously activates four independent detection pipelines: the syntax verification pipeline focuses on node port number matching, direction validity, and isolated node scanning; the semantic verification pipeline verifies cross-node data type consistency and variable definition status; the data flow verification pipeline focuses on capturing unused variables, dead code, and potential data race risks; and the control flow verification pipeline deeply investigates serious hidden dangers such as infinite loops, unreachable branch logic, and missing function return values. When each pipeline detects a defect, the defect assessment engine collects multi-dimensional risk factors such as the type coefficient of the abnormal object, the number of nodes within its affected range, and the probability of triggering the error, and performs a comprehensive score for the severity of the anomaly. The system prioritizes all defects based on the scores and finally highlights the errors in the front-end canvas in the form of visual annotations, guiding users to efficiently repair them.

[0059] Reference Figure 4 This diagram illustrates the control flow of the system's automated dynamic logic verification and multi-metric coverage measurement. This process aims to uncover hidden runtime errors that static scanning cannot capture by actually running test cases. First, the dynamic verification module deeply analyzes the control flow graph, accurately identifying all branching points, loop nodes, and boundary conditions. Then, the test generation engine uses equivalence class partitioning and boundary value analysis to automatically construct comprehensive test cases for each execution path, intelligently deriving the input parameter combinations and expected standard output results for each test case. The generated unit test case set is deployed to a system-created isolated sandbox test environment for fully automated execution, collecting real-time data on test case execution status, execution time, and memory resource metrics. After testing, the analysis module comprehensively calculates branch coverage, statement coverage, and boundary condition coverage to determine the overall coverage of the entire graphical logic, ultimately generating a dynamic verification report containing test details and in-depth diagnostics of failed test cases.

[0060] Reference Figure 5This diagram illustrates two core underlying support mechanisms for improving the efficiency of visual programming and ensuring team development consistency. On the left is the context-aware intelligent recommendation mechanism: when a user drags or connects lines in the canvas editing unit, the system captures the current local graph topology and configuration state in real time. Combining historical programming behavior data and domain knowledge graphs for semantic matching, it predicts and recommends the most suitable subsequent logical nodes, connections, and parameter configurations to the user in real time, achieving automatic data flow completion. On the right is the distributed collaboration and incremental version control mechanism: multiple users simultaneously edit the same visual logic flowchart online via the network. The collaboration engine synchronizes the editing operations of all parties in real time. If overlapping operations occur, a conflict resolution algorithm is automatically activated. Every valid modification is recorded by the incremental version controller, saving the modifier, modification time, and specific content, generating a clear version chain. This supports teams in rolling back historical versions, visually comparing differences between versions, and merging branches, comprehensively improving collaboration efficiency.

[0061] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for visualizing program logic verification and generation of a program, characterized by, Includes the following steps: It receives drag-and-drop operations of logical nodes and the construction of connection relationships between nodes from users in the visual programming interface, and generates a visual logic flowchart. The visual logic flowchart is converted into an abstract syntax tree and a control flow graph with attributes, mapping the input and output parameters, execution logic and data type of each logic node; Static logic verification is performed on the abstract syntax tree and control flow graph based on preset multi-dimensional verification rules to detect syntax errors, semantic errors, data flow anomalies and control flow anomalies in the logic flow graph. Generate a logic verification report, visualize and locate the detected anomalies, and label the anomaly type and location; Semantic parsing and structural optimization are performed on the verified visual logic flowchart to generate intermediate representation code, and executable source code in multiple programming languages ​​is generated based on the intermediate representation code. The system automatically generates a set of unit test cases based on the structure of the visual logic flowchart, executes the unit test cases to complete dynamic logic verification, and generates a dynamic verification report. Based on the static logic verification report and the dynamic verification report, the system provides users with logic optimization suggestions, allowing them to adjust the visual logic flowchart based on the feedback and re-execute the verification and generation process.

2. The method of claim 1, wherein, It also includes a context-aware intelligent recommendation and auto-completion mechanism for logical nodes. By analyzing the context information of the logical flowchart currently being edited by the user, historical programming behavior data, and domain knowledge graph, it recommends logical nodes, connection relationships, and parameter configurations that match the current logical context in real time, and automatically completes the default parameters of logical nodes and the data flow connections between nodes.

3. The method of claim 1, wherein, It also includes a distributed collaborative editing and incremental version control mechanism, which supports multiple users to edit the same visual logic flowchart online at the same time, synchronizes the editing operations of each user in real time and resolves editing conflicts, records the operation content, modification time and modification personnel information of each modification, generates incremental version records, and supports rollback of any historical version, comparison of differences between different versions and version merging operations.

4. The method for visual programming logic verification and generation according to claim 1, characterized in that, The process of converting the visual logic flowchart into an abstract syntax tree and control flow graph includes mapping each visual logic node to a corresponding node in the abstract syntax tree and extracting node type identifiers, input and output parameter lists, execution function bodies and data type information as tree node attributes. Based on the logical node connection relationships, the parent-child and sibling node relationships of the abstract syntax tree are constructed. Based on the abstract syntax tree, sequential, branching, looping, and parallel structures are identified, and an attributed control flow graph that carries the execution order of nodes, data flow direction, and control dependencies is generated.

5. The method for visual programming logic verification and generation according to claim 1, characterized in that, The static logic verification based on preset multi-dimensional verification rules includes performing syntax verification to check the legality of logical node connections, performing data flow verification to detect data flow anomalies, performing control flow verification to detect control flow anomalies, and calculating a severity score for each detected anomaly using the following formula: ； In the formula, Rate the severity of the logical anomaly. These are the weighting coefficients. For anomaly type coefficients, This is the coefficient representing the range of impact of the anomaly. This represents the probability coefficient of an anomaly occurring.

6. The method for visual programming logic verification and generation according to claim 1, characterized in that, The process of generating executable source code for multiple programming languages ​​includes establishing a code generation template library for each programming language. Each code generation template corresponds to the syntax rules and code structure of a programming language. Semantic analysis and structural transformation are performed on the intermediate representation code. The control structure, data type definition, and function call method of the code are adjusted according to the characteristics of the target programming language. The intermediate representation code is mapped to the syntax elements of the corresponding programming language, and code comments and code formatting are automatically generated.

7. The method for visual programming logic verification and generation according to claim 1, characterized in that, The automatic generation of unit test case sets and execution of dynamic logic verification includes analyzing the control flow graph structure of the visualized logic flowchart, identifying all branch nodes, loop nodes, and boundary conditions, automatically generating a unit test case set covering all branches, statements, and boundary conditions based on equivalence class partitioning and boundary value analysis, automatically generating input parameters and expected output results for each test case, executing the unit test case set in an isolated test environment, recording the execution result, execution time, and resource consumption of each test case, and calculating the overall coverage of the test cases using the following formula: ； In the formula, The overall coverage of test cases. These are the weighting coefficients. For branch coverage, For statement coverage, This represents the boundary condition coverage.

8. A visual programming program logic verification and generation system, applied to the visual programming program logic verification and generation method described in any one of claims 1-7, characterized in that, Includes the following modules: The visual programming interaction module provides a drag-and-drop visual programming interface that receives users' logic node operations and connection construction operations, and displays a visual logic flowchart and real-time editing effects. The logic modeling and transformation module converts the visual logic flowchart into an abstract syntax tree and a control flow graph with attributes, completing the mapping from logic nodes to syntax nodes and the identification of the control flow structure. The static logic verification module performs static logic verification on the abstract syntax tree and control flow graph based on multi-dimensional verification rules, detects various logic anomalies, and generates verification reports. The multilingual code generation module performs semantic parsing and intermediate representation conversion on the validated logic flowchart, and generates executable source code in multiple programming languages ​​based on the code generation template. The dynamic logic verification module automatically generates unit test case sets and executes dynamic tests, calculates test coverage, and generates dynamic verification reports. The collaboration and version management module supports multi-user distributed collaborative editing of visual logic flowcharts, enabling incremental version control and version management operations. The feedback optimization module provides users with logic optimization suggestions based on static and dynamic verification reports, allowing users to adjust the logic flowchart and re-execute the verification and generation process based on the feedback.

9. A visual programming program logic verification and generation system according to claim 8, characterized in that, The visual programming interaction module includes a node library management unit, a canvas editing unit, and a real-time preview unit. The node library management unit provides a basic logic node library and a custom logic node library. The canvas editing unit provides unlimited canvas space and supports dragging, moving, copying, deleting, and connecting logic nodes. It also provides zooming, panning, and selection functions for the logic diagram. The real-time preview unit displays the execution effect of the visual logic flowchart in real time.

10. A visual programming program logic verification and generation system according to claim 8, characterized in that, The static logic verification module includes a verification rule base management unit, an anomaly detection unit, and a report generation unit. The verification rule base management unit is used to maintain the static logic verification rule base, support users to add, modify, and delete verification rules, and customize the trigger conditions and anomaly levels of verification rules. The anomaly detection unit is used to traverse the abstract syntax tree and control flow graph, perform various static logic verification checks, calculate the severity score of logic anomalies, and prioritize them. The report generation unit is used to generate a structured logic verification report, which visually marks the anomaly location and anomaly information in the logic flow diagram.

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