A method and device for host computer debugging

CN122733686APending Publication Date: 2026-09-11SHANGHAI MAPADA INSTR CO LTD
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Patent Information

Application Number
CN202610898508.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-22
Publication Date
2026-09-11

AI Technical Summary

Technical Problem

下位机或其模拟器受限于硬件物理极限,难以安全、可控地引入异常工况,这直接导致上位机的异常处理逻辑覆盖率低,软件鲁棒性难以得到充分验证

Benefits of technology

[0015] In the method and apparatus for debugging a host computer disclosed in this invention, the verification procedures originally used for a slave computer are applied to the debugging of the host computer, severing the hardware and software coupling between the two. This allows the host computer to be debugged independently without connecting to the slave computer or its simulator, breaking the traditional understanding that host computer debugging must rely on the slave computer. This avoids introducing errors from the slave computer into the debugging process of the host computer. At the same time, by superimposing signals of different abnormal intensities into the debugging data, the abnormal handling capability of the host computer can be evaluated. Therefore, debugging costs can be reduced, the debugging cycle can be shortened, and the defects of the slave computer itself that do not conform to the verification procedures can be exposed. At the same time, the abnormal handling logic coverage of the host computer can be improved.

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Abstract

This invention discloses a method and apparatus for debugging a host computer, belonging to the field of metrology instruments. The method includes: generating host computer debugging data according to the lower-level computer's calibration procedures to debug the host computer's data processing capabilities; and superimposing signals of different anomaly intensities into the debugging data to evaluate the host computer's anomaly handling capabilities. The apparatus includes: a calibration data generation unit, a data transceiver unit, a data processing capability analysis unit, a robust data generation unit, and an anomaly handling capability analysis unit. This invention applies the lower-level computer calibration procedures to host computer debugging, severing the hardware and software coupling between the two, breaking the traditional understanding that host computer debugging must rely on the lower-level computer, and avoiding the introduction of lower-level computer errors into the host computer debugging process. When applied to host computer debugging, this method and apparatus can reduce debugging costs, shorten the debugging cycle, and help expose defects in the lower-level computer that do not conform to the calibration procedures, thereby improving the coverage of the host computer's anomaly handling logic.
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Description

Technical Field

[0001] This invention relates to the field of measuring instruments, and more specifically to a method and apparatus for debugging a host computer. Background Technology

[0002] In the field of metrology instruments, a strong coupling relationship generally exists between the host computer (control and analysis software) and the slave computer (hardware execution unit). The slave computer is responsible for low-level signal acquisition and execution, while the host computer undertakes high-level functions such as core algorithm calculation, data storage, and human-computer interaction. Taking the ultraviolet-visible spectrophotometer as an example, its slave computer must undergo strict performance self-testing in accordance with the national metrological verification procedure "Verification Procedure for Ultraviolet, Visible, and Near-Infrared Spectrophotometers" before leaving the factory to ensure that the hardware indicators comply with regulations. However, for the host computer itself, there is currently no equivalent metrological verification standard or validation specification independent of the hardware in the industry. Therefore, the industry generally adopts a "hard connection" approach for debugging the host computer, that is, directly connecting it to the physical slave computer or its simulation simulator for debugging. This development model, which is highly dependent on the physical entity's state, has revealed the following defects in engineering practice: First, the R&D process suffers from time-series bottlenecks. The logic verification of the host computer is severely constrained by the hardware development cycle of the slave computer. Before the slave computer hardware architecture or underlying firmware is finalized, the host computer is often forced to pause or delay development due to the lack of effective interaction objects, resulting in a series of bottlenecks in the overall project progress. Secondly, error propagation is often concealed. If the output characteristics, noise level, or wavelength accuracy of the lower-level machine or its simulator deviate from the specified limits, the compensation algorithm and data processing logic within the upper-level machine will passively adapt to these abnormal characteristics. This implicit adaptation will cause hardware defects to be masked by software logic, making it difficult to trace the overall error of the integrated system back to its source between the hardware and software. Third, there is insufficient coverage of abnormal scenarios. Due to the physical limitations of the hardware, the lower-level computer or its simulator cannot safely and controllably introduce abnormal operating conditions. This directly leads to low coverage of the abnormal handling logic of the upper-level computer, and the software robustness cannot be fully verified.

[0003] It is evident that the current debugging of the host computer suffers from problems such as high cost, long cycle, easy concealment of defects in the lower computer itself that do not comply with the verification procedures, and low coverage of abnormal handling logic. Summary of the Invention

[0004] To address the problems in the prior art, the present invention provides a method and apparatus for debugging a host computer.

[0005] According to one aspect of the present invention, a method for debugging a host computer is provided, comprising: generating at least one pair of debugging data and expected results based on the data and result calculation method required by the testing items in the lower-level computer testing procedure; sending the debugging data to the host computer and obtaining the actual results generated by the host computer after executing the debugging data; if each expected result matches the corresponding actual result, the debugging is deemed to have passed; otherwise, the debugging is deemed to have failed.

[0006] Optionally, in one example of the above aspects, it further includes: superimposing signals of different abnormal intensities on the calibration and debugging data to generate at least one pair of robust debugging data and calibration expectation results; sending robust debugging data to the host computer and obtaining the actual results generated by the host computer after executing the robust debugging data; determining the critical abnormal intensity signal in the robust debugging data that matches the calibration expectation results and the corresponding actual results as the abnormality handling capability threshold of the host computer.

[0007] Alternatively, in one example of the above aspects, signals with different anomalous intensities include Gaussian white noise and signals with different signal-to-noise ratios.

[0008] Optionally, in one example of the above aspects, the lower-level machine verification procedure includes the "Verification Procedure for Ultraviolet, Visible and Near-Infrared Spectrophotometers".

[0009] According to another aspect of the present invention, an apparatus for upper computer debugging is also provided, comprising: a verification data generation unit configured to generate at least one pair of verification debugging data and verification expected results according to the data and result calculation method required by the verification items in the lower computer verification procedure; a data transceiver unit configured to send the verification debugging data to the upper computer and obtain the actual results generated by the upper computer after executing the verification debugging data; and a data processing capability analysis unit configured to determine that the verification debugging is passed if each verification expected result matches the corresponding actual result, otherwise, the verification debugging is deemed to have failed.

[0010] Optionally, in one example of the above aspects, it further includes: a robust data generation unit, configured to: superimpose signals of different anomaly intensities on the verification and debugging data to generate at least one pair of robust debugging data and verification expected results; an anomaly handling capability analysis unit, configured to: determine the critical anomaly intensity signal in the robust debugging data that matches the verification expected results and the corresponding actual results as the anomaly handling capability threshold of the host computer; and a data transceiver unit, configured to: further include sending robust debugging data to the host computer and obtaining the actual results generated by the host computer after executing the robust debugging data.

[0011] Alternatively, in one example of the above aspects, the signals with different anomalous intensities are configured as: Gaussian white noise signals with different signal-to-noise ratios.

[0012] Optionally, in one example of the above aspects, the lower-level machine verification procedure is configured as: "Verification Procedure for Ultraviolet, Visible and Near-Infrared Spectrophotometer".

[0013] According to another aspect of the present invention, a computing device for host computer debugging is also provided, comprising: at least one processor; and a memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform the method for host computer debugging as described above.

[0014] According to another aspect of the present invention, a non-transitory machine-readable storage medium is also provided, which stores executable instructions that, when executed, cause the machine to perform the method for debugging a host computer as described above.

[0015] In the method and apparatus for debugging a host computer disclosed in this invention, the verification procedures originally used for a slave computer are applied to the debugging of the host computer, severing the hardware and software coupling between the two. This allows the host computer to be debugged independently without connecting to the slave computer or its simulator, breaking the traditional understanding that host computer debugging must rely on the slave computer. This avoids introducing errors from the slave computer into the debugging process of the host computer. At the same time, by superimposing signals of different abnormal intensities into the debugging data, the abnormal handling capability of the host computer can be evaluated. Therefore, debugging costs can be reduced, the debugging cycle can be shortened, and the defects of the slave computer itself that do not conform to the verification procedures can be exposed. At the same time, the abnormal handling logic coverage of the host computer can be improved.

[0016] By utilizing the method and apparatus for debugging the host computer disclosed in this invention, and using the "Verification Procedure for Ultraviolet, Visible and Near-Infrared Spectrophotometers", the data processing capabilities of the host computer of the ultraviolet-visible spectrophotometer, such as wavelength indication error, wavelength repeatability, noise and drift, can be debugged. This allows the host computer debugging to be carried out independently without waiting for the lower-level computer hardware to be ready, thereby achieving decoupling and parallel development of the host computer and lower-level computer. This significantly shortens the overall product development cycle, reduces debugging costs, and helps to expose defects in the lower-level computer itself that do not comply with the verification procedure.

[0017] Furthermore, by using the method and apparatus for debugging a host computer disclosed in this invention, Gaussian white noise is superimposed on the debugging data, and different signal-to-noise ratios are preset to generate debugging data containing signals with different abnormal intensities. This can evaluate the abnormal processing capability of the host computer in peak finding under different interference intensities and the minimum signal-to-noise ratio condition for peak finding capability, thereby improving the abnormal processing logic coverage of the host computer. Attached Figure Description

[0018] A further understanding of the nature and advantages of the disclosure of this invention can be achieved by referring to the following accompanying drawings. In the drawings, similar components or features may have the same reference numerals.

[0019] Figure 1 A flowchart of a method for debugging a host computer according to an embodiment of the present invention is shown;

[0020] Figure 2 A flowchart illustrating the data processing capabilities for adjusting wavelength indication errors and wavelength repeatability in a host computer according to an embodiment of the present invention is shown.

[0021] Figure 3 A flowchart illustrating the anomaly handling capability and minimum signal-to-noise ratio condition for peak finding capability in host computer debugging according to an embodiment of the present invention is shown.

[0022] Figure 4 A flowchart illustrating the data processing capabilities for debugging noise and drift in a host computer according to an embodiment of the present invention is shown;

[0023] Figure 5 A schematic diagram of the structure of a device 500 for upper computer debugging according to an embodiment of the present invention is shown;

[0024] Figure 6 A structural block diagram of a computing device 600 for host computer debugging according to an embodiment of the present invention is shown. Detailed Implementation

[0025] The subject matter described herein will now be discussed with reference to exemplary embodiments. It should be understood that these embodiments are discussed merely to enable those skilled in the art to better understand and implement the subject matter described herein, and are not intended to limit the scope, applicability, or examples set forth in the claims. Changes may be made to the function and arrangement of the elements discussed without departing from the scope of the invention. Various processes or components may be omitted, substituted, or added as needed in the various examples. For example, the described methods may be performed in a different order than described, and steps may be added, omitted, or combined. Furthermore, features described in some examples may be combined in other examples.

[0026] As used herein, the term "comprising" and its variations are open terms meaning "including but not limited to". The term "based on" means "at least partially based on". The terms "one embodiment" and "an embodiment" mean "at least one embodiment". The term "another embodiment" means "at least one other embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other definitions, whether explicit or implicit, may be included below. Unless explicitly indicated by the context, the definition of a term shall remain consistent throughout the specification.

[0027] The verification procedures for lower-level machines not only include the National Metrological Verification Procedures of the People's Republic of China (JJG), but also the internal verification procedures formulated by enterprises based on JJG, according to their own product characteristics, internal quality requirements, or customer needs. For example, the "Verification Procedures for Ultraviolet, Visible, and Near-Infrared Spectrophotometers" in JJG is a widely applicable lower-level machine verification procedure for manufacturers of ultraviolet-visible spectrophotometers. The latest version is JJG 178-2007. Enterprises can directly apply this lower-level machine verification procedure, or they can set more stringent internal control indicators than this lower-level machine verification procedure and use them as internal benchmarks for determining the factory conformity of lower-level machines.

[0028] Figure 1 A flowchart illustrating a method for debugging a host computer according to an embodiment of the present invention is shown. Figure 1 As shown, it includes the following steps:

[0029] S1. Based on the data and result calculation methods required by the verification items in the lower-level machine verification procedure, generate at least one pair of verification and debugging data and expected verification results.

[0030] Taking the JJG 178-2007 verification procedure as an example, section 6.3.2 defines the verification method for the maximum permissible wavelength error, including selecting a standard measurement wavelength, performing three consecutive measurements, and calculating the maximum permissible wavelength error using the result calculation formula. This means that by generating a series of absorbance values ​​containing the standard measurement wavelength and using the same result calculation formula as the lower-level computer verification procedure, the upper-level computer's ability to handle the maximum permissible wavelength error can be debugged. This method not only frees the upper-level computer from dependence on the lower-level computer for debugging the maximum permissible wavelength error, but more importantly, it ensures that when the upper-level computer connects to the lower-level computer, it can process the data fed back by the lower-level computer according to the requirements of the aforementioned verification procedure, without being affected by the implementation details or individual differences of the lower-level computer itself. This helps to expose defects in the lower-level computer that do not conform to the verification specifications. Similar methods can be used to debug the corresponding processing capabilities of the upper-level computer for other verification items in the verification procedure.

[0031] Verification and debugging data are data generated based on the requirements of the verification items in the lower-level computer verification procedure, applicable to that verification item, and used for debugging the upper-level computer. Different verification items have different verification and debugging data. Part of the verification and debugging data comes from the content recorded in the lower-level computer verification procedure (e.g., the reference wavelength of the given medium), and another part is reasonably set based on experience (e.g., random values ​​of absorbance within the empirical range).

[0032] The expected verification result is calculated in advance based on the result calculation method required by the verification items in the lower-level computer verification procedure (including the algorithms recorded in the lower-level computer verification procedure, such as the result calculation formula for the maximum permissible error of wavelength, and the algorithms implicit in implementing these algorithms, which are known to those skilled in the art; for example, before the upper-level computer judges the maximum permissible error of wavelength, the upper-level computer must first correctly identify the number of characteristic peaks and the center wavelength position of each characteristic peak). This pre-calculated result data is then compared with the actual results generated by the upper-level computer executing the verification and debugging data. Different verification items have different expected verification results.

[0033] S2. Different abnormal intensity signals can be superimposed on the verification and debugging data to form at least one pair of robust debugging data and verification expected results.

[0034] Abnormal intensity signals include various interference signals such as Gaussian white noise, baseline drift, and peak loss, which may affect the actual results of the host computer. By superimposing signals of different abnormal intensities into the calibration and debugging data, the host computer's ability to handle anomalies under various non-ideal conditions can be adjusted. For example, superimposing Gaussian white noise into the calibration and debugging data and achieving a signal-to-noise ratio (SNR) of 20dB after superposition creates robust debugging data. This data, along with the corresponding expected calibration result, generates a pair of robust debugging data and expected calibration results. Then, superimposing Gaussian white noise into the same calibration and debugging data and achieving a SNR of 10dB after superposition creates another pair of robust debugging data and expected calibration results. This allows for the calibration of the host computer under interference from these two different abnormal intensity signals, thereby determining the minimum SNR condition for the host computer's peak-finding capability.

[0035] S3. Send debugging data to the host computer and obtain the actual results generated by the host computer after executing the debugging data.

[0036] The host computer, as the control and analysis software for the slave computer, inherently possesses interfaces for receiving data uploaded from the slave computer. These interfaces can be: communication command interfaces (such as receiving commands and returning data via TCP / IP or virtual serial ports); application programming interfaces (directly called via APIs); user interface operation entry points (data input via the interface), etc. This invention utilizes these interfaces to send corresponding debugging data to the host computer, thereby triggering the host computer to generate corresponding actual results. In the various embodiments of this invention, for the sake of simplicity, the phrase "sending debugging data to the host computer" is used to collectively refer to the aforementioned various data transmission methods. Those skilled in the art can choose the most suitable implementation method according to the actual situation. This invention obtains the actual results generated after the host computer executes debugging data, which can be achieved through one or more of the following methods: directly reading response data (obtaining the actual results directly from the returned response message or function return value through communication commands or API interfaces); observing screen display (capturing the actual results displayed on the host computer's user interface through methods such as screenshots, image recognition, or log capture); analyzing log files (if the host computer writes the actual results to a log file, the actual results can be obtained by reading the log file); and database query (if the host computer stores the actual results in a database, the actual results can be obtained by querying the database). In various embodiments of this invention, for the sake of simplicity, the phrase "obtaining the actual results generated by the host computer executing debugging data" is used to collectively refer to the above-mentioned multiple acquisition methods. Those skilled in the art can choose the most suitable implementation means according to the actual situation.

[0037] S4. If each expected result of the verification matches the corresponding actual result, the verification and debugging are deemed to have passed; otherwise, the verification and debugging are deemed to have failed.

[0038] For each verification and debugging data, a corresponding comparison method is used to determine whether the actual result returned by the host computer is consistent with the expected verification result corresponding to the verification and debugging data. If they are all consistent, the verification and debugging is deemed to have passed; otherwise, the verification and debugging is deemed to have failed.

[0039] S5. The critical anomaly intensity signal in the robust debugging data that matches the expected test result with the corresponding actual result is determined as the anomaly handling capability threshold of the host computer.

[0040] Taking the evaluation of the host computer's anomaly handling capability in peak finding as an example, Gaussian white noise is superimposed on the calibration and debugging data, and the SNR of the superimposed signal reaches 30dB, 20dB, and 10dB respectively, thus forming three robust debugging data. When adopting a strategy of sending robust debugging data to the host computer in random order of SNR, all robust debugging data should be sent to the host computer. Assuming the order of sending robust debugging data is robust debugging data with SNR=30dB, robust debugging data with SNR=10dB, and robust debugging data with SNR=20dB, if the calibration expectation results corresponding to robust debugging data with SNR=30dB and SNR=20dB are consistent with the corresponding actual results, while those with SNR=10dB are inconsistent, then SNR=20dB is the critical anomaly strength signal. It is evident that the transmission order of robust debugging data can be random or incremental / decremental. However, regardless of the transmission order, the "critical anomaly intensity signal in the robust debugging data that matches the expected result with the corresponding actual result" can be used as the basis for determining the threshold of the host computer's anomaly handling capability.

[0041] Figure 2 A flowchart illustrating the data processing capabilities for adjusting wavelength indication errors and wavelength repeatability using a host computer, according to an embodiment of the present invention, is shown. Figure 2 As shown, it includes the following steps:

[0042] 101. Based on the reference wavelength of holmium oxide glass in the JJG 178-2007 verification procedure, and the calculation method of the maximum permissible wavelength error and wavelength repeatability, generate the first spectral data sequence, the second spectral data sequence, the third spectral data sequence, and the expected result.

[0043] The first spectral data sequence, the second spectral data sequence, and the third spectral data sequence constitute the verification and debugging data. This verification and debugging data, together with the expected result, forms a verification and debugging data and expected result pair.

[0044] Appendix A, Table A.3 of the JJG 178-2007 verification procedure defines the reference wavelength for holmium oxide glass. The characteristic wavelength λ (unit: nm) of this embodiment is defined as follows:

[0045] 1 279.4 5 385.9 9 484.5 2 287.5 6 418.7 10 536.2 3 333.7 7 453.2 11 637.5 4 360.9 8 460.0 - -

[0046] The first spectral data sequence includes absorbance A in the range of 200 nm to 700 nm and covers all the above characteristic wavelengths λ, as shown in the table below (for simplification, only data near some characteristic wavelengths and typical baseline points are listed; the actual sequence should be a complete continuous sequence).

[0047] 200 0.102 332 0.091 417 0.087 201 0.101 333 0.405 418 0.432 …… …… 333.7 0.768 418.7 0.877 277 0.106 334 0.412 419 0.386 278 0.342 335 0.186 420 0.176 279 0.623 …… …… …… …… 279.4 0.856 359 0.096 452 0.095 280 0.513 360 0.412 453 0.398 281 0.208 360.9 0.891 453.2 0.912 282 0.115 361 0.445 454 0.503 …… …… 362 0.189 456 0.215 286 0.098 …… …… 457 0.112 287 0.387 385 0.203 …… …… 287.5 0.923 385.9 0.945 699 0.091 288 0.478 386 0.513 700 0.090 289 0.195 387 0.208 - - …… …… …… …… - -

[0048] The absorbance A is set reasonably based on empirical values. “…” indicates baseline noise data, and its absorbance A fluctuates randomly between 0.08 and 0.12.

[0049] Based on the first spectral data sequence, the wavelength 287.5 (i.e., the characteristic wavelength corresponding to wavelength number 2) in the first spectral data sequence is modified to 287.1 nm, while the other wavelengths remain unchanged, to form the second spectral data sequence; based on the first spectral data sequence, the wavelength 287.5 in the first spectral data sequence is modified to 286.3 nm, while the other wavelengths remain unchanged, to form the third spectral data sequence.

[0050] JJG 178-2007 Verification Procedure, Chapter 4, Metrological Performance Requirements, classifies instruments into four levels: I, II, III, and IV, based on their metrological performance. Chapter 4.1, Table 1, specifies the maximum permissible error requirements for wavelengths: For Level I instruments, the maximum permissible error threshold for wavelengths from 190nm to 340nm is ±0.3nm; for wavelengths from 340nm to 900nm, the maximum permissible error threshold is ±0.5nm. Chapter 4.2, Table 2, specifies the wavelength repeatability requirements: For Level I instruments, the repeatability threshold for wavelengths from 190nm to 340nm is ≤0.1nm; for wavelengths from 340nm to 900nm, the repeatability threshold is ≤0.2nm. Chapter 6.3.2.3 requires the following formula for calculating wavelength indication error: ,in, It is the average wavelength of three measurements, where λ is the standard wavelength value; Chapter 6.3.2.3 requires the calculation of the wavelength repeatability formula. ,in, and These are the maximum and minimum values ​​among the three measured wavelength values. In this embodiment, the average wavelength of the three measurements corresponding to the characteristic wavelength of 287.5nm (wavelength number 2) is: Wavelength indication error The wavelength repeatability σ of the characteristic wavelength corresponding to wavelength number 2 is 287.7nm - 286.3nm = 1.4nm, which exceeds the Class I instrument wavelength repeatability threshold of 0.1nm. Based on the above analysis, the expected results include: the wavelength indication error value of the characteristic wavelength 287.5nm should be 0.33. The wavelength repeatability value should not meet the requirements of Class I instruments for wavelength indication error. The wavelength repeatability value should be 1.4 nm.

[0051] Other levels of instruments can determine the expected results for wavelength indication error and wavelength repeatability using similar methods. For example, in Figure 4In the corresponding embodiment, a similar approach was used to determine the expected results of noise and drift for the Level II instrument.

[0052] 102. Input the first spectral data sequence, the second spectral data sequence, and the third spectral data sequence into the host computer in sequence, and obtain all characteristic peak information generated by the host computer.

[0053] The host computer should run peak-finding algorithms on the three spectral data sequences according to its own logic, select characteristic peaks, and calculate the peak wavelength of each characteristic peak. (i=1 to M, where M is the number of detected peaks), forming a set of characteristic peak information; at the same time, the wavelength indication error of each characteristic peak is calculated, and the calculated wavelength indication error value and its judgment result on the wavelength indication error are added to the corresponding characteristic peak information; the wavelength repeatability of each characteristic peak is also calculated, and the calculated wavelength repeatability value and its judgment result on the wavelength repeatability are added to the corresponding characteristic peak information.

[0054] 103. Evaluate the host computer's data processing capabilities for wavelength indication error and wavelength repeatability.

[0055] The host computer outputs all characteristic peak information and compares them one by one with the expected results. If a characteristic peak with a wavelength of 287.5 nm is present, and this characteristic peak contains wavelength indication error information with a value equal to 0.33 nm, and the judgment result for this wavelength indication error indicates that it does not meet the requirements for wavelength indication error of a Class I instrument, then the verification and debugging of the host computer's wavelength indication error data processing capability passes; otherwise, it fails. Following a similar method, the verification and debugging results of the host computer's wavelength repeatability data processing capability can be obtained.

[0056] Figure 3 A flowchart illustrating the anomaly handling capability and minimum signal-to-noise ratio condition for peak finding capability in host computer debugging, according to an embodiment of the present invention, is shown. Figure 3 As shown, it includes the following steps:

[0057] 201. Based on the first spectral data sequence, Gaussian white noise is superimposed, and the SNR of the superimposed signal reaches 20dB and 10dB respectively, thereby forming the fourth spectral data sequence and the fifth spectral data sequence respectively, and generating the desired results respectively.

[0058] Among them, the fourth spectral data sequence and its expected result and the fifth spectral data sequence and its expected result together form two pairs of verification and debugging data and expected results.

[0059] For an original signal sequence (i=1 to N, where N is the total number of signals), its average signal power is: The noise power is: The noise standard deviation is: Superimpose a normally distributed signal onto each signal. After obtaining a random number n, a signal sequence superimposed with Gaussian white noise can be obtained: To simplify the explanation, we take a set of (λ, A) points containing characteristic peaks from the first spectral data sequence as an example: [(286,0.098),(287,0.387),(287.5,0.923),(288,0.478),(289,0.195)] (in practice, all points in the first spectral data sequence should be used for calculation). Calculate the average power of absorbance A: Calculate the noise standard deviation at SNR=20dB: For each absorbance A in the set (λ, A), a pseudo-random number generation algorithm is used to generate numbers from a normal distribution. Independently draw a random number The absorbance can be obtained by superimposing the corresponding absorbance A: (i=1 to N, where N is the total number of data points), together with the corresponding wavelengths, form the fourth spectral data sequence, as shown in the table below.

[0060] 286 0.098 +0.012 0.110 287 0.387 -0.024 0.363 287.5 0.923 -0.018 0.905 288 0.478 +0.036 0.514 289 0.195 -0.009 0.186

[0061] As can be seen from the table above, when SNR=20dB, the peak position of absorbance A after superimposing Gaussian white noise remains basically unchanged, with only slight fluctuations in the peak value. Therefore, the desired result is all the characteristic peak information in the fourth spectral data sequence, and the host computer should be able to identify all the characteristic peaks.

[0062] Calculate the noise standard deviation at SNR=10dB: For each absorbance A in the set (λ, A), a pseudo-random number generation algorithm (such as the Mason twitch algorithm) is used to generate numbers from a normal distribution. Independently draw a random number The absorbance can be obtained by superimposing it with the corresponding absorbance A. Together with the corresponding wavelengths, they form the fifth spectral data sequence, as shown in the table below.

[0063] 286 0.098 -0.031 0.067 287 0.387 +0.105 0.492 287.5 0.923 -0.087 0.836 288 0.478 +0.142 0.620 289 0.195 0.063 0.258

[0064] As can be seen from the table above, when SNR=10dB, the peak shape of the absorbance A curve after superimposing Gaussian white noise is severely distorted, which may affect the accuracy of the peak finding algorithm. Therefore, the desired result is all the characteristic peak information in the fifth spectral data sequence, but the host computer may not be able to identify all the characteristic peaks.

[0065] 202. Input the fourth and fifth spectral data sequences into the host computer in sequence, and obtain all characteristic peak information generated by the host computer.

[0066] The host computer should run the peak finding algorithm on the fourth and fifth spectral data sequences respectively according to its own logic, select the characteristic peaks, and calculate the peak wavelength λi of each characteristic peak (i=1 to N, where N is the number of peaks detected), forming the characteristic peak information set of the fourth spectral data sequence and the characteristic peak information set of the fifth spectral data sequence.

[0067] 203. Evaluate the anomaly handling capability of the host computer in peak finding and the minimum signal-to-noise ratio condition for peak finding capability.

[0068] The characteristic peak information of the fourth and fifth spectral data sequences is compared with the corresponding expected results. If the characteristic peak information of the fourth spectral data sequence does not fully match the expected results, it indicates that the host computer has not passed the peak-finding anomaly processing capability debugging at SNR=20dB, and the host computer's peak-finding capability is insufficient. Otherwise, if the characteristic peak information of the fifth spectral data sequence does not fully match the expected results, it indicates that the host computer has passed the peak-finding anomaly processing capability debugging at SNR=20dB, but has not passed the peak-finding anomaly processing capability debugging at SNR=10dB. Therefore, it can be determined that the lowest signal-to-noise ratio condition for the host computer's peak-finding capability to be debugged is SNR=20dB.

[0069] Figure 4 A flowchart illustrating the data processing capabilities for debugging noise and drift in a host computer, according to an embodiment of the present invention, is shown. Figure 4 As shown, it includes the following steps:

[0070] 301. Based on the requirements for instrument scanning parameters and the calculation methods for noise and drift results in the verification procedure of JJG 178-2007, generate a data sequence of 0% transmittance, a data sequence of 100% transmittance, an air transmittance data sequence, and the expected results.

[0071] Among them, the 0% transmittance data sequence and its expected result, the 100% transmittance data sequence and its expected result, and the air transmittance data sequence and its expected result together constitute three pairs of calibration and debugging data and expected results.

[0072] In the JJG 178-2007 verification procedure, section 6.3.3 requires an instrument scanning parameter time interval of 1 second and a scanning time of 2 minutes. Based on this, a data sequence of 0% transmittance containing 120 transmittance values ​​is generated: [0.018%, ..., 0.048%, ..., 0.009%, ..., 0.033%], and a data sequence of 100% transmittance: [99.87%, ..., 100.14%, ..., 99.86%, ..., 100.00%]. According to the requirement of a 30-minute drift time for scanning, a data sequence of 1800 air transmittance values ​​is generated: [100.01%, ..., 100.38%, ..., 100.00%, ..., 100.25%]. For simplicity, only the first, last, maximum, and minimum transmittance values ​​are listed; the remaining transmittance values ​​are represented by "...". Section 4.3 Table 3 Instrument Noise and Drift Requirements For Class II instruments, the threshold for noise at 0% transmittance is ≤0.1; the threshold for noise at 100% transmittance is ≤0.2; the threshold for drift is ≤0.2; Section 6.3.3 Noise and Drift Requirements The calculation method for the results of 0% transmittance noise, 100% transmittance noise and drift includes the difference between the maximum and minimum transmittance.

[0073] In this embodiment, the noise value at 0% transmittance is 0.048% - 0.009% = 0.039, which is within the 0.1 noise threshold for Class II instruments; the noise value at 100% transmittance is 100.14% - 99.86% = 0.28, exceeding the 0.2 noise threshold for Class II instruments; and the drift value is 100.38% - 100.00% = 0.38, exceeding the 0.2 drift threshold for Class II instruments. Based on the above analysis, the expected results include: the noise value at 0% transmittance should be 0.039, which should meet the requirements for 0% transmittance noise for Class II instruments; the noise value at 100% transmittance should be 0.28, which should not meet the requirements for 100% transmittance noise for Class II instruments; and the drift value should be 0.38, which should not meet the requirements for drift for Class II instruments.

[0074] Other levels of instruments can be determined using similar methods to determine the expected results for 0% transmittance noise, 100% transmittance noise, and drift. For example, in... Figure 2 In the corresponding embodiment, a similar method was used to determine the expected results of wavelength indication error and wavelength repeatability for Class I instruments.

[0075] 302. Input the 0% transmittance data sequence, 100% transmittance data sequence, and air transmittance data sequence into the host computer in sequence, and obtain the noise and drift information generated by the host computer.

[0076] The host computer should, according to its own logic, calculate the 0% noise value based on the 0% transmittance data sequence, and form the 0% noise information based on its judgment result of the 0% noise value; it should also calculate the 100% noise value based on the 100% transmittance data sequence, and form the 100% noise value information based on its judgment result of the 100% noise value; and it should also calculate the drift value based on the air transmittance data sequence, and form the drift information based on its judgment result of the drift value.

[0077] 303. Evaluate the host computer's data processing capabilities for noise and drift.

[0078] The noise and drift information output by the host computer is compared with the expected results one by one. If any of the following does not meet the corresponding expected results: noise value at 0% transmittance, noise judgment result at 0% transmittance, noise value at 100% transmittance, noise judgment result at 100% transmittance, drift value, or drift value judgment result, the host computer's noise and drift data processing capability verification and debugging fails.

[0079] It should be understood that the execution order of each step in the above embodiments is not limited by the order of the reference numerals in the accompanying drawings. Any number of steps can be executed in parallel or in an interchangeable order. The execution order should be determined by function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0080] Figure 5 A schematic diagram of a device 500 for host computer debugging according to an embodiment of the present invention is shown. Figure 5 As shown, the device for debugging the host computer in this embodiment includes a calibration data generation unit 510, a robust data generation unit 520, a data transceiver unit 530, a data processing capability analysis unit 540, and an anomaly handling capability analysis unit 550.

[0081] The calibration data generation unit 510 is configured to generate at least one pair of calibration and debugging data and the expected calibration result, based on the data and result calculation methods required by the calibration items in the lower-level machine calibration procedure. The operation of the calibration data generation unit 510 can be referenced above. Figure 1 The operation described in step S1.

[0082] The robust data generation unit 520 is configured to superimpose signals of different anomaly intensities onto calibration and debugging data to generate at least one pair of robust debugging data and the expected calibration result. The operation of the robust data generation unit 520 can be referenced above. Figure 1 The operation described in step S2.

[0083] The data transceiver unit 530 is configured to send debugging data to the host computer and obtain the actual results generated after the host computer executes the verification and debugging data. The operation of the data transceiver unit 530 can be referenced above. Figure 1 The operation described in step S3.

[0084] The data processing capability analysis unit 540 is configured to determine that the verification and debugging has passed if each expected verification result matches the corresponding actual result; otherwise, it is determined that the verification and debugging has failed. The operation of the data processing capability analysis unit 540 can be referenced above. Figure 1 The operation described in step S4.

[0085] The anomaly handling capability analysis unit 550 is configured to determine the critical anomaly intensity signal in robust debugging data where the expected verification result matches the corresponding actual result, as the anomaly handling capability threshold for the host computer. The operation of the anomaly handling capability analysis unit 550 can be referenced above. Figure 1 The operation described in step S5.

[0086] Figure 6 A structural block diagram of a computing device 600 for host computer debugging according to an embodiment of the present invention is shown. Figure 6 As shown, computing device 600 may include at least one processor 610, memory 620, RAM 630, communication interface 640, and internal bus 650. The at least one processor 610 executes at least one computer-readable instruction (i.e., the elements implemented in software above) stored or encoded in a computer-readable storage medium (i.e., memory 620).

[0087] In one embodiment, the memory 620 stores computer-executable instructions that, when executed, cause at least one processor 610 to: generate at least one pair of calibration debugging data and calibration expected results according to the data and result calculation methods required by the calibration items in the lower-level machine calibration procedure; generate at least one pair of robust debugging data and calibration expected results by superimposing signals of different abnormal intensities on the calibration debugging data; send the debugging data to the upper-level machine and obtain the actual results generated by the upper-level machine after executing the debugging data; if each calibration expected result matches the corresponding actual result, the calibration debugging is deemed to have passed; otherwise, the calibration debugging is deemed to have failed; and determine the critical abnormal intensity signal in the robust debugging data that matches the calibration expected result and the corresponding actual result as the abnormality handling capability threshold of the upper-level machine.

[0088] It should be understood that the computer-executable instructions stored in memory 620, when executed, cause at least one processor 610 to perform the above-described combinations in the various embodiments disclosed herein. Figure 1-5 The description includes various operations and functions.

[0089] In this invention, the computing device 600 may include, but is not limited to: personal computer, server computer, workstation, desktop computer, laptop computer, notebook computer, mobile computing device, smartphone, tablet computer, cellular phone, personal digital assistant (PDA), handheld device, messaging device, wearable computing device, consumer electronic device, etc.

[0090] According to one embodiment, a program product, such as a non-transitory machine-readable medium, is provided. The non-transitory machine-readable medium may have instructions (i.e., the elements implemented in software as described above), which, when executed by a machine, cause the machine to perform the above-described combinations of the various embodiments disclosed herein. Figure 1-5 The description includes various operations and functions.

[0091] Specifically, a system or apparatus equipped with a readable storage medium may be provided, on which software program code implementing the functions of any of the embodiments described above is stored, and the computer or processor of the system or apparatus can read and execute the instructions stored in the readable storage medium.

[0092] In this case, the program code itself, which can be read from the readable medium, can perform the functions of any of the above embodiments. Therefore, the machine-readable code and the readable storage medium storing the machine-readable code constitute part of the present invention.

[0093] Examples of readable storage media include floppy disks, hard disks, magneto-optical disks, optical disks (such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), magnetic tapes, non-volatile memory cards, and ROMs. Alternatively, program code can be downloaded from a server computer or the cloud via a communication network.

[0094] Those skilled in the art will understand that the various embodiments disclosed above can be modified and varied without departing from the spirit of the invention. Therefore, the scope of protection of the present invention should be defined by the appended claims.

[0095] It should be noted that not all steps and units in the above process and system structure diagrams are mandatory; some steps or units can be omitted according to actual needs. The execution order of each step is not fixed and can be determined as needed. The device structure described in the above embodiments can be a physical structure or a logical structure; that is, some units may be implemented by the same physical entity, or some units may be implemented by multiple physical entities, or they may be jointly implemented by certain components in multiple independent devices.

[0096] In the above embodiments, the hardware units or modules can be implemented mechanically or electrically. For example, a hardware unit, module, or processor may include permanent dedicated circuitry or logic (such as a dedicated processor, FPGA, or ASIC) to perform the corresponding operations. The hardware unit or processor may also include programmable logic or circuitry (such as a general-purpose processor or other programmable processor), which can be temporarily configured by software to perform the corresponding operations. The specific implementation method (mechanical, dedicated permanent circuitry, or temporarily configured circuitry) can be determined based on cost and time considerations.

[0097] The specific embodiments described above with reference to the accompanying drawings are exemplary embodiments, but do not represent all embodiments that can be implemented or fall within the scope of the claims. The term "exemplary" as used throughout this specification means "serving as an example, instance, or illustration" and does not imply that it is "preferred" or "advantageous" compared to other embodiments. Specific details are included to provide an understanding of the described techniques. However, these techniques can be practiced without these specific details. In some instances, well-known structures and apparatuses are shown in block diagram form to avoid obscuring the concepts of the described embodiments.

[0098] The above description of the contents of this invention is provided to enable any person skilled in the art to implement or use the contents of this invention. Various modifications to the contents of this invention will be apparent to those skilled in the art, and the general principles defined herein can be applied to other variations without departing from the scope of protection of this invention. Therefore, the contents of this invention are not limited to the examples and designs described herein, but are consistent with the widest scope of the principles and novel features disclosed herein.

Claims

1. A method for debugging on a host computer, characterized in that, include: Based on the data and result calculation methods required by the verification items in the lower-level machine verification procedure, generate at least one pair of verification and debugging data and expected verification results; Send the verification and debugging data to the host computer and obtain the actual results generated by the host computer after executing the verification and debugging data; If each of the expected verification results matches the corresponding actual result, the verification and debugging are deemed to have passed; otherwise, the verification and debugging are deemed to have failed.

2. The method as described in claim 1, characterized in that, The method further includes: By superimposing signals of different abnormal intensities on the aforementioned calibration and debugging data, at least one pair of robust debugging data and the expected calibration result is generated. Send the robust debugging data to the host computer and obtain the actual results generated by the host computer after executing the robust debugging data; The critical anomaly intensity signal in the robust debugging data that matches the expected verification result with the corresponding actual result is determined as the anomaly handling capability threshold of the host computer.

3. The method as described in claim 2, characterized in that, The signals with different abnormal intensities include Gaussian white noise and signals with different signal-to-noise ratios.

4. The method according to any one of claims 1 to 3, characterized in that, The lower-level machine verification procedure includes the "Verification Procedure for Ultraviolet, Visible and Near-Infrared Spectrophotometers".

5. A device for debugging on a host computer, characterized in that, include: The verification data generation unit is configured to generate at least one pair of verification debugging data and verification expected results based on the data and result calculation methods required by the verification items in the lower-level machine verification procedure. The data transceiver unit is configured to: send the verification and debugging data to the host computer and obtain the actual results generated by the host computer after executing the verification and debugging data; The data processing capability analysis unit is configured to: if each of the expected verification results matches the corresponding actual result, then the verification and debugging is deemed to have passed; otherwise, the verification and debugging is deemed to have failed.

6. The apparatus as claimed in claim 5, characterized in that, The device further includes: The robust data generation unit is configured to superimpose signals of different abnormal intensities onto the calibration and debugging data to generate at least one pair of robust debugging data and the calibration expectation result; An anomaly handling capability analysis unit is configured to: determine the critical anomaly intensity signal in the robust debugging data that matches the expected verification result with the corresponding actual result as the anomaly handling capability threshold of the host computer. The data transceiver unit is configured to further include sending the robust debugging data to the host computer and obtaining the actual results generated by the host computer after executing the robust debugging data.

7. The apparatus as claimed in claim 6, characterized in that, The signals with different abnormal intensities are configured as Gaussian white noise with different signal-to-noise ratios.

8. The apparatus as claimed in any one of claims 5 to 7, characterized in that, The lower-level machine verification procedure is configured as: "Verification Procedure for Ultraviolet, Visible and Near-Infrared Spectrophotometers".

9. A computing device for debugging a host computer, characterized in that, It includes at least one processor and a memory storing instructions that, when executed by the at least one processor, cause the at least one processor to perform the method as described in any one of claims 1 to 4.

10. A non-transitory machine-readable storage medium for debugging on a host computer, characterized in that, The storage medium stores executable instructions that, when executed, cause the machine to perform the method as described in any one of claims 1 to 4.