Control methods for power circuits and related devices and computer-readable storage media

CN122740366APending Publication Date: 2026-09-11SHENZHEN LORENTZ TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202610794411.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-11-10
Filing Date
2026-06-03
Publication Date
2026-09-11

AI Technical Summary

Technical Problem

为解决相关技术的双控制结构对于输出电流控制精确度低的技术问题,本发明实施例提供一种功率电路的控制方法及其相关装置与计算机可读存储介质

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122740366A_ABST
    Figure CN122740366A_ABST
Patent Text Reader

Abstract

This invention relates to the field of power supply technology, and more particularly to a control method for a power circuit, related apparatus, and computer-readable storage medium. The control method for the power circuit includes: determining a first reference output based on output voltage sampling and a target voltage; determining a current-limiting reference output based on output current sampling and a target current; and determining a control signal based on the first reference output, the current-limiting reference output, and phase current sampling. Embodiments of this invention employ a two-stage, three-loop control structure, where the three loops simultaneously monitor the output voltage, output current, and phase current, enabling precise control of both current and voltage.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field] This invention relates to the field of power supply technology, and in particular to a control method for a power circuit, related devices, and a computer-readable storage medium. [Background Technology] Figure 1 A block diagram of a charge-discharge control system is shown. This system controls a battery charge-discharge circuit and employs a dual-loop control structure, including a voltage outer loop and an inductor current inner loop connected in series. The voltage outer loop regulates the output voltage, while the inductor current inner loop regulates the output current. However, since the inductor current and the output current are not directly equivalent, the control accuracy of the output current is low. [Summary of the Invention] To address the technical problem of low output current control accuracy in the dual-control structure of related technologies, embodiments of the present invention provide a power circuit control method, related devices, and a computer-readable storage medium.

[0004] The first aspect of this invention provides a control method for a power circuit, comprising: The first reference output is determined based on the output voltage sampling and the target voltage; The current-limiting reference output is determined based on the output current sampling and the target current. The control signal is determined based on the first reference output, the current-limiting reference output, and the phase current sampling.

[0005] A second aspect of the present invention provides a control method for a power circuit, comprising: The second reference output is determined based on the output current sampling and the target current; The voltage-limiting reference output is determined based on the output voltage sampling and the target voltage. The control signal is determined based on the second reference output, the voltage limiting reference output, and the phase current sampling.

[0006] A third aspect of the present invention provides a control system for a power circuit, comprising: The outer voltage loop is used to determine the first reference output based on the output voltage sample and the target voltage. A current-limiting loop, connected in parallel with the outer voltage loop, is used to determine the current-limiting reference output based on the output current sampling and the target current. The inner current loop, connected in series with the outer voltage loop, is used to determine the control signal based on the first reference output, the current-limiting reference output, and the phase current sampling.

[0007] A fourth aspect of the present invention provides a control system for a power circuit, comprising: The outer current loop is used to determine the second reference output based on the output current sampling and the target current. A voltage limiting loop, connected in parallel with the outer current loop, is used to determine the voltage limiting reference output based on the output voltage sampling and the target voltage. The inner current loop, connected in series with the outer output current loop, is used to determine the control signal based on the second reference output, the voltage limiting reference output, and the phase current sampling.

[0008] A fifth aspect of the present invention provides a power control device, including a control system and a power circuit, wherein the control system outputs a control signal to the power circuit, and the control system is used to execute the steps of the method described in the first or second aspect, or the control system described in the third or fourth aspect.

[0009] A sixth aspect of the present invention provides a computer device including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method described in the first aspect above.

[0010] A seventh aspect of the present invention provides a computer program product, including instructions, characterized in that, when executed by a processor, the instructions implement the steps of the method described in the first aspect above.

[0011] An eighth aspect of the present invention provides a computer storage medium including instructions that, when executed on a computer, cause the computer to perform the steps of the method described in the first aspect.

[0012] Compared to related technologies, the embodiments of the present invention use a two-level three-loop control structure. The three-loop structure simultaneously monitors the output voltage, output current and phase current, which can achieve precise control of current and voltage.

[0013] Furthermore, since the bandwidth of the outer loop must be significantly lower than that of the inner loop, a multi-level structure often results in slow dynamic response due to bandwidth limitations. However, the two-level three-loop control structure in this embodiment of the invention maintains a two-level control structure and has a fast response speed. [Attached Image Description] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 A block diagram of a charge-discharge control system based on related technologies is shown. Figure 2 A flowchart illustrating a power circuit control method provided in an embodiment of the present invention; Figure 3 A block diagram of a control system provided in an embodiment of the present invention; Figure 4 This is a circuit diagram of a three-phase interleaved parallel BUCK charging and discharging circuit provided in an embodiment of the present invention when the load is a battery; Figure 5 for Figure 4 The circuit shown is a current diagram of charging and discharging under the control of a control system. Figure 6 This is a circuit diagram of a three-phase interleaved parallel BUCK charging and discharging circuit with a resistive load, provided in an embodiment of the present invention. Figure 7 for Figure 6 The circuit shown is illustrated under the control of a control system. Figure 8 A flowchart illustrating another power circuit control method provided in an embodiment of the present invention; Figure 9 A block diagram of another control system provided in an embodiment of the present invention; Figure 10 for Figure 4 The circuit shown is a current diagram of charging and discharging under the control of another control system. Figure 11 for Figure 6 The circuit shown is a voltage and current diagram under the control of another control system.

Detailed Implementation Methods

[0016] This invention provides a power control device, which includes a power circuit and a control system. A power source is connected to the power circuit, and the control system outputs control signals to the power circuit to control the on / off state of the switching transistors in the power circuit, thereby controlling the power source to output a target voltage and a target current. The power source can be a battery, and the power circuit can be a charging circuit, a discharging circuit, or a charge / discharge circuit; specifically, it can be a BUCK_BOOST topology, a BUCK topology, or a BOOST topology.

[0017] For control methods used to execute power circuits, please refer to [link / reference]. Figure 2 This is a flowchart illustrating a power circuit control method provided in an embodiment of the present invention. The control method includes: 101. Determine the first reference output based on the output voltage sampling and the target voltage.

[0018] In this embodiment, the output voltage sampling is the voltage value obtained by sampling the output voltage of the power circuit, and the target voltage is the voltage that the power circuit expects to output. The target voltage is the adjustment target of the output voltage. The control system determines the first reference output based on the output voltage sampling and the target voltage, which is used to adjust the output voltage to the target voltage.

[0019] 102. Determine the current-limiting reference output based on the output current sampling and the target current.

[0020] In this embodiment, the output current is sampled to obtain the current value obtained by sampling the output current of the power circuit, and the target current is the current that the power circuit expects to output. Sampling the output current to determine the current-limiting reference output can prevent the output current of the power circuit from being too large.

[0021] In some embodiments, a current-limiting reference output is determined based on the output current sampling and a preset current-limiting value, including: Determine whether the output current sampling reaches the target current; If so, output the preset limit value as the current limiting reference output; If not, the current limiting reference output is zero.

[0022] It is understandable that the preset limit value is only output as the current limiting reference output when the output current sampling reaches the target current; otherwise, the current limiting reference output is zero. In essence, when the output current sampling does not reach the target current, the current limiting reference output is not output.

[0023] It is also understandable that the power circuit can be a battery charging and discharging circuit. When the charging current direction is defined as positive and the discharging current direction as negative, for the charging process, the target current is positive. When the output current sample is less than the target current, the current limiting reference output is zero. When the output current sample is not less than the target current, the current limiting reference output is a preset limit value. The upper limit of the preset limit value is zero, and the lower limit value can be the lower limit value of the first reference output. For the discharging process, the target current is negative. When the output current sample is greater than the target current, the current limiting reference output is zero. When the output current sample is not greater than the target current, the current limiting reference output is a preset limit value. The upper limit of the preset limit value can be the upper limit value of the first reference output, and the lower limit value is zero.

[0024] 103. Determine the control signal based on the first reference output, the current-limiting reference output, and the phase current sampling.

[0025] In this embodiment, the phase current sampling is the current value obtained by sampling each phase of the multi-phase power circuit. The control system can determine the control signal based on the first reference output, the current limiting reference output and the phase current sampling. At the same time, the output voltage sampling, phase current sampling and output current sampling are taken into account to achieve precise control of voltage and current.

[0026] The control signal is determined based on the first reference output, the current-limiting reference output, and the phase current sampling, specifically including: The first reference output is current-limited based on the current-limiting reference output to obtain the target phase current. The control signal is determined based on the phase current sampling and the target phase current.

[0027] Understandably, when the current-limiting reference output is zero, it's equivalent to not outputting a current-limiting reference output. The control system determines the control signal based on the first reference output and the phase current sampling, resulting in a fast dynamic response. When the current-limiting reference output is not zero, a difference algorithm can be used to pull down the first reference output using the current-limiting reference output to prevent excessive output current.

[0028] Please see Figure 3 This is a block diagram of a control system provided in an embodiment of the present invention. The control system includes a voltage outer loop 10, a current limiting loop 20, and a current inner loop 30. The current limiting loop 20 is connected in parallel with the voltage outer loop 10, and the current inner loop 30 is connected in series with the voltage outer loop 10. The voltage outer loop 10 is used to perform the above-mentioned step 101, the current limiting loop 20 is used to perform the above-mentioned step 102, and the current inner loop 30 is used to perform the above-mentioned step 103.

[0029] In a further embodiment, the current limiting loop 20 may also be configured with a charging current limiting loop 21 and a discharging current limiting loop 22 connected in parallel, which are used to limit the current during the charging process and the discharging process, respectively.

[0030] To illustrate the specific working principle of the control system, we will take the control system controlling a three-phase interleaved parallel BUCK charging and discharging circuit as an example for detailed explanation.

[0031] When the load of a three-phase interleaved parallel BUCK charging and discharging circuit is a battery, the circuit is as follows: Figure 4 As shown. The three-phase interleaved parallel BUCK charging and discharging circuit includes a power supply, filter capacitors, switching transistors, inductors, voltage sensors, and current sensors. The voltage sensors are used to sample the voltage at each sampling point, and the current sensors are used to sample the current at each sampling point. The switching transistors switch on and off in response to pulse signals (PWM signals). The load impedance r0 and the BUCK output capacitor C are the controlled objects Gvobj of the outer voltage loop 10, and the inductor and its internal resistance rL are the controlled objects Giobj of the inner current loop 30.

[0032] During charging, the outer voltage loop 10 determines the first reference output based on the output voltage sample Vout and the target voltage Vref. Specifically, it compares the output voltage sample Vout with the target voltage Vref and calculates the first reference output based on the difference using a PID algorithm. The charging current limiting loop 21 determines whether the output current sample Iout reaches the target current + Iref. If so, the preset limit value is output as the current limiting reference output. The upper limit value of the preset limit value is zero, and the lower limit value is -I_DN. The preset limit value can be output by the PID algorithm. The current inner loop 30 compares the first reference output with the preset limit value and pulls down the first reference output as the target phase current ILref of the current inner loop 30. The current inner loop 30 compares the target phase current ILref with the phase current sampling IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, input to the charging and discharging circuit, and controls the switching transistor to turn on and off. The three phase current sampling ILs are ILA, ILB and ILC, respectively. If not, the current limiting reference output is zero. The current inner loop 30 compares the first reference output with zero and outputs the first reference output as the target phase current ILref of the current inner loop 30. The current inner loop 30 compares the target phase current ILref with the phase current sample IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0033] During discharge, the outer voltage loop 10 determines the first reference output based on the output voltage sample Vin and the target voltage Vref. Specifically, it compares the output voltage sample Vin with the target voltage Vref and calculates the first reference output based on the difference using a PID algorithm. The discharge current limiting loop 22 determines whether the output current sample Iin reaches the target current - Iref. If so, a preset limit value is output as a current limiting reference output. The lower limit of the preset limit value is zero, and the upper limit value is I_UP. The preset limit value can be output through a PID algorithm. The inner current loop 30 compares the first reference output with the preset limit value and pulls down the first reference value as the target phase current ILref of the inner current loop 30. The inner current loop 30 compares the target phase current ILref with the phase current sample IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0034] If not, the current limiting reference output is zero. The current inner loop 30 compares the first reference output with zero and outputs the first reference output as the target phase current ILref of the current inner loop 30. The current inner loop 30 compares the target phase current ILref with the phase current sample IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0035] When charge / discharge control is performed with a target voltage of 60V and a target current of 120A, the charge / discharge current diagram is as follows: Figure 5 As shown, Figure 5 A represents the output current diagram. Figure 5B-5D shows the three-phase current diagram. It can be seen that the control system can achieve automatic charging and discharging control of the battery current, with the rising and falling edge switching time being less than 1ms.

[0036] When the load of a three-phase interleaved parallel BUCK charging and discharging circuit is a resistor, the circuit is as follows: Figure 6 As shown. The operation of the control system is the same as the charging process when the load is a battery, and will not be described again here. When the control is performed with a target voltage of 60V and a target current of 120A, the voltage and current diagram is as follows. Figure 7 As shown, Figure 7 A is the voltage diagram. Figure 7 B is the current graph, which shows that the voltage is stable at the set value of 60V, indicating a good constant voltage effect.

[0037] Compared to related technologies, this invention employs a two-stage, three-loop control structure. The outer voltage loop regulates the output voltage, the inner current loop regulates the phase current, and the current-limiting loop regulates the output current, enabling precise control of both current and voltage. The inner current loop is connected in series with the outer voltage loop, and the current-limiting loop is connected in parallel with the outer voltage loop, forming a two-stage structure with a fast dynamic response.

[0038] The current limiting loop is configured to limit the current only when the output current reaches the target current. The logic processing is simple and the voltage and current control has good stability.

[0039] In one embodiment, please refer to Figure 8 This is a flowchart illustrating another power circuit control method provided in an embodiment of the present invention. The control method includes: 201. Determine the second reference output based on the output current sampling and the target current.

[0040] In this embodiment, the output current sampling is the voltage value obtained by sampling the output current of the power circuit, and the target current is the current that the power circuit expects to output. The target current is the adjustment target of the output current. The control system determines the second reference output based on the output current sampling and the target current, which is used to adjust the output current to the target current.

[0041] 202. Determine the voltage limiting reference output based on the output voltage sampling and the target voltage.

[0042] In this embodiment, the output voltage is sampled to obtain the voltage value obtained from the output voltage of the power circuit, and the target voltage is the voltage that the power circuit expects to output. Sampling the output voltage to determine the voltage-limiting reference output can prevent the output voltage of the power circuit from being too high.

[0043] In some embodiments, a voltage-limiting reference output is determined based on the output voltage sample and the target voltage, including: Determine whether the output voltage sampling reaches the target voltage; If so, output the preset limit value as the voltage limiting reference output; If not, the voltage limit reference output is zero.

[0044] It is understandable that the preset limit value is only output as the voltage limit reference output when the output voltage sample reaches the target current; otherwise, the voltage limit reference output is zero. In essence, when the output voltage sample does not reach the target voltage, the voltage limit reference output is not output.

[0045] It is also understandable that the power circuit can be a battery charging and discharging circuit. When the charging current direction is defined as positive and the discharging current direction as negative, for the charging process, the target voltage is positive. When the output voltage sample is less than the target voltage, the current limiting reference output is zero. When the output voltage sample is equal to the target voltage, the current limiting reference output is a preset limit value, which can be the lower limit value of the second reference output. For the discharging process, the target voltage is negative. When the output voltage sample is greater than the target voltage, the voltage limiting reference output is zero. When the output voltage sample is equal to the target voltage, the voltage limiting reference output is a preset limit value, which can be the upper limit value of the second reference output.

[0046] It is also understandable that the battery charging circuit is a bidirectional circuit, with the charging process and the discharging process in opposite directions. As a result, its output side will change accordingly, and the sampling positions of the output voltage sampling and output current sampling will also change accordingly.

[0047] 203. Determine the control signal based on the second reference output, the voltage limit reference output, and the phase current sampling.

[0048] In this embodiment, the phase current sampling is the current value obtained by sampling each phase of the multi-phase power circuit. The control system can determine the control signal based on the second reference output, the voltage limit reference output and the phase current sampling. At the same time, the output voltage sampling, phase current sampling and output current sampling are taken into account to achieve precise control of voltage and current.

[0049] The control signal is determined based on the second reference output, the voltage limiting reference output, and the phase current sampling, specifically including: The second reference output is voltage-limited based on the voltage-limiting reference output to obtain the target phase current; The control signal is determined based on the phase current sampling and the target phase current.

[0050] Understandably, when the voltage limiting reference output is zero, it's equivalent to not outputting a voltage limiting reference output. The control system determines the control signal based on the second reference output and the phase current sampling, resulting in a fast dynamic response. When the voltage limiting reference output is not zero, a differential algorithm can be used to pull down the first reference output using the current limiting reference output to prevent excessive output voltage.

[0051] Please see Figure 9The following is a block diagram of another control system provided in an embodiment of the present invention. The control system includes an outer current loop 40, a voltage limiting loop 50, and an inner current loop 60. The voltage limiting loop 50 is connected in parallel with the outer current loop 40, and the inner current loop 60 is connected in series with the outer current loop 40. The outer current loop 40 is used to perform the above step 201, the voltage limiting loop 50 is used to perform the above step 202, and the inner current loop 60 is used to perform the above step 203.

[0052] In a further embodiment, the voltage limiting loop 50 may also be configured with a charging voltage limiting loop 51 and a discharging voltage limiting loop 52 connected in parallel, which are used to perform current limiting control on the charging process and the discharging process, respectively.

[0053] To illustrate the specific working principle of the control system, we will take the control of a three-phase interleaved parallel BUCK charging and discharging circuit as an example. The load impedance r0 and the BUCK output capacitor C are the controlled objects Gvobj in the outer current loop 40, and the inductor and its internal resistance rL are the controlled objects Giobj in the inner current loop 60.

[0054] When the load of a three-phase interleaved parallel BUCK charging and discharging circuit is a battery, the circuit is as follows: Figure 4 As shown. During charging, the outer current loop 40 determines the second reference output based on the output current sample Iout and the target current Iref. Specifically, it compares the output current sample Iout and the target current Iref, and calculates the second reference output based on the difference using a PID algorithm. The charging voltage limiting loop 51 determines whether the output voltage sample Vout has reached the target voltage Vref_Up. If so, the preset limit value is output as the voltage limiting reference output. The upper limit value of the preset limit value is zero, and the lower limit value is -U_DN. The preset limit value can be output by the PID algorithm. The current inner loop 60 compares the second reference output with the preset limit value and pulls down the second reference output as the target phase current ILref of the current inner loop 60. The current inner loop 60 compares the target phase current ILref with the phase current sampling IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, input to the charging and discharging circuit, and controls the switching transistor to turn on and off. The three phase current sampling ILs are ILA, ILB and ILC, respectively. If not, the voltage limiting reference output is zero, the current inner loop 60 compares the second reference output with zero, and outputs the second reference output as the target phase current ILref of the current inner loop 60. The current inner loop 30 compares the target phase current ILref with the phase current sample IL, and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0055] During discharge, the outer current loop 40 determines the second reference output based on the output current sample Iin and the target current Iref. Specifically, it compares the output current sample Iin with the target current Iref and calculates the second reference output based on the difference using a PID algorithm. The discharge voltage limiting loop 22 determines whether the output voltage sample Vin has reached the target voltage Vref_Dn. If so, a preset limit value is output as a voltage limiting reference output. The lower limit of the preset limit value is zero, and the upper limit value is U_UP. The preset limit value can be output through a PID algorithm. The inner current loop 60 compares the second reference output with the preset limit value and pulls down the second reference output as the target phase current ILref of the inner current loop 60. The inner current loop 60 compares the target phase current ILref with the phase current sample IL and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0056] If not, the voltage limiting reference output is zero, the current inner loop 60 compares the second reference output with zero, and outputs the second reference output as the target phase current ILref of the current inner loop 60. The current inner loop 30 compares the target phase current ILref with the phase current sample IL, and outputs a control signal based on the difference. This control signal is input to the PWM controller to modulate the PWM signal, which is then input to the charging and discharging circuit to control the switching transistor's on and off states.

[0057] When charge / discharge control is performed with a target voltage of 60V and a target current of 120A, the charge / discharge current diagram is as follows: Figure 10 As shown, Figure 10 A represents the output current diagram. Figure 10 B-10D is a three-phase current diagram.

[0058] When the load of a three-phase interleaved parallel BUCK charging and discharging circuit is a resistor, the circuit is as follows: Figure 6 As shown. The operation of the control system is the same as the charging process when the load is a battery, and will not be described again here. When the control is performed with a target voltage of 60V and a target current of 120A, the voltage and current diagram is as follows. Figure 11 As shown, Figure 11 A is the voltage diagram. Figure 11 B is the current diagram.

[0059] It is understood that those skilled in the art can choose existing control algorithms such as PID, PI, or PD algorithms according to actual needs, and there is no specific limitation here.

[0060] Compared to related technologies, this invention employs a two-stage, three-loop control structure. The outer current loop regulates the output current, the inner current loop regulates the phase current, and the voltage limiting loop regulates the output voltage, enabling precise control of both current and voltage. The inner and outer current loops are connected in series, while the voltage limiting loop is connected in parallel, forming a two-stage structure with a fast dynamic response.

[0061] The voltage limiting loop is configured to limit current only when the output voltage reaches the target voltage. The logic processing is simple and the voltage and current control stability is excellent.

[0062] This invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method described in the first aspect above.

[0063] This invention also provides a computer program or a computer program product including a computer program, the computer program comprising instructions that, when executed on a computer, will cause the computer to implement the method flow related to the control system in any of the above method embodiments. Correspondingly, the computer can be the aforementioned control system.

[0064] This invention also provides a computer-readable storage medium storing a computer program that, when executed by a computer, implements the method flow related to the control system in any of the above method embodiments. Correspondingly, the computer can be the aforementioned control system.

[0065] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A control method for a power circuit, characterized in that, include: The first reference output is determined based on the output voltage sampling and the target voltage; The current-limiting reference output is determined based on the output current sampling and the target current. The control signal is determined based on the first reference output, the current-limiting reference output, and the phase current sampling.

2. The method according to claim 1, characterized in that, The step of determining the current-limiting reference output based on the output current sampling and the target current includes: Determine whether the output current sampling reaches the target current; If so, then output the preset limit value as the current limiting reference output; If not, the current limiting reference output is zero.

3. The method according to claim 2, characterized in that, The control signal is determined based on the first reference output, the current-limiting reference output, and the phase current sampling, including: The first reference output is current-limited based on the current-limiting reference output to obtain the target phase current; The control signal is determined based on the phase current sampling and the target phase current.

4. A control method for a power circuit, characterized in that, include: The second reference output is determined based on the output current sampling and the target current; The voltage-limiting reference output is determined based on the output voltage sampling and the target voltage. The control signal is determined based on the second reference output, the voltage limiting reference output, and the phase current sampling.

5. The method according to claim 4, characterized in that, The step of determining the voltage-limiting reference output based on the output voltage sampling and the target voltage includes: Determine whether the output voltage sample has reached the target voltage; If so, then the preset limit value is output as the voltage limiting reference output; If not, the voltage limiting reference output is zero.

6. The method according to claim 5, characterized in that, The control signal is determined based on the second reference output, the voltage limiting reference output, and the phase current sampling, including: The second reference output is voltage-limited based on the voltage-limiting reference output to obtain the target phase current; The control signal is determined based on the phase current sampling and the target phase current.

7. A control system for a power circuit, characterized in that, include: The outer voltage loop is used to determine the first reference output based on the output voltage sample and the target voltage. A current-limiting loop, connected in parallel with the outer voltage loop, is used to determine the current-limiting reference output based on the output current sampling and the target current. The inner current loop, connected in series with the outer voltage loop, is used to determine the control signal based on the first reference output, the current-limiting reference output, and the phase current sampling.

8. A control system for a power circuit, characterized in that, include: The outer current loop is used to determine the second reference output based on the output current sampling and the target current. A voltage limiting loop, connected in parallel with the outer current loop, is used to determine the voltage limiting reference output based on the output voltage sampling and the target voltage. The inner current loop, connected in series with the outer output current loop, is used to determine the control signal based on the second reference output, the voltage limiting reference output, and the phase current sampling.

9. A power control device, comprising a control system and a power circuit, wherein the control system outputs a control signal to the power circuit, characterized in that, The control system is used to perform the steps of the method according to any one of claims 1-6, or the control system according to any one of claims 7-8.

10. A computer-readable storage medium having instructions stored thereon, characterized in that, When executed by the processor, this instruction implements the steps of the method described in any one of claims 1-6.