A method for preparing a stable NiSi(Pt) interface layer for a Schottky diode

Abstract

This invention relates to a method for preparing a stable NiSi(Pt) interface layer for Schottky diodes. A non-stoichiometric SiOx layer is constructed on the surface of a Si substrate via thermal oxidation, and a NiPt alloy thin film is deposited on its surface. Subsequently, a two-step heat treatment is performed, causing the Ni in the NiPt to react locally with the excess Si in the SiOx at the interface. The resulting high-valence stable SiOx layer, along with the Pt atoms segregated at the grain boundaries, acts as a diffusion barrier and grain boundary pinning agent, thereby limiting further reaction and abnormal growth of the NiSi(Pt) interface layer. The key feature of this invention is that by constructing a non-stoichiometric SiOx layer, the interface diffusion and silanization reaction pathways during the heat treatment process are controlled, allowing the NiSi interface layer to form at the NiPt / SiOx interface, thereby suppressing excessive diffusion and interface instability, and improving forward conduction capability while maintaining the device barrier height.

Description

Technical Field

[0001] This invention relates to a method for preparing a stable NiSi(Pt) interface layer for Schottky diodes. The method involves constructing a non-stoichiometric SiOx layer on a Si substrate surface via thermal oxidation and then controlling the NiPt / SiOx interface through a two-step heat treatment process to form a stable NiSi(Pt) interface layer. Background Technology

[0002] Schottky diodes are majority carrier devices that utilize the contact barrier between a metal and a semiconductor to achieve rectification. They are widely used in modern communications, microwave circuits, ultra-high-speed devices, and high-speed integrated circuits. Nickel / silicon (Ni / Si) Schottky diodes typically employ low-temperature rapid annealing to form the NiSi interface layer. However, the formation of the NiSi interface layer is highly dependent on the annealing process parameters and the initial interface state, and is prone to problems such as excessive Ni diffusion, NiSi layer clustering, and uneven reaction, leading to highly fluctuating Schottky barriers, decreased rectification performance, and reduced device reliability. Some Schottky structures pre-fabricate a SiO2 layer on the Si substrate surface to limit Ni diffusion and improve device stability, but the SiO2 layer weakens the device's forward conduction capability and reduces rectification efficiency. Therefore, how to construct a stable and controllable metal-silicide interface layer without sacrificing device performance is a key problem that urgently needs to be solved to improve the performance of silicon-based Schottky devices. Summary of the Invention

[0003] The purpose of this invention is to provide a method for preparing a stable NiSi(Pt) interface layer for Schottky diodes, so as to solve the problems that easily occur in the existing interface layer preparation process, such as excessive growth of silicide, uneven interface reaction, uncontrolled metal diffusion, and degradation of electrical performance.

[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows: The non-stoichiometric SiOx layer is formed by a low-temperature thermal oxidation method. Specifically, the cleaned Si wafer is placed in a tube furnace and subjected to low-temperature oxidation treatment in an O2 / N2 mixed atmosphere. The oxidation temperature is 300–500 °C, the oxidation time is 10–60 min, the O2 volume fraction is 10–30%, and the remainder is N2 or Ar protective gas. The thickness of the SiOx layer is 5–15 nm (preferably 5–10 nm, more preferably 5–8 nm), and the atomic percentage of Si in the SiOx layer is 50–90 at.% (preferably 60–80 at.%, more preferably 70–80 at.%).

[0005] The thickness of the NiPt alloy film is 7–35 nm (preferably 10–30 nm, more preferably 10–20 nm), and the thickness of the SiOx layer is 5–15 nm.

[0006] The NiPt alloy film contains 5–60 wt.% Pt (preferably 20–60 wt.%, more preferably 40–60 wt.%), and the SiOx layer contains 50–90 at.% Si.

[0007] The two-step heat treatment includes a first-step low-temperature annealing and a second-step high-temperature annealing. The first-step low-temperature annealing is performed at a temperature of 250–350 °C for 30–60 min, which is used to promote the interface activation and preliminary silicide reaction between the NiPt alloy film and the SiOx layer. The second-step high-temperature annealing is performed at a temperature of 450–550 °C for 5–30 min, which is used to form a uniform and stable NiSi(Pt) nickel silicide interface layer.

[0008] The stable NiSi(Pt) interface layer is a Pt-containing NiSi nickel silicide located between the NiPt alloy film and the SiOx layer. Pt exists primarily in atomic form and is segregated at the grain boundaries of the NiSi nickel silicide. During heat treatment, Ni in the NiPt alloy film undergoes a localized interfacial reaction with Si in the SiOx layer, forming a NiSi(Pt) interface layer with a thickness of 0.5–5 nm. After two heat treatment steps, the valence state of Si in the SiOx layer increases and tends to a stable oxidation state. This high-valence, stable SiOx layer restricts further diffusion of Ni atoms into the Si substrate, acting as a diffusion barrier between the NiSi(Pt) interface layer and the Si substrate. Simultaneously, Pt atoms segregate at the grain boundaries of NiSi(Pt), providing pinning and stabilization to the NiSi(Pt) layer. The synergistic effect of the stabilized SiOx layer and the Pt atom pinning effect enables the NiSi(Pt) interface layer to form at the NiPt / SiOx interface, thereby suppressing the excessive diffusion and abnormal growth of the NiSi(Pt) interface layer and improving the interface stability.

[0009] The stable NiSi(Pt) interface layer can reduce the resistivity of the Schottky contact structure to 10–40 μΩ·cm, which is 20–40% lower than that of the Schottky contact structure before annealing. At the same time, the interface layer can maintain a Schottky barrier height of 0.50–0.70 eV, making the resulting structure suitable for fabricating Schottky diode devices with rectification characteristics.

[0010] The present invention is characterized by: by constructing a non-stoichiometric SiOx layer to regulate the interfacial diffusion and silicide reaction path during the heat treatment process, the NiSi interface layer is formed at the NiPt / SiOx interface, thereby suppressing excessive diffusion and interfacial instability, and improving forward conduction capability while maintaining the device barrier height. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the heat treatment process of the present invention.

[0012] Figure 2 X-ray photoelectron spectra of Si 2p with Schottky contact structure before and after annealing.

[0013] Figure 3 Transmission electron microscope (TEM) images of the Schottky contact structure before and after annealing.

[0014] Figure 4 Transmission electron microscopy (TEM) image of the NiSi(Pt) interface layer.

[0015] Figure 5 The graph shows the resistivity test results of the Schottky contact structure before and after heat treatment.

[0016] Figure 6 This is a transmission electron microscope (TEM) image of the Ni / NiSi / Si Schottky contact structure after annealing. Detailed Implementation

[0017] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0018] Example 1 A method for fabricating a stable NiSi(Pt) interface layer for Schottky diodes includes the following steps: 1) A non-stoichiometric SiOx layer is constructed on the surface of a Si substrate by thermal oxidation; The non-stoichiometric SiOx layer can be formed by a low-temperature thermal oxidation method. Specifically, a 6-inch Si wafer with a diameter of 152.4 mm and a thickness of 675 μm is placed in a tube furnace and subjected to low-temperature oxidation treatment in a mixed atmosphere of O2 and N2. The oxidation temperature is 400 °C, the oxidation time is 30 min, and the volume fraction of O2 in the mixed atmosphere is 20%. The thickness of the SiOx layer is 8 nm, and the atomic percentage of Si in the SiOx layer is 80 at.%. 2) Deposit a NiPt alloy thin film on the surface of the SiOx layer; The deposition method for NiPt alloy thin films is as follows: DC magnetron sputtering is performed using a NiPt alloy target. Before magnetron sputtering, the bulk vacuum pressure of the vacuum chamber is pre-pumped to 2 × 10⁻⁶. -3The sputtering pressure was maintained at 1 Pa by introducing 99.999% pure argon gas, and the substrate rotation speed was controlled at 10 r / min for 5 min of pre-sputtering. Subsequently, the sputtering power was controlled at 100 W, and sputtering deposition was performed at a substrate temperature of 100 °C for 1 min.

[0019] The thickness of the NiPt alloy film is 10 nm; the mass percentage of Pt in the NiPt alloy film is 60 wt.%. 3) Perform two-step heat treatment on the original structure to cause the Ni in the NiPt alloy film and the Si in the SiOx layer to undergo interfacial local reaction, forming a stable NiSi(Pt) nickel silicide interface layer between the NiPt alloy film and the SiOx layer.

[0020] The two-step heat treatment includes a first-step low-temperature annealing and a second-step high-temperature annealing; the first-step low-temperature annealing is performed at a temperature of 300 °C for 30 min, and is used for interface activation and preliminary silanization; the second-step high-temperature annealing is performed at a temperature of 500 °C for 10 min, and is used to form a stable NiSi(Pt) interface layer.

[0021] The stable NiSi(Pt) interface layer is a Pt-containing NiSi nickel silicide located between the NiPt alloy film and the SiOx layer; wherein, Pt mainly exists in atomic form and is segregated at the grain boundaries of the NiSi nickel silicide. During the heat treatment process, Ni in the NiPt alloy thin film and Si in the SiOx layer undergo a localized interfacial reaction to form a NiSi(Pt) interfacial layer with a thickness of 2nm. After two heat treatments, the valence state of Si in the SiOx layer increases and tends to a stable oxidation state. This high-valence, stable SiOx layer restricts further diffusion of Ni atoms into the Si substrate, acting as a diffusion barrier between the NiSi(Pt) interface layer and the Si substrate. Simultaneously, Pt atoms segregate at the grain boundaries of NiSi(Pt), pinning and stabilizing the NiSi(Pt) layer. The synergistic effect of the stabilized SiOx layer and the Pt atom pinning effect allows the NiSi(Pt) interface layer to form at the NiPt / SiOx interface, thereby suppressing excessive diffusion and abnormal growth of the NiSi(Pt) interface layer and improving interface stability.

[0022] like Figure 1As shown, this embodiment employs a two-step heat treatment method to control the interfacial reaction process between the NiPt alloy film and the SiOx / Si substrate. The first step is a low-temperature annealing stage, with an annealing temperature of 250–350 °C and an annealing time of 30–60 min, used to promote the interface activation and preliminary silanization between the NiPt alloy film and the non-stoichiometric SiOx layer; the second step is a high-temperature annealing stage, with an annealing temperature of 450–550 °C and an annealing time of 5–30 min, used to further promote the localized interfacial reaction between Ni and Si in the SiOx layer, and to form a NiSi(Pt) interface layer.

[0023] Figure 2 The images show the X-ray photoelectron spectra of Si 2p in the example before and after annealing. Figure 2 As shown, compared with the sample before annealing (the sample obtained in step 2), after two-step heat treatment, both the Si–Si peak and the Si–O peak in the Si 2p spectrum shifted significantly towards higher binding energies. This result indicates that the local chemical environment of Si changed during the heat treatment process, with the valence state of Si in the SiOx layer increasing and the Si–O component tending towards a more stable oxidation state. Simultaneously, the change in the binding energy of the Si–Si peak also indicates a change in the electronic structure and band structure at the interface, and the occurrence of a silanization reaction. These changes suggest that the two-step heat treatment not only induces a local silanization reaction between NiPt and SiOx, but also promotes the stabilization of the SiOx layer, thereby helping to limit further diffusion and abnormal growth of the NiSi(Pt) interface layer.

[0024] like Figure 3 As shown, the interface morphology of the embodiment changes significantly before annealing (sample obtained in step 2) and after annealing (sample obtained in step 3). Figure 3 (a) is a transmission electron microscope (TEM) image of the original state of the sample obtained in step 2 before annealing, where the bottom is a single-crystal Si substrate, the middle is a non-stoichiometric amorphous SiOx layer, and the surface is a NiPt alloy film composed of columnar crystals and extremely small nanocrystals. Before annealing, the interface between the NiPt alloy film and the SiOx layer is relatively clear, and no obvious metal silicide interface layer has been observed. Figure 3 (b) is a transmission electron microscope (TEM) image of the example after two-step heat treatment (sample obtained in step 3). Compared with the sample obtained before annealing (sample obtained in step 2), a continuous nanoscale interface layer appears between the NiPt alloy film and the SiOx layer. This interface layer is a NiSi(Pt) metal interface layer formed after the Ni in the NiPt alloy film and the Si in the SiOx layer undergo a localized interfacial reaction during the heat treatment. This NiSi(Pt) interface layer is located between the NiPt alloy film and the SiOx layer, while the SiOx layer remains between the NiSi(Pt) interface layer and the Si substrate, indicating that the two-step heat treatment did not cause large-scale diffusion or deep silicideding of Ni into the Si substrate.

[0025] Figure 4 This is a transmission electron microscope (TEM) image of the NiSi(Pt) interface layer. Figure 4 As shown, after two heat treatments (the sample obtained in step 3), a NiSi(Pt) interface layer with a thickness of approximately 2 nm was formed between the NiPt alloy film and the high-valence SiOx layer. This interface layer exhibits obvious crystallization characteristics and can be identified as a Pt-containing NiSi metal silicide phase. Further observation reveals that the grains within the NiSi(Pt) interface layer exhibit certain faceted features, indicating that the two heat treatments promoted local silicide reaction at the interface. After the reaction, the SiOx layer transforms into a high-valence stable oxide layer, which can further inhibit the deep diffusion of Ni and prevent the NiSi(Pt) layer from continuing to grow towards the Si substrate, ensuring that the formed NiSi(Pt) layer grows near the NiPt / SiOx interface. In addition, Pt is enriched and distributed at the grain boundaries of NiSi(Pt), which can act as a pinning agent for the grain boundaries and interface regions of NiSi(Pt).

[0026] like Figure 5 As shown, the resistance of the sample in the example was tested using a four-probe resistance testing method, and the resistivity measurement range was 10. -7 ~10 2 The probe diameter is 0.5 mm, the spacing is 1 ± 0.01 mm, and the inter-probe insulation resistance is not less than 1000 MΩ. The results show that after two-step heat treatment, the resistivity of the original structure interface is significantly reduced after reconstruction. The resistivity of the Schottky contact structure before annealing is approximately 33.5 μΩ·cm, which is reduced to 22.2 μΩ·cm after annealing at 300 ℃ for 30 min + 500 ℃ for 10 min. This result indicates that the NiSi(Pt) interface layer induced by the two-step heat treatment is beneficial to reducing the resistivity of the Schottky contact structure, thereby improving the forward conduction capability of the Schottky diode device. Simultaneously, the structure maintains a suitable Schottky barrier height after heat treatment; calculated based on the ideal Schottky contact model, the barrier height is 0.570 eV. This indicates that the preparation method of the present invention reduces the resistivity of the stacked structure without destroying the barrier regulation function of the Schottky contact. Instead, it achieves synergistic regulation of conductivity and rectification characteristics through the synergistic effect of stabilizing the SiOx layer and pinning the Pt element.

[0027] Example 2 A method for preparing a stable NiSi(Pt) interface layer for Schottky diodes, the process and conditions of which are the same as in Example 1, except that: Step 1) The low-temperature thermal oxidation temperature is 350 °C, the oxidation time is 40 min, the O2 volume fraction is 10%, and the thickness of the resulting non-stoichiometric SiOx layer is approximately 10 nm, with an atomic percentage of Si of 90 at.% in the SiOx layer. Step 2) The deposition time is 3.5 min, the NiPt alloy film thickness is 30 nm, and the Pt mass percentage is approximately 20 wt.%. Step 3) The two-step heat treatment regime is annealing at 325 ℃ for 45 min and then annealing at 525 ℃ for 20 min.

[0028] After the above process, a stable NiSi(Pt) interface layer can also be formed between the NiPt alloy film and the SiOx layer. Pt shows a certain tendency to segregate near the NiSi grain boundary. Compared with the sample obtained in step 2), the resistivity of the Schottky contact structure before annealing was 37.4 μΩ·cm, which decreased to 25.6 μΩ·cm after annealing and the barrier height was 0.552eV.

[0029] Example 3 A method for preparing a stable NiSi(Pt) interface layer for Schottky diodes, the process and conditions of which are the same as in Example 1, except that: Step 1) The low-temperature thermal oxidation temperature is 300 °C, the oxidation time is 60 min, the O2 volume fraction is 30%, and the thickness of the resulting non-stoichiometric SiOx layer is approximately 15 nm, with an atomic percentage of Si of 70 at.% in the SiOx layer. Step 2) The deposition time is 5 min, the NiPt alloy film thickness is approximately 35 nm, and the Pt mass percentage is approximately 5 wt.%. Step 3) The two-step heat treatment regime is annealing at 350 ℃ for 60 min and then annealing at 550 ℃ for 30 min.

[0030] After the above process, a stable NiSi(Pt) interface layer can also be formed between the NiPt alloy film and the SiOx layer. Pt is weakly enriched locally near the NiSi grain boundary. Compared with the sample obtained in step 2), the resistivity of the Schottky contact structure before annealing was 39.2 μΩ·cm, which decreased to 27.7 μΩ·cm after annealing and the barrier height was 0.531 eV.

[0031] Comparative Example 1 This comparative example uses a pure Ni thin film as the metal layer and does not pre-fabricate a non-stoichiometric SiOx layer on the Si substrate surface. Specifically, a Ni thin film with a thickness of 10 nm is directly deposited on the Si substrate surface by DC magnetron sputtering, followed by the same two-step heat treatment process as in Example 1, namely, annealing at 300 °C for 30 min and then annealing at 500 °C for 10 min.

[0032] After the above heat treatment, due to the lack of the non-stoichiometric SiOx layer's control over the Ni diffusion path and the pinning and stabilizing effect of Pt on the NiSi grain boundaries, Ni diffuses significantly towards the Si substrate during the heat treatment process. The silanization reaction at the interface is difficult to control, resulting in clustering and uneven growth of the formed NiSi region. The NiSi layer thickness increases to 5-20 nm and is discontinuously distributed along the interface, causing undulations and localized coarsening of the originally flat Si substrate interface. Figure 6 As shown in the figure. The four-probe resistivity test results indicate that the resistivity of the sample after heat treatment in Comparative Example 1 significantly increased to 58.7 μΩ·cm, with an error of 30 μΩ·cm. Simultaneously, due to the uneven Ni diffusion and silicide reaction, the potential barrier distribution of the obtained Schottky contact was unstable, resulting in fluctuations in rectification characteristics and a decrease in device reliability. This comparative example illustrates that simply using a pure Ni thin film and reacting it directly with a Si substrate is insufficient to obtain a stable, low-resistance, and controllable NiSi(Pt) interface layer.

[0033] Comparative Example 2 The process and conditions were the same as in Example 1, except that: this comparative example used a NiPt alloy thin film as the metal layer, with a film thickness of 10 nm and a Pt mass percentage of approximately 60 wt.%, but a thicker SiOx layer was formed on the Si substrate surface through a high-temperature over-oxidation process. Specifically, the Si substrate was placed in a tube furnace for high-temperature thermal oxidation treatment at a temperature of 600 °C for more than 60 min, with an O2 volume fraction of 50% in the mixed atmosphere. The resulting SiOx layer had a thickness of 30 nm and an atomic percentage of Si of 50 at.%. Subsequently, a NiPt alloy film was deposited on the surface of the SiOx layer, and the same two-step heat treatment process as in Example 1 was adopted, namely, annealing at 300 °C for 30 min and then annealing at 500 °C for 10 min.

[0034] After the aforementioned heat treatment, due to the excessive thickness and high degree of oxidation of the SiOx layer, it exerts an excessively strong barrier to the diffusion of Ni atoms towards the Si substrate. This makes it difficult for the Ni in the NiPt alloy film to undergo an effective interfacial reaction with the Si in the SiOx layer or the Si substrate, thus failing to form a distinct NiSi(Pt) interface layer. This comparative example illustrates that while an excessively thick and highly oxidized SiOx layer can enhance the diffusion barrier effect, it also inhibits the occurrence of local silanization reactions, preventing the formation of a stable NiSi(Pt) interface layer and hindering the acquisition of a Schottky contact structure that combines low resistance and suitable barrier modulation capabilities.

[0035] Comparative Example 3 The process and conditions were the same as in Example 1, except that the comparative example used the same SiOx layer construction parameters and NiPt alloy thin film deposition parameters as in Example 1. The difference was that the heat treatment process was changed from two-step heat treatment to one-step high-temperature annealing. Specifically, a non-stoichiometric SiOx layer was constructed on the surface of a Si substrate, and after depositing a NiPt alloy thin film on its surface, the resulting sample was directly annealed at 550 °C for 60 min.

[0036] After the aforementioned high-temperature annealing step, the NiSi(Pt) region formed between the NiPt alloy film and the SiOx layer exhibits clustering and uneven growth. The NiSi layer thickness increases to 3-10 nm and is discontinuously distributed along the interface. Simultaneously, some Ni atoms penetrate the SiOx layer and react with the Si substrate during the prolonged high-temperature annealing process, causing silicides to continue growing towards the Si substrate and interface migration. Four-probe resistivity measurements show that the resistivity of the sample in Comparative Example 3 spiked to 103.2 μΩ·cm after heat treatment and essentially lost its rectifying capability. This comparative example demonstrates that single-step, prolonged high-temperature annealing leads to uncontrolled interfacial reactions, causing NiSi(Pt) region clustering, uneven growth, and even Ni penetration of the SiOx layer and reaction with the Si substrate, making it difficult to obtain a stable and uniform NiSi(Pt) interface layer.

Claims

1. A method for preparing a stable NiSi(Pt) interface layer for Schottky diodes, characterized in that, Includes the following steps: 1) A non-stoichiometric SiOx layer is constructed on the surface of a Si substrate by thermal oxidation; 2) Deposit a NiPt alloy thin film on the surface of the SiOx layer; 3) Perform a two-step heat treatment on the original structure obtained in step 2) to form an interface layer between the NiPt alloy film and the SiOx layer.

2. The preparation method according to claim 1, characterized in that: The thickness of the SiOx layer is 5–15 nm (preferably 5–10 nm, more preferably 5–8 nm), and the atomic percentage of Si in the SiOx layer is 50–90 at.% (preferably 60–80 at.%, more preferably 70–80 at.%).

3. The preparation method according to claim 1 or 2, characterized in that: The non-stoichiometric SiOx layer can be formed by a low-temperature thermal oxidation method. Specifically, the Si wafer is placed in a tube furnace and subjected to low-temperature oxidation treatment in a mixed atmosphere of O2 and inert protective gas. The oxidation temperature is 300–500 °C (preferably 350–500 °C, more preferably 400–500 °C), the oxidation time is 10–60 min (preferably 10–40 min, more preferably 10–30 min), the volume fraction of O2 in the mixed atmosphere is 10–30% (preferably 10–25%, more preferably 10–20%), and the remainder is inert protective gas N2 or Ar.

4. The preparation method according to claim 1, characterized in that: The thickness of the NiPt alloy film is 7–35 nm (preferably 10–30 nm, more preferably 10–20 nm). The mass percentage of Pt in the NiPt alloy film is 5–60 wt.% (preferably 20–60 wt.%, more preferably 40–60 wt.%).

5. The preparation method according to claim 1, characterized in that: The deposition method for NiPt alloy thin films is as follows: DC magnetron sputtering is performed using a NiPt alloy target; specifically, before magnetron sputtering, the bulk vacuum pressure of the vacuum chamber is pre-pumped to less than or equal to 2 × 10⁻⁶. -3 Pa, and argon gas with a purity of 99.999% is introduced to maintain the sputtering pressure at 1-2 Pa, the substrate rotation speed is controlled at 10-30 r / min, and pre-sputtering is performed for 2-10 min; then the sputtering power is controlled at 60-150 W, and sputtering deposition is performed at a substrate temperature of room temperature to 100 ℃, with deposition times of 1-5 min (preferably 1-4 min, more preferably 1-2 min).

6. The preparation method according to claim 1, characterized in that: The two-step heat treatment includes a first-step low-temperature annealing and a second-step high-temperature annealing. The first-step low-temperature annealing temperature is 250–350 ℃ (preferably 250–325 ℃, more preferably 250–300 ℃), and the annealing time is 30–60 min (preferably 30–50 min, more preferably 30–40 min), used for interface activation and preliminary silicide formation. The second-step high-temperature annealing temperature is 450–550 ℃ (preferably 450–525 ℃, more preferably 450–500 ℃), and the annealing time is 5–30 min (preferably 5–20 min, more preferably 5–10 min). The two-step heat treatment causes the Ni in the NiPt alloy film to undergo a localized interfacial reaction with the Si in the SiOx layer, forming a stable NiSi(Pt) nickel silicide interface layer between the NiPt alloy film and the SiOx layer.

7. The preparation method according to claim 1, characterized in that: The stable NiSi(Pt) interface layer is a Pt-containing NiSi nickel silicide located between the NiPt alloy film and the SiOx layer; wherein, Pt mainly exists in atomic form and is segregated at the grain boundaries of the NiSi nickel silicide; during the heat treatment process, Ni in the NiPt alloy film and Si in the SiOx layer undergo a localized interfacial reaction to form a NiSi(Pt) interface layer with a thickness of 0.5–5 nm. After two heat treatments, the valence state of Si in the SiOx layer increases and tends to a stable oxidation state. This high-valence, stable SiOx layer restricts further diffusion of Ni atoms into the Si substrate, acting as a diffusion barrier between the NiSi(Pt) interface layer and the Si substrate. Simultaneously, Pt atoms segregate at the grain boundaries of NiSi(Pt), pinning and stabilizing the NiSi(Pt) layer. The synergistic effect of the stabilized SiOx layer and the Pt atom pinning effect allows the NiSi(Pt) interface layer to form at the NiPt / SiOx interface, thereby suppressing excessive diffusion and abnormal growth of the NiSi(Pt) interface layer and improving interface stability.

8. A stable NiSi(Pt) interface layer for Schottky diodes prepared by the preparation method according to any one of claims 1-7.

9. The stable NiSi(Pt) interface layer for Schottky diodes according to claim 8, characterized in that: The stable NiSi(Pt) interface layer can reduce the resistivity of the Schottky contact structure to 10–30 μΩ·cm, which is 20–40% lower than that of the Schottky contact structure before annealing. At the same time, the interface layer can maintain a Schottky barrier height of 0.50–0.70 eV, making the resulting structure suitable for fabricating Schottky diode devices with rectification characteristics.

10. The application of a stable NiSi(Pt) interface layer structure as described in any one of claims 8-9 in the fabrication of a Schottky diode device with rectifying characteristics.

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