A control method and apparatus for a production system

Abstract

Provided are a control method and device for a production system. The method comprises obtaining current processing state information of an article to be processed, information of the production system, and attribute information of the article to be processed; simulating a processing process of the article to be processed based on the current processing state information of the article to be processed, the information of the production system, and the attribute information of the article to be processed, to obtain a simulation result; determining a production index based on the simulation result, the production index comprising at least a default index; determining a production scheme for the article to be processed based on the production index; and controlling the production system to process the article to be processed based on the production scheme. The application simulates and deduces the processing condition of the production system at a future time, analyzes the default index, and determines the production scheme according to the default index, thereby avoiding the production system from violating the production constraint condition in the actual production process and improving the production yield of the production system.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, and in particular to a control method and apparatus for a production system. Background Technology

[0002] In actual manufacturing, production lines impose various constraints on product processing, such as order timeout constraints and allowable time constraints in chip production. If a production line violates these constraints during production, it can lead to adverse effects such as order timeouts and reduced product yield. Therefore, controlling the production line to avoid violating these constraints is a pressing issue that needs to be addressed. Summary of the Invention

[0003] The embodiments of this application provide a control method and apparatus for a production system, which can effectively prevent the production system from violating production constraints during the actual production process and improve the production yield of the production system.

[0004] Firstly, this application provides a control method for a production system. The method includes acquiring current processing status information of an item to be processed, information about the production system, and attribute information of the item to be processed; simulating the processing of the item to be processed based on the current processing status information, production system information, and attribute information, obtaining simulation results indicating the processing status of the item to be processed by the production system over a future period; determining production indicators based on the simulation results, including at least default indicators indicating violations of production constraints by the item to be processed during the production process; determining a production plan for the item to be processed based on the production indicators; and controlling the production system to process the item to be processed based on the production plan.

[0005] This application simulates and extrapolates the processing status of the production system at future moments and analyzes its default indicators. Based on the default indicators, a production plan is determined, thereby avoiding violations of production constraints in the actual production process and improving the production yield of the production system.

[0006] In one possible implementation, the item to be processed is a wafer set, and the production system includes several machines; the current processing status information includes at least one or more of the following: the current processing step of the wafer set, the current machine of the wafer set, the processing time of the wafer set in the current step, and the remaining allowable time of the wafer set; the information of the production system includes at least one or more of the following: the process parameters supported by each machine, the capacity of each machine, and the downtime schedule of each machine; the attribute information of the wafer set includes at least one or more of the following: the process flow information of the wafer set, the process requirements information of the wafer set in each processing step, the allowable time information of the wafer set, and the allowable time cycle of the wafer set.

[0007] In another possible implementation, the processing of the workpiece is simulated based on the current processing status information, production system information, and attribute information of the workpiece to be processed. A specific implementation of obtaining the simulation results is as follows: the current processing status information, production system information, and attribute information of the workpiece to be processed are used as inputs to the chip manufacturing simulation engine, and the simulation results are output.

[0008] In other words, this application has specifically designed a chip manufacturing simulation engine. The simulation engine simulates the future processing of each wafer group on the chip production line, accurately predicts the processing of each wafer group in the future, and ensures the accuracy of subsequent steps, such as the accuracy of production indicators and the accuracy of the production plan determined based on the production indicators.

[0009] In another possible implementation, the chip manufacturing simulation engine should support at least one of the following: wafer group-level path width check, dynamic update of machine status, real-time calculation of capacity of each chamber in the machine, calculation of multiple processing time types, separate start-up of each chamber in the machine, multiple chamber collaborative working modes, viewing of available time windows and maintenance time windows of the machine, loading port logic of the machine, multiple aging logics, and furnace grouping logic.

[0010] In this possible implementation, the chip manufacturing simulation engine supports various manufacturing characteristics, improving the accuracy of the simulation and thus ensuring the accuracy of the analyzed manufacturing indicators, which is beneficial to the accuracy of the production plan determined based on the manufacturing indicators.

[0011] In another possible implementation, the chip manufacturing simulation engine integrates the scheduling mechanism of wafer sets and equipment to ensure that the simulation process of the chip manufacturing simulation engine restores the logic of the physical system and provides accurate capacity information for each time period.

[0012] In another possible implementation, the chip manufacturing simulation engine determines the production decisions during the wafer set processing simulation based on a decision algorithm in the decision center. The decision algorithm is used to uniformly manage the wafer set queues at each processing step and to make unified decisions on the production of each wafer set at each processing step.

[0013] In this possible implementation, a decision center manages the simulation process through unified queue management and decision-making, thereby optimizing the local wafer group queue distribution logic, reducing the risk of violating allowable time limits, and improving simulation accuracy.

[0014] In another possible implementation, the decision-making algorithm includes a wafer set and machine matching algorithm, which allocates machines to each wafer set at each processing step based on global information, including the current processing status information of each processing step, the current capacity of each machine, and the current status information of each machine.

[0015] In this way, the matching algorithm between wafer sets and equipment in the decision center is based on global information to match wafer sets and equipment, that is, to allocate equipment to wafer sets based on global information, thereby improving the accuracy of matching wafer sets and equipment and reducing the risk of violating allowable time limits.

[0016] In another possible implementation, the simulation results are also visualized to obtain visualization results, which include at least: a visualization page of the processing status of the wafer group at each time slice during the processing and a visualization page of the status of the machine tool at each time slice during the processing.

[0017] By visualizing the simulation results, users can observe the processing status of wafer groups at any given time slice, as well as the status of the equipment, which is highly interpretable.

[0018] In another possible implementation, based on the simulation results, a specific implementation of determining production indicators is as follows: analyzing the simulation logs to obtain production indicators, which include at least a tolerance time violation indicator, indicating the wafer assembly's violation of tolerance time during processing.

[0019] The simulation log records the production process of each wafer group during the simulation. By analyzing it, it is easy to find out the violation of the allowable time of the wafer group. For example, the allowable time for wafer group 1 from processing step 1 to processing step 5 is 10 hours, but the simulation log records that the processing time for wafer group 1 from processing step 1 to processing step 5 is 11 hours. Therefore, wafer group 1 has violated the allowable time once.

[0020] In another possible implementation, the production plan for the items to be processed includes the wafer set distribution plan; a specific implementation of determining the production plan for the items to be processed based on production indicators is: determining the wafer set distribution plan based on allowable time violation indicators.

[0021] By using the allowable time violation index, the wafer set distribution plan is dynamically adjusted to achieve precise dynamic scheduling and distribution at the wafer set level.

[0022] In another possible implementation, production metrics also include resource utilization of each machine and at least one of the processing parameters of the wafer set. A specific implementation of determining the wafer set deployment scheme based on the allowable time violation metric is as follows: Adjust the wafer set deployment scheme based on resource utilization of each machine and at least one of the processing parameters of the wafer set; simulate the adjusted wafer set deployment scheme to obtain the allowable time violation metric corresponding to the adjusted wafer set deployment scheme; and determine the wafer set deployment scheme based on a comparison of the allowable time violation metric corresponding to the wafer set deployment scheme before and after the adjustment.

[0023] It should be noted that the resource utilization rate of each machine refers to the resource utilization rate of each machine in the entire simulated production process, while the wafer assembly processing process refers to information such as the waiting time and processing time of the wafer assembly at each step in the simulated production process.

[0024] In this possible implementation, the wafer set deployment scheme is continuously optimized through ongoing scheme evaluation and production processes, thereby improving the utilization rate of machine resources while ensuring compliance with allowable time constraints.

[0025] In another possible implementation, a specific implementation of controlling the production system to process and produce the items to be processed based on the production plan is as follows: receiving a confirmation instruction for the distribution plan of the wafer set; and distributing the wafer set based on the distribution plan of the wafer set.

[0026] In this possible implementation, the iteratively optimized distribution plan is manually reviewed and confirmed before being distributed, further ensuring the accuracy of the wafer set's distribution plan.

[0027] In this possible implementation, the production plan for the items to be processed also includes a machine maintenance plan, which indicates the maintenance time for each machine. A specific implementation of determining the production plan for the items to be processed based on production indicators is to determine the machine maintenance plan based on allowable time violation indicators. In other words, this application can also utilize the analysis results of simulations to optimize the machine maintenance plan and further improve production efficiency.

[0028] Secondly, this application also provides a control device for a production system. The device includes an acquisition module, a simulation module, a first determination module, a second determination module, and a control module. The acquisition module acquires current processing status information of the work-in-process, information about the production system, and attribute information of the work-in-process. The simulation module simulates the processing of the work-in-process based on the current processing status information, information about the production system, and attribute information of the work-in-process, obtaining simulation results indicating the processing status of the work-in-process in the production system over a future period. The first determination module determines production indicators based on the simulation results. These production indicators include at least default indicators, which indicate instances where the work-in-process violates production constraints during processing in the production system. The second determination module determines a production plan for the work-in-process based on the production indicators. The control module controls the production system to process the work-in-process based on the production plan.

[0029] In one possible implementation, the item to be processed is a wafer set, and the production system includes several machines; the current processing status information includes at least one or more of the following: the current processing step of the wafer set, the current machine of the wafer set, the processing time of the wafer set in the current step, and the remaining allowable time of the wafer set; the information of the production system includes at least one or more of the following: the process parameters supported by each machine, the capacity of each machine, and the downtime schedule of each machine; the attribute information of the wafer set includes at least one or more of the following: the process flow information of the wafer set, the process requirements information of the wafer set in each processing step, the allowable time information of the wafer set, and the allowable time cycle of the wafer set.

[0030] In another possible implementation, the simulation module is specifically used to: take the current processing status information of the workpiece to be processed, the information of the production system, and the attribute information of the workpiece to be processed as inputs to the chip production simulation engine, and output simulation results.

[0031] In another possible implementation, the chip manufacturing simulation engine supports at least one of the following: wafer group-level path width check, dynamic update of machine status, real-time calculation of capacity of each chamber in the machine, separate start-up of each chamber in the machine, calculation of multiple processing time types, multiple chamber collaborative working modes, viewing of available time windows and maintenance time windows of the machine, loading port logic of the machine, multiple aging logics, and furnace grouping logic.

[0032] In another possible implementation, the chip manufacturing simulation engine integrates the scheduling mechanism for wafer sets and equipment.

[0033] In another possible implementation, the chip manufacturing simulation engine determines the production decisions during the wafer set processing simulation based on a decision algorithm in the decision center. The decision algorithm is used to uniformly manage the wafer set queues at each processing step and to make unified decisions on the production of each wafer set at each processing step.

[0034] In another possible implementation, the decision-making algorithm includes a wafer set and machine matching algorithm, which allocates machines to each wafer set at each processing step based on global information, including the current processing status information of each processing step, the current capacity of each machine, and the current status information of each machine.

[0035] In another possible implementation, the control device of the production system provided in this application further includes a visualization module, which is used to visualize the simulation results to obtain visualization results. The visualization results include at least: a visualization page of the processing status of the wafer group at each time slice during the processing and a visualization page of the status of the machine tool at each time slice during the processing.

[0036] In another possible implementation, the first determining module is specifically used to: analyze the simulation logs to obtain production indicators, which include at least a tolerance time violation indicator, which indicates the wafer assembly's violation of the tolerance time during processing.

[0037] In another possible implementation, the production plan for the items to be processed includes a wafer set distribution plan; the second determining module is specifically used to: determine the wafer set distribution plan based on the allowable time violation index.

[0038] In another possible implementation, production metrics also include resource utilization of each machine and at least one of the processing parameters of the wafer set. A specific implementation of determining the wafer set deployment scheme based on the allowable time violation metric is as follows: Adjust the wafer set deployment scheme based on resource utilization of each machine and at least one of the processing parameters of the wafer set; simulate the adjusted wafer set deployment scheme to obtain the allowable time violation metric corresponding to the adjusted wafer set deployment scheme; and determine the wafer set deployment scheme based on a comparison of the allowable time violation metric corresponding to the wafer set deployment scheme before and after the adjustment.

[0039] In another possible implementation, the control module is specifically used to: receive a confirmation instruction for the distribution plan of the wafer group; and distribute the wafer group based on the distribution plan of the wafer group.

[0040] In this possible implementation, the production plan for the items to be processed also includes a machine maintenance plan, which indicates the maintenance time for each machine. The second determining module is specifically used to determine the machine maintenance plan based on the allowable time violation index. In other words, this application can also utilize the analysis results of simulation results to optimize the machine maintenance plan and further improve production efficiency.

[0041] Thirdly, embodiments of this application provide a computing device, including a memory and a processor, wherein the memory stores instructions that, when executed by the processor, cause the method described in the first aspect or any possible implementation of the first aspect to be implemented.

[0042] Fourthly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, causes the method described in the first aspect or any possible implementation thereof to be implemented.

[0043] Fifthly, embodiments of this application also provide a computer program or computer program product, which includes instructions that, when executed, cause a computer to perform the method described in the first aspect or any possible implementation thereof.

[0044] In a sixth aspect, embodiments of this application also provide a chip including at least one processor and a communication interface, the processor being configured to perform the method described in the first aspect or any possible implementation thereof.

[0045] It is understandable that the beneficial effects of the second to sixth aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here for the sake of brevity. Attached Figure Description

[0046] Figure 1 A schematic diagram of a Q-time loop is shown;

[0047] Figure 2 A schematic diagram of a simulation scenario provided for an embodiment of this application;

[0048] Figure 3 A schematic diagram illustrating the operation process of the lot restored by the chip manufacturing simulation engine provided in this application embodiment;

[0049] Figure 4 An architecture diagram of the chip manufacturing simulation engine provided in an embodiment of this application is shown;

[0050] Figure 5 A schematic diagram of the implementation architecture of the macroscopic simulation optimization algorithm large loop algorithm provided in the embodiments of this application is shown;

[0051] Figure 6 A schematic diagram of the dynamic scheduling process at the lot level provided in an embodiment of this application is shown;

[0052] Figure 7 A schematic diagram illustrating the implementation architecture of the control method for the production system provided in this application embodiment;

[0053] Figure 8 A schematic diagram of a Q-time Control simulation scenario provided in an embodiment of this application is shown;

[0054] Figure 9a and Figure 9b A schematic diagram of the input page of software implemented using the control method of the production system provided in this application is shown;

[0055] Figure 10 A schematic diagram showing the output page of the chip manufacturing simulation engine provided in this application is illustrated.

[0056] Figure 11 A schematic diagram of the implementation architecture of a control method for a production system provided in another embodiment of this application is shown;

[0057] Figure 12 A flowchart illustrating a control method for a production system provided in an embodiment of this application;

[0058] Figure 13 A schematic diagram of the structure of a control device for a production system provided in an embodiment of this application;

[0059] Figure 14 A schematic diagram of the structure of a computing device provided in an embodiment of this application. Detailed Implementation

[0060] The term "and / or" used in this article describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. The symbol " / " in this article indicates that the related objects are in an "or" relationship; for example, A / B means A or B.

[0061] The terms "first" and "second," etc., used in the specification and claims herein are used to distinguish different objects, not to describe a specific order of objects. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same properties in the description of embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such processes, methods, systems, products, or apparatus.

[0062] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0063] In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more, for example, multiple processing units means two or more processing units, multiple elements means two or more elements, etc.

[0064] The control method and apparatus for the production system provided in this application can be applied to the production control of any production line that requires control of production constraints, especially to the production control of chip manufacturing. This reduces the occurrence of violations of allowable time constraints during chip manufacturing and improves chip manufacturing yield. The specific implementation of the control method and apparatus for the production system provided in this application is described below using the control of a chip manufacturing system as an example. Control schemes for other types of production systems are similar and can be implemented by reference; for simplicity, they will not be elaborated further.

[0065] To facilitate understanding of the control method and apparatus for the production system provided in the embodiments of this application, some technical terms involved in the embodiments of this application will be briefly explained below.

[0066] Lot: refers to a certain number of wafers to be processed. Wafers enter the machine in the form of Lot for processing and are the smallest unit of dispatch.

[0067] Dispatching: refers to controlling the pace at which wafer assemblies enter the processing system according to certain rules, so as to avoid the system being too busy or too idle.

[0068] Processing Step: A processing step in the wafer fabrication process.

[0069] Flow or Process Plan: refers to the combination of processing steps for a certain type of product. A wafer assembly needs to go through each processing step in the Flow sequentially to transform from work-in-process to finished product.

[0070] Machine tool: Equipment used to process wafer sets in different processing steps.

[0071] Chamber: A type of machine has multiple chambers, which can process multiple wafer sets simultaneously.

[0072] Machine binding: Lot specifies a particular machine for processing at a certain processing step.

[0073] Runpath check: This refers to the process by which a Lot selects the machines for a processing step based on the process requirements and its own attributes when the Lot passes through the processing step. This includes checking the available time window of the machine, checking the process supported by the machine, and checking the occupancy status of the main machine and its chambers.

[0074] Process parameters (recipe): refers to a series of process parameters during the manufacturing process, including the machine tools / chambers required in the manufacturing process and the corresponding processing efficiency.

[0075] Seasoning: Under certain circumstances, the seasoning process of the machine / chamber may be triggered. For example, when the equipment is idle for a period of time, or when the recipe is changed, it is necessary to perform operations such as removing impurities and stabilizing the performance of the machine / chamber.

[0076] Loadport: refers to the interface or port used to transfer wafers between the equipment and the external environment.

[0077] Batching: refers to the process of grouping multiple lots into a batch and processing multiple lots synchronously in batches.

[0078] Q-time: The shortest / longest time a wafer can stay within a specific process interval.

[0079] Allowable time loop (Q-time Loop or Loop): The interval consisting of a series of processing steps subject to allowable time constraints.

[0080] In chip manufacturing, wafers are processed in the form of lots, passing through each step in the flow to which the lot belongs. After a lot reaches a step, the path width of all machines associated with that step needs to be checked to select the machines that are actually available for that lot. Then, through certain decision rules, a specific machine (or several chambers of a specific machine) is selected for processing.

[0081] Due to limited machine resources, queuing may occur during the production process. To avoid the impact of excessive queuing time on chip yield, a minimum / maximum Q-time is specified for the wafer to remain within a certain processing step range. For example... Figure 1 In Flow 3 (i.e. Process Plan 3), Q-time loops 1-5 require that processing steps 1 to 5 must be completed within a specific time frame; otherwise, the wafer may be over-oxidized or even scrapped due to excessive queuing time.

[0082] Q-time control aims to ensure, through various intervention methods, that the processing of all lots within the system meets all Q-time constraints.

[0083] Q-time control presents the following challenges:

[0084] Challenge 1: Complex relationships between multiple Q-times

[0085] In real-world production environments, a large number of Q-times are configured, and there may be continuous loops between each Q-time loop (e.g., ...). Figure 1 Flow 1 includes Loops 2-5 and Loops 5-7, and nesting (e.g.) Figure 1 In Flow 1, Loops 1-4 and 2-3 crossover ( Figure 1 The relationships between Loops 1-4 and Loops 2-5 in Flow 1 are illustrated. The presence of a large number of complex and diverse loops increases the difficulty of Q-time control. Among these, the interleaved Q-time loop is the most difficult type to control.

[0086] Challenge 2: Sharing machine capacity and controlling Q-time while maximizing capacity.

[0087] There may be situations where machines are shared between different flows and different processing steps, such as... Figure 1 In this scenario, step 4 of flow 1 shares a machine with step 2 of flow 2 and step 3 of flow 3. Therefore, the workload of different processing steps within or between flows can be transferred to other flows / processing steps via the shared machine. For example, when controlling the lot dispatching for loops 2-5 in flow 1, it is necessary to consider the work-in-process inventory in both flow 2 and flow 3, as well as the capacity of the shared machine, to avoid violating Q-time constraints.

[0088] How to rationally allocate the release of Q-time Loops with shared machines, ensuring that Q-time constraints are not violated, while maximizing machine turnaround (UT) and load balancing to maximize the overall capacity of the factory, is a major challenge in Q-time control.

[0089] Challenge 3: Large data volume, complex system with rapid state changes, making decision-making difficult.

[0090] Chip production flows are typically very long (a single flow may contain thousands of processing steps). Due to the large number of machines and lots, the complex relationships between Q-times, and the dynamic sharing of machines, when a new lot needs to be added to a flow for production, it may cause a chain reaction, leading to the risk that lots in the existing system may violate Q-time constraints.

[0091] The above risks are difficult to assess manually because:

[0092] 1. There are too many processing steps, machines, and lots, and their status is changing in real time, making it difficult to monitor the production status of each lot.

[0093] 2. When Lot goes through each processing step, it needs to go through complex algorithm calculations to determine its processing sequence and the machine used, which is difficult to reason manually.

[0094] 3. The decision-making cycle is too short, making it impossible to make an accurate assessment in a short time, and even more difficult to make a decision to issue lots.

[0095] To address the aforementioned issues, relevant technologies typically employ a "water level method" to control the distribution of lots within the Q-time loop.

[0096] Based on historical experience, the water level method summarizes a reasonable number of lots within each Q-time loop as the water level threshold (Max wafer count). If the number of lots in a Q-time loop exceeds this threshold, no new lots can be assigned to the loop. Taking Table 1 as an example, the water level threshold for the Step 0100-0400 interval is 300, so the number of wafers in this interval needs to be strictly controlled to not exceed 300. Simultaneously, this interval also involves nested loops 0200-0300 and cross loops 0200-0500, so the water level thresholds for both loops must be met during lot assignment.

[0097]

[0098]

[0099] Table 1 Water Level Method

[0100] When dispatching work at the Q-time start step, the Dispatching Rule checks whether the Lot in the From Step to To Step has exceeded the Max Wafer Count. If it has, dispatching work from the Q-time start step is stopped.

[0101] The water level threshold capacity for each step within a certain loop interval in the water level method. k It can be calculated in the following way:

[0102] capacity k =ω k *Qtime*WPH k *p

[0103] Where ω k This represents the proportion of Q-time allocated to step k within the Q-time loop interval (e.g., for a loop of length 10 steps, if each step equally shares a Q-time limit of 1000 minutes, then ω for each step...). k =100 minutes), can be expressed as the percentage of wafers produced per hour (WPH) by the machine group or the percentage of cycle time, then ω k *Qtime represents the total Q-time that this step can consume; p represents the percentage of human productivity allocated to this Q-time loop, so WPH k *p represents the capacity of the machines available for this step. After calculating the maximum capacity of each step within the Q-time Loop, it is necessary to count how many Lots (WIPs) are waiting to be processed at each station in each step's machine group. Furthermore, for each step of the Q-time Loop, it is determined whether the current WIP has exceeded its capacity. If any step exceeds its capacity, the starting station of that Q-time Loop stops releasing goods.

[0104] However, the water level method used in these technologies has the following problems:

[0105] 1. Highly reliant on historical experience, with poor interpretability.

[0106] In the formula for calculating the maximum wafer count for each interval, ω k The determination of the p-value is highly dependent on historical experience, has poor interpretability, and is difficult to prove its rationality.

[0107] 2. Excessive manual intervention necessitates manual assessment of on-site production conditions and timely adjustment of water levels.

[0108] Because the daily production volume of lot products, the number of available devices, and the level of activity all vary, the fixed ω k The p-value is not suitable for daily production requirements and needs to be manually adjusted according to the on-site production situation.

[0109] 3. The granularity of the lot was not considered, and the differences in lot processing steps and processing priorities were ignored.

[0110] The water level method uses the number of lots for work assignment control, ignoring the differences between lots. Consider the following two extreme cases:

[0111] a) The wafer count within the loop has not exceeded the water level threshold, but since the current lot being processed requires a longer processing time compared to historical lots, there is a risk of violating the Q-time constraint.

[0112] b) The wafer count in the loop has exceeded the water level threshold, but since the current lot being processed requires a shorter processing time compared to historical lots, there is a waste of machine resources.

[0113] 4. The water level method is a static water level control method, which cannot be dynamically adjusted according to the status of the machines in the system, resulting in:

[0114] a) Insufficient accuracy, posing a risk of violating Q-time constraints.

[0115] by Figure 1 Taking the Q-time loop in flow 1 as an example, assume that the water level threshold for loops 1-4 in flow 1 is 300 wafers, and the water level threshold for loops 1-3 in flow 2 and loops 2-4 in flow 3 is 100 wafers each. Also assume that the wafer count in both flow 2 and flow 3 is currently 100. Since flow 2 and flow 3 are running at full load, if flow 1 is also running at full load, or if there are special lots with processing times significantly higher than historical data, it is still possible that the corresponding shared machines will experience severe queuing, leading to a significant risk of Q-time constraint violations in all three flow lots.

[0116] b) Sacrificing efficiency for safety results in low machine utilization.

[0117] To avoid the situation mentioned in a), and to ensure production safety under extreme conditions, a conservative water level is adopted in actual production, which may affect the utilization rate of the machine.

[0118] In view of this, this application proposes a control method and apparatus for a production system. First, simulation is performed based on the current processing status information of the lot, the information of the chip production system, and the attribute information of the lot to deduce the processing process of each lot in the future period and analyze the indicators of its violation of Q-time constraints. Then, a lot deployment scheme is given according to the indicators of the violation of Q-time constraints to realize the scheduling and deployment at the lot level, avoid the lot from violating Q-time constraints, and improve the yield of chip production.

[0119] The control method and apparatus for the optical production system provided in this application are described in detail below with reference to the accompanying drawings and embodiments.

[0120] The control method for the production system provided in this application simulates the chip manufacturing process, recreates the machine processing process, evaluates the risk of Q-time constraint violation (i.e., Q-time violation index) of different lot deployment schemes, and determines the lot deployment scheme based on the evaluation results. Therefore, the accuracy of the simulation results is crucial, as it directly determines the accuracy of the subsequent lot deployment scheme. Thus, to ensure the accuracy of chip manufacturing simulation, this application specifically designs a new simulation engine.

[0121] In the simulation engine, by reading Flow information, machine information, and Step-machine association information, a system is established as follows: Figure 2 The simulation scenario is shown; then the current real-time processing status information of the Lot is read in. The Lot passes through the given Steps sequentially according to the Flow information. When passing through a Step, a dynamic path width check is required based on the Step's process requirements and the Lot's own attribute information. The Flow information, the Step-machine association information, and the Lot's own attribute information are all part of the Lot's attribute information. The Flow information includes, for example, the Lot's processing steps and their order, such as... Figure 2 In this process, Flow 1 includes Step 1, Step 2, Step 3, Step 4, Step…; Lot 1, Lot 2, Lot 3, Lot 5, Lot 7, and Lot 8 are all produced using Flow 1. Flow 2 includes Step 1, Step 2, Step 3, Step 4, Step…; Lot 4 and Lot 6 are also produced using Flow 1.

[0122] Step and machine association information indicates the relationship between Step and machine. Figure 2 The dashed lines connecting the Step and the machine indicate a relationship between them, such as... Figure 2In Flow 1, Step 1 is associated with machine 1, machine 2 and machine 3, and Step 3 is associated with machine 4, machine 5 and machine 6. In Flow 2, Step 2 is associated with machine 3 and machine 4, and Step 4 is associated with machine 2, machine 5 and machine 6.

[0123] Lot's own attribute information includes the Lot's recipe at each step.

[0124] The process requirements of a Step refer to the recipes supported by all machines associated with that Step. For example, the process parameters required for Lot 1 in Step 1 are recipe 1. The process parameters supported by machines 1, 2, and 3 associated with Step 1 are recipe 1, recipe 3, and recipe 2, respectively. Therefore, based on the process requirements of Step 1 and the attributes of Lot 1, a path width check is performed, and machine 3 is assigned to Lot 1 in Step 1.

[0125] In some other examples, the Lot's attribute information also includes the Lot's Q-time information and the number of wafers included in the Lot. The Q-time information indicates the Q-time duration and the start and end steps of the Q-time loop.

[0126] The current real-time processing status information of a Lot refers to the Lot's current processing status information, which may include one or more of the following: the Step in which Lot 1 is currently located, the machine tool in which it is currently located, the processing time of Lot 1 on the current machine tool, and the remaining Q-time of Lot 1. For example... Figure 2 As shown, Lot 1 is currently in Step 1, being processed on machine 1, and has 9 hours remaining to complete Step 1.

[0127] Machine information belongs to the production system and includes each machine's downtime schedule (also known as maintenance schedule), each machine's WPH (Work Per Parameter), and one or more of the recipes that each machine can support. For example... Figure 2 In the middle, the maintenance time for machine 5 is from 0:00 to 8:00 every day.

[0128] The current processing status, machine information, and attribute information of the Lot can all be obtained from the QTMS system used in chip manufacturing. Alternatively, they can be obtained by receiving requests from the QTMS system. For example, QTMS sends a simulation request to the chip manufacturing simulation engine, carrying the current processing status, machine information, and attribute information of the Lot. The chip manufacturing simulation engine receives this request, parses it to obtain the current processing status, machine information, and attribute information of the Lot, and then simulates the processing of each Lot over a future period based on this information. This future period could be the time required to reach a preset condition, such as the completion of a certain number of Lots, or the time required to complete the processing of the current order's Lots. Alternatively, the future period could be a specific timeframe, such as a day, a week, or a month.

[0129] To ensure the accuracy of the simulation results output by the simulation engine (accuracy here means that the simulation results are closer to the actual chip manufacturing process), the simulation engine simulates each step and operation in the actual chip production line. For example, it simulates the path width check operation and sets a dynamic path width check algorithm to more closely resemble the path width check algorithm in the actual production process.

[0130] For example, path checking includes checking the available time period of equipment, checking the available equipment of the Lot at each site, and checking the dynamic path width at the Lot dimension. The equipment available time period check includes calculating the available time interval within the outlook period for all equipment (main unit and chambers) based on the current status, planned down / update, and maintenance plan. The Lot available equipment check at each site includes finding the current and downstream Steps within the outlook period for each Lot based on Flow data, constructing the LotFlow; performing ELR / EPR matching, adhoc conditions, APC control, PPID checking, and MFG control operations sequentially for different types of Steps; and performing operations such as specifying path width, queueing path width, and multi-foup combined path width for different special types of Lots to calculate the set of available equipment for that Lot at a certain Step. The dynamic path width check at the Lot dimension includes calculating the truly runnable interval for each equipment based on the Lot-equipment available time and the equipment's own (main unit and all its chambers) available time.

[0131] In another example, the simulation engine integrates a scheduling mechanism for Lots and machines. The simulation engine allocates machines to Lots based on an algorithm, scheduling the Lots to those machines for processing. This ensures that the physical system logic is accurately reproduced during the simulation, providing accurate capacity information for each time period. Compared to related technologies that estimate the capacity of each machine at different time periods using probability or proportion, which obscures the specific processing steps of the Lot and thus leads to discrepancies between the assessed output and the actual situation, the simulation engine in this embodiment integrates a scheduling mechanism for Lots and machines, ensuring that the physical system logic is accurately reproduced during the simulation and providing accurate capacity information for each time period.

[0132] To further ensure the accuracy of the chip manufacturing simulation engine provided in this application embodiment, the simulation engine supports at least one of the following: wafer group-level path width check, dynamic update of machine status, real-time calculation of capacity of each chamber in the machine, calculation of multiple processing time types, multiple chamber collaborative working modes, viewing of available time windows and maintenance time windows of the machine, loading port logic of the machine, multiple aging logics, and furnace grouping logic.

[0133] For example, a Lot-level road width check algorithm can be set in the simulation engine. During the simulation, as the Lot traverses each Step, the Lot-level road width check algorithm is called to perform road width checks, thus implementing road width check constraints in each Step. It should be noted that the Lot-level road width check algorithm can also be set in the decision center. When the simulation engine needs to perform road width checks, it calls the path check algorithm through the interface provided by the decision center to implement the Lot-level road width check.

[0134] The simulation engine also dynamically updates the status of the machine based on the Lot's scheduling. For example, if Lot 1 is scheduled to machine 1 for processing after the road width check, the status of machine 1 will be updated to be processing Lot 1.

[0135] The simulation engine also supports real-time capacity calculation at the Lot× chamber level, which can accurately calculate the precise capacity of each chamber in the machine. For example, the capacity of each chamber in the machine can be obtained by searching historical production records, or the capacity of each chamber in the machine can be determined by configuring the capacity parameters of each chamber in the machine. The capacity obtained in this way is more accurate, which in turn makes the simulation more accurate. It supports capacity calculation at the chamber level, which is finer and more accurate than the capacity granularity of the machine.

[0136] The simulation engine supports the separate start-up of different chambers, that is, the start-up and shutdown control of the simulation chambers is granular, which is more closely related to the control in real production.

[0137] The simulation engine also supports multiple chamber coordination methods, such as serial, parallel, and combined methods for simulating processing, which more closely resembles the actual chamber coordination methods in production and makes the simulation more accurate.

[0138] The simulation engine calculates different processing times (e.g., by wafer, by lot, by batch) based on the processing attributes of different machines. For example, some machines process on a wafer-by-wafer basis, so the processing time is calculated based on the wafer processing time to determine if Q-time is violated. Other machines process on a lot-by-lot basis, so the processing time is calculated based on the lot processing time. Still others process on a batch-by-batch basis, so the processing time is calculated based on the batch processing time. This makes the processing time calculation more accurate and the simulation results closer to actual production.

[0139] The simulation engine also supports the calculation and viewing of available time windows and maintenance time windows for machine tools. For example, the chip manufacturing simulation engine in this embodiment models and simulates the processing process at the lot level, and can extrapolate the processing process of each lot over a future period. Therefore, the processing behavior of each lot is very clear. It's clear which step each lot is on, which machine tool it's on, how long it takes, the time it takes to leave the step, and the time it takes to enter the next step. The simulation continuously advances this time, so the status of each machine tool is very clear. This allows us to know the occupied and available time periods of each machine tool. From the machine tool information, we can know the maintenance time of the machine tool. Thus, the available time windows and maintenance time windows of the machine tools are easy to view.

[0140] The simulation engine also supports loadport logic, which means that during the simulation process, when a lot is scheduled to a certain machine, there will be loadport logic. For example, some machines have only one loadport, and when one lot is being processed, it will continuously occupy this loadport; however, some machines have two loadports, which can realize the parallel processing of two lots. For example, if one lot is being processed on the machine and occupies one loadport, a new lot can be scheduled to be loaded from the other loadport onto the machine for processing.

[0141] The simulation engine also supports various seasoning logics, such as recipe change logic. This means that if the recipe of the current lot to be processed is different from that of the previous lot, then the machine / chamber will be seasoned. Alternatively, if the machine / chamber has been idle for a period of time, then the machine / chamber will be seasoned.

[0142] The simulation engine also supports batching logic, which involves grouping lots into batches. This can be integrated within the simulation engine or configured in the decision center. We know that a larger batch size saves more processing time. For example, a batch size of 10 means 10 lots are processed simultaneously in a batch, saving ten times the time compared to processing each lot individually. However, a larger batch size also results in longer waiting times. For instance, a batch size of 100 means waiting for 100 lots to arrive before a batch can be formed. Therefore, the batching algorithm provided in this application can group lots according to the busy / idle status of each step. When a step is busy, the batch size is increased; when a step is idle, the batch size is decreased. For example, if a step has 20 lots in its queue, the batch size for that step is set to 10; if a step has 10 lots in its queue, the batch size is set to 5. This dynamic adjustment of batching parameters better reflects reality and makes the simulation more accurate.

[0143] Figure 3 This diagram illustrates the operation process of a lottery recreated by the chip manufacturing simulation engine provided in an embodiment of this application. For example... Figure 3 As shown, the chip manufacturing simulation engine provided in this application embodiment models and simulates each lot. After each lot reaches the step, the lot will first perform a path width check, allocate machine tools, queue up machine tool resources, allocate loadport resources, chamber resources, season logic, and other fine-grained simulations of the processing process in the real production process to ensure the accuracy of the simulation results.

[0144] In another example, to further ensure the accuracy of the simulation results of the simulation engine, this embodiment of the application also adopts micro-optimization of the simulation loop during simulation to optimize the local lot queue distribution logic.

[0145] Figure 4 An architecture diagram of the chip manufacturing simulation engine provided in an embodiment of this application is shown. Figure 4 As shown, the chip manufacturing simulation engine is connected to a decision center. The decision center performs unified queue management and unified decision-making for the simulation process, thereby optimizing the local lot queue distribution logic, reducing the risk of Q-time violation, and improving simulation accuracy.

[0146] In real-world systems, each step may involve decisions that are either simple (e.g., rules) or complex (e.g., algorithms). The specific decision-making mechanism is weakly correlated with the underlying simulation engine, but it is indispensable for the sake of simulation accuracy.

[0147] In the simulation engine of this method, all decisions during the simulation model's execution require invoking the decision center. Within the decision center, tasks and queues can be scheduled and managed using both internal and external algorithms.

[0148] like Figure 4 The diagram illustrates an integration case of the simulation engine and the machine / chamber allocation optimization algorithm. When a Lot requests machine / chamber resource allocation, the simulation engine forwards the request to the decision center. The decision center then invokes the relevant algorithm (i.e., the Lot-Equip matching algorithm) and returns a response. The simulation engine executes the algorithm based on the returned result to allocate machine / chamber resources to the Lot.

[0149] The decision center replaces the internal rules of the simulation engine, and the design of decoupling decision-making from mechanisms can effectively reduce Q-time violations and improve simulation accuracy in terms of business; in terms of engineering, it greatly reduces the difficulty of system maintenance and facilitates parallel development by multiple teams.

[0150] This application embodiment achieves lot queue management and unified decision-making from a global perspective by setting up a decision center, rather than at a specific step. This decision center can be understood as an entity transcending all steps; it controls the entire system. The decision center makes decisions based on global information, such as the processing status of each step, the processing status of each machine, the status of each chamber of each machine (processing or in season), the capacity of each machine, the queue of each step, the Q-time and remaining Q-time of each lot, etc., and decides on lot scheduling. Therefore, the decision on how to schedule a lot is not made locally at the step level, but rather by a centralized, unified queue management system. This queue management is handled by the decision center. Each step itself does not have decision-making capabilities; it sends decision requests to the decision center, which then calls the corresponding algorithm and returns the algorithm's decision result to the simulation engine.

[0151] For example, actual chip manufacturing is based on Q-time control to prevent lot processing from exceeding the Q-time limit. Decisions are typically made based on global information to avoid lot violations of Q-time. For instance, in a certain step, the current lot is processed first, but another lot being processed in the previous step is urgent and about to exceed the Q-time limit. In this case, a global decision allows the lot about to exceed the Q-time limit in the previous step to be moved to the queue, making the currently processed lot wait. This achieves unified queue management. Without unified management, when only the current step is viewed, more urgent lots in other steps cannot be seen, potentially causing other lots to violate the Q-time limit. Therefore, the simulation engine's decision center also uses the same queue management to maintain consistency with the queue management in actual production, increasing simulation accuracy.

[0152] The simulation engine involves many decisions. For example, if multiple lots are waiting for production, deciding which lot to allocate first is a lot allocation rule. Similarly, if multiple lots arrive but there's only one machine, deciding which machine to allocate them to is a machine allocation rule. There are also batching rules. Many of these decisions aren't made within the simulation engine itself, but rather through an interface that calls the corresponding decision-making algorithms in the decision center for unified decision-making. These decision-making algorithms from the simulation engine are all housed in the decision center, which manages the overall picture. For instance, the decision center contains various algorithms from the simulation engine that require decision-making, such as lot-equipment matching, lot batching, seasoning, and loadport algorithms. The decision center is like the human brain; it has a clear understanding of all parts of the system (i.e., global information, such as the status of each machine, its capacity, the processing status of each lot, the queue of each step, and the Q-time of each lot). It understands its capabilities and the decisions it will make under different circumstances, thus enabling it to make global decisions.

[0153] Of course, the decision-making algorithm in the decision center needs to match the decision-making algorithm of the simulation object, that is, the actual chip production system to be simulated. For example, if the decision-making algorithm of the actual chip production system is a global decision and the queue is managed globally, then the decision-making algorithm of the decision center is also a global decision and the queue is managed globally. If the decision-making algorithm of the actual chip production system is a local decision, then the decision-making algorithm of the decision center is also a local decision. In this way, it is consistent with the decision-making algorithm of the actual chip production system to achieve the accuracy of the simulation.

[0154] The control method for the production system provided in this application analyzes and evaluates the simulation results after obtaining them to obtain production indicators, and then determines the production plan based on the production indicators. In one example, the production plan includes a lot distribution plan, and the production indicators include a Q-time violation indicator. This Q-time violation indicator indicates the violation of Q-time constraints by lots during processing, such as how many lots violated the Q-time constraint and which lot violated the Q-time constraint. Based on the Q-time violation indicator, the lot distribution plan is optimized. To this end, the embodiments of this application propose a macroscopic simulation optimization algorithm, a large loop algorithm, which can dynamically control lot distribution and improve machine utilization.

[0155] In one example, to accurately evaluate the Q-time violation of each lot in the simulation results, this embodiment of the application constructs a Q-time violation simulation evaluation engine. Based on the simulation results, a Q-time violation simulation evaluation engine is constructed to evaluate the Q-time violation index (i.e., Q-time violation metric) under different lot deployment schemes. The deployment scheme is then optimized and adjusted based on the Q-time violation index. For example, based on operations research optimization algorithms, a scheme algorithm optimization engine is constructed to optimize the lot deployment scheme according to the index generated by different schemes.

[0156] For example, the logic of the algorithm optimization engine is as follows: Adjust the lot distribution plan based on production metrics (such as machine availability, machine utilization, step availability, Q-time violation metrics, and at least one of the wafer assembly processing parameters). For example, if certain machines are particularly idle on certain steps (i.e., machine utilization is low, for example, machine profitability is below a certain threshold), then increase the number of lots distributed on the steps corresponding to those machines. For another example, if Q-time violations occur on some loops, then reduce the number of lots distributed accordingly. For yet another example, if a lot has a long waiting time on a certain step (e.g., the waiting time exceeds a certain threshold), then reduce the number of lots distributed on that step; if a lot has a short waiting time or no waiting time on a certain step (e.g., the waiting time is less than a certain threshold), then increase the number of lots distributed on that step. For example, if the utilization rate of a machine is lower than a certain threshold, and the wait time of a lot on the step associated with that machine is less than a certain threshold, then the allocation of lots is increased on that step. Furthermore, it ensures that the Q-time violation metric corresponding to the allocation scheme before and after the adjustment (e.g., the allocation scheme for adding lots and the allocation scheme before adding lots) does not deteriorate. Based on this, the allocation of lots is increased on loops with insufficient resource utilization, and then a new list of lot allocations is generated.

[0157] By linking the simulation evaluation engine and the scheme optimization algorithm engine, the lot distribution scheme is iteratively optimized to achieve precise dynamic adjustment at the lot level.

[0158] Figure 5 This diagram illustrates the implementation architecture of the macroscopic simulation optimization algorithm with a large loop provided in an embodiment of this application. Figure 5As shown, the simulation engine performs simulations based on the input data and outputs simulation logs. These logs record the behavior of each lot over a future period. For example, at a future moment, lot 1 in Step 200 performs a path width check, matches machines, and displays information such as the queue length on Step 200, the number of available machines associated with Step 200, and a list of available machines. Another example is the processing time of lot 1 in Step 200 on machine 1, the WPH of machine 1, and the remaining Q-time of lot 1 at the next future moment. The simulation logs are then input to the Q-time violation simulation evaluation engine, which analyzes and evaluates the logs to obtain Q-time violation indicators. The lot distribution plan is updated based on production indicators. Then, simulation is performed on the updated distribution plan to evaluate the Q-time violation index corresponding to the updated lot distribution plan. The two Q-time violation indices corresponding to the distribution plan before and after the update are compared. Based on whether the two Q-time violation indices have deteriorated, it is determined whether to accept the updated lot distribution plan. This process is iterated until the plan converges or the available computing time is exhausted, and the final lot distribution plan is obtained. In this way, dynamic scheduling at the lot level is achieved.

[0159] Figure 6 A schematic diagram illustrating the dynamic scheduling process at the lot level provided in an embodiment of this application is shown. Figure 6 As shown, the current lot production situation (scheme 0) in the chip manufacturing system is first simulated and evaluated through simulation, generating the current production metric 'a' (including at least the Q-time violation metric). Then, based on the current production metric, a portion of lots are selected from the lot pool to be distributed, generating a new lot distribution scheme 'n'. The lot distribution scheme 'n' is then evaluated through simulation, generating the production metric 'b'. The scheme optimization algorithm engine compares the current production metric 'a' and production metric 'b', generating a new lot distribution scheme 'n''. The above steps are repeated until the scheme converges or the available computing time is exhausted, resulting in the final lot distribution scheme.

[0160] In other words, the purpose of the control method for the production system provided in this application embodiment is to obtain a better lot distribution scheme. Based on this scheme, the lot is distributed to minimize Q-time violations in actual chip production and achieve higher machine utilization. Alternatively, the inputs to the control method for the production system provided in this application embodiment are the current processing status information of the lot, production system information, and lot attribute information; the output is the lot distribution scheme. This achieves lot-level distribution, enabling precise distribution control for each lot, reducing the risk of Q-time constraint violations, improving machine utilization, and ultimately enhancing the overall production efficiency of the chip manufacturing system.

[0161] Figure 7 This is a schematic diagram illustrating the implementation architecture of the control method for the production system provided in this application embodiment. This architecture can be referred to as a Q-time control simulation optimizer architecture, such as... Figure 7 As shown, the Q-time control simulation optimizer mainly includes a chip manufacturing simulation engine and a scheme optimization algorithm engine. The QTMS (Q-time Dispatch Management System) sends a request to the Q-time Control simulation optimizer to generate a lot distribution scheme. The Q-time Control simulation optimizer responds to the request and generates the lot distribution scheme. After obtaining the lot distribution scheme, QTMS performs manual evaluation before distributing the lot. In other words, after receiving the lot distribution scheme, QTMS still needs to manually determine whether to distribute the lot according to the scheme. If the generated lot distribution scheme is deemed acceptable, confirmation is clicked, and QTMS distributes the lot according to the scheme. In another example, after receiving the lot distribution scheme, QTMS does not need to perform any evaluation and directly distributes the lot according to the received scheme.

[0162] Upon receiving a request from QTMS, this embodiment first acquires real-time status data (including current lot status, machine status, etc.), uses a chip manufacturing simulation engine to simulate the status quo, calculates Q-time violations, and then analyzes the results using a scheme optimization algorithm engine to generate a new Lot distribution list. Through continuous scheme evaluation and generation, the distribution Lot list is continuously optimized, ultimately improving machine resource utilization.

[0163] The chip manufacturing simulation engine contains real-time mirror data of the chip manufacturing process (such as lot information, flow information, machine information, etc.). This information is processed and then used by a discrete event simulation engine (which sends a request to the decision center when a decision is needed, the decision center calls relevant decision algorithms to make a decision, and returns the decision result to the discrete event simulation engine for simulation decision-making) to calculate the behavior of each lot over a subsequent period and generate behavior logs. After processing and analysis, the behavior logs are used to calculate key indicators such as Q-time violations.

[0164] To ensure the accuracy of the chip manufacturing simulation engine results, the chip processing rules running within the simulation engine need to be as close as possible to reality. This application achieves this goal through the following two methods:

[0165] Because real-world manufacturing involves numerous decision-making algorithms that iterate frequently, the decision-making algorithms are independent of the chip manufacturing simulation engine in order to facilitate convenient access to and timely updates of these algorithms within the simulation engine.

[0166] This application embodiment builds, as shown in the example. Figure 8 The simulation scenario shown is used to simulate the chip manufacturing process. Figure 8 In the simulation scenario shown, the Lot sequentially passes through each processing step in the Flow, and performs different actions (including but not limited to path width check, batching, Season, loadport occupation, chamber occupation, etc.) based on the attributes of the processing step and the associated machine attributes. After the calculation is completed, the following log information is generated:

[0167]

[0168] Table 2 Simulation Engine Log Output

[0169] The above log information can generate Q-time violation reports based on Q-time information (Q-time start processing steps, Q-time end processing steps, Q-time type, Q-time limit value, etc.).

[0170] Figure 9a and Figure 9b A schematic diagram of the input page of software implemented using the control method of the production system provided in this application is shown. Figure 9a and Figure 9b As shown, the input data of the control method for the production system provided in this application embodiment includes the attribute information of each lot, the current processing status information of each lot, and the current status information of each machine.

[0171] Figure 10 A schematic diagram showing the output page of the chip manufacturing simulation engine provided in this application is illustrated. Figure 10 As shown, the output data of the chip manufacturing simulation engine provided in this application embodiment includes the processing procedure and Q-time evaluation information for each lot and machine.

[0172] The control method for the production system provided in this application ultimately outputs a lot distribution scheme.

[0173] The control method for the production system provided in this application innovatively uses simulation optimization methods for Q-time interval Lot control, thereby achieving dynamic and accurate dispatch control at the Lot level for the first time.

[0174] In one example, a system using the control method of the production system provided in the embodiments of this application can intelligently output a delivery and control plan every 2 minutes, and provide the system status prediction results for a certain period in the future. Under normal circumstances, no manual intervention is required. Furthermore, the delivery and control plan and prediction results are accurate to each Lot, each Step, and each machine. Secondly, the system status is visualized throughout the entire process after the delivery and control plan is applied, and the Lot / machine / system status of any time slice can be observed, which is highly interpretable.

[0175] On the other hand, the embodiments of this application dynamically adjust the status of Lots and machines in the system and call the Lot-machine matching algorithm in real time, which can: when there is a risk of exceeding Qtime, dynamically adjust the Lot distribution priority or control the Lot distribution to reduce the risk of exceeding Qtime; and increase the number of Lot distributions based on the dynamic load information of the machines, while ensuring that Qtime is not exceeded, thereby improving the utilization rate of the machines.

[0176] In another example, the production plan output by the control method of the production system provided in this application embodiment is a machine maintenance plan. That is to say, this application embodiment can also use simulation evaluation results to optimize the machine maintenance plan.

[0177] Figure 11 A schematic diagram of the implementation architecture of a control method for a production system provided in another embodiment of this application is shown.

[0178] In other words, the control method for the production system provided in this application can be used not only for managing lot dispatch, but also for other scenarios such as optimizing machine maintenance plans. For example, it can evaluate the impact of different machine maintenance schemes on the Q-time of the lot in the system based on simulation results, and iteratively optimize the machine maintenance scheme based on the evaluation results, thereby reducing the impact of machine maintenance on work-in-process.

[0179] like Figure 11As shown, the current machine maintenance plan is first simulated using a chip production simulation engine to obtain simulation logs. These logs are then input into a Q-time violation simulation evaluation engine, which analyzes and evaluates them to obtain Q-time violation indicators. The machine maintenance assignment list is updated based on the production indicators. The updated list is then simulated again to evaluate the Q-time violation indicators. The two Q-time violation indicators are compared, and the updated list is used to determine whether it should be accepted based on whether the indicators have deteriorated. This process iterates until the plan converges or available computing time is exhausted, resulting in the final machine maintenance assignment list and the optimized machine maintenance plan.

[0180] The chip manufacturing system that applies the control method of the production system provided in the embodiments of this application, after testing, shows that the utilization rate of the CTB loop machine is increased by 30 percentage points without increasing the proportion of super Q-time lot, and the automatic execution rate is improved, reducing manual intervention and workload.

[0181] Figure 12 This is a flowchart illustrating a control method for a production system provided in an embodiment of this application. This method can be executed by any device, equipment, platform, or cluster of devices with computing capabilities. This application embodiment does not specifically limit the specific computing device executing the method; appropriate computing devices can be selected as needed. Figure 12 As shown, the control method for the production system provided in this application embodiment includes at least steps S1201 to S1205.

[0182] In step S1201, the current processing status information of the item to be processed, the information of the production system, and the attribute information of the item to be processed are obtained.

[0183] In this embodiment, the current processing status information of the lot, the information of the production system, and the attribute information of the lot can be read from the QTMS system.

[0184] The current processing status information includes at least one or more of the following: the current processing step of the wafer group, the current machine of the wafer group, the processing time of the wafer group in the current step, and the remaining allowable time of the wafer group; the production system information includes at least one or more of the following: the process parameters supported by each machine among several machines, the capacity of each machine, and the downtime schedule of each machine; the attribute information of the wafer group includes one or more of the following: the process flow information of the wafer group, the process requirements information of the wafer group in each processing step, the allowable time information of the wafer group, and the allowable time circle of the wafer group.

[0185] In step S1202, based on the current processing status information of the item to be processed, the production system information, and the attribute information of the item to be processed, the processing process of the item to be processed is simulated to obtain simulation results.

[0186] For example, the current processing status information of the work-in-process, production system information, and attribute information of the work-in-process are used as inputs to the chip manufacturing simulation engine, and the output is simulation results. The simulation results indicate the processing status of each lot by the chip manufacturing system over a future period of time. For example, the simulation results can be simulation logs, the specific format of which can be found in Table 2 above.

[0187] The specific simulation process of the chip manufacturing simulation engine can be found in the description above, and will not be repeated here for the sake of brevity.

[0188] In step S1203, production targets are determined based on simulation results.

[0189] The simulation logs are analyzed and evaluated to obtain production metrics. These metrics include at least Q-time violation indicators. For example, the simulation logs are input into a Q-time violation simulation evaluation engine, which analyzes and evaluates them, outputting Q-time violation metrics.

[0190] In step S1204, a production plan for the items to be processed is determined based on production indicators.

[0191] After obtaining the Q-time violation index, the macroscopic simulation optimization algorithm mentioned above in the embodiments of this application is executed for optimization iteration, and finally the lot distribution scheme is output. For the detailed implementation of the macroscopic simulation optimization algorithm, please refer to the description above, and it will not be repeated here for the sake of brevity.

[0192] In step S1205, based on the production plan, the production system is controlled to process the items to be processed.

[0193] In one possible implementation, after receiving the lot distribution plan, a manual check is required to determine whether to distribute the lot according to the plan. If the generated lot distribution plan is deemed acceptable, confirmation is clicked, and QTMS distributes the lot according to the plan. In another example, after receiving the lot distribution plan, QTMS does not need to perform any check and directly distributes the lot according to the received plan.

[0194] In another example, the generated scheme can also be a machine maintenance scheme. That is, the control method of the production system provided in this application embodiment can be used not only for managing lot dispatch, but also for other scenarios such as machine maintenance plan optimization. For example, it can evaluate the impact of different machine maintenance schemes on the Q-time of the lot in the system based on simulation results, and iteratively optimize the machine maintenance scheme based on the evaluation results, thereby reducing the impact of machine maintenance on work-in-process.

[0195] Based on the same concept as the aforementioned embodiment of a production system control method, this application also provides a production system control device 1300. This control device 1300 can be deployed on a server or terminal device to achieve precise control over each lot, reducing the risk of violating Q-time constraints and improving machine utilization. The production system control device 1300 includes components for implementing… Figure 2-12 The units or modules of each step in the battery data generation method shown.

[0196] Furthermore, the control device of the production system provided in this application embodiment can be integrated into the chip production control system to provide the chip production control system with lot distribution scheme suggestions, realize precise distribution control of each lot, reduce the risk of violating Q-time constraints, and improve machine utilization.

[0197] Figure 13 This is a schematic diagram of the structure of a control device for a production system provided in an embodiment of this application. Figure 13As shown, the control device 1300 of the production system includes an acquisition module 1301, a simulation module 1302, a first determination module 1303, a second determination module 1304, and a control module 1305. The acquisition module 1301 acquires the current processing status information of the work-in-process, information about the production system, and attribute information of the work-in-process. The simulation module 1302 simulates the processing of the work-in-process based on the current processing status information, information about the production system, and attribute information of the work-in-process, obtaining simulation results that indicate the processing status of the work-in-process in the production system over a future period. The first determination module 1303 determines production indicators based on the simulation results, including at least default indicators that indicate violations of production constraints during the processing of the work-in-process. The second determination module 1304 determines a production plan for the work-in-process based on the production indicators. The control module 1305 controls the production system to process the work-in-process based on the production plan.

[0198] In one possible implementation, the item to be processed is a wafer set, and the production system includes several machines; the current processing status information includes at least one or more of the following: the current processing step of the wafer set, the current machine of the wafer set, the processing time of the wafer set in the current step, and the remaining allowable time of the wafer set; the information of the production system includes at least one or more of the following: the process parameters supported by each machine, the capacity of each machine, and the downtime schedule of each machine; the attribute information of the wafer set includes at least one or more of the following: the process flow information of the wafer set, the process requirements information of the wafer set in each processing step, the allowable time information of the wafer set, and the allowable time cycle of the wafer set.

[0199] In another possible implementation, the simulation module 1302 is specifically used to: take the current processing status information of the work to be processed, the information of the production system, and the attribute information of the work to be processed as inputs to the chip production simulation engine, and output simulation results.

[0200] In another possible implementation, the chip manufacturing simulation engine supports at least one of the following: wafer group-level path width check, dynamic update of machine status, real-time calculation of capacity of each chamber in the machine, separate start-up of each chamber in the machine, calculation of multiple processing time types, multiple chamber collaborative working modes, viewing of available time windows and maintenance time windows of the machine, loading port logic of the machine, multiple aging logics, and furnace grouping logic.

[0201] In another possible implementation, the chip manufacturing simulation engine integrates the scheduling mechanism for wafer sets and equipment.

[0202] In another possible implementation, the chip manufacturing simulation engine determines the production decisions during the wafer set processing simulation based on a decision algorithm in the decision center. The decision algorithm is used to uniformly manage the wafer set queues at each processing step and to make unified decisions on the production of each wafer set at each processing step.

[0203] In another possible implementation, the decision-making algorithm includes a wafer set and machine matching algorithm, which allocates machines to each wafer set at each processing step based on global information, including the current processing status information of each processing step, the current capacity of each machine, and the current status information of each machine.

[0204] In another possible implementation, the control device 1300 of the production system provided in this application further includes a visualization module 1306, which is used to visualize the simulation results and obtain visualization results. The visualization results include at least: a visualization page of the processing status of each time slice of the wafer group during the processing process and a visualization page of the status of each time slice of the machine tool during the processing process.

[0205] In another possible implementation, the first determining module 1303 is specifically used to: analyze the simulation log to obtain production indicators, which include at least a tolerance time violation indicator, which indicates the wafer assembly's violation of the tolerance time during processing.

[0206] In another possible implementation, the production plan for the items to be processed includes a wafer set distribution plan; the second determining module is specifically used to: determine the wafer set distribution plan based on the allowable time violation index.

[0207] In another possible implementation, production metrics also include resource utilization of each machine and at least one of the processing parameters of the wafer set. A specific implementation of determining the wafer set deployment scheme based on the allowable time violation metric is as follows: Adjust the wafer set deployment scheme based on resource utilization of each machine and at least one of the processing parameters of the wafer set; simulate the adjusted wafer set deployment scheme to obtain the allowable time violation metric corresponding to the adjusted wafer set deployment scheme; and determine the wafer set deployment scheme based on a comparison of the allowable time violation metric corresponding to the wafer set deployment scheme before and after the adjustment.

[0208] In another possible implementation, the control module 1305 is specifically used to: receive a confirmation instruction for the distribution scheme of the wafer set; and distribute the wafer set based on the distribution scheme of the wafer set.

[0209] In this possible implementation, the production plan for the items to be processed also includes a machine maintenance plan, which indicates the maintenance time for each machine. The second determining module 1304 is specifically used to determine the machine maintenance plan based on the allowable time violation index. In other words, this application can also utilize the analysis results of simulation results to optimize the machine maintenance plan and further improve production efficiency.

[0210] The control device 1300 of the production system according to the embodiments of this application can correspond to executing the method described in the embodiments of this application, and the above and other operations and / or functions of each module in the control device 1300 of the production system are respectively for implementing Figure 1-12 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0211] This application embodiment also provides a computing device, including at least one processor, a memory, and a communication interface, wherein the processor is used to execute... Figure 2-12 The method described.

[0212] Figure 14 A schematic diagram of the structure of a computing device provided in an embodiment of this application.

[0213] like Figure 14 As shown, the computing device 1400 includes at least one processor 1401, a memory 1402, and a communication interface 1403. The processor 1401, memory 1402, and communication interface 1403 are communicatively connected, which can be achieved via a wired (e.g., bus) or wireless connection. The communication interface 1403 is used to send and / or receive data from other devices. The memory 1402 stores computer instructions, which the processor 1401 executes to perform the methods described in the preceding method embodiments, thereby achieving precise control over the distribution of data to each lot, reducing the risk of violating Q-time constraints, and improving machine utilization.

[0214] It should be understood that, in the embodiments of this application, the processor 1401 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0215] The memory 1402 may include read-only memory and random access memory, and provides instructions and data to the processor 1401. The memory 1402 may also include non-volatile random access memory. Optionally, the random access memory may be, for example, high bandwidth memory (HBM).

[0216] The memory 1402 can be volatile memory or non-volatile memory, or it can include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0217] It should be understood that the computing device 1400 according to the embodiments of this application can perform the implementation of the embodiments of this application. Figure 1-12 The method shown is described in detail above, and will not be repeated here for the sake of brevity.

[0218] Embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, wherein when the computer instructions are executed by a processor, the aforementioned method is implemented.

[0219] An embodiment of this application provides a chip including at least one processor and an interface, wherein the at least one processor determines program instructions or data through the interface; the at least one processor is used to execute the program instructions to implement the method mentioned above.

[0220] Embodiments of this application provide a computer program or computer program product that includes instructions that, when executed, cause a computer to perform the methods mentioned above.

[0221] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0222] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented using hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0223] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this application. It should be understood that the above description is only a specific embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A control method for a production system, characterized in that, include: Obtain the current processing status information of the item to be processed, the information of the production system, and the attribute information of the item to be processed; Based on the current processing status information of the item to be processed, the information of the production system, and the attribute information of the item to be processed, the processing process of the item to be processed is simulated to obtain simulation results. The simulation results indicate the processing status of the production system on the item to be processed in the future. Based on the simulation results, production indicators are determined, including at least default indicators, which indicate the circumstances under which the items to be processed violate production constraints during the processing and production of the items in the production system. Based on the aforementioned production indicators, a production plan for the items to be processed is determined; Based on the production plan, the production system is controlled to process and produce the items to be processed.

2. The method according to claim 1, characterized in that, The items to be processed are wafer sets, and the production system includes several machines; The current processing status information includes at least one or more of the following: the processing step the wafer group is currently in, the machine the wafer group is currently on, the processing time the wafer group has been in the current step, and the remaining time of the allowable time of the wafer group; The information of the production system includes at least one or more of the following: the process parameters supported by each of the plurality of machines, the capacity of each of the machines, and the downtime schedule of each of the machines. The attribute information of the wafer set includes: the process flow information of the wafer set, the process requirements information of the wafer set in each processing step, the allowable time information of the wafer set, and one or more of the allowable time cycles of the wafer set.

3. The method according to claim 2, characterized in that, The process of processing the work-in-process is simulated based on the current processing status information, production system information, and attribute information of the work-in-process, and the simulation results are obtained, including: The current processing status information of the work-in-process, the information of the production system, and the attribute information of the work-in-process are used as inputs to the chip manufacturing simulation engine, and the simulation results are output.

4. The method according to claim 3, characterized in that, The chip manufacturing simulation engine supports at least one of the following: wafer group-level path width check, dynamic update of machine status, real-time calculation of the capacity of each chamber in the machine, separate start-up of each chamber in the machine, calculation of multiple processing time types, multiple chamber collaborative working modes, viewing of the available time window and maintenance time window of the machine, loading port logic of the machine, multiple aging logics, and furnace grouping logic.

5. The method according to claim 3 or 4, characterized in that, The chip manufacturing simulation engine integrates the scheduling mechanism for the wafer set and the machine.

6. The method according to any one of claims 3-5, characterized in that, The chip manufacturing simulation engine determines production decisions during the wafer assembly processing simulation based on a decision algorithm in the decision center. The decision algorithm is used to uniformly manage the wafer assembly queues at each processing step and to make unified decisions on the production of each wafer assembly at each processing step.

7. The method according to claim 6, characterized in that, The decision-making algorithm includes a matching algorithm for the wafer set and the machine. The matching algorithm for the wafer set and the machine allocates the machine to each wafer set in each processing step based on global information. The global information includes the current processing status information of each processing step, the current capacity of each machine, and the current status information of each machine.

8. The method according to any one of claims 3-7, characterized in that, It also includes visualizing the simulation results to obtain visualization results, which at least include: a visualization page of the processing status of each time slice of the wafer group during the processing process and a visualization page of the status of each time slice of the machine tool during the processing process.

9. The method according to any one of claims 3-8, characterized in that, The determination of production indicators based on the simulation results includes: The simulation logs are analyzed to obtain the production indicators, which include at least the allowable time violation indicator, which indicates the allowable time violation of the wafer set during the processing.

10. The method according to claim 9, characterized in that, The production plan for the items to be processed includes the wafer set distribution plan; The process of determining the production plan for the items to be processed based on the production indicators includes: Based on the allowable time violation index, the wafer set distribution plan is determined.

11. The method according to claim 10, characterized in that, The production indicators also include the resource utilization rate of each machine and at least one of the processing parameters of the wafer assembly; The step of determining the wafer set delivery plan based on the allowable time violation index includes: The wafer set delivery plan is adjusted based on the resource utilization rate of each machine and at least one of the processing conditions of the wafer set. The adjusted wafer set delivery scheme is simulated to obtain the allowable time violation index corresponding to the adjusted wafer set delivery scheme; Based on the comparison of the allowable time violation indicators corresponding to the wafer set distribution scheme before and after the adjustment, the wafer set distribution scheme is determined.

12. The method according to claim 10 or 11, characterized in that, The step of controlling the production system to process and produce the items to be processed based on the production plan includes: Received confirmation instruction for the proposed solution for the wafer set; Based on the wafer set distribution scheme, the wafer set is distributed.

13. The method according to claim 9, characterized in that, The production plan for the items to be processed also includes a machine maintenance plan, which indicates the maintenance time for each machine. The process of determining the production plan for the items to be processed based on the production indicators includes: Based on the permissible time violation index, the machine maintenance plan is determined.

14. A control device for a production system, characterized in that, include: The acquisition module is used to acquire the current processing status information of the item to be processed, the information of the production system, and the attribute information of the item to be processed; The simulation module is used to simulate the processing of the item to be processed based on the current processing status information of the item to be processed, the information of the production system, and the attribute information of the item to be processed, and to obtain simulation results. The simulation results indicate the processing status of the item to be processed by the production system in the future. The first determining module is used to determine production indicators based on the simulation results. The production indicators include at least default indicators, which indicate the situation where the items to be processed violate production constraints during the processing and production process in the production system. The second determining module is used to determine the production plan for the items to be processed based on the production indicators; The control module is used to control the production system to process the items to be processed based on the production plan.

15. A computing device, comprising a memory and a processor, characterized in that, The memory stores instructions that, when executed by a processor, cause the method described in any one of claims 1-13 to be implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it causes the method as described in any one of claims 1-13 to be implemented.

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