Image excitation source generation method and device, computer device, and storage medium

Abstract

The application relates to the fields of image processing and integrated circuit test verification, and in particular to an image excitation source generation method and device, computer equipment and a storage medium. By receiving image characteristic parameters including at least an excitation source type, an image resolution, a brightness range, a pixel effective bit width and packing parameters, determining test image configuration information and generation information containing a target generation mode and a target format, and generating a test image including a two-dimensional pixel value array based on the target generation mode, and then converting the test image into an image excitation file in the target format, the pixel characteristics, the image spatial structure and the output format of the test image can be cooperatively controlled, mathematical modeling and image reconstruction can be completed based on image basic theory, the generated image excitation source is more suitable for test requirements in terms of image characteristics, and can adapt to different file format requirements, thereby improving the controllability, pertinence and reusability of the test, and realizing efficient and reproducible verification.

Description

Technical Field

[0001] This application relates to the fields of image processing and integrated circuit testing and verification, and in particular to an image excitation source generation method, apparatus, computer equipment, and storage medium. Background Technology

[0002] In the design and verification process of image processing chips, image stimulus sources are the core inputs that ensure the integrity of hardware logic. Whether in pre-silicon functional simulation or post-silicon hardware testing of image processing chips, the testing of image processing IP (Intellectual Property Core) requires precise test stimuli to verify the functional correctness of functional modules.

[0003] However, real-world images are limited by scene and sampling conditions, making it difficult to control key parameters such as brightness, noise, and resolution as needed, resulting in a heavy burden of preprocessing and format adaptation. Randomly generated images often do not match the target functional requirements, requiring a large number of samples to cover boundary conditions, leading to increased verification resource consumption and insufficient result reproducibility. Therefore, there is an urgent need for a standardized, parameter-controllable, and flexibly adaptable image stimulus generation method to cover all functional scenarios of image processing IP, improve verification efficiency and completeness, and reduce development costs. Summary of the Invention

[0004] This application provides an image excitation source generation method, apparatus, computer device, and storage medium to solve the above-mentioned technical problems.

[0005] In a first aspect, embodiments of this application provide an image excitation source generation method, including:

[0006] Receive image feature parameters, which include at least the image excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format;

[0007] Based on image feature parameters, the configuration information and generation information of the test image are determined. The generation information includes the target generation mode and the target format.

[0008] Based on the target generation mode, a test image is generated according to the test image configuration information. The test image includes a two-dimensional pixel value array corresponding to the image resolution.

[0009] Convert the test image into an image stimulus file in a target format, including at least one of RAW or BIN formats.

[0010] In one possible implementation, the image feature parameters further include sub-block parameters for determining the image spatial structure, the sub-block parameters including sub-block width and sub-block height; based on the image feature parameters, determining test image configuration information includes:

[0011] Based on the sub-block width and sub-block height, the image structure configuration information is determined. This image structure configuration information is used to determine the pixel block division granularity when generating subsequent test images.

[0012] In one possible implementation, the test image configuration information further includes brightness configuration information; the target generation mode includes a first mode; based on the target generation mode, a test image is generated according to the test image configuration information, including:

[0013] Based on the image structure configuration information, the initial image is divided into multiple sub-blocks;

[0014] When the target generation mode is the first mode, the first pixel value and the second pixel value are determined based on the brightness configuration information, and the first pixel value and the second pixel value are alternately filled in different sub-blocks to generate a checkerboard image. The checkerboard image is composed of sub-blocks with alternating distribution of the two types of pixel values.

[0015] In one possible implementation, the test image configuration information includes brightness configuration information; the target generation mode includes at least one of a second mode and a third mode; based on the target generation mode, a test image is generated according to the test image configuration information, including:

[0016] When the target generation mode is the second mode, a configurable brightness image is generated based on the brightness configuration information, and random values ​​are filled into the pixel positions in the configurable brightness image that are proportionally constrained and randomly distributed.

[0017] When the target generation mode is the third mode, a uniformly varied image is generated based on the brightness configuration information. The pixel values ​​of the uniformly varied image vary uniformly in at least one direction and remain unchanged in other directions.

[0018] In one possible implementation, determining the test image configuration information based on image feature parameters includes:

[0019] Based on the effective bit width of the pixel and the brightness range, brightness configuration information is generated. The brightness range includes the maximum brightness value and the minimum brightness value.

[0020] In one possible implementation, the method further includes:

[0021] The test results are obtained after simulating or measuring the chip hardware functional modules based on the image stimulus file. The test results include functional coverage and defect location information.

[0022] Adjust the image feature parameters based on the test results, and use the adjusted image feature parameters to redetermine the test image configuration information.

[0023] In one possible implementation, the packing parameters further include packing bit width parameters and pixel value truncation and limiting parameters; correspondingly, the test image configuration information also includes file packing bit width and truncation flag; converting the test image into an image stimulus file of the target format includes:

[0024] According to the preset image scanning order, the two-dimensional pixel value array of the test image is extracted into a one-dimensional pixel sequence;

[0025] Numerical preprocessing is performed on each pixel value in the one-dimensional pixel sequence, and each pixel value is limited to a preset minimum and maximum value according to the truncation flag.

[0026] Based on the effective bit width of the pixel and the file packing bit width, the bit width of each pixel value in the test image is extended. When the file packing bit width is greater than the effective bit width of the pixel, the corresponding number of zero bits are padded to the high bits of the effective binary data of each pixel value so that the number of bits occupied by each pixel value is consistent with the file packing bit width.

[0027] The pixel sequence composed of pixel values ​​after bit-width expansion is packaged into a continuous binary byte stream according to a preset byte order rule, and the binary byte stream is directly written into a target file without a file header and without compression encapsulation to generate an image stimulus file in the target format.

[0028] In one possible implementation, the packaging parameters further include negative zero value processing parameters, data format parameters, and data offset parameters; correspondingly, the test image configuration information also includes a negative zero value processing flag, a floating-point format enable flag, and an overall data offset; before packaging the pixel sequence composed of pixel values ​​after bit-width expansion into a continuous binary byte stream according to a preset byte order arrangement rule, the following is also included:

[0029] When the floating-point format flag is enabled, the pixel values ​​after bit-width expansion are converted into the binary memory representation corresponding to half-precision floating-point numbers;

[0030] Based on the negative zero value processing flag, the negative zero values ​​in the converted pixel values ​​are corrected to positive zero values;

[0031] Based on the overall data offset, the pixel values ​​after being processed for negative zero are shifted left by the overall binary shift operation to obtain the processed pixel sequence;

[0032] The processed pixel sequence is used as the pixel sequence to be packaged.

[0033] Secondly, embodiments of this application provide an image excitation source generation apparatus, the apparatus comprising:

[0034] The data interaction module is used to receive image feature parameters, which include at least the excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format.

[0035] The data parsing module is used to determine the test image configuration information and generation information based on image feature parameters. The generation information includes the target generation mode and the target format.

[0036] The image generation module is used to generate a test image based on the target generation mode and the test image configuration information. The test image includes a two-dimensional pixel value array corresponding to the image resolution.

[0037] The file generation module is used to convert test images into image stimulus files in a target format, including at least one of RAW or BIN formats.

[0038] Thirdly, embodiments of this application provide a computer device, including: a memory and a processor;

[0039] The memory stores the instructions that the computer executes;

[0040] The processor executes computer execution instructions stored in memory, causing the processor to perform the first aspect and / or various possible implementations of the first aspect as described above.

[0041] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the first aspect and / or various possible implementations of the first aspect.

[0042] Fifthly, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the first aspect and / or various possible implementations of the first aspect.

[0043] This application provides an image excitation source generation method, apparatus, computer device, and storage medium. By receiving image feature parameters including at least excitation source type, image resolution, brightness range, effective pixel bit width, and packing parameters, it determines test image configuration information and generation information including target generation mode and target format. Based on the target generation mode, it generates a test image including a two-dimensional pixel value array, and then converts the pixel value array into an image excitation file of the target format. This enables coordinated control of the pixel characteristics, image spatial structure, and output format of the test image. It also completes mathematical modeling and image reconstruction entirely based on fundamental image theory, making the generated image excitation source more closely match the test requirements in terms of brightness range, effective pixel bit width, image resolution, and geometric deformation. Furthermore, it is easy to directly adapt to the file format requirements of different verification stages, thereby improving the controllability, specificity, and reusability of image processing IP testing, and achieving efficient and reproducible verification. Attached Figure Description

[0044] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0045] Figure 1 Flowchart of the image excitation source generation method provided in this application Figure 1 ;

[0046] Figure 2 Flowchart of the image excitation source generation method provided in this application Figure 2 ;

[0047] Figure 3 Flowchart of the image excitation source generation method provided in this application Figure 3 ;

[0048] Figure 4 This is a schematic diagram of the image excitation source generation device provided in this application;

[0049] Figure 5 A schematic diagram of the structure of the computer device provided in this application.

[0050] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0051] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application.

[0052] IP stands for Intellectual Property Core, often referred to as an IP core or IP module. In chip design, an IP core refers to a pre-designed, verified, and reusable chip hardware functional module.

[0053] In the design and verification process of image processing chips, image stimulus sources are the core input to ensure the integrity of hardware logic. Whether in pre-silicon functional simulation or post-silicon hardware testing of image processing chips, image processing IP testing requires precise test stimulus sources to verify the functional correctness of IP modules, which include modules for color correction, geometric correction, noise reduction, scaling, and interpolation. For example, in UVM (Universal Verification Methodology) simulation, verification engineers need to verify the register configuration, data flow transmission, and timing logic of IP modules using preset image inputs; in post-silicon testing, hardware testing requires inputting image data through a simulated camera interface to detect hardware defects in the image processing chip in real-world scenarios.

[0054] In existing solutions, common practices include directly using real-scene captured images or randomly generating images using algorithms, then converting the images into an input data format recognizable by the verification environment before importing them into the testing process. The former, real-scene captured image approach, provides a certain degree of scene realism, but its generation process is significantly affected by the shooting environment, sampling conditions, lighting conditions, and sensor parameters. It often requires preprocessing such as cropping, bit-width adaptation, and format conversion to meet the input requirements of different image processing IP tests. The latter, which generates pixel sequences based on random rules, facilitates batch sample generation, but lacks a direct correspondence with the functional requirements of the image processing module. It often requires a large number of redundant samples to capture key scenes, increasing simulation resource consumption and hindering problem reproduction.

[0055] Furthermore, different projects have varying requirements for effective pixel bit width, image spatial structure, and output format, often requiring existing solutions to be adapted separately, resulting in insufficient tool reusability. When the input image cannot match the processing method of the target module, it may also lead to incomplete test coverage, longer debugging cycles, and decreased verification efficiency.

[0056] In view of this, how to generate controllable, reproducible, and multi-project adaptable image test stimuli has become an urgent technical problem to be solved. To solve the above problem, this application provides an image stimulus source generation method. This method receives image feature parameters, including at least the stimulus source type, image resolution, brightness range, effective pixel bit width, and packing parameters. Based on these image feature parameters, it determines test image configuration information and generation information, including a target generation mode and a target format. Subsequently, based on the target generation mode and the test image configuration information, it generates a test image including a two-dimensional pixel value array. Then, it converts the two-dimensional pixel value array into an image stimulus file in the target format, which includes at least one of RAW or BIN formats. Under the verification architecture of image processing chips, this technical approach can be used in conjunction with pre-silicon simulation platforms or post-silicon testing environments, transforming image stimulus source acquisition from a material-dependent approach to parameter-driven generation. By establishing a unified processing flow around image pixel characteristics, image spatial structure, generation mode, and output format, the targeting, format adaptability, and reproducibility of the test stimulus source can be improved, thus providing a stable foundation for subsequent functional verification and hardware testing of image processing IP.

[0057] The aforementioned image stimulus source generation method is applicable to image stimulus source generation scenarios for hardware integrity testing. This method does not rely on real-scene image acquisition or camera acquisition equipment; it is entirely based on fundamental image theory to complete mathematical modeling and image reconstruction. This invention abandons the traditional stimulus generation method that relies on real-world images and purely random images. By parametrically modeling low-level image features such as brightness, color gamut, geometric deformation, spatial resolution, noise interference, and image format, it generates standardized test image stimuli with controllable parameters and customizable features.

[0058] In one embodiment, such as Figure 1 As shown, the image excitation source generation method includes:

[0059] Step 101: Receive image feature parameters, which include at least the excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format.

[0060] The image feature parameters, serving as input control variables for the generated test image, describe the requirements for the generated test image in terms of image pixel characteristics, image spatial structure, and output format. They include at least the excitation source type, image resolution, brightness range, effective pixel bit width, and packing parameters. The excitation source type describes the test pattern of the generated test image. Based on the excitation source type, a specific pattern template, such as a checkerboard, solid color image, or random noise image, can be selected from a predefined test pattern library to specifically match the verification requirements of a particular hardware function of the image processing IP. The image resolution defines the two-dimensional dimensions (width and height) of the generated test image, serving as the basic boundary constraint for determining the total amount of pixel data and all spatial traversal coordinates. The brightness range determines the range of brightness values ​​for the image pixels in the generated test image, constraining the value boundaries of pixel values ​​in subsequent test images. The effective pixel bit width limits the effective bit width of a single pixel value. The packing parameters characterize the encapsulation requirements related to the output format, such as the packing bit width. In some optional implementations, other format control fields may also be included.

[0061] In one possible embodiment, the image feature parameters can be received via command-line input, configuration file input, or interface call input. When using command-line input, the executing entity receives externally passed parameter fields when starting the generation program. When using configuration file input, a pre-stored text configuration file or structured configuration file can be read, and the field names and values ​​can be parsed to form the image feature parameters. When using interface call input, an external verification platform, automated script, or test management program can send the image feature parameters to the generation program via function calls, inter-process communication, or network interfaces. Upon receiving the call request, the generation program extracts the parameters from the request message and completes the loading.

[0062] In practice, the receiving process can also include parameter integrity and validity checks to ensure that subsequent processing proceeds normally. After receiving the parameters, the executing entity writes each parameter into an internal buffer or configuration structure to form the original input set for subsequent steps.

[0063] Step 102: Based on image feature parameters, determine the test image configuration information and generation information. The generation information includes the target generation mode and the target format.

[0064] Test image configuration information is the configuration result obtained after structuring image feature parameters. It carries the image feature parameters and guides subsequent image generation and conversion. Specifically, it can consist of brightness configuration information, image structure configuration information, and output conversion control information. The test image configuration information constrains the generation details of the test image, such as image size, pixel distribution, brightness value range, and geometric layout.

[0065] The generation information describes the control content required during the image generation stage, including at least the generation strategy employed and the file type used for output. The former is the target generation mode, used to specify the type of excitation source for the generated test image, and the latter is the target format, used to specify the output format of the image excitation file, specifically at least one of RAW (Raw Image File Format) or BIN (Binary) format. In practice, the target generation mode can be directly specified by the user in the input image feature parameters, or it can be automatically identified and determined by the generation program based on the test task. Similarly, the target format can be directly specified as RAW or BIN format by external input and internally recorded as a format code recognizable by the export module.

[0066] After receiving the image feature parameters, the executing entity can parse the parameters and proceed to the configuration information construction process if the parameters meet preset conditions. If an invalid parameter exists, an error message is returned and the current generation is terminated; if the parameter is valid, the configuration information construction process continues.

[0067] In one possible embodiment, after completing image feature parameter parsing and determining the entry point for configuration information construction, the executing entity classifies and maps each parameter to form a configuration object for image generation and file output. This configuration object may include configuration information corresponding to brightness range, effective pixel bit width, and packing parameters to support subsequent test image generation and format conversion. Once the configuration object is established, the executing entity associates and stores the test image configuration information with the generation information, enabling simultaneous invocation of the test image configuration information representing pixel generation rules and the generation information representing file output rules when generating subsequent test images.

[0068] Step 103: Based on the target generation mode, generate a test image according to the test image configuration information. The test image includes a two-dimensional pixel value array corresponding to the image resolution.

[0069] In this step, the test image serves as the data carrier for the image processing IP test input, and its core data structure is a two-dimensional pixel value array. This array represents the spatial positional relationship of each pixel in the test image along the row and column directions, where each array element corresponds to the pixel value at that position in the image. The size of the two-dimensional pixel value array corresponds to the image resolution. The generation program can call the corresponding generation rules based on the target generation mode and combine this with the test image configuration information to complete the pixel filling.

[0070] In one possible embodiment, the execution entity first creates an initial image. The initial image corresponds to a two-dimensional array of pixel values ​​to be written, the size of which corresponds to the image resolution. Subsequently, the execution entity organizes and fills the pixel positions in this two-dimensional array according to the test image configuration information to form a two-dimensional pixel value array corresponding to the test image. During the generation process, the generation program calls the corresponding generation rules according to the target generation mode, generates pixel values ​​within the range defined by the test image configuration information, and writes them into the two-dimensional pixel value array.

[0071] Step 104: Convert the test image into an image stimulus file in a target format, including at least one of RAW or BIN formats.

[0072] The image stimulus file in this step is the final file entity that provides input stimulus to the verification platform or test equipment. The target format is at least one of RAW or BIN formats. Before entering the file export stage, the test image still exists as a two-dimensional pixel value array. Therefore, this step processes the two-dimensional pixel value array to generate the target format file. RAW format corresponds to a pixel data stream without complex encapsulation structures, while BIN format corresponds to a general binary data file. The export process includes file type selection and writing the two-dimensional pixel value array according to the target format requirements.

[0073] In one possible embodiment, the execution entity extracts pixel values ​​from the test image according to a preset processing method, forming a pixel sequence suitable for output. This sequence is then converted and packaged according to the output requirements corresponding to the target format, resulting in continuous binary data. After packaging, the obtained data is written to the target file path. When the target format is RAW, the file content can be written in continuous binary format; when the target format is BIN, the file content can also be written in binary format to meet the reading requirements of subsequent simulation platforms or hardware testing equipment.

[0074] Based on the above analysis, this step converts the two-dimensional pixel value array of the test image into a RAW or BIN format file that can be directly recognized by the verification platform or test equipment, so that the image content determined in the previous step can be stably output in a form that matches the interface requirements, thereby achieving format adaptation of the same test image in different verification or test scenarios.

[0075] Based on the above analysis, this application provides an image stimulus source generation method, including receiving image feature parameters including at least the stimulus source type, image resolution, brightness range, effective pixel bit width, and packing parameters; determining test image configuration information and generation information including the target generation mode and target format based on the image feature parameters; generating a test image containing a two-dimensional pixel value array based on the target generation mode and test image configuration information; and converting the test image into an image stimulus file in RAW or BIN format. In this application, by incorporating pixel characteristics, image spatial structure, generation mode, and output format into the same processing flow, the image stimulus generation logic is transformed from material-driven or unconstrained random-driven to parameter-driven. The brightness boundary, block structure, pixel encoding, and output format of the test image can all be repeatedly defined and stably reproduced, thereby enabling the testing requirements for low brightness, high contrast, specific spatial distribution, and different input bit width formats during image processing chip verification to be achieved within the same generation framework.

[0076] In one possible implementation, the image feature parameters further include sub-block parameters for determining the image spatial structure, the sub-block parameters including sub-block width and sub-block height; based on the image feature parameters, the test image configuration information is determined, including:

[0077] Based on the sub-block width and sub-block height, the image structure configuration information is determined. This image structure configuration information is used to determine the pixel block division granularity when generating subsequent test images.

[0078] In one possible implementation, determining the test image configuration information based on image feature parameters includes:

[0079] Based on the effective bit width of the pixel and the brightness range, brightness configuration information is generated. The brightness range includes the maximum brightness value and the minimum brightness value.

[0080] In practical implementation, image feature parameters can be input from the verification platform's configuration file, register mapping table, or upper-layer test instructions. The processing unit first receives the brightness range, effective pixel bit width, sub-block width, and sub-block height, and maps the effective pixel bit width to an allowed numerical expression range. Then, it limits the maximum and minimum brightness values ​​within this range to form brightness configuration information. Subsequently, the processing unit calculates the pixel range covered by a single sub-block based on the sub-block width and height, and generates image structure configuration information based on this range. This image structure configuration information can be used to control the block division granularity of subsequent test images, enabling partitioning processing according to sub-blocks when filling pixels, such as assigning values ​​to different sub-blocks separately, alternating values, or assigning values ​​according to rules.

[0081] Furthermore, after reading the maximum and minimum brightness values, their validity can be verified before converting them into the upper and lower bounds of brightness in the brightness configuration information. For example, if the effective pixel bit width is 16 bits, the configurable brightness range is min:max = [0:2^16-1]; and by limiting the maximum and minimum brightness values ​​in the brightness range, the configurable brightness range can also be limited to [32768:65535].

[0082] In the above embodiments, after reading the sub-block width and height, the processing unit can calculate the sub-block boundaries based on the total width and height of the target test image, dividing the image into multiple sub-blocks. The combination of sub-block height and sub-block width directly determines the number of pixels contained in each sub-block. Through the above configuration, the brightness range and spatial block method of the test image can be explicitly defined, thereby ensuring that the subsequent generated results have a consistent organizational form and reproducibility. When forming the test image, brightness constraints and structural constraints can be obtained, and pixel data that meets the requirements of effective pixel bit width and block granularity can be output accordingly. Thus, the brightness expression of the test image will not exceed the effective range, and the pixel block organization can also match the block processing method of the image processing module to be verified, thereby forming an image stimulus file suitable for verifying the input interface, data path, and processing results.

[0083] In one possible implementation, such as Figure 2 As shown, the target generation mode includes a first mode; based on the target generation mode, a test image is generated according to the test image configuration information, including:

[0084] Step 201: Divide the initial image into multiple sub-blocks according to the image structure configuration information;

[0085] Step 202: When the target generation mode is the first mode, the first pixel value and the second pixel value are determined based on the brightness configuration information, and the first pixel value and the second pixel value are alternately filled in different sub-blocks to generate a checkerboard image. The checkerboard image is composed of sub-blocks with alternating distribution of the two types of pixel values.

[0086] In practical implementation, the width and height of sub-blocks are first determined based on the image structure configuration information, and then the initial image is divided into multiple sub-blocks of the same size. For the first mode, the first pixel value and the second pixel value are determined according to the brightness configuration information, each corresponding to a different brightness level. Subsequently, the two pixel values ​​are alternately written in adjacent sub-blocks, so that the entire image presents a regular periodic structure. The checkerboard image generated in the first mode is suitable for verifying the low-level processing functions of image processing hardware, such as geometric distortion correction, scaling interpolation transformation, edge feature detection, and pixel sampling calibration. It can accurately verify the hardware's ability to handle geometric deformation, edge jumps, and scale transformations.

[0087] Based on the variations of the above generation mode, the target generation mode also includes a fourth mode. In the fourth mode, the first pixel value and the second pixel value determined based on the brightness configuration information can fill an entire row or column in the row direction and be distributed at certain intervals according to a certain pattern, thereby obtaining a striped image in the horizontal or vertical direction. The interval size, i.e., the stripe width, can be configured through image feature parameters. This striped image is suitable for verifying the pixel sampling accuracy, row synchronization timing, brightness contrast, filtering smoothing, and format parsing capabilities of image processing hardware, as well as detecting the hardware image stabilization and motion compensation capabilities of image processing, and identifying anomalies such as lateral blurring and edge blurring.

[0088] In one possible implementation, the target generation mode further includes at least one of a second mode and a third mode; based on the target generation mode, a test image is generated according to the test image configuration information, including:

[0089] When the target generation mode is the second mode, a configurable brightness image is generated based on the brightness configuration information, and random values ​​are filled into the pixel positions in the configurable brightness image that are proportionally constrained and randomly distributed.

[0090] When the target generation mode is the third mode, a uniformly varied image is generated based on the brightness configuration information. The pixel values ​​of the uniformly varied image vary uniformly in at least one direction and remain unchanged in other directions.

[0091] For the second mode, the fillable brightness range is first determined based on the brightness configuration information. Then, a set of random pixel positions is generated according to a preset ratio constraint. A random value from the fillable brightness range is written to the random pixel position, while the remaining pixel positions retain the base brightness or background value, thus forming an image with random sparse distribution characteristics. Through the above randomization method, the test image contains discrete perturbation points.

[0092] In one embodiment, based on the second mode, test images of "all white image + x% random values ​​of random pixel positions" and "all black image + x% random values ​​of random pixel positions" can also be generated. The "all white image + x% random values ​​of random pixel positions" test image can be used to investigate single-point hardware defects in image processing hardware, such as single-point pixel color errors, pixel color shifts, and data jumps. It can also verify the image processing chip's calibration, shielding, and fault-tolerant mechanisms for abnormal and bad pixels, supplement abnormal pixel boundary test scenarios, and verify the spatial filtering, noise reduction, and smoothing hardware logic of the image processing IP. The "all black image + x% random values ​​of random positions" test image can simulate low-light, no-light, and dark-light shooting environments, test the image processing IP's pixel resolution capability and dark current noise suppression capability in the dark region, verify the hardware's accuracy in acquiring and restoring low-level pixel data, and supplement extreme boundaries such as ultra-low brightness, near-black pixels, and dark field interference.

[0093] In another embodiment, a test image of "all-black image + randomly distributed white grids" can also be generated based on the second mode. The size of the white grids in the test image can be configured through image feature parameters to verify the low-brightness scene recognition, high-brightness block feature extraction, and local contrast resolution capabilities of the image processing IP.

[0094] Based on the above-mentioned generation mode variations, the target generation mode also includes a fifth mode. In the fifth mode, a test image with "random brightness background color + randomly distributed other brightness blocks" can be generated. This test image can detect the image processing hardware's accuracy in distinguishing different grayscale boundaries and identify defects such as grayscale aliasing, color level discontinuity, and block edge distortion.

[0095] For the third mode, the system generates a uniformly varying image. This can be achieved by maintaining consistent pixel values ​​across all columns within the entire image while increasing or decreasing row values ​​sequentially, or by maintaining consistent pixel values ​​across all rows while increasing or decreasing column values ​​sequentially, or by uniformly varying pixel values ​​in both row and column directions, thus obtaining image data with directional gradient characteristics. First, the initial brightness and variation step can be determined based on brightness configuration information. Then, pixel values ​​are increased or decreased along the row or column direction, while pixels perpendicular to the direction of change remain unchanged, thus obtaining a uniformly varying image. This uniformly varying image is used to verify hardware row / column buffer read / write, grayscale level parsing, pixel bus transmission, and numerical overflow truncation processing logic, and to investigate hardware defects such as abnormal data within rows / columns, loss of grayscale layering, and pixel transmission jitter. Specifically, in one embodiment, the pixels in each row of the uniformly changing image increase sequentially from the starting position, while the pixel values ​​within each row remain uniform. Only the initial pixel values ​​are sequentially increased row by row. This image can be used to verify the underlying logic of image processing hardware, such as row start address addressing, row-by-row data stream arrangement, row buffer sequential writing, and row synchronization data offset. In another embodiment, the uniformly changing image is an image with a fixed decreasing value. This image can verify the image processing hardware's functions such as row numerical calculation, grayscale reduction parsing, decreasing data stream transmission, and lower limit threshold determination.

[0096] In one possible implementation, the target generation mode also includes other modes for generating test images of "single brightness solid color", "randomly inserted checkerboard grid", and "alternating distribution of solid color blocks and random value blocks". The "single brightness solid color" test image can verify the image processing hardware's ability to parse, store, and transmit continuous gradient data, effectively identifying hardware logic problems such as numerical out-of-bounds errors, data overflow anomalies, gradient sampling misalignment, and cyclic assignment errors. The "randomly inserted checkerboard grid" test image can verify the image processing module's edge recognition, corner extraction, and local area correction functions under mixed scenes, avoiding the problem of a single test scenario for the entire checkerboard grid. The "alternating distribution of solid color blocks and random value blocks" test image can verify the tile addressing, boundary processing, data validity judgment, and special specification adaptation capabilities of the segmented image processing IP, effectively identifying defects such as address offset, data concatenation, and incorrect processing of invalid data, achieving efficient and complete test coverage in multi-specification tile scenarios.

[0097] The test images generated by each of the above modes are all output as a two-dimensional pixel value array, which can be further used for subsequent format conversion.

[0098] The method provided in the above embodiments uniformly divides sub-blocks and organizes pixels in combination with different target generation modes, enabling checkerboard images, configurable brightness images, and uniformly varying images to be stably generated according to the test image configuration information. Since pixel values ​​and spatial distribution are constrained by brightness configuration information and image structure configuration information, the generation results are reproducible and controllable, and can be directly used for functional verification and hardware testing of image processing chips.

[0099] In one possible implementation, the method also includes:

[0100] The test results are obtained after simulating or measuring the chip hardware functional modules based on the image stimulus file. The test results include functional coverage and defect location information.

[0101] The image feature parameters are adjusted based on the test results, and the adjusted image feature parameters are used to update the test image configuration information.

[0102] The chip hardware functional modules are the test objects, including the image processing module, image processing hardware, and image processing IP mentioned in the above embodiments.

[0103] In practical implementation, after importing the image stimulus file, the verification platform records the coverage statistics during simulation or actual testing and outputs defect location information corresponding to abnormal waveforms, register states, or image output deviations. The processing unit performs threshold judgment on the functional coverage and, in conjunction with the defect location information, determines whether the current image feature parameters need to be expanded, contracted, or shifted. For example, when the coverage of a certain functional block is lower than a preset threshold, the sampling density of the corresponding brightness range can be increased, or the variation range of sub-block width and sub-block height can be expanded. When the defect location information points to edge distortion or local misalignment of a specific module, the effective pixel bit width or sub-block parameters can be reset around the abnormal area so that the subsequently generated image samples concentrate on covering this type of condition. After recalculation, the adjusted image feature parameters generate new test image configuration information, which is used for the regeneration of subsequent image stimulus files.

[0104] This method feeds test results back into image feature parameters, allowing the test image configuration information to be dynamically updated based on coverage and defect location results. This ensures that the subsequently generated image excitation sources are closer to the functional weaknesses and anomaly locations of the image processing hardware. The above method achieves a parameter-controllable excitation generation approach by analyzing high-frequency fault risk points in the image. By combining a scheme where all key parameters (brightness, boundary, noise, texture) can be configured and generated, it accurately covers extreme scenarios (low illumination, high contrast, boundary overflow, color banding). This targeted excitation generation scheme for high-frequency fault verification points solves the problem of low efficiency from completely random image input.

[0105] In one possible implementation, the packing parameters also include packing bit width parameters and pixel value truncation and limiting parameters; correspondingly, the test image configuration information also includes file packing bit width and truncation flag; such as Figure 3 As shown, converting the test image into an image stimulus file in the target format includes:

[0106] Step 301: Extract the two-dimensional pixel value array of the test image into a one-dimensional pixel sequence according to the preset image scanning order;

[0107] Step 302: Perform numerical preprocessing on each pixel value in the one-dimensional pixel sequence, and limit each pixel value to between the preset minimum and maximum values ​​according to the truncation flag.

[0108] Step 303: Based on the effective bit width of the pixel and the file packing bit width, perform bit width expansion on each pixel value in the test image. When the file packing bit width is greater than the effective bit width of the pixel, pad the high bits of the binary effective data of each pixel value with the corresponding number of zero bits so that the number of bits occupied by each pixel value is consistent with the file packing bit width.

[0109] Step 304: Pack the pixel sequence composed of each pixel value after bit width expansion into a continuous binary byte stream according to the preset byte order arrangement rules, and write the binary byte stream directly into the target file without file header and without compression packaging to generate the target format image stimulus file.

[0110] In practical implementation, the test image can be stored in memory as a two-dimensional array. The image scanning order can adopt a row-major order from left to right and top to bottom, or a column-major order consistent with the target interface. The specific image scanning order is determined by the target format or verification platform. For example, in one embodiment, the image scanning order adopts a row-major order from left to right and top to bottom. Starting from the first pixel in the top left corner, the pixel data in the two-dimensional pixel value group is extracted one by one in the order from left to right and top to bottom. The two-dimensional pixel value array in memory is stretched into a linear one-dimensional pixel sequence according to the row scanning order to determine the writing order of each pixel.

[0111] In the numerical preprocessing stage, the processing unit first constrains the pixel values ​​based on the truncation flag, ensuring that the output data meets the subsequent packing requirements. In the bit-width expansion stage, if the file packing bit width is greater than the effective pixel bit width, zeros are padded to the high bits of the effective binary data of the pixel. The number of zeros is determined by the difference between the two, ensuring that each pixel occupies a fixed bit width in the file. Subsequently, the packing unit concatenates consecutive pixels according to a preset byte order rule to form a binary byte stream, which is then directly written to the target file (without a file header or compressed encapsulation) to obtain an image stimulus file that can be directly read by a simulation platform or hardware interface.

[0112] This processing method linearizes, constrains, unifies bit width, and encapsulates byte streams on the two-dimensional pixel value array, and links these processing stages together to ensure that pixel data is output according to the target interface's storage rules and that the file content is consistent with the target format. Since the output file does not introduce additional header information or compression structures, the verification platform can directly read the valid pixel data, thereby reducing format adaptation complexity and improving the compatibility of image excitation files with different bit widths and packing rules.

[0113] In one possible implementation, the packing parameters also include negative zero value processing parameters, data format parameters, and data offset parameters; correspondingly, the test image configuration information also includes a negative zero value processing flag, a floating-point format enable flag, and an overall data offset; before packing the pixel sequence composed of the bit-width-expanded pixel values ​​into a continuous binary byte stream according to a preset byte order arrangement rule, it also includes:

[0114] When the floating-point format flag is enabled, the pixel values ​​after bit-width expansion are converted into the binary memory representation corresponding to half-precision floating-point numbers;

[0115] Based on the negative zero value processing flag, the negative zero values ​​in the converted pixel values ​​are corrected to positive zero values;

[0116] Based on the overall data offset, the pixel values ​​after being processed for negative zero are shifted left by the overall binary shift operation to obtain the processed pixel sequence;

[0117] The processed pixel sequence is used as the pixel sequence to be packaged.

[0118] In practical implementation, when the data format parameter in the test image configuration information indicates floating-point format, the floating-point format flag is defined to indicate that it is enabled. In this case, the pixel values ​​after bit-width expansion must first be mapped to floating-point numbers according to a preset conversion relationship, and then rewritten into the binary code corresponding to the half-precision floating-point number. Under floating-point format, the negative zero value in the pixel value obtained after conversion is identified based on the negative zero value processing flag and corrected to a positive zero value. When the data format parameter does not indicate floating-point format, the binary value after bit-width expansion is directly retained. Subsequently, the overall data offset is read, and a left shift operation of the same number of bits is performed on each pixel value to obtain the processed pixel sequence, which is then sent to the packing buffer as input for subsequent byte order arrangement and continuous byte stream output. For example, if the half-precision floating-point encoding format used is FP16, the pixel data is written to the file in FP16 binary format to adapt to the simulation input of the floating-point IP.

[0119] In the above processing, the negative zero value handling parameters, data format parameters, and data offset parameters jointly define the representation and bit-level position of pixel values ​​before they enter the byte stream packaging. Format conversion, negative zero value correction, and left shift processing all act on the pixel sequence to be packaged itself. Therefore, the binary byte stream subsequently formed according to the preset byte order rules can directly meet the data organization requirements of the target file. By integrating floating-point encoding, offset shifting, and byte stream packaging into a unified configuration, the same set of image excitation generation logic can be adapted to different data formats and storage layouts, thereby improving the consistency and reproducibility of test image output.

[0120] In this application, during the pre-silicon functional verification stage of the image processing chip, verification engineers conduct functional tests on the image processing IP using the UVM verification platform. The image processing IP includes modules such as geometric correction, edge detection, and abnormal pixel calibration. For a scenario where a vision chip project needs to verify the distortion correction capability of the geometric correction module, the user inputs image feature parameters via command line or configuration file. After receiving the image feature parameters, the system parses them. The image feature parameters include at least the brightness range and pixel bit width parameters used to determine the image pixel characteristics, sub-block parameters used to determine the image spatial structure, and packing parameters used to determine the output format. The sub-block parameters include sub-block width and sub-block height.

[0121] Specifically, the image feature parameters specify the excitation source type, image resolution, tile size, brightness range, and noise intensity. The excitation source type, pic_list_select=5, corresponds to a black and white checkerboard pattern. The image resolution includes an image height hsize=1024, an image width vsize=768, a tile width bw=32, a tile height bh=4, a minimum pixel value min_v=0, a maximum pixel value max_v=255, and noise=5%. The system can also simultaneously input the packing bit width parameter pd=16, the data format parameter fp=0, and the random seed seed=123. The system parses the parameters and verifies their validity, checking if the resolution is an integer multiple of the tile size (1024 / 32=32, 768 / 4=192). After confirming the parameters are valid, a parameterized configuration table is generated for subsequent calls.

[0122] Brightness configuration information is generated based on pixel bit width parameters and brightness range. The brightness range includes the maximum and minimum brightness values; in this scenario, the maximum brightness value is 255, and the minimum brightness value is 0. Image structure configuration information is determined based on sub-block width and sub-block height. This image structure configuration information is used to determine the pixel block division granularity when generating subsequent test images; in this scenario, the sub-block width is 32, and the sub-block height is 4. These are then combined with packaging parameters to form test image configuration information and generation information. The generation information includes the target generation mode and target format. The test image configuration information includes a truncation flag, a negative zero value handling flag, the effective pixel bit width, the file packaging bit width, a floating-point format enable flag, and the overall data offset. The target generation mode may include at least one of the first mode, the second mode, and the third mode. In this instance, the first mode for generating a black and white checkerboard image is determined by pic_list_select=5. The target format includes at least one of RAW format or BIN format. In this scenario, the target format is a .raw file. The file packing bit width is determined to be 16 bits by pd=16, and the data format parameter is determined to disable FP16 format by fp=0.

[0123] Specifically, a test image is generated based on the target generation mode and the test image configuration information. The test image includes a two-dimensional pixel value array. First, according to the sub-block width and sub-block height in the image structure configuration information, the initial image is divided into multiple sub-blocks. Under the conditions of resolution hsize=1024, vsize=768, and Tile block size of 32×4, the image region is divided into corresponding sub-blocks. Based on the brightness configuration information, the first pixel value and the second pixel value are determined. In this scenario, the first pixel value can take the maximum brightness value of 255, and the second pixel value can take the minimum brightness value of 0. The system first initializes a completely black image, and then alternately fills each Tile block with white and black pixels to form a black and white checkerboard image to simulate geometric distortion scenarios. Subsequently, according to the noise=5% parameter, 5% random pixel values ​​are inserted at random positions. The random pixel values ​​range from 0 to 255 to simulate noise interference in distortion correction scenarios. Finally, a two-dimensional pixel value array covering the testing requirements of the geometric distortion correction function is generated.

[0124] After generating the two-dimensional pixel value array, the test image is extracted into a one-dimensional pixel sequence according to a preset image scanning order, and the pixel values ​​in the one-dimensional pixel sequence are preprocessed. Based on the truncation flag, each pixel value is limited to a preset minimum and maximum value, which in this scenario can be limited to 0 and 255. Subsequently, the bit width of each pixel value is extended according to the effective pixel bit width and the file packing bit width. In this scenario, the pixel value array is converted to a 16-bit fixed-point format .raw file based on pd=16. When the file packing bit width is greater than the effective pixel bit width, the high-order bits of the effective binary data of each pixel value are padded with the corresponding number of zero bits. For example, an 8-bit pixel value is padded with zeros to become 16 bits, ensuring that the number of bits occupied by each pixel value is consistent with the file packing bit width and is compatible with the input requirements of the target IP.

[0125] Before byte stream packaging, if the floating-point format enable flag indicates a period, meaning the data is in floating-point format, then each pixel value after bit-width expansion is converted to the binary memory representation corresponding to a half-precision floating-point number. In this scenario, fp=0, disabling the FP16 format, thus maintaining the 16-bit fixed-point format. Then, based on the overall data offset, a global binary left shift operation is performed on each pixel value after bit-width expansion or floating-point conversion to obtain the processed pixel sequence. The processed pixel sequence is then packaged into a continuous binary byte stream according to a preset byte order rule, and the binary byte stream is directly written to a target file without a header and without compression, generating an image stimulus file in the target format. The generated .raw file is directly linked to the UVM verification platform and injected into the IP module as input stimulus.

[0126] The generated image stimulus file is input into the image processing hardware for simulation or actual testing to obtain corresponding test results, including functional coverage and defect location information. In this scenario, the UVM verification platform calls the .raw file generated by this application and injects it into the input port of the geometric correction IP. The system then compares the IP output with the expected corrected image, which is a distortion-free checkerboard pattern. If correction failure is detected, including edge blurring or pixel misalignment, the system uses a fixed random seed (seed=123) to reproduce the problem and locate hardware defects, including cache read / write anomalies and interpolation algorithm errors. Based on the test results, the image feature parameters are adjusted, and the brightness configuration information, image structure configuration information, test image configuration information, and generation information are regenerated based on the adjusted image feature parameters. A new test image is then generated and converted into an image stimulus file in the target format to continue functional testing of the image processing IP, including geometric correction, edge detection, and abnormal pixel calibration.

[0127] In one embodiment, the image feature parameters also include mode parameters, which are used to determine the operating mode of the image stimulus source generation tool. For example, the image stimulus source generation tool includes the following three operating modes: image stimulus generation mode (pic_list_gen), PNG to Bayer format mode, and PNG to Raw format mode. The first mode is used to generate test image data based on the input image feature parameters; the second and third modes are used to convert ordinary images into hardware simulation data.

[0128] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0129] Based on the same inventive concept, this application also provides an image excitation source generation apparatus. The solution provided by this apparatus is similar to the solution described in the above method. Therefore, the specific limitations of one or more image excitation source generation apparatus embodiments provided below can be found in the limitations of the image excitation source generation method above, and will not be repeated here.

[0130] Figure 4 This is a schematic diagram of the image excitation source generation device provided in this application, as shown below. Figure 4 As shown, the image excitation source generation apparatus provided in this embodiment includes:

[0131] The data interaction module 401 is used to receive image feature parameters, which include at least the excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format.

[0132] The data parsing module 402 is used to determine the test image configuration information and generation information based on image feature parameters. The generation information includes the target generation mode and the target format.

[0133] The image generation module 403 is used to generate a test image based on the target generation mode and the test image configuration information. The test image includes a two-dimensional pixel value array corresponding to the image resolution.

[0134] File generation module 404 is used to convert the test image into an image stimulus file in a target format, including at least one of RAW format or BIN format.

[0135] In one possible implementation, the image feature parameters further include sub-block parameters for determining the image spatial structure, the sub-block parameters including sub-block width and sub-block height; the data parsing module 402 is specifically used for:

[0136] Based on the sub-block width and sub-block height, the image structure configuration information is determined. This image structure configuration information is used to determine the pixel block division granularity when generating subsequent test images.

[0137] In one possible implementation, the data parsing module 402 is specifically used for:

[0138] Based on the effective bit width of the pixel and the brightness range, brightness configuration information is generated. The brightness range includes the maximum brightness value and the minimum brightness value.

[0139] In one possible implementation, the target generation mode includes a first mode; the image generation module 403 is specifically used for:

[0140] Based on the image structure configuration information, the initial image is divided into multiple sub-blocks;

[0141] When the target generation mode is the first mode, the first pixel value and the second pixel value are determined based on the brightness configuration information, and the first pixel value and the second pixel value are alternately filled in different sub-blocks to generate a checkerboard image. The checkerboard image is composed of sub-blocks with alternating distribution of the two types of pixel values.

[0142] In one possible implementation, the target generation mode includes at least one of a second mode and a third mode; the image generation module 403 is specifically used for:

[0143] When the target generation mode is the second mode, a configurable brightness image is generated based on the brightness configuration information, and random values ​​are filled into the pixel positions in the configurable brightness image that are proportionally constrained and randomly distributed.

[0144] When the target generation mode is the third mode, a uniformly varied image is generated based on the brightness configuration information. The pixel values ​​of the uniformly varied image vary uniformly in at least one direction and remain unchanged in other directions.

[0145] In one possible implementation, the data interaction module 401 is also used for:

[0146] The test results are obtained after simulating or measuring the chip hardware functional modules based on the image stimulus file. The test results include functional coverage and defect location information.

[0147] Adjust the image feature parameters based on the test results, and use the adjusted image feature parameters to redetermine the test image configuration information.

[0148] In one possible implementation, the packing parameters also include packing bit width parameters and pixel value truncation and limiting parameters; correspondingly, the test image configuration information also includes file packing bit width and truncation flag; the file generation module 404 is specifically used for:

[0149] According to the preset image scanning order, the two-dimensional pixel value array of the test image is extracted into a one-dimensional pixel sequence;

[0150] Numerical preprocessing is performed on each pixel value in the one-dimensional pixel sequence, and each pixel value is limited to a preset minimum and maximum value according to the truncation flag.

[0151] Based on the effective bit width of the pixel and the file packing bit width, the bit width of each pixel value in the test image is extended. When the file packing bit width is greater than the effective bit width of the pixel, the corresponding number of zero bits are padded to the high bits of the effective binary data of each pixel value so that the number of bits occupied by each pixel value is consistent with the file packing bit width.

[0152] The pixel sequence composed of pixel values ​​after bit-width expansion is packaged into a continuous binary byte stream according to a preset byte order rule, and the binary byte stream is directly written into a target file without a file header and without compression encapsulation to generate an image stimulus file in the target format.

[0153] In one possible implementation, the packaging parameters also include negative zero value processing parameters, data format parameters, and data offset parameters; correspondingly, the test image configuration information also includes a negative zero value processing flag, a floating-point format enable flag, and an overall data offset; the file generation module 404 is specifically used for:

[0154] When the floating-point format flag is enabled, the pixel values ​​after bit-width expansion are converted into the binary memory representation corresponding to half-precision floating-point numbers;

[0155] Based on the negative zero value processing flag, the negative zero values ​​in the converted pixel values ​​are corrected to positive zero values;

[0156] Based on the overall data offset, the pixel values ​​after being processed for negative zero are shifted left by the overall binary shift operation to obtain the processed pixel sequence;

[0157] The processed pixel sequence is used as the pixel sequence to be packaged.

[0158] The image excitation source generation device provided in this embodiment can execute the method provided in the above method embodiment. Its implementation principle and technical effect are similar, and will not be described in detail here.

[0159] Figure 5 A schematic diagram of the structure of the computer device provided in this application. Figure 5 As shown, the computer device 50 provided in this embodiment includes at least one processor 501 and a memory 502. Optionally, the computer device 50 further includes a communication component 503. The processor 501, memory 502, and communication component 503 are connected via a bus 504.

[0160] In the specific implementation process, at least one processor 501 executes computer execution instructions stored in memory 502, causing at least one processor 501 to execute the above-described image excitation source generation method.

[0161] The specific implementation process of processor 501 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.

[0162] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0163] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0164] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0165] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described image excitation source generation method.

[0166] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described image excitation source generation method.

[0167] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0168] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0169] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0170] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0171] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0172] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0173] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0174] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope.

Claims

1. A method for generating an image excitation source, characterized in that, The method includes: Receive image feature parameters, which include at least the excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format; Based on the image feature parameters, test image configuration information and generation information are determined. The generation information includes a target generation mode and a target format. The test image configuration information includes at least one of brightness configuration information and image structure configuration information. The image structure configuration information is used to determine the pixel block division granularity when generating the test image in the future. Based on the target generation mode, a test image is generated according to the test image configuration information. The test image includes a two-dimensional pixel value array corresponding to the image resolution. The test image is converted into an image stimulus file in the target format, wherein the target format includes at least one of RAW format or BIN format; The target generation mode includes at least one of a first mode, a second mode, and a third mode; the step of generating a test image based on the target generation mode and the test image configuration information includes: When the target generation mode is the first mode, the initial image is divided into multiple sub-blocks according to the image structure configuration information; the first pixel value and the second pixel value are determined based on the brightness configuration information, and the first pixel value and the second pixel value are alternately filled in different sub-blocks to generate a checkerboard image, wherein the checkerboard image is composed of sub-blocks with alternating distribution of the two pixel values; When the target generation mode is the second mode, a configurable brightness image is generated based on the brightness configuration information, and the pixel positions in the configurable brightness image that are proportionally constrained and randomly distributed are filled with random values. When the target generation mode is the third mode, a uniformly varied image is generated based on the brightness configuration information. The pixel values ​​of the uniformly varied image vary uniformly in at least one direction and remain unchanged in other directions.

2. The method according to claim 1, characterized in that, The image feature parameters further include sub-block parameters for determining the image spatial structure, wherein the sub-block parameters include sub-block width and sub-block height; the step of determining the test image configuration information based on the image feature parameters includes: Based on the sub-block width and the sub-block height, the image structure configuration information is determined.

3. The method according to claim 1, characterized in that, The step of determining the test image configuration information based on the image feature parameters includes: Based on the effective bit width of the pixel and the brightness range, brightness configuration information is generated, wherein the brightness range includes a maximum brightness value and a minimum brightness value.

4. The method according to claim 1, characterized in that, The method further includes: The test results are obtained after simulating or testing the chip hardware functional modules based on the image stimulus file. The test results include functional coverage and defect location information. The image feature parameters are adjusted based on the test results, and the adjusted image feature parameters are used to redetermine the test image configuration information.

5. The method according to claim 1, characterized in that, The packaging parameters also include packaging bit width parameters and pixel value truncation and limiting parameters; correspondingly, the test image configuration information also includes file packaging bit width and truncation flag; converting the test image into an image stimulus file of the target format includes: According to the preset image scanning order, the two-dimensional pixel value array of the test image is extracted into a one-dimensional pixel sequence; Numerical preprocessing is performed on each pixel value in the one-dimensional pixel sequence, and each pixel value is limited to a preset minimum and maximum value according to the truncation flag. Based on the effective bit width of the pixel and the file packing bit width, the bit width of each pixel value in the test image is extended. When the file packing bit width is greater than the effective bit width of the pixel, the corresponding number of zero bits are padded to the high bits of the binary effective data of each pixel value so that the number of bits occupied by each pixel value is consistent with the file packing bit width. The pixel sequence composed of pixel values ​​after bit-width expansion is packaged into a continuous binary byte stream according to a preset byte order rule, and the binary byte stream is directly written into a target file without a file header and without compression encapsulation to generate the image stimulus file of the target format.

6. The method according to claim 5, characterized in that, The packaging parameters also include negative zero value processing parameters, data format parameters, and data offset parameters; correspondingly, the test image configuration information also includes a negative zero value processing flag, a floating-point format enable flag, and an overall data offset. Before packaging the pixel sequence composed of pixel values ​​after bit-width expansion into a continuous binary byte stream according to a preset byte order rule, the process further includes: When the floating-point format flag is enabled, each pixel value after bit-width expansion is converted into the binary memory representation corresponding to a half-precision floating-point number; Based on the negative zero value processing flag, the negative zero values ​​in the converted pixel values ​​are corrected to positive zero values; Based on the overall offset of the data, the pixel values ​​after being processed for negative zero are shifted left by the overall binary operation to obtain the processed pixel sequence; The processed pixel sequence is used as the pixel sequence to be packaged.

7. An image excitation source generation apparatus, characterized in that, The device includes: The data interaction module is used to receive image feature parameters, which include at least the excitation source type, image resolution, brightness range and effective bit width of the pixels used to determine the characteristics of the image pixels, and packing parameters used to determine the output format. The data parsing module is used to determine test image configuration information and generation information based on the image feature parameters. The generation information includes a target generation mode and a target format. The test image configuration information includes at least one of brightness configuration information and image structure configuration information. The image structure configuration information is used to determine the pixel block division granularity when generating the test image in the future. An image generation module is used to generate a test image based on the target generation mode and the test image configuration information, wherein the test image includes a two-dimensional pixel value array corresponding to the image resolution; The file generation module is used to convert the test image into an image stimulus file of the target format, wherein the target format includes at least one of RAW format or BIN format; The target generation mode includes at least one of a first mode, a second mode, and a third mode; the step of generating a test image based on the target generation mode and the test image configuration information includes: When the target generation mode is the first mode, the initial image is divided into multiple sub-blocks according to the image structure configuration information; the first pixel value and the second pixel value are determined based on the brightness configuration information, and the first pixel value and the second pixel value are alternately filled in different sub-blocks to generate a checkerboard image, wherein the checkerboard image is composed of sub-blocks with alternating distribution of the two pixel values; When the target generation mode is the second mode, a configurable brightness image is generated based on the brightness configuration information, and the pixel positions in the configurable brightness image that are proportionally constrained and randomly distributed are filled with random values. When the target generation mode is the third mode, a uniformly varied image is generated based on the brightness configuration information. The pixel values ​​of the uniformly varied image vary uniformly in at least one direction and remain unchanged in other directions.

8. A computer device, characterized in that, include: Memory, processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory, causing the processor to perform the method as described in any one of claims 1-6.

Images