Superconducting transmission line

Abstract

The application provides a superconducting transmission line, comprising: a first ground plane layer to an Nth ground plane layer arranged in sequence according to formation sequence; an ith signal structure arranged between the ith ground plane layer and an (i+1)th ground plane layer; the ith signal structure comprises an ith signal layer, the ith signal layer comprises at least one signal line; the projections of the signal lines of two adjacent signal layers on a first setting plane and a second setting plane are staggered with each other; the first setting plane is a plane parallel to any one of the first ground plane layer to the Nth ground plane layer, and the second setting plane is a plane perpendicular to any one of the first ground plane layer to the Nth ground plane layer; at least one side of the signal line of the ith signal layer is provided with an ith communication channel, the ith ground plane layer and the (i+1)th ground plane layer are electrically connected through the ith communication channel; the projections of the communication channels of two adjacent signal structures on the first setting plane and the second setting plane are staggered with each other.

Description

[0001] This application claims priority to the invention application with application number "2026110939517", application date July 22, 2026, entitled "Superconducting Transmission Line". Technical Field

[0002] This application relates to the field of superconducting transmission technology, and particularly to superconducting transmission lines. Background Technology

[0003] In superconducting quantum computing systems, quantum computing chips typically operate at cryogenic environments ranging from millikelvin to several kelvin. The manipulation of qubits, frequency tuning, resonant cavity readout, coupler control, and cryogenic amplification links all require the transmission of electrical or microwave signals via transmission lines between room-temperature control electronics, cryogenic modules at different temperature levels, quantum chip packaging structures, and the quantum computing chip itself. As the number of qubits on a quantum computing chip increases from tens to hundreds or even tens of thousands, the number of control lines, readout lines, and auxiliary bias lines also increases significantly. All control lines, readout lines, and auxiliary bias lines can be implemented using transmission lines. Therefore, the integration density, signal loss, thermal load, crosstalk suppression capability, and mechanical deployability of cryogenic interconnect systems have become critical engineering problems affecting the expansion of large-scale quantum computing systems.

[0004] Traditional solutions typically use coaxial or semi-rigid coaxial cables to connect room-temperature electronics, different temperature stages of the refrigerator, and quantum chip packages. However, coaxial or semi-rigid coaxial cables are relatively large, with limitations on bending and arrangement. When the number of qubits reaches a large-scale integration level, continuing to use a large number of independent coaxial cables not only makes it difficult to complete high-density wiring within the limited space of the refrigerator, but also significantly increases the heat load conducted from the high-temperature stage to the low-temperature stage, compressing the cryogenic cooling margin. Furthermore, the increase in the number of cables also leads to problems such as assembly complexity, decreased reliability, an increase in the number of interfaces, and difficulties in system maintenance. Although ordinary flexible circuits or microstrip / strip lines can improve integration, they are prone to interlayer capacitive coupling, magnetic coupling, common-mode crosstalk, and undesirable cavity or slot modes when conducting high-density wiring in multiple layers. Summary of the Invention

[0005] This application provides a superconducting transmission line.

[0006] This application provides a superconducting transmission line, comprising: a first ground plane layer to an Nth ground plane layer arranged sequentially in the order of their formation; wherein N is an integer greater than 1; an i-th level signal structure disposed between the i-th ground plane layer and the (i+1)-th ground plane layer; wherein i is an integer greater than or equal to 1 and less than N; the i-th level signal structure includes an i-th signal layer, the i-th signal layer including at least one signal line; the projections of the signal lines of adjacent signal layers on a first setting surface and a second setting surface are staggered from each other; the first setting surface is a surface parallel to any one of the first to Nth ground plane layers, and the second setting surface is a surface perpendicular to any one of the first to Nth ground plane layers; an i-th connecting channel is provided on at least one side of the signal line of the i-th signal layer, and the i-th ground plane layer and the (i+1)-th ground plane layer are electrically connected through the i-th connecting channel; the projections of the connecting channels of adjacent signal structures on the first setting surface and the second setting surface are staggered from each other.

[0007] In some exemplary embodiments, the superconducting transmission line further includes: a first protective layer and a second protective layer; the first ground plane layer to the Nth ground plane layer are disposed between the first protective layer and the second protective layer.

[0008] In some exemplary embodiments, the i-th level signal structure further includes: a (2i-1)-th dielectric layer and a 2i-th dielectric layer; the i-th signal layer is located between the (2i-1)-th dielectric layer and the 2i-th dielectric layer, and the i-th signal layer is filled with filler material between adjacent signal lines or on both sides of the signal lines at both ends.

[0009] In some exemplary embodiments, the i-th signal layer further includes an i-th end connection region, the i-th end connection region being disposed in the end region of the i-th signal layer, and the signal lines in the i-th signal layer being electrically connected to an external structure through the i-th end connection region.

[0010] In some exemplary embodiments, the projections of the signal lines of two adjacent signal layers onto the first setting surface are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved; the projections of the signal lines of two adjacent signal layers onto the second setting surface are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved.

[0011] In some exemplary embodiments, the lateral misalignment distance of the center lines of the projections of the signal lines of two adjacent signal layers onto the second setting surface is A times the width of the signal lines; where A is a number greater than 0; the lateral misalignment distance of the center lines of the projections of the connecting channels of two adjacent signal structures onto the second setting surface is B times the width of the connecting channels; where B is a number greater than 0.

[0012] In some exemplary embodiments, the projections of the connecting channels of adjacent signal structures onto the first setting surface satisfy a continuous staggered arrangement, or a periodic staggered arrangement, or a segmented staggered arrangement, or an interlaced grid arrangement; the projections of the connecting channels of adjacent signal structures onto the second setting surface continuously satisfy a staggered arrangement, or a periodic staggered arrangement, or a segmented staggered arrangement, or an interlaced grid arrangement.

[0013] In some exemplary embodiments, the i-th connecting channel includes at least one of the following: a shielding groove and a ground connection structure; the shielding groove includes at least one of the following: a metallized trench, a blind groove, a through groove, a sidewall stepped groove, and an inclined wall groove; the ground connection structure includes at least one of the following: a blind via, a through hole, an array of ground vias, and a ground bridge.

[0014] The superconducting transmission line provided in this application embodiment has signal lines of adjacent signal layers whose projections on the first and second setting planes are staggered, reducing capacitive and magnetic coupling between adjacent layers and lowering electromagnetic coupling. The signal lines in each signal layer are surrounded by two adjacent ground plane layers and lateral connecting channels, forming a coaxial shielding structure, which improves the return path and reduces radiation leakage. The projections of the connecting channels of adjacent signal structures on the first and second setting planes are staggered, avoiding continuous overlap of connecting channels or weak sections in the thickness direction, reducing the risk of cracks during bending, thermal cycling, thinning, and release. Through the stacking and staggered layout of multi-level signal structures, more superconducting signal channels can be realized within a limited planar area.

[0015] The flexible superconducting transmission line provided in this application can meet the requirements of high-density, low-loss, low-thermal-load, and low-crosstalk signal interconnection in superconducting quantum computing, cryogenic quantum measurement and control, and quantum chip packaging. It provides a scalable cryogenic interconnection solution for the transmission of control signals and readout signals of large-scale quantum computing chips, and solves key engineering bottlenecks such as insufficient wiring space inside the refrigerator after the number of qubits increases, excessive thermal load of traditional coaxial lines, and difficulty in controlling transmission loss and crosstalk between channels. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the cross-sectional structure of a superconducting transmission line provided in one embodiment of this application; Figure 2 This is a schematic diagram of a portion of a flexible superconducting transmission line provided in an embodiment of this application; Figure 3 for Figure 2 A schematic diagram of the cross-section along the AB direction. Detailed Implementation

[0017] To enable those skilled in the art to better understand the technical solution of this application, the superconducting transmission line provided in this application will be described in detail below with reference to the accompanying drawings.

[0018] Exemplary embodiments will be described more fully below with reference to the accompanying drawings; however, these exemplary embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this application.

[0019] Where there is no conflict, the various embodiments of this application and the features thereof may be combined with each other.

[0020] As used herein, the term “and / or” includes any and all combinations of at least one related enumerated entry.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application. As used herein, the singular forms “a” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of at least one other feature, integral, step, operation, element, component, and / or group thereof is not excluded.

[0022] The embodiments described herein can be described with reference to plan views and / or cross-sectional views, using the ideal schematic diagrams of this application. Therefore, the example illustrations can be modified according to manufacturing techniques and / or tolerances. Therefore, the embodiments are not limited to those shown in the drawings, but include modifications to configurations formed based on manufacturing processes. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown in the figures illustrate specific shapes of areas of an element, but are not intended to be limiting.

[0023] In the description of the embodiments, unless otherwise expressly specified and limited, the terms "set," "connect," etc., should be interpreted broadly. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or a connection through an intermediate medium, or it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above within the scope of this application based on the specific circumstances.

[0024] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this application, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.

[0025] In some exemplary embodiments of this application, superconductivity refers to the state in which certain materials have zero electrical resistance and perfect diamagnetism under conditions such as low temperature. Superconducting materials can be classified according to their composition into elements, alloys, compounds, etc.; 28 metallic elements exhibit superconductivity under normal pressure, among which niobium has the highest critical temperature of 9.26 K, and scandium can reach a superconducting temperature of 36 K under high pressure.

[0026] In some exemplary embodiments of this application, low-temperature superconducting materials refer to superconducting materials with a critical temperature less than or equal to a set temperature.

[0027] In some exemplary embodiments of this application, a superconducting signal refers to a signal transmitted in a superconducting material.

[0028] In some exemplary embodiments of this application, flexible superconducting transmission lines can be used to transmit electrical signals in cryogenic environments. Flexible superconducting transmission lines include various types such as microstrip lines, coplanar waveguides, striplines, and multilayer flexible cables with upper and lower ground planes. Among these, microstrip lines lack the upper ground plane layer compared to other types of flexible superconducting transmission lines. The difference between coplanar waveguides and striplines lies in the patterning of the signal layer. The fabrication methods described in the embodiments of this application are applicable to, but not limited to, these types of flexible superconducting transmission lines.

[0029] In some exemplary embodiments of this application, high-resistivity silicon is a special type of ultra-high resistivity, high-purity single-crystal silicon material. Unlike ordinary silicon, which prioritizes conductivity, high-resistivity silicon emphasizes its "high-resistivity insulation" properties. High-resistivity silicon is a fundamental material required in high-end fields such as radio frequency communication, precision sensing, and deep space exploration. The industry generally defines high-purity silicon materials with a resistivity greater than 1000 ohm-cm (Ω●cm) as high-resistivity silicon, and some ultra-high-purity silicon materials can even reach resistivities of tens of thousands of Ω●cm or higher.

[0030] In some exemplary embodiments of this application, an ultrathin silicon dielectric layer refers to a silicon layer whose thickness is reduced to the point where it can be bent. In some exemplary embodiments, if the material of the ultrathin silicon dielectric layer is high-resistivity silicon, the thickness of the ultrathin silicon dielectric layer can be between 5 micrometers (μm) and 50 μm, further, the thickness of the ultrathin silicon dielectric layer can be between 10 μm and 30 μm, and even further, the thickness of the ultrathin silicon dielectric layer can be between 10 μm and 20 μm.

[0031] In some exemplary embodiments of this application, high-resistivity floating zone silicon refers to high-purity, high-resistivity single-crystal silicon grown by the floating zone method (FZ). The core characteristic of high-resistivity floating zone silicon is its extremely high purity, making it irreplaceable in cutting-edge fields such as terahertz, microwave radio frequency, and high-voltage power devices. The floating zone method is a special single-crystal silicon growth process that does not use a quartz crucible during growth; the silicon material is in a "suspended" state, thus effectively avoiding contamination from the crucible, especially resulting in extremely low oxygen and carbon content. This high purity is the source of its superior performance.

[0032] Figure 1 This is a schematic diagram of the cross-sectional structure of a superconducting transmission line provided in one embodiment of this application.

[0033] Firstly, referring to Figure 1 One embodiment of this application provides a superconducting transmission line, which can be any one of a straight superconducting transmission line, a curved superconducting transmission line, a serpentine superconducting transmission line, a fan-out superconducting transmission line, etc.

[0034] In some exemplary embodiments, the superconducting transmission line includes: a first ground plane layer to an Nth ground plane layer arranged sequentially in the order of their formation; wherein N is an integer greater than 1; an i-th level signal structure disposed between the i-th ground plane layer and the (i+1)-th ground plane layer; wherein i is an integer greater than or equal to 1 and less than N; the i-th level signal structure includes an i-th signal layer, the i-th signal layer including at least one signal line; the projections of the signal lines of adjacent signal layers on a first setting surface and a second setting surface are staggered from each other; the first setting surface is a surface parallel to any one of the first to Nth ground plane layers, and the second setting surface is a surface perpendicular to any one of the first to Nth ground plane layers; an i-th connecting channel is provided on at least one side of the signal line of the i-th signal layer, and the i-th ground plane layer and the (i+1)-th ground plane layer are electrically connected through the i-th connecting channel; the projections of the connecting channels of adjacent signal structures on the first setting surface and the second setting surface are staggered from each other.

[0035] In some exemplary embodiments, such as Figure 2 As shown, the materials of the first to Nth ground plane layers are low-temperature superconducting materials.

[0036] In some exemplary embodiments, the low-temperature superconducting material may be a low-temperature superconducting material compatible with etching, release, and bonding processes.

[0037] In some exemplary embodiments, the low-temperature superconducting material may be any one of niobium (Nb), niobium nitride (NbN), niobium titanide (NbTi), niobium titanium nitride (NbTiN), aluminum (Al), titanium nitride (TiN), molybdenum rhenium alloy (MoRe), tantalum (Ta), etc.

[0038] In some exemplary embodiments, the thicknesses of the first to Nth ground plane layers can be set according to actual needs. For example, the thicknesses of the first to Nth ground plane layers can be selected between 100 nm and 1000 nm.

[0039] In some exemplary embodiments, a first ground plane layer may be formed on the first side of the support layer using a patterning technique or a peeling technique.

[0040] In some exemplary embodiments, the patterning technique generally includes steps such as depositing low-temperature superconducting materials and patterning.

[0041] In some exemplary embodiments, the patterning process may employ low-oxygen or oxygen-free inductively coupled plasma (ICP) or high-frequency inductively coupled plasma and RIE formulation to reduce damage to the polyimide.

[0042] In some exemplary embodiments, the stripping technique generally includes the following steps: spin-coating photoresist; exposure and development; depositing low-temperature superconducting material; and stripping the deposited low-temperature superconducting material in the photoresist solution.

[0043] In some exemplary embodiments, the first ground plane layer serves as a lower ground shield, forming the boundary of the flexible superconducting transmission line.

[0044] In some exemplary embodiments, the i-th level signal structure further includes: a (2i-1)-th dielectric layer and a 2i-th dielectric layer; the i-th signal layer is located between the (2i-1)-th dielectric layer and the 2i-th dielectric layer, and the i-th signal layer is filled with filler material between adjacent signal lines or on both sides of the signal lines at both ends, such as... Figure 2 As shown.

[0045] In some exemplary embodiments, the material of the (2i-1) dielectric layer may include any of the following: high-resistivity ultrathin silicon, polyimide, silicon dioxide (SiO2), silicon nitride (SiNx), alumina (Al2O3), sapphire, quartz, liquid crystal polymer (LCP), benzocyclobutene (BCB), and other composite materials.

[0046] In some exemplary embodiments, the material of the second dielectric layer may include any of the following: high-resistivity ultrathin silicon, polyimide, SiO2, SiNx, sapphire, quartz, LCP, BCB, and other composite materials.

[0047] In some exemplary embodiments, the filler may include any of the following: high-resistivity ultrathin silicon, polyimide, SiO2, SiNx, sapphire, quartz, LCP, BCB, indium, epoxy resin, or other composite materials.

[0048] In some exemplary embodiments, the thicknesses of the (2i-1)th dielectric layer and the 2ith dielectric layer can be set according to actual needs. For example, the thickness of the (2i-1)th dielectric layer can be selected between 1 μm and 30 μm, and can be designed according to the target characteristic impedance of the flexible superconducting transmission line. The target characteristic impedance of the flexible superconducting transmission line is determined based on parameters such as the width of the signal line in the i-th signal layer, the spacing between the i-th ground plane layer and the (i+1)-th ground plane layer, the thickness of the (2i-1)th dielectric layer, and the dielectric constant.

[0049] In some exemplary embodiments, the (2i-1) dielectric layer serves to achieve electrical isolation between the signal line in the i-th signal layer and the i-th ground plane layer, thereby preventing short circuits between the signal line in the i-th signal layer and the i-th ground plane layer, and together with the signal line in the i-th signal layer and the i-th ground plane layer, it defines the characteristic impedance of the flexible superconducting transmission line.

[0050] In some exemplary embodiments, the function of the second dielectric layer is to achieve electrical isolation between the signal line in the (i+1) signal layer and the (i+1) ground plane layer, thereby avoiding short circuits between the signal line in the (i+1) signal layer and the (i+1) ground plane layer, and together with the signal line in the (i+1) signal layer and the (i+1) ground plane layer, it defines the characteristic impedance of the flexible superconducting transmission line.

[0051] In some exemplary embodiments, polyimide can be spin-coated onto the first side of the i-th ground plane layer and the polyimide can be thermally cured in segments at different temperature ranges in a nitrogen or low-oxygen environment to remove solvent and complete imidization to form the (2i-1)th dielectric layer.

[0052] In some exemplary embodiments, polyimide can be spin-coated onto the first side of the (i+1)th ground plane layer and the polyimide can be thermally cured in segments at different temperature ranges in a nitrogen or low oxygen environment to remove solvent and complete imidization to form the secondi dielectric layer.

[0053] In some exemplary embodiments, the polyimide is a photosensitive polyimide or a non-photosensitive polyimide. For example, PI-2611, PI-2525, PI-574.

[0054] In some exemplary embodiments, the thickness of the filler is consistent with the thickness of the signal line.

[0055] In some exemplary embodiments, the filler serves to fill the regions on both sides of the signal line to improve interlayer flatness and support the (i+1)th dielectric layer, reduce step stress and void risk, and provide a dielectric region for the connection via between the i-th ground plane layer and the (i+1)th ground plane layer.

[0056] In some exemplary embodiments, polyimide can be spin-coated at the intervals of the signal lines in the i-th signal layer on the first side of the (2i-1) dielectric layer, and the polyimide can be thermally cured in segments at different temperature ranges in a nitrogen or low-oxygen environment to remove the solvent and complete the imidization to form a filler.

[0057] In some exemplary embodiments, when spin-coating polyimide, a thick film can be formed by two spin-coating layers.

[0058] In some exemplary embodiments, the non-photosensitive polyimide can be formed using O2-RIE patterning technology or ICP-RIE patterning technology.

[0059] In some exemplary embodiments, the photosensitive polyimide can be formed by exposure and development to form a window.

[0060] In some exemplary embodiments, the material of the signal line may be a low-temperature superconducting material, such as Nb, NBTi, NbTi, NBTiN, TiN, Al, MoRe, Ta, or other low-temperature superconducting materials.

[0061] In some exemplary embodiments, the thickness of the signal line can be set according to actual needs. For example, the thickness of the signal line can be selected in the range of 100 nm to 1000 nm.

[0062] In some exemplary embodiments, the signal line serves to transmit superconducting signals.

[0063] In some exemplary embodiments, the i-th signal layer may be formed on the first side of the (2i-1) dielectric layer using patterning or stripping techniques.

[0064] In some exemplary embodiments, the patterning technique generally includes steps such as depositing low-temperature superconducting materials and patterning.

[0065] In some exemplary embodiments, the patterning process may employ low-oxygen or oxygen-free ICP and RIE formulations to reduce damage to the polyimide.

[0066] In some exemplary embodiments, the stripping technique generally includes the following steps: spin-coating photoresist; exposure and development; depositing low-temperature superconducting material; and stripping the deposited low-temperature superconducting material in the photoresist solution.

[0067] In some exemplary embodiments, such as Figure 1 As shown, the projections of the signal lines of two adjacent signal layers on the first setting surface are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved; the projections of the signal lines of two adjacent signal layers on the second setting surface are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved. Figure 1 The diagram below illustrates an example where the projections of signal lines from two adjacent signal layers are offset from each other laterally on the first set surface. Figure 1 This is not intended to limit the scope of protection of the embodiments of this application.

[0068] In some exemplary embodiments, the lateral misalignment distance of the center lines of the projections of the signal lines of two adjacent signal layers on the second setting surface is A times the width of the signal lines; where A is a number greater than 0; the lateral misalignment distance of the center lines of the projections of the connecting channels of two adjacent signal structures on the second setting surface is B times the width of the connecting channels; where B is a number greater than 0.

[0069] In some exemplary embodiments, the width of the signal line can be as follows: Figure 1 As shown in the WS diagram, the lateral misalignment distance between the center lines of the projections of the signal lines of two adjacent signal layers on the second setting plane can be as follows: Figure 1 △S shown.

[0070] In some exemplary embodiments, A can be selected from a value range of 0.5 to 5.

[0071] In some exemplary embodiments, the lateral misalignment distance of the center line of the projection of the connecting channel of two adjacent signal structures onto the second setting plane can be as follows: Figure 1 As shown in △G, the width of the connecting channel can be as follows: Figure 1 WG is shown.

[0072] In some exemplary embodiments, the width of the connecting channel can be any one of the following: the maximum width of the connecting channel, the minimum width of the connecting channel, the width of the connecting channel at half the thickness, or the average of the maximum and minimum widths of the connecting channel.

[0073] In some exemplary embodiments, B can be selected from a value range of 0.5 to 10.

[0074] In some exemplary embodiments, the projections of the connecting channels of adjacent signal structures on the first setting surface satisfy a continuous staggered arrangement, or a periodic staggered arrangement, or a segmented staggered arrangement, or an interlaced grid arrangement; the projections of the connecting channels of adjacent signal structures on the second setting surface continuously satisfy a staggered arrangement, or a periodic staggered arrangement, or a segmented staggered arrangement, or an interlaced grid arrangement.

[0075] In some exemplary embodiments, the i-th communication channel includes at least one of the following: a shielding groove, a ground connection structure.

[0076] In some exemplary embodiments, the shielding groove includes at least one of the following: a metallized groove, a blind groove, a through groove, a sidewall stepped groove, and an inclined wall groove.

[0077] In some exemplary embodiments, the ground connection structure includes at least one of the following: blind via, through via, ground via array, and ground bridge.

[0078] In some exemplary embodiments, the metallized trench may include at least one of the following: continuous trench, straight trench, segmented trench, closed annular trench, rectangular trench, polygonal trench, U-shaped trench, and serpentine trench.

[0079] In some exemplary embodiments, the length direction of the trench window can be along the length direction of both sides of the signal line (e.g., Figure 2 (As shown in the CD direction) can extend and can also form a closed loop on one side of the signal line, such as a rectangular or polygonal shielding boundary.

[0080] In some exemplary embodiments, such as Figure 3 As shown, the cross-section of the connecting channel is an inverted trapezoid; the cross-section is a plane perpendicular to the length direction of the i-th signal layer. That is, the connecting channel has conical or sloping sidewalls, which are beneficial for subsequent deposition of materials covering the (i+1)-th surface layer.

[0081] In some exemplary embodiments, such as Figure 3 As shown, a dielectric hard mask remaining from the process of forming the i-th connecting channel is still retained between the 2i-th dielectric layer and the (i+1)-th ground plane layer.

[0082] In some exemplary embodiments, a dielectric hard mask refers to a masking layer that uses an inorganic non-metallic material or a metallic material as a pattern transfer layer. For example, a dielectric hard mask may include any of the following: silicon dioxide (SiO2), silicon nitride (SiNx), aluminum oxide (Al2O3), thick photoresist, chromium (Cr), Al, Ti, copper (Cu), or other dielectric hard masks whose release processes are compatible with the stop sacrificial layer.

[0083] In some exemplary embodiments, such as Figure 1As shown, the superconducting transmission line also includes: a first protective layer and a second protective layer; the first ground plane layer to the Nth ground plane layer are disposed between the first protective layer and the second protective layer.

[0084] In some exemplary embodiments, the first protective layer and the second protective layer may include at least one of an organic layer, an inorganic passivation layer, and an organic-inorganic composite layer.

[0085] In some exemplary embodiments, the material of the organic layer may be at least one of polyimide, parylene, benzocyclobutene, epoxy resin photoresist, liquid crystal polymer and fluoropolymer.

[0086] In some exemplary embodiments, the material of the inorganic passivation layer may be at least one of silicon dioxide (SiO2), silicon nitride (SiNx), silicon oxynitride, aluminum oxide (Al2O3), amorphous silicon, parylene, and diamond-like carbon (DLC).

[0087] In some exemplary embodiments, the polyimide is a photosensitive polyimide or a non-photosensitive polyimide. For example, PI-2611, PI-2525, PI-574.

[0088] In some exemplary embodiments, the thicknesses of the first protective layer and the second protective layer can be set according to actual needs. For example, the thickness of the protective layer can be selected between 1 μm and 30 μm.

[0089] In some exemplary embodiments, the first protective layer and the second protective layer provide mechanical protection, electrical insulation and encapsulation for the other layers.

[0090] In some exemplary embodiments, the i-th signal layer further includes an i-th end connection region, which is disposed in the end region of the i-th signal layer, and the signal lines in the i-th signal layer are electrically connected to an external structure through the i-th end connection region.

[0091] In some exemplary embodiments, the i-th end connection area may include: a pad, an indium pillar bonding pad, a probe test area, an adapter board connection area, or other low-temperature interconnect ports.

[0092] In some exemplary embodiments, the material of the surface bonding layer of the pads may be metal.

[0093] In some exemplary embodiments, the metal of the surface bonding layer of the pad can be any low-temperature compatible metal. For example, the low-temperature compatible metal can be any of Au, Pt, Pd, In, etc.

[0094] For example, the pads can be a stacked structure of Ti and Au, or a stacked structure of Ti, Pt and Au, or a stacked structure of Nb and Au, etc.

[0095] In some exemplary embodiments, the thickness of the pads can be determined according to the specific connection method.

[0096] In some exemplary embodiments, the pads serve to bond the signal layer of the flexible superconducting transmission line to an external connection carrier via any of the following methods: wire bonding, indium bump bonding, anisotropic conductive film, spring bonding, or cryogenic compatible connection. In some exemplary embodiments, the external connection carrier may be, for example, an adapter board, a ceramic substrate, a high-frequency printed circuit board, or a superconducting chip.

[0097] The superconducting transmission line provided in this application embodiment has signal lines of adjacent signal layers whose projections on the first and second setting planes are staggered, reducing capacitive and magnetic coupling between adjacent layers and lowering electromagnetic coupling. The signal lines in each signal layer are surrounded by two adjacent ground plane layers and lateral connecting channels, forming a coaxial shielding structure, which improves the return path and reduces radiation leakage. The connecting channels of adjacent signal structures have projections on the first and second setting planes that are staggered, avoiding continuous overlap of connecting channels or weak sections in the thickness direction, reducing the risk of cracks during bending, thermal cycling, thinning, and release. Through the stacking and staggered layout of multi-level signal structures, more superconducting signal channels can be realized within a limited planar area.

[0098] The flexible superconducting transmission line provided in this application can meet the requirements of high-density, low-loss, low-thermal-load, and low-crosstalk signal interconnection in superconducting quantum computing, cryogenic quantum measurement and control, and quantum chip packaging. It provides a scalable cryogenic interconnection solution for the transmission of control signals and readout signals of large-scale quantum computing chips, and solves key engineering bottlenecks such as insufficient wiring space inside the refrigerator after the number of qubits increases, excessive thermal load of traditional coaxial lines, and difficulty in controlling transmission loss and crosstalk between channels.

[0099] It will be understood by those skilled in the art that all or some of the steps, systems, or apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0100] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this application as set forth by the appended claims.

Claims

1. A superconducting transmission line, comprising: The first to Nth ground plane layers are arranged sequentially according to their formation order; where N is an integer greater than 1. An i-th level signal structure is provided between the i-th ground plane layer and the (i+1)-th ground plane layer; where i is an integer greater than or equal to 1 and less than N; the i-th level signal structure includes an i-th signal layer, and the i-th signal layer includes at least one signal line; the projections of the signal lines of two adjacent signal layers on a first setting surface and a second setting surface are staggered from each other; the first setting surface is a surface parallel to any one of the ground plane layers from the 1st ground plane layer to the Nth ground plane layer, and the second setting surface is a surface perpendicular to any one of the ground plane layers from the 1st ground plane layer to the Nth ground plane layer; An i-th connecting channel is provided on at least one side of the signal line of the i-th signal layer, and the i-th ground plane layer and the (i+1)-th ground plane layer are electrically connected through the i-th connecting channel; the projections of the connecting channels of adjacent signal structures on the first setting surface and the second setting surface are staggered from each other.

2. The superconducting transmission line of claim 1, further comprising: The first protective layer and the second protective layer; the first ground plane layer to the Nth ground plane layer are disposed between the first protective layer and the second protective layer.

3. The superconducting transmission line of any of claims 1-2, wherein, The i-th level signal structure further includes: a (2i-1)-th dielectric layer and a 2i-th dielectric layer; the i-th signal layer is located between the (2i-1)-th dielectric layer and the 2i-th dielectric layer, and the i-th signal layer is filled with filler material between adjacent signal lines or on both sides of the signal lines at both ends.

4. The superconducting transmission line of any of claims 1-2, wherein, The i-th signal layer also includes: The i-th end connection area is located in the end region of the i-th signal layer, and the signal lines in the i-th signal layer are electrically connected to the external structure through the i-th end connection area.

5. The superconducting transmission line of any of claims 1-2, wherein, The projections of the signal lines of two adjacent signal layers onto the first set surface are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved. The projections of the signal lines of two adjacent signal layers onto the second setting plane are staggered from each other along any one of the following directions: horizontal, vertical, oblique, or curved.

6. The superconducting transmission line of any of claims 1-2, wherein, The lateral misalignment distance of the center lines of the projections of the signal lines of two adjacent signal layers onto the second set surface is A times the width of the signal line; where A is a number greater than 0. The lateral misalignment distance of the center line of the projection of the connecting channel of two adjacent signal structures onto the second setting plane is B times the width of the connecting channel; where B is a number greater than 0.

7. The superconducting transmission line of any of claims 1-2, wherein, The projection of the connecting channels of two adjacent signal structures onto the first set surface satisfies the following: continuous staggered arrangement, periodic staggered arrangement, segmented staggered arrangement, or staggered grid arrangement. The projections of the connecting channels of adjacent signal structures onto the second set surface continuously satisfy the following arrangements: staggered arrangement, periodic staggered arrangement, segmented staggered arrangement, or staggered grid arrangement.

8. The superconducting transmission line of any of claims 1-2, wherein, The i-th connecting channel includes at least one of the following: a shielding groove, a ground connection structure; The shielding groove includes at least one of the following: metallized groove, blind groove, through groove, side wall stepped groove, and inclined wall groove; The ground connection structure includes at least one of the following: blind via, through via, ground via array, and ground bridge.

Images