A lithium iron phosphate battery full life cycle balancing method, system and medium

Abstract

The application discloses a lithium iron phosphate battery full-life-cycle equalization method and system and a medium; the method realizes deep matching of equalization decision and actual physical state of the battery by dynamically reconstructing equalization judgment boundaries and online identifying stripping polarization voltage interference according to real-time sensing of battery aging state and environmental temperature; meanwhile, the application fuses equalization scheduling and a heat dissipation limit of underlying hardware, introduces a temperature rise prediction mechanism based on electrochemical parameters, and constructs a closed-loop safety defense system from static to dynamic prediction; the application overcomes the risk of precision decline and hardware thermal runaway of a traditional equalization scheme after battery aging, and improves equalization efficiency, hardware reliability and system operation safety of the lithium iron phosphate battery pack in the full-life-cycle.

Description

Technical Field

[0001] This invention relates to the field of battery management, and in particular to a method, system, and medium for equalizing lithium iron phosphate batteries throughout their entire life cycle. Background Technology

[0002] Lithium iron phosphate batteries have been widely used in new energy vehicles and energy storage power stations due to their high safety, long cycle life and cost advantages. However, due to the micro-tolerances of the manufacturing process and the differences in the operating environment, the individual cells in the battery pack will inevitably exhibit the "weakest link" effect during long-term charge and discharge cycles. In order to maintain the overall usable capacity and life of the battery pack, it is necessary to introduce the equalization control technology of the battery management system.

[0003] Currently, there has been considerable exploration in the industry regarding the equalization control of lithium iron phosphate batteries. For example, the invention patent CN104600387B, "Active Equalization Method and System for Lithium Iron Phosphate Battery Packs," discloses an equalization strategy based on battery terminal voltage and state of charge. It mainly triggers the active equalization loop through a preset static voltage difference threshold or a static SOC lookup table mechanism.

[0004] However, when faced with complex full life cycle operating conditions and the physical limits of underlying hardware, the aforementioned existing technologies and similar conventional equalization schemes still have the following drawbacks: First, lithium iron phosphate batteries have unique physical characteristics of a flat voltage plateau region, and the width of this plateau region will exhibit nonlinear bidirectional contraction and convergence as the state of health (SOH) of the battery decays and the ambient temperature drops sharply; existing technologies rely only on the static parameters calibrated at the factory or fixed voltage thresholds as equalization judgment boundaries, without considering the erosion effect of aging on the electrochemical boundary, which leads to the system still using the early wide plateau region judgment logic when the battery is in the middle and late stages of its life cycle, which is very easy to cause misjudgment before the battery has actually left the plateau region, resulting in invalid repeated equalization actions, and even accelerating the degradation of battery materials; Secondly, under actual dynamic conditions such as high-rate fast charging or frequent acceleration and deceleration, the internal ohmic resistance and polarization resistance of the battery cell will generate polarization voltage drop. The terminal voltage collected by the existing technology is actually an inaccurate voltage mixed with polarization voltage. It lacks a mathematical decoupling mechanism to remove polarization voltage online. It directly performs equalization scheduling based on the terminal voltage difference containing polarization noise, which causes the BMS to frequently misjudge the artificially high voltage caused by the large internal resistance as the actual high charge, thereby executing incorrect equalization discharge commands and falling into a negative closed loop where the more equalization is achieved, the worse the consistency becomes. Furthermore, existing technologies often employ a crude concurrent turn-on strategy when multiple individual cells meet the equalization conditions, ignoring the heat stacking caused by the simultaneous conduction of equalization MOSFETs or analog front-end (AFE) chips within the local space of the PCB. When the number of concurrent equalizations is too large, it is very easy to exceed the maximum allowable junction temperature of the underlying driver chip, causing irreversible burnout of the underlying hardware. In addition, existing technologies only limit safety protection to the comparison of absolute values ​​of static temperatures, failing to couple electrochemical parameters with thermodynamic temperature rise rates, and thus failing to achieve predictive active blocking in the very early stages of abnormal temperature rise.

[0005] Therefore, there is an urgent need in this field for a comprehensive balancing method and system that can serve the entire life cycle of lithium iron phosphate batteries, dynamically reconstruct the platform region boundary, eliminate polarization voltage interference online, integrate it with the underlying hardware thermophysical boundary, and provide predictive safety fallback. Summary of the Invention

[0006] The main objective of this invention is to provide a method, system, and medium for balancing lithium iron phosphate batteries throughout their entire lifecycle, thereby solving the problems of neglecting the aging process throughout the entire lifecycle in existing lithium iron phosphate battery balancing strategies, which leads to plateau evolution, the inability to effectively resist polarization voltage interference online, and the disconnect between balancing scheduling and the underlying hardware thermophysical boundary.

[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a method for balancing the entire life cycle of lithium iron phosphate batteries, comprising the following steps: S1. Obtain temperature-compensated health status parameters based on ambient temperature and actual charge / discharge capacity, unidirectionally lock the operating status flag based on the temperature-compensated health status parameters, and generate a valid platform area boundary parameter group based on ambient temperature and temperature-compensated health status parameters when the operating status flag meets the second requirement. S2. When the running status flag meets the first requirement, an equivalent trigger voltage is generated based on the real-time charging current and the reference trigger voltage. The physical concurrency upper limit threshold is deduced based on the real-time voltage of the individual cell, the equivalent trigger voltage and the maximum allowable junction temperature of the drive hardware. The initial over-limit individual cell set is truncated based on the physical concurrency upper limit threshold to alternately send the bottom MOS transistor drive duty cycle signal. S3. When the running status flag meets the second requirement and the real-time average state of charge of the battery pack exceeds the effective platform area boundary parameter group, obtain the polarization internal resistance and polarization capacitance, calculate the polarization voltage based on the polarization internal resistance and polarization capacitance to generate a dynamic high voltage judgment threshold, and obtain the pure depolarization terminal voltage within the preset relaxation dead time and clear the bottom MOS transistor drive duty cycle signal accordingly. S4. Extract the highest cell temperature at the current moment based on the real-time temperature of all individual cells to generate the first-level static safety trigger flag. Calculate the expected temperature rise rate based on the polarization internal resistance. Generate the second-level predicted safety trigger flag based on the comparison between the actual temperature rise rate and the expected temperature rise rate. Clear the duty cycle signal of the underlying MOS transistor drive based on the first-level static safety trigger flag or the second-level predicted safety trigger flag.

[0008] In the preferred embodiment, in step S1, during the initialization phase, the running status flag is marked as the first requirement by default. Subsequently, the temperature-compensated health status parameters are compared with the preset target switching threshold and hysteresis tolerance boundary. When the condition comparison is continuously met in multiple cycles of continuous increment of the charge-discharge cycle accumulator counter, the running status flag is unidirectionally locked as the second requirement. The ambient temperature calibration reference value, positive contraction compensation coefficient, negative contraction compensation coefficient, lower reference boundary, and upper reference boundary are obtained. The lower reference boundary is squeezed inward by using the positive contraction compensation coefficient combined with the physical attenuation of the temperature-compensated health status parameters and the ambient temperature drop relative to the ambient temperature calibration reference value to generate the lower effective platform area boundary. The upper reference boundary is squeezed inward by using the negative contraction compensation coefficient combined with the physical attenuation of the temperature-compensated health status parameters and the ambient temperature drop relative to the ambient temperature calibration reference value to generate the upper effective platform area boundary.

[0009] In the preferred embodiment, in step S2, the maximum allowable junction temperature of the simulated front-end chip, the ambient temperature, the equivalent thermal resistance from the chip to the environment, and the single-channel passive equalization heating power are obtained; based on the physical temperature difference between the maximum allowable junction temperature of the simulated front-end chip and the ambient temperature, and the thermodynamic mapping relationship between the equivalent thermal resistance from the chip to the environment and the single-channel passive equalization heating power, the physical concurrency upper limit threshold is obtained; according to the relationship between the number of over-limit cells in the initial over-limit cell set and the physical concurrency upper limit threshold, the initial over-limit cell set is physically truncated to generate the target equalization cell set, and based on the result of the physical truncation, the time series characteristics of the line crossing time of the corresponding cell are dynamically mapped to lock the integration reference time, and the equalization capacity of the corresponding cell is obtained.

[0010] In the preferred embodiment, during the scheduling execution of step S2, the target set of equalized cells is divided into an odd-numbered physical number subset and an even-numbered physical number subset. Within a preset single equalization time slice, the duty cycle signals of the underlying MOS transistors, which alternately turn on and off, are sent to the odd-numbered and even-numbered physical number subsets. Based on the nominal discharge capacity characteristics of the single-channel hardware and the effective total discharge time of the corresponding individual cell in the drive-on state, the cumulative released power is obtained. When it is determined that the cumulative released power has reached the power to be equalized, the duty cycle signal of the underlying MOS transistor of the corresponding individual cell is cleared to zero.

[0011] In the preferred embodiment, in step S3, an online adaptive identification algorithm with historical data weight decay characteristics is invoked. The real-time operating current and real-time terminal voltage are input into a first-order RC equivalent model for adaptive iterative observation to obtain an identification parameter vector containing the frequency domain response coefficient. The ohmic internal resistance is extracted by analyzing the high-frequency response coefficient in the identification parameter vector. The polarization internal resistance is extracted by analyzing the low-frequency transient response coefficient in the identification parameter vector and combining it with the ohmic internal resistance. The polarization capacitance is then derived based on the product ratio of the physical constants of the first-order RC network. Furthermore, the preset PWM cycle length is divided into an effective discharge time period and a preset relaxation dead time. The hardware analog-to-digital conversion trigger sampling action is constrained to a preset timing interval at the end of the preset relaxation dead time to obtain a pure depolarized terminal voltage that eliminates ohmic polarization voltage drop interference.

[0012] In the preferred embodiment, in step S4, the underlying hardware status register is polled to extract the underlying hardware fault flag bit; the relationship between the current highest cell temperature and the static highest temperature safety threshold is determined, as well as the abnormal relationship between the underlying hardware fault flag bit and the underlying execution state; if the static highest temperature safety threshold or the underlying hardware fault flag bit triggers the abnormal defense line, the first-level static safety trigger flag bit is set to an effective state to forcibly clear the underlying MOS transistor drive duty cycle signal. Further, when the first-level static safety trigger flag bit is not in an effective state, the real-time operating current, ohmic internal resistance, and equivalent heat capacity of a single cell are obtained; the heat dissipation physical quantity caused by the real-time operating current applied to the physical body of the ohmic internal resistance and polarization internal resistance is mapped to the thermodynamic property base composed of the equivalent heat capacity of a single cell to deduce the expected temperature rise rate; the tolerance limit relationship between the actual temperature rise rate and the expected temperature rise rate and the predicted temperature rise tolerance envelope value is determined, and a second-level predicted safety trigger flag bit is generated when the actual temperature rise rate is determined to exceed the comprehensive superposition state.

[0013] In a preferred embodiment, the present invention also provides a balancing system for the entire life cycle of a lithium iron phosphate battery, comprising: a state initialization decision module, a quantitative balancing scheduling module, a closed-loop dynamic control module, and a predictive active defense module, each module being used to implement the steps in the above method.

[0014] In a preferred embodiment, the present invention further provides a computer-readable storage medium storing computer program instructions that, when executed by a processor, implement the balancing method described in the first aspect above.

[0015] This invention provides a method, system, and medium for balancing the entire life cycle of lithium iron phosphate batteries, which has significant comprehensive technical advantages through multi-dimensional deep collaboration. First, this solution captures the nonlinear shrinkage of the lithium iron phosphate battery platform region over its lifecycle by constructing a dynamic effective boundary function driven by both aging and temperature. This mechanism differs from traditional strategies, enabling adaptive balancing decisions throughout the entire lifecycle and avoiding ineffective balancing or over-discharge caused by adhering to static boundaries in the later stages of the battery lifecycle, as seen in existing technologies. Second, when facing complex dynamic operating conditions, this solution uses online identified electrochemical parameters to calculate and strip polarization voltage in real time. Simultaneously, it combines underlying PWM dead-time preemptive sampling technology to obtain pure depolarization voltage, eliminating the interference of polarization voltage on balancing decisions. This solves the blind spot in existing technologies where it is impossible to distinguish between virtual high voltage drop and actual over-limit capacity, improving the accuracy and efficiency of balancing target targeting. Furthermore, this invention breaks through the limitations of conventional algorithms and underlying physical isolation, establishing a security constraint system directly based on hardware thermophysical boundaries. This solution reads ambient temperature in real time and combines it with the thermal resistance limit of the simulated front-end chip to deduce the physical concurrency limit. It also uses alternating scheduling of odd and even physical number subsets to prevent heat accumulation in local PCB circuits, eliminating the risk of burnout caused by uncontrolled concurrency balance at the underlying hardware execution level. Based on this physical protection, this solution further constructs a predictive active defense closed loop, innovatively applying the adaptively identified electrochemical internal resistance parameters directly to the thermodynamic Joule temperature rise prediction model, achieving very early identification and blocking of microscopic abnormal heating side reactions inside the battery cell. This strategy elevates the passive static temperature threshold triggering to predictive protection, providing more effective safety assurance for the operation of lithium iron phosphate battery packs throughout their entire life cycle. Attached Figure Description

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments: Figure 1 This is a flowchart of a method for balancing the entire life cycle of a lithium iron phosphate battery according to the present invention. Figure 2 This is a schematic diagram of a lithium iron phosphate battery life cycle balancing system according to the present invention; Detailed Implementation Example 1 like Figures 1 to 2 As shown, a method for balancing the entire life cycle of a lithium iron phosphate battery includes the following steps: S1, based on ambient temperature and actual charge / discharge capacity Obtain temperature-compensated health status parameters Based on temperature-compensated health status parameters One-way locking operation status flag And in determining the running status flag bit When it is 2, it depends on the ambient temperature. Health status parameters with temperature compensation Calculate and generate a valid platform region boundary parameter set. ; S2, In the running status flag bit When it is 1, based on the real-time charging current With reference trigger voltage Generate equivalent trigger voltage Based on the real-time voltage of a single battery cell Equivalent trigger voltage The physical concurrency upper limit threshold is derived from the maximum allowable junction temperature of the underlying driver hardware. And based on the physical concurrency upper limit threshold For the initial set of over-limited singletons Execute truncation to alternately send the underlying MOS transistor drive duty cycle signal. ; S3, In the running status flag bit The real-time average state of charge of the battery pack is 2. Exceeding the effective platform area boundary parameter set At that time, obtain the polarization internal resistance With polarization capacitor According to polarization internal resistance With polarization capacitor Calculate polarization voltage To generate dynamic high voltage judgment threshold and within the preset relaxation dead zone time Internally obtain pure depolarization terminal voltage Based on this, the duty cycle signal of the underlying MOSFET is driven. Reset to zero; S4. Based on the real-time temperatures of all individual battery cells collected. Extract the highest cell temperature at the current moment To generate the first-level static security trigger flag. According to polarization internal resistance Calculate the expected rate of temperature rise According to the actual temperature rise rate With the expected rate of temperature rise The comparison results generate a second-level predicted security trigger flag. And based on the first-level static safety trigger flag bit Or the second-level predictive safety trigger flag Force the duty cycle signal of the underlying MOSFET drive Reset to zero.

[0017] In the preferred embodiment, step S1 includes the following steps: S11. Collect environmental data and estimate SOH Due to the transient reduction in usable capacity caused by the decrease in the internal ion diffusion coefficient of lithium iron phosphate batteries at low temperatures, the collected capacity is restored by temperature. First, obtain the temperature compensation coefficient calculated based on table lookup or empirical formulas. Specifically, temperature-compensated health status parameters The reduction equation is given by: ; in, These are health status parameters with temperature compensation. This refers to the actual charge / discharge capacity within the current lifespan. To be based on ambient temperature The mapped temperature compensation coefficient is used to restore the equivalent capacity at room temperature; This refers to the battery's rated nominal capacity. To mitigate the interference of pseudo-polarization and transient capacity reduction caused by low temperature environment, and to ensure that the battery material degradation is the source of long-term strategy switching; S12. State machine hysteresis interval confirmation and stage one-way locking During the initialization phase, the state machine operation flag is set. The default value is 1; the system dynamically maintains the charge / discharge cycle accumulator counter during operation. At the end of each charge-discharge cycle When a value update occurs, the system reads the current temperature-compensated health status parameters. And determine whether it meets the triggering conditions for entering the second stage; Specifically, the lag determination for entering the second stage is as follows: ; in, The temperature-compensated health status parameters output in step S11; The preset target switching threshold is preferably 95%; The hysteresis tolerance boundary to prevent numerical jitter is preferably 0.5%; Only if the inequality condition is continuously increasing Preferably, the state machine transition is triggered when the condition is met continuously for all three cycles, and the state machine operation flag is set. Updated to 2; when When the value changes to 2, a one-way hard latch mechanism is triggered; throughout the subsequent lifecycle, even if the reread parameter satisfies the condition due to sampling noise or transient recovery, the latch remains active. The system still forcibly maintains Ignore the computation request that returns to the first stage; To avoid disruption of underlying hardware balancing driver instructions caused by fluctuations in algorithm values; S13, Real-time reconstruction of the effective boundary of the dynamic voltage plateau region Only when the current running status flag is detected At that time, a real-time calculation task for the effective platform area boundary is triggered; Based on temperature-compensated health status parameters The decrease and ambient temperature The decrease in [something] causes the battery platform region to exhibit a bidirectional shrinkage trend along the macroscopic SOC axis. A dynamic effective boundary function driven by both aging and environmental factors is constructed. Specifically, the shrinkage equation of the dynamic platform region boundary is: ; ; in, The effective lower bound of the platform region is generated by dynamic calculation; The upper bound of the effective platform region generated by dynamic calculation; This serves as the lower bound of the new ambient temperature condition. This serves as the upper bound of the new standard under normal temperature conditions. These are health status parameters with temperature compensation. The ambient temperature; This is the standard value for room temperature calibration. and This is a pre-calibrated positive shrinkage compensation coefficient used to inwardly compress the lower limit of the reference based on the degree of aging and temperature drop. ; and This is a pre-calibrated negative shrinkage compensation coefficient used to inwardly compress the upper limit of the reference based on the degree of aging and temperature drop. ; Based on the above calculations, the system uses the lower bound of the reference. upper limit of the benchmark Compared with the room temperature calibration reference value Substituting into the equation, the broad reference platform region is squeezed inward to calculate the actual lower bound under the current operating conditions. With the upper realm And merged into a valid platform area boundary parameter set. .

[0018] In the preferred embodiment, step S2 includes the following steps: S21. Identify charging rate and calculate equivalent trigger voltage anti-polarization. During the constant current and constant voltage charging stage, in order to avoid excessive voltage drop during DC fast charging (high rate charging) which would push the terminal voltage up prematurely and cause premature triggering of the equalization point recording, the trigger voltage must be anti-polarization corrected. First, obtain the real-time charging current. With the battery's rated nominal capacity Then, combined with the pre-calibrated polarization voltage drop compensation coefficient For the reference trigger voltage under completely new room temperature conditions Dynamic correction is performed; specifically, the equivalent trigger voltage... The dynamic correction equation is: ; in, To calculate the generated equivalent trigger voltage; This is the reference trigger voltage under completely new ambient temperature conditions; This refers to the real-time charging current. This refers to the battery's rated nominal capacity. The pre-calibrated polarization voltage drop compensation coefficient is used to adjust the charge rate (i.e., The linear mapping is used as the polarization voltage drop compensation amount; S22. Monitor cell voltage extreme values ​​and count the number of cells exceeding limits. At the end of the charging process, the real-time voltage of all individual battery cells is extracted. And calculate the real-time voltage of all individual cells. Standard deviation Standard deviation Consistency deterioration threshold Compare the results; if the standard deviation... The current battery pack consistency is determined to be in excellent condition, and subsequent calculations are not initiated. If standard deviation If the consistency is found to have deteriorated, cell-by-cell monitoring will be initiated to compare the real-time voltage of all individual cells. With equivalent trigger voltage When a cell is detected to have reached or exceeded its equivalent trigger voltage for the first time At that time, record the cell as an over-limit cell and extract the corresponding line crossing time of the over-limit cell. ; All recorded out-of-bounds instances are aggregated to generate an initial set of out-of-bounds instances. and in the initial set of over-limited singletons Internally, each battery cell is associated with its unique wire crossing time. Establish key-value pair mappings; Finally, the initial set of over-limit singletons is statistically analyzed. The number of elements contained, and the number of over-limited singletons generated. ; S23. Deducing the concurrent limit based on the chip's maximum heat dissipation power. Utilizing ambient temperature Maximum allowable junction temperature of analog front-end (AFE) chip And the equivalent thermal resistance from the chip to the environment First, the maximum safe heat dissipation power of the chip under the current PCB local environment is derived; then, the heat dissipation power of the single-channel passive equalization is combined with the calculation. Calculate the physical concurrency upper limit threshold Specifically, the physical concurrency upper limit threshold The derivation equation is as follows: ; in, The physical concurrency upper limit threshold is calculated by rounding down. This is the maximum allowable junction temperature for the analog front-end (AFE) chip; The ambient temperature; The equivalent thermal resistance from the chip to the environment; For single-channel passive equalization of heat generation power; Determine the physical concurrency upper limit threshold Then, determine the number of monomers exceeding the limit. Is it greater than the physical concurrency upper limit threshold? ; like Perform a truncation action from the initial set of over-limited singletons. In the process, according to the crossing time of each cell mapping and binding Sort the data in the order they cross the line, and only extract the first data that crosses the line. Each cell is constructed into a truncated target balanced cell assembly. At the same time, with the first Using the crossing time of each cell as a reference time, the target balanced cell set after truncation is calculated. Each cell in the battery pack at its respective line crossing time The amount of extra charge added during the period up to the reference time will generate the corresponding charge to be balanced. ; like If not, then no truncation will be performed, and the initial set of over-limited singletons will be directly set. The elements are fully assigned to the truncated target balanced cell set. The charging completion time is used as the baseline time, combined with the line crossing time of each cell. The points generate the corresponding power to be balanced. Specifically, this refers to the truncated target balanced cell set. Any cell in Its power to be balanced The ampere-hour integral equation is: ; in, The calculated amount of charge to be balanced for this battery cell; This refers to the time when the battery cell crosses the wire. As the reference time, when The time was the At the moment when the wire cell passes through, This is the moment when charging ends; The constant current value is collected in real time during the charging process; For the integral time infinitesimal; S24. Odd-even balanced scheduling based on time-slice round-robin. When the vehicle is stationary or not connected to an external charger, the system scheduler reads the truncated target equalization cell set. and the corresponding power to be balanced To prevent even at the physical concurrency upper limit threshold Under constraints, the heating resistors of adjacent cells still generate heat accumulation. The system addresses this issue by adjusting the target equalization cell set after truncation. The physical location number of each battery cell is subject to exclusive scheduling at the software level; The system will collect the truncated target equalization cells. Divided into odd-numbered physical number subsets and even-numbered physical number subsets, the total released electricity has not reached the respective pending balance electricity amount. Under this premise, the system generates the underlying MOS transistor drive duty cycle signal in real time for the above subset according to the time slice rotation logic. : The first preset single equalization time slice length Internally, the system generates a high-level (i.e., turn-on) drive duty cycle signal for the underlying MOS transistors of cells within the even-numbered physical number subset. Simultaneously, a low-level (i.e., off) drive duty cycle signal is generated for the underlying MOS transistors within the odd-numbered physical number subset. ; The second preset single equalization time slice length Inside, the system inverts the duty cycle signal logic; The system continuously and alternately sends the duty cycle signal of the underlying MOS transistor drive. This guides the underlying hardware to alternately turn on and off, sending the duty cycle signals of the underlying MOS transistors in an alternating manner. During execution, the system backend independently calculates the released power for each cell, accumulating the preset single equalization time slice length for each cell when it is actually in the drive-on state. To obtain the total effective discharge time of each cell; And based on single-channel passive equalization of heating power Based on the inherent nominal discharge voltage of the hardware, the fixed nominal discharge current capability of a single channel is calculated. Then, this nominal discharge current capability is calculated in real time along with the total effective discharge time to obtain the cumulative amount of electricity actually released by the cell. This cumulative amount of electricity is then compared with the amount of electricity to be balanced. A comparison is performed, and when it is determined that the cumulative charge of a certain cell has reached its corresponding charge to be balanced... At that time, the system removes the cell from the rotation queue and drives the duty cycle signal of its underlying MOSFET. Zeroing out until the target balanced cell set is truncated. All cells in the battery pack fully released their corresponding unbalanced charge. .

[0019] In the preferred embodiment, step S3 includes the following steps: S31. Construct a first-order RC equivalent model and identify feature parameters online. Before activating the underlying parameter identifier, the individual unit terminal voltage is periodically extracted by the BMS's underlying ADC analog-to-digital converter as the real-time terminal voltage. Simultaneously, real-time operating current is extracted via a front-end Hall sensor or shunt. And combined with temperature-compensated health status parameters The real-time average state of charge of the battery pack is estimated in real time using the ampere-hour integration method. These constitute the basic excitation and observation sequences for the least squares algorithm; When the system determines the current running status flag bit At that time, the system begins monitoring the real-time average state of charge of the battery pack. The real-time average state of charge of the battery pack With effective platform region boundary parameter set Perform interval comparison, when or When the system leaves the platform area, it activates the underlying parameter identifier. The identifier constructs the system state equation based on a discretized first-order RC equivalent circuit model, and converts the real-time operating current... As the excitation input sequence, the real-time terminal voltage As the observed output sequence, the recursive least squares algorithm with a forgetting factor is invoked, utilizing the preset forgetting factor. The weights of historical data are attenuated, and the parameter vector from the previous time step is identified by combining the observation sequence at the current time step. Perform iterative updates to generate the identification parameter vector at the current time step. ; Based on the inverse mapping principle of bilinear transformation, an algebraic substitution relationship between the discretization coefficients and the underlying electrochemical physical components is established: By extracting the identification parameter vector at the current moment The high-frequency response coefficient term in the equation directly maps to the pure ohmic property of the battery, namely, its ohmic internal resistance. ; Identify the parameter vector at the current moment. The low-frequency transient response coefficient term, combined with the time step of the control system operation, and the already calculated ohmic internal resistance... By solving in combination, the polarization internal resistance can be separated. ; The relationship between the physical product of time constant and internal resistance in a first-order RC network is derived from the polarization internal resistance. The corresponding polarization capacitance can be directly derived and analyzed from the numerical value. ; Abandoning the industry's traditional static MAP lookup table method, the least squares algorithm is used to achieve adaptive learning, enabling the system to accurately grasp the internal parameters of the battery that change in real time with aging and temperature. S32. Generating a dynamic high voltage threshold after real-time stripping of polarization voltage. To eliminate the interference of polarization voltage caused by high-rate discharge or high internal resistance on the equalization determination, ohmic internal resistance is used. Polarization internal resistance Polarized capacitors Combined with real-time operating current polarization voltage at the previous moment To deduce the polarization voltage at the current moment, specifically, the polarization voltage at the current moment. The discrete-time recurrence equation is: ; in, The polarization voltage at the current moment; The polarization voltage at the previous moment; To control the time step of the system; This is the internal resistance to polarization; Polarizing capacitor; This represents the real-time operating current. Find the polarization voltage at the current moment Then, it is incorporated into the differential pressure threshold compensation logic, setting the preset reference differential pressure threshold. polarization voltage at the current moment The absolute values ​​are added together to generate the dynamic high-pressure judgment threshold. Simultaneously, the real-time voltage of all individual battery cells is monitored. The real-time average voltage is calculated by summing and averaging. Then, iterate through the real-time voltage of all individual battery cells. ,verify To determine if the inequality holds true, extract the cell numbers that satisfy the inequality and compile them into a dynamic target equilibrium cell set. ; S33, Timing anti-collision based on PWM dead-time control For dynamic target equalization of battery cell assembly If the battery cells present in the system initiate the underlying closed-loop hardware control, and the ADC voltage is sampled directly during the passive equalization discharge period, the ohmic voltage drop generated by the discharge current will cause the sampled voltage to be falsely low, which will cause the control algorithm to exit the equalization process prematurely. To solve this problem, the system will preset the PWM period length. Divided into effective discharge time periods With preset relaxation dead zone time The effective discharge time period satisfies ; In each preset PWM cycle length Within this timeframe, the system first sends a high-level command to the underlying MOSFET of the corresponding battery cell, the duration of which is the effective discharge period. Then, the level is pulled low to disconnect the equalization circuit, and the preset relaxation dead time is maintained. The hardware trigger is strictly constrained to a preset relaxation dead time. One microsecond before the end, the underlying ADC is instructed to perform analog-to-digital conversion sampling to obtain the clean depolarization terminal voltage after eliminating ohmic polarization voltage drop interference. ; After sampling, the pure depolarization terminal voltage is used. Real-time average voltage of the steps Perform a closed-loop condition check to determine whether the fallback equation is satisfied. Among them, the preset drop pressure difference threshold ; If this is true, the cell is determined to have reached the equilibrium target and is removed from the dynamic target equilibrium cell set. Remove the cell from the set and reset the duty cycle of its corresponding underlying MOSFET to zero; if this is not the case, retain the cell in the dynamic target equalization cell set. In the next preset PWM cycle length Continue to perform dead-zone alternating discharge; Preset PWM period length Within, based on the effective discharge time period The ratio is generated in real time to control the dynamic target balancing of the battery cell set. The underlying control signals of the core chip, specifically the duty cycle signals of the underlying MOSFET drive. The generating equation is as follows: ; in, This is the duty cycle signal for driving the underlying MOS transistors in the second phase of closed-loop control. This refers to the effective discharge time period; Preset PWM cycle length; If the closed-loop verification determines that the battery cell has reached the balance target, that is... If true, then the duty cycle signal of the driving transistor corresponding to the battery cell will be established. Forced to be assigned a value of 0.

[0020] In the preferred embodiment, step S4 includes: S41. Real-time detection of global temperature gradient and underlying hardware status. The system continuously performs high-frequency monitoring in a low-level real-time operating system (RTOS) thread, independent of all preceding steps; it collects the real-time temperature of all individual battery cells through a low-level NTC sensor array. Real-time temperature of all individual battery cells Perform sorting operations to extract the highest cell temperature at the current moment. ; Meanwhile, the system polls the underlying hardware status register of the AFE chip via the SPI / I2C communication bus. Analyze the underlying hardware status registers Extract the underlying hardware fault flag bits from specific bit fields. If there is a broken sampling line, short circuit, or low-voltage power supply abnormality, this flag will be set to 1; otherwise, it will be set to 0. The first-level static physical safety check will be performed to determine the highest cell temperature at the current moment. Does it exceed the static maximum temperature safety threshold? Or underlying hardware fault flag bit Is it equal to 1? If any of the above conditions are true, then the first-level static security trigger flag will be set. Set to 1; if none of these conditions are met, then set the first-level static security trigger flag to 1. Set to 0; Establish an independent low-level monitoring thread that is not blocked by the upper-level state machine, and strictly bind the capture of extreme temperature values ​​to the hardware low-level fault flag bit to provide a physical safety net. S42. Predictive Active Defense Based on Identification of Internal Resistance and Temperature Rise Rate First, check the first-level static security trigger flag. ,like The system bypasses prediction calculations and forces the underlying MOS transistor to drive the duty cycle signal directly. The value is cleared to zero, which means the drive level is forcibly pulled low, cutting off the physical equalization circuit; like If the absolute danger temperature has not been reached and there is no hardware failure, the predictive temperature rise warning algorithm is activated; the system uses the highest cell temperature at the current moment. Compared to the highest cell temperature at the previous moment and temperature sampling time step Calculate the actual temperature rise rate Simultaneously, the ohmic internal resistance obtained online in step S31 is reused. With polarization internal resistance Combined with real-time operating current Equivalent heat capacity of a single battery cell Calculate the expected rate of temperature rise Specifically, the actual rate of temperature rise With the expected rate of temperature rise The solution and determination equations are as follows: ; ; Judgment condition inequality: ; in, The actual temperature rise rate is obtained from actual calculations of the system; This represents the highest cell temperature at the current moment. This represents the highest cell temperature at the previous moment. This refers to the temperature sampling time step. The expected rate of temperature rise is derived from theory; This represents the real-time operating current. The internal resistance in ohms output in step S31; The polarization internal resistance is the output of step S31; This refers to the equivalent heat capacity of a single battery cell. This is a preset envelope value for the predicted temperature rise tolerance used to eliminate model error noise; Verify the above judgment condition inequality. If the inequality holds, it means that the current highest temperature cell's heating rate exceeds the reasonable thermodynamic heating envelope boundary that should exist under the current and the aging internal resistance, indicating that there are signs of very early thermal runaway. At this point, the system will set the second-level predictive safety trigger flag. Set it to 1, and input the duty cycle signal of the underlying MOS transistor. Assigning a value of 0 blocks the equalization discharge action that could exacerbate thermal runaway; If the inequality does not hold, the system will predict the safety trigger flag at the second level. Set to 0, and maintain the underlying MOS transistor drive duty cycle signal. The original equilibrium task will continue to be executed, remaining unchanged.

[0021] In a preferred embodiment, based on the same inventive concept as the aforementioned method embodiments, this application provides a balancing system for the entire life cycle of lithium iron phosphate batteries. This system employs a low-level battery management control platform with strong real-time computing power and automotive-grade functional safety, specifically including: The state initialization decision engine uses an automotive-grade multi-core microprocessor chip; this engine collects ambient temperature data in real time. and actual charge / discharge capacity Call the battery's rated nominal capacity The system combines the built-in temperature compensation coefficient to generate temperature-compensated health status parameters. The engine dynamically maintains a charge / discharge cycle accumulator counter. Combined with the preset target switching threshold and preset confirmation period number Execution includes hysteresis tolerance boundaries The unidirectional irreversible state machine debouncing logic outputs a locked current running state flag. The engine recognizes the running status flags. When the value is 2, the lower bound of the loading reference is... upper limit of the benchmark Standard calibration value at room temperature Positive contraction compensation coefficient and and negative contraction compensation coefficient and Dynamic calculations generate an effective platform region boundary parameter set that shrinks with aging and environmental changes. ; The quantitative equalization scheduling module integrates a high-frequency pulse width modulator using a low-level direct memory access controller; this module acquires real-time charging current in the first stage. Combined with a new reference trigger voltage at room temperature Rated nominal capacity of battery and the pre-calibrated polarization voltage drop compensation coefficient Calculate and generate equivalent trigger voltage This module extracts the real-time voltage of all individual battery cells. Calculate the standard deviation and with the preset consistency deterioration threshold Compare and extract the number of monomers exceeding the limit. And including the crossing time The initial set of over-limited singletons This module takes into account the ambient temperature. With single-channel passive equalization heating power According to the preset maximum allowable junction temperature of the analog front-end chip And the equivalent thermal resistance from the chip to the environment Calculate the physical concurrency upper limit threshold The set of cells exceeding the limit is truncated and the ampere-hour integral is calculated to output the target balanced cell set. and the power to be balanced The module then incorporates the preset single equalization time slice length. The software executes time-slice rotation logic, alternately generating and sending parity-exclusive duty cycle signals to the underlying MOS transistors in the underlying hardware. ; The closed-loop dynamic control array employs an independent digital signal processing core integrating a high-precision battery monitor chip; this array compares the real-time average state of charge of the battery pack. Exceeding the effective platform area boundary parameter set At that time, load the identification parameter vector from the previous time step. and forgetting factor It calls the internal recursive least squares algorithm kernel with a forgetting factor, utilizing real-time operating current. and real-time terminal voltage The ohmic resistance at the current moment can be analyzed online. Polarization internal resistance and polarization capacitors This array is combined with a preset reference differential pressure threshold. Strip the current polarization voltage To generate dynamic high voltage judgment threshold Simultaneously calculate the real-time average voltage Generate a dynamic target balanced cell set This array intervenes in the control flow of the battery monitor chip through hardware encoding and decoding, within a preset PWM cycle length. Internal forced allocation of effective discharge time period and preset dead time During the dead zone, the internal analog-to-digital converter is triggered to obtain a clean depolarization terminal voltage. In conjunction with a preset drop pressure differential threshold Verification complete; The predictive active defense unit employs a low-level hardware watchdog independent of the main balancing loop, integrated with the highest-priority interrupt thread of the real-time operating system; this unit collects the real-time temperature of all individual battery cells through low-level sensors. Extracting the highest cell temperature at the current moment Combined with the static maximum temperature safety threshold And poll the underlying hardware status register Extract hardware fault flags To output the first-level static safety trigger flag. This unit reuses the ohmic internal resistance. and polarization resistance Combining the equivalent heat capacity of a single battery cell Real-time operating current The highest cell temperature at the previous moment and temperature sampling time step Synchronous calculation of actual temperature rise rate and the expected rate of temperature rise In comparing the predicted temperature rise tolerance envelope value When the limit is exceeded, output the second-level predictive safety trigger flag. And force the duty cycle signal of the underlying MOSFET to be driven through hardware pins. Zero out, implement physical blocking.

[0022] In a preferred embodiment, based on the same inventive concept, this application also provides a computer-readable storage medium. This computer-readable storage medium uses an automotive-grade non-volatile flash memory chip. The flash memory chip has computer program instructions embedded inside. When the microprocessor or digital signal processing core calls and executes the program instructions, it implements the equalization method for the entire life cycle of lithium iron phosphate batteries according to any of the aforementioned embodiments. Specifically, under the scheduling of the underlying operating system, the program instructions sequentially execute a state machine anti-shake locking operation including temperature compensation, an alternating quantitative equalization calculation operation based on thermal resistance physical boundaries, a non-platform region dynamic equalization closed-loop control operation based on online polarization identification, and a predictive temperature rise rate active defense operation. The hardware equalization execution matrix driven by the underlying code completes the suppression of battery polarization drift and the defense against local thermal runaway.

[0023] The above embodiments are merely preferred technical solutions of the present invention and should not be considered as limitations on the present invention. The scope of protection of the present invention should be limited to the technical solutions described in the claims, including equivalent substitutions of the technical features described in the claims. That is, equivalent substitutions and improvements within this scope are also within the scope of protection of the present invention.

Claims

1. A method for balancing the full life cycle of a lithium iron phosphate battery, characterized by, Includes the following steps: S1. Obtain temperature-compensated health status parameters based on ambient temperature and actual charge / discharge capacity.

1. Lock the operating status flag bit unidirectionally based on the temperature-compensated health status parameters.

2. Generate a valid platform area boundary parameter group based on ambient temperature and temperature-compensated health status parameters when the operating status flag bit meets the requirements. S2. When the operation status flag meets the first requirement, an equivalent trigger voltage is generated based on the real-time charging current and the reference trigger voltage. The physical concurrency upper limit threshold is deduced based on the real-time voltage of the individual cell, the equivalent trigger voltage and the maximum allowable junction temperature of the drive hardware. The initial over-limit individual cell set is truncated based on the physical concurrency upper limit threshold to alternately send the bottom MOS transistor drive duty cycle signal. S3. When the operation status flag meets the second requirement and the real-time average state of charge of the battery pack exceeds the effective platform area boundary parameter group, obtain the polarization internal resistance and polarization capacitance, calculate the polarization voltage based on the polarization internal resistance and polarization capacitance to generate a dynamic high voltage judgment threshold, and obtain the pure depolarization terminal voltage within the preset relaxation dead time, and clear the bottom MOS transistor drive duty cycle signal of the pure depolarization terminal voltage. S4. Extract the highest cell temperature at the current moment based on the real-time temperature of all individual cells to generate the first-level static safety trigger flag. Calculate the expected temperature rise rate based on the polarization internal resistance. Generate the second-level predictive safety trigger flag based on the comparison between the actual temperature rise rate and the expected temperature rise rate. Clear the duty cycle signal of the underlying MOS transistor drive based on the first-level static safety trigger flag or the second-level predictive safety trigger flag.

2. The method of claim 1, wherein the lithium iron phosphate battery full life cycle balancing method is characterized by, Step S1 includes: The temperature-compensated health status parameters are compared with the preset target switching threshold and hysteresis tolerance boundary. When the condition comparison is continuously met in multiple cycles of continuous increment of the charge-discharge cycle accumulator counter, the operating status flag is unidirectionally locked to the second requirement. Obtain the room temperature calibration reference value, positive shrinkage compensation coefficient, negative shrinkage compensation coefficient, lower limit of the reference, and upper limit of the reference; By combining the physical attenuation of the positive contraction compensation coefficient with the temperature-compensated health status parameter, and the environmental temperature drop relative to the ambient temperature calibration reference value with the positive contraction compensation coefficient, an inward squeezing action is performed on the lower boundary of the reference to generate an effective platform area lower boundary. By combining the negative contraction compensation coefficient with the physical attenuation of the health status parameter with temperature compensation, and the negative contraction compensation coefficient with the ambient temperature drop relative to the ambient temperature calibration reference value, the upper limit of the reference is squeezed inward to generate the upper limit of the effective platform area.

3. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 1, characterized in that, Step S2 includes: Obtain the maximum allowable junction temperature of the analog front-end chip, the ambient temperature, the equivalent thermal resistance from the chip to the environment, and the single-channel passive equalization heat generation power; Based on the physical temperature difference between the maximum allowable junction temperature of the simulated front-end chip and the ambient temperature, and the thermodynamic mapping relationship between the equivalent thermal resistance from the chip to the environment and the single-channel passive equalization heating power, the physical concurrency upper limit threshold is obtained. Based on the relationship between the number of over-limit cells in the initial over-limit cell set and the physical concurrency upper limit threshold, physical truncation is performed on the initial over-limit cell set to generate the target balanced cell set. Based on the result of physical truncation, the time series characteristics of the line crossing time of the corresponding cell are dynamically mapped to lock the integration reference time and obtain the amount of power to be balanced for the corresponding cell.

4. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 1, characterized in that... Step S2 also includes: The target balanced cell set is strictly divided into an odd-numbered physical number subset and an even-numbered physical number subset; Within the preset single equalization time slice length, the duty cycle signal for driving the bottom MOS transistor to turn on and off is sent alternately to the odd-numbered physical number subset and the even-numbered physical number subset; The cumulative released power is obtained based on the nominal discharge capacity characteristics of the single-channel hardware and the total effective discharge time of the corresponding single cell in the drive-on state. When it is determined that the cumulative released power has reached the power to be balanced, the drive duty cycle signal of the bottom MOS transistor of the corresponding single cell is cleared to zero.

5. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 1, characterized in that, Step S3 includes: An online adaptive identification algorithm with historical data weight decay characteristics is invoked to input the real-time operating current and real-time terminal voltage into a first-order RC equivalent model for adaptive iterative observation, and to obtain an identification parameter vector containing the frequency domain response coefficient term. The ohmic resistance is extracted by analyzing and identifying the high-frequency response coefficient term mapping in the parameter vector. The polarization resistance is extracted by analyzing and identifying the low-frequency transient response coefficient term in the parameter vector and combining it with the ohmic internal resistance mapping. The polarization capacitance is then derived based on the product ratio of the physical constants of the first-order RC network.

6. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 5, characterized in that, Step S3 also includes: The preset PWM cycle length is divided into an effective discharge time period and a preset relaxation dead time. The hardware analog-to-digital conversion trigger sampling action is constrained to a preset timing interval at the end of a preset relaxation dead time in order to obtain a pure depolarization terminal voltage that eliminates ohmic polarization voltage drop interference.

7. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 1, characterized in that, Step S4 includes: Poll the underlying hardware status register to extract underlying hardware fault flags; Determine the relationship between the current highest cell temperature and the static highest temperature safety threshold, as well as the relationship between the underlying hardware fault flag indicating the abnormal underlying execution state; If the static maximum temperature safety threshold or the underlying hardware fault flag triggers the abnormal defense, the first-level static safety trigger flag will be set to an active state to forcibly clear the underlying MOS transistor drive duty cycle signal.

8. The method for balancing the entire life cycle of a lithium iron phosphate battery according to claim 7, characterized in that, Step S4 also includes: When the first-level static safety trigger flag is not in an active state, the real-time operating current, ohmic internal resistance, and equivalent heat capacity of a single cell are obtained. The physical quantity of heat dissipation caused by applying real-time operating current to the physical body of ohmic internal resistance and polarization internal resistance is mapped to the thermodynamic property base composed of the equivalent heat capacity of a single cell, so as to deduce the expected temperature rise rate. Determine the tolerance limit relationship between the actual temperature rise rate and the expected temperature rise rate and the predicted temperature rise tolerance envelope value in a superposition state, and generate a second-level predicted safety trigger flag when the actual temperature rise rate exceeds the superposition state.

9. A balancing system for the entire life cycle of a lithium iron phosphate battery, characterized in that, include: The state initialization decision module is used to obtain temperature-compensated health status parameters based on ambient temperature and actual charge / discharge capacity, unidirectionally lock the operating status flag based on the temperature-compensated health status parameters, and generate a valid platform area boundary parameter group based on ambient temperature and temperature-compensated health status parameters when the operating status flag is determined to meet the second requirement. The quantitative equalization scheduling module is used to generate an equivalent trigger voltage based on the real-time charging current and the reference trigger voltage when the running status flag is the first requirement. It also calculates the physical concurrency upper limit threshold based on the real-time voltage of the individual cell, the equivalent trigger voltage and the maximum allowable junction temperature of the underlying driver hardware, and performs truncation on the initial over-limit individual cell set according to the physical concurrency upper limit threshold to alternately send the underlying MOS transistor drive duty cycle signal. The closed-loop dynamic control module is used to obtain the polarization internal resistance and polarization capacitance when the running status flag is the second requirement and the real-time average state of charge of the battery pack exceeds the effective platform area boundary parameter group. It calculates the polarization voltage based on the polarization internal resistance and polarization capacitance to generate a dynamic high voltage judgment threshold, and obtains the pure depolarization terminal voltage within the preset relaxation dead time and clears the duty cycle signal of the underlying MOS transistor drive to zero accordingly. The predictive active defense module is used to extract the highest cell temperature at the current moment based on the real-time temperature of all individual cells to generate a first-level static safety trigger flag. It calculates the expected temperature rise rate based on the polarization internal resistance, generates a second-level predictive safety trigger flag based on the comparison between the actual temperature rise rate and the expected temperature rise rate, and forcibly clears the duty cycle signal of the underlying MOS transistor drive to zero based on the first-level static safety trigger flag or the second-level predictive safety trigger flag.

10. A computer-readable storage medium, characterized in that, The internal storage contains computer program instructions, which, when executed by a processor, implement the balancing method for the entire life cycle of a lithium iron phosphate battery as described in any one of claims 1 to 8.

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