A magnetic torque motor drive circuit for microsatellites

Abstract

A magnetic torque drive circuit for microsatellites, relating to the field of aerospace electronics, proposes a highly integrated magnetic torque drive circuit with autonomous protection and high reliability. The circuit includes an electronic fuse chip with an enable pin configured with an undervoltage lockout threshold via a resistor divider network; a motor drive integrated chip, comprising at least one full-bridge circuit connected to the coil windings of an external magnetic torquer, for receiving drive control signals to control the conduction state of the full-bridge circuit; a current detection circuit coupled to the current path formed by the motor drive integrated chip and the magnetic torquer coil, connected to the analog input of an analog-to-digital converter (ADC); and an ADC with at least one analog input and a digital output interface, the analog input receiving the detected voltage, and the digital output output outputting a digital signal representing the current.

Description

Technical Field

[0001] This invention relates to the field of aerospace electronics technology, and more specifically to a magnetic torque drive circuit for microsatellites. Background Technology

[0002] The magnetic torque generator is the core actuator of the cubic satellite attitude control system. It generates a controllable magnetic field by driving coils, which interacts with the Earth's magnetic field to produce torque, thereby achieving satellite attitude adjustment.

[0003] Existing magnetic torque drive solutions mostly employ H-bridge circuits built from discrete MOSFETs and gate drivers. This existing technology has the following drawbacks: 1) High cost and complexity: Discrete H-bridges require multiple MOSFETs, gate drivers, bootstrap capacitors, and numerous passive components, resulting in a large number of components, complex material management, high procurement and manufacturing costs, and a large printed circuit board (PCB) footprint, which is unfavorable for high-density integration within the narrow space of a CubeSat. 2) Dispersed protection functions: Separate circuits are needed to implement overvoltage, undervoltage, overcurrent, and reverse connection protection, further increasing circuit complexity, size, and power consumption. These separate protection circuits often have slow response times and low reliability. 3) Inconvenient current detection: On-orbit telemetry of the magnetic torque's operating status is required. Discrete solutions typically require series sampling resistors or Hall sensors to detect the drive current. Series resistors introduce additional power consumption and heat generation, especially when driving large currents; Hall sensors are bulky, costly, and susceptible to interference, and both require complex signal conditioning circuits. Summary of the Invention

[0004] This invention proposes a highly integrated magnetic torque drive circuit with autonomous protection and high reliability.

[0005] The present invention provides a magnetic torque drive circuit for a microsatellite, comprising: The electronic fuse chip's enable pin is configured with an undervoltage lockout threshold via a resistor divider network. The motor drive integrated chip includes at least one full-bridge circuit connected to both ends of the coil winding of an external magnetic torquer, for receiving drive control signals to control the conduction state of the full-bridge circuit; The current detection circuit is coupled to the current path formed by the motor drive integrated chip and the magnetic torque coil, and connected to the analog input terminal of the analog-to-digital converter. An analog-to-digital converter has at least one analog input and one digital output interface. The analog input receives a detected voltage, and the digital output interface is used to output a digital signal representing the current.

[0006] Furthermore, in one embodiment of the present invention, the enable pin is connected to the collector of the transistor via a resistor, and the FPGA's I / O control signal is connected to the base of the transistor via a resistor. When the FPGA output is low, the transistor is not conducting, and the external resistor voltage divider network operates normally. When the FPGA output is high, the transistor is turned on and the external voltage divider resistor is short-circuited, and the electronic fuse chip stops outputting.

[0007] Furthermore, in one embodiment of the present invention, the input terminal of the electronic fuse chip is used to connect to the input power supply, and the output terminal provides a protected bus voltage; The overvoltage protection threshold is set by an external resistor divider on the OVLO pin; The current limiting pin is connected to GND via a current limiting resistor. The maximum output current can be set by an external resistor between the current limiting pin and GND.

[0008] Furthermore, in one embodiment of the present invention, the power supply terminal of the motor drive integrated chip is connected to the bus voltage, and the logic power supply pin is provided by a low dropout linear regulator.

[0009] Furthermore, in one embodiment of the present invention, the input pin controlled by the motor drive integrated chip is connected to the IO pin of the FPGA, and the FPGA controls the conduction direction and state of the H-bridge by outputting square waves with different duty cycles.

[0010] Furthermore, in one embodiment of the present invention, the current detection circuit includes: A sampling resistor connected in series between the power ground pin and system ground of the motor drive integrated chip; A high-side or low-side current sensing amplifier whose input is connected across a sampling resistor and whose output generates a sensing voltage.

[0011] The magnetic torque converter system for CubeSat attitude control according to the present invention includes: The magnetic torque coil and the magnetic torque drive circuit for microsatellites described above, wherein the output terminal of the magnetic torque drive circuit is connected to both ends of the magnetic torque coil.

[0012] This invention proposes a highly integrated magnetic torque drive circuit with independent protection and high reliability. Specific beneficial effects include: 1. The magnetic torque drive circuit for microsatellites described in this invention, compared with the traditional discrete H-bridge solution, highly integrates the core drive part (H-bridge), power protection part (TPS2596), and current detection digitization part (ADC128S102), reducing the number of components, PCB area and overall hardware cost of the magnetic torque drive system, with significant advantages in integration and cost. 2. The magnetic torque drive circuit for microsatellites described in this invention has a two-stage linkage protection system of "power supply-drive" formed by the built-in protection of the front-stage electronic fuse and the rear-stage drive chip. Combined with the fast hardware shutdown path, it can effectively cope with instantaneous overloads such as single-event latch-up and autonomously attempt to recover after a fault, forming an on-orbit "detection-isolation-recovery" closed-loop protection mechanism. 3. The magnetic torque drive circuit for microsatellites described in this invention uses a current mirror sampling method to reduce the additional power consumption introduced by current detection to the microwatt level (only the power consumption of the mirrored current on the detection resistor), which is far superior to the traditional sampling resistor scheme. The addition of a voltage follower solves the problem of abnormal acquisition caused by ADC channel switching when directly connected, ensuring that the data of each channel does not interfere with each other in multi-channel scanning mode, and the telemetry accuracy and stability are significantly better than the unbuffered scheme; The present invention relates to a magnetic torque drive circuit for microsatellites, specifically a magnetic torque drive circuit for attitude control systems of microsatellites (especially CubeSats), which is directly used to drive magnetic torque loads. Attached Figure Description

[0013] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein: Figure 1 The circuit diagram related to the electronic fuse described in Implementation Method 1; Figure 2 The circuit diagram related to the electronic fuse described in Implementation Method 1; Figure 3 The circuit diagram for the magnetic torque drive described in Embodiment 1 is shown below. Figure 4 The circuit diagram related to the mining operation described in Implementation Method 1; Figure 5 The circuit diagram related to the mining operation described in Implementation Method 1; Figure 6 This is a circuit diagram of the magnetic torque drive circuit described in Embodiment 1. Detailed Implementation

[0014] Various embodiments of the present invention will now be clearly and completely described with reference to the accompanying drawings. The embodiments described with reference to the drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0015] Implementation Method 1: In order to solve the technical problems existing in the prior art, such as... Figure 6 As shown, this embodiment proposes a highly integrated magnetic torque drive circuit with autonomous protection and high reliability. The circuit mainly consists of an electronic fuse chip TPS2596, a motor drive integrated chip DRV8411, a multi-channel analog-to-digital converter ADC128S102, a current sampling resistor, and peripheral passive components. A detailed description follows: like Figure 1 and 2 As shown, the input terminals (Vin, GND): the positive terminal of the external primary power supply is directly connected to the input pin (IN) of the electronic fuse chip TPS2596, and the negative terminal of the primary power supply is connected to the system ground (GND).

[0016] Electronic fuse chip TPS2596: Although the TPS2596 from TI is used in this embodiment, it can also be replaced by electronic fuses with programmable thresholds and fault indications, such as the TPS25200, Infineon BTS7002 series, or ADI's LTC4368, depending on the bus voltage range and power requirements. All of them should achieve the core function of switching the power supply on and off through the enable pin and providing overvoltage and undervoltage protection.

[0017] The input pin (IN) is connected to the positive terminal of the primary power supply (POWER_5V2).

[0018] The output pin (OUT) provides a protected and controlled bus voltage (POWER_MAGNETOR_5V2) to power subsequent circuitry.

[0019] The enable pin (EN / UVLO) is connected to the collector of transistor 2N2222AUB via a 33Ω resistor. The FPGA's I / O control signal (MAGNETOR_ENABLE) is connected to the base of transistor 2N2222AUB via a 2kΩ resistor. When the FPGA output is low, the transistor is not turned on, and the external resistor divider network operates normally. When the FPGA output is high, the transistor is turned on, the external voltage divider resistor is short-circuited, and the electronic fuse chip TPS2596 stops outputting. This pin can be configured with an undervoltage lockout threshold via the resistor divider network.

[0020] The overvoltage protection threshold is set by an external resistor divider on the OVLO pin.

[0021] The current limiting pin (ILM) is connected to GND via a current limiting resistor. The maximum output current can be set by an external resistor between this pin and GND.

[0022] like Figure 3 As shown, the motor drive integrated chip DRV8411: The core driver chip can be the DRV8411, or other integrated driver chips with H-bridge capabilities such as the DRV8874 and DRV8871. Specifically, when using a driver chip without a current mirror output function, a low-resistance sampling resistor needs to be connected in series between the chip's power ground (PGND) pin and system ground. A high-precision current sense amplifier MAX4376TAUK is then connected across this resistor to amplify the weak differential voltage across the sampling resistor into a single-ended voltage to ground. This output is then connected to another analog input channel of the ADC128S102 for acquisition. This alternative solution also achieves current telemetry, but introduces additional power consumption and a slight voltage drop across the sampling resistor. This implementation method preferentially recommends using the DRV8411 with its built-in current mirror to achieve the lowest power consumption and optimal integration.

[0023] The power supply pin (VM) is connected to the bus voltage (POWER_MAGNETOR_5V2) generated by the output of the TPS2596.

[0024] Its four full-bridge output pins (AOUT1, AOUT2, BOUT1, BOUT2) are directly connected to the two ends of the two coil windings of the external magnetic torquer.

[0025] The logic power supply pin (VREF) can be provided by a low dropout linear regulator (LDO).

[0026] The control input pins (AIN1, AIN2, BIN1, BIN2) are connected to the IO pins of the FPGA. The FPGA controls the conduction direction and state of the H-bridge by outputting square waves with different duty cycles.

[0027] like Figure 4 and 5 As shown, the current mirror sampling and analog-to-digital conversion circuit is as follows: The DRV8411 chip integrates a current mirror that reduces the current flowing through the H-bridge by a fixed ratio before outputting it from a dedicated pin (IPROPI).

[0028] The IPROPI pin is connected to ground (GND) via a high-precision, low-temperature-drift sense resistor (RIPROPI), forming a voltage signal proportional to the drive current.

[0029] The voltage signal is first connected to the non-inverting input of a voltage follower composed of an operational amplifier. The output of the voltage follower is then connected to an analog input channel of a multi-channel analog-to-digital converter (ADC). The inverting input and output of the voltage follower are directly shorted to form a unity-gain buffer stage, providing sufficient drive capability. The ADC's digital SPI interface is connected to the FPGA, which initiates the conversion and reads the current telemetry data.

[0030] The reference voltage of the ADC128S102 can be provided by an internal reference or an external high-precision reference. Its digital interface (SPI) pins SCLK, CS, and DOUT are connected to the standard SPI interface of the FPGA, and the computer initiates the conversion and reads the current telemetry data.

[0031] The ADC128S102 (12-bit, 8-channel) is used, but it can also be replaced with other SPI / I2C interface multi-channel ADCs depending on accuracy, number of channels, and interface requirements. The advantage of using an external ADC128S102 is its high integration and multi-channel capability, which allows for convenient centralized acquisition of multiple magnetic torque currents and other analog telemetry measurements.

[0032] This implementation uses the LM124A operational amplifier, but it can be replaced with other models of four-channel operational amplifiers depending on the accuracy requirements. The advantage of using the LM124A is its high reliability and multi-channel capability.

[0033] This implementation constructs a specific connection of "electronic fuse + transistor control network". In normal operating mode, the FPGA outputs a low level, the transistor is cut off, and the internal reference of the electronic fuse chip and the external high-precision resistor voltage divider network jointly complete the accurate monitoring of undervoltage / overvoltage of the primary power bus, which is the first layer of accurate analog protection. When the satellite experiences extreme situations such as program runaway or single-event latch-up that require emergency disconnection of the magnetron power supply, the FPGA can output a high level, which instantaneously short-circuits the reference voltage divider resistor through the transistor, forcing the enable pin level to return to zero, and the hardware shuts down the power supply to the subsequent stage. This process is entirely executed by hardware logic, realizing hardware decoupling between accurate analog monitoring and ultra-high-speed digital instruction control. After the fault is cleared, the FPGA only needs to release the transistor, the voltage divider network automatically recovers, and the electronic fuse can smoothly restart the subsequent circuit.

[0034] Drive Control: The FPGA sends control signals to the AIN1 and AIN2 pins of the DRV8411. When the magnetic torquer needs to be forward-energized, AIN1 is controlled to be high and AIN2 to be low, causing AOUT1 to output POWER_MAGNETOR_5V2 and AOUT2 to output GND, allowing current to flow through the coil in the forward direction; the same applies to reverse-energization. Precise and continuous adjustment of the average current flowing through the coil can be achieved through pulse width modulation (PWM) signals.

[0035] Current telemetry sampling: During the driving process, the internal current mirror of the integrated H-bridge chip reduces the current Iload flowing through the load to a mirrored current at a fixed ratio (e.g., 1:200) and outputs it from a dedicated pin. This mirrored current flows through the sensing resistor Ripropi, forming a voltage Vipro = (Iload / A_ratio) × Ripropi. Because the current mirror output pin has a high internal resistance and limited driving capability, if directly connected to the analog input of a multi-channel ADC, the instantaneous charging demand of the internal sampling capacitor during channel switching can cause a voltage drop or insufficient build-up, resulting in abnormal jumps in the sampled value. This invention inserts a voltage follower composed of an LM124 operational amplifier between the sensing resistor and the ADC. Its high input impedance has no effect on the mirrored current loop, while its low output impedance provides ample driving current to the ADC input, ensuring that the signal stabilizes to the true value in a very short time after channel switching. Subsequently, the FPGA controls the ADC to perform sampling conversion and calculate the true load current via the SPI interface. The system-level effect of this circuit topology is that the addition of the buffer stage eliminates the acquisition error caused by the ADC input characteristics, making the telemetry data under high-frequency multi-channel polling accurate and stable, and supporting continuous and uninterrupted health monitoring of the magnetic torquer.

[0036] In summary, the magnetic torque drive circuit for microsatellites described in this embodiment features an adaptive power protection circuit topology with a fast hardware shutdown path. This topology constructs a circuit structure where a resistor divider network and a logic control branch are connected in parallel for the electronic fuse chip. By connecting a transistor switch in parallel at the lower end of the undervoltage monitoring divider resistor, "analog threshold setting" and "forced shutdown" are integrated into the same node. The effect of this circuit topology is that it retains the high-precision undervoltage / overvoltage thresholds calibrated at the factory of the integrated chip, avoids false triggering caused by minor fluctuations in the power bus, and simultaneously adds a high-response emergency shutdown path independent of the chip's internal logic. This solves the technical challenge of standard application circuits being unable to balance setting accuracy and rapid external control.

[0037] Highly integrated, low-cost drive core: The dedicated integrated motor driver chip DRV8411 is used as the core of the magnetic torque drive, replacing the full H-bridge composed of multiple discrete MOSFETs. This innovation not only significantly reduces the number of components and lowers manufacturing costs, but also incorporates functions that are difficult to achieve perfectly with discrete solutions, such as dead-time control, breakdown protection, and over-temperature shutdown, thus improving robustness.

[0038] A low-power current sampling solution: This solution combines a current mirror, current-to-voltage conversion resistor, voltage follower, and multi-channel ADC built into the driver chip to construct a non-intrusive telemetry architecture that decouples power consumption from load current and is unaffected by ADC sampling effects. By identifying and resolving the mismatch between "insufficient output drive capability of the current mirror" and "low-impedance drive required for charging the sampling capacitor during multi-channel ADC switching," an operational amplifier voltage follower is specifically embedded in the signal link.

[0039] It completely eliminates the defects of high power consumption and high heat generation in the traditional series sampling resistor scheme, and avoids the abnormal acquisition data caused by channel switching in the simplified current mirror direct-connected ADC scheme, realizing accurate current acquisition with no crosstalk and no errors between channels at high polling rates.

[0040] To better illustrate the technical effects of the magnetic torque drive circuit for microsatellites described in this embodiment, the following examples provide a detailed description: This magnetic torque circuit has passed 300 hours of high and low temperature aging test and completed on-orbit verification, and can be used in flight on satellites.

[0041] Implementation Method 2: The magnetic torque converter system for CubeSat attitude control described in this implementation method includes: The magnetic torque coil and the magnetic torque drive circuit for microsatellites as described in Embodiment 1, wherein the output terminal of the magnetic torque drive circuit is connected to both ends of the magnetic torque coil.

[0042] The above provides a detailed description of a magnetic torque drive circuit for microsatellites proposed in this invention. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

Claims

1. A magnetic torque drive circuit for microsatellites, characterized in that, include: The electronic fuse chip's enable pin is configured with an undervoltage lockout threshold via a resistor divider network. The motor drive integrated chip includes at least one full-bridge circuit connected to both ends of the coil winding of an external magnetic torquer, for receiving drive control signals to control the conduction state of the full-bridge circuit; The current detection circuit is coupled to the current path formed by the motor drive integrated chip and the magnetic torque coil, and connected to the analog input terminal of the analog-to-digital converter. An analog-to-digital converter has at least one analog input and one digital output interface. The analog input receives a detected voltage, and the digital output interface is used to output a digital signal representing the current.

2. The magnetic torque drive circuit for a microsatellite according to claim 1, characterized in that, The enable pin is connected to the collector of the transistor via a resistor, and the FPGA's I / O control signal is connected to the base of the transistor via a resistor. When the FPGA output is low, the transistor is not conducting, and the external resistor voltage divider network operates normally. When the FPGA output is high, the transistor is turned on and the external voltage divider resistor is short-circuited, and the electronic fuse chip stops outputting.

3. The magnetic torque drive circuit for a microsatellite according to claim 2, characterized in that, The input terminal of the electronic fuse chip is used to connect to the input power supply, and the output terminal provides a protected bus voltage; The overvoltage protection threshold is set by an external resistor divider on the OVLO pin; The current limiting pin is connected to GND via a current limiting resistor. The maximum output current can be set by an external resistor between the current limiting pin and GND.

4. A magnetic torque drive circuit for a microsatellite according to claim 1, characterized in that, The power supply terminal of the motor drive integrated chip is connected to the bus voltage, and the logic power supply pin is provided by a low dropout linear regulator.

5. A magnetic torque drive circuit for a microsatellite according to claim 4, characterized in that, The input pins of the motor drive integrated chip are connected to the IO pins of the FPGA. The FPGA controls the conduction direction and state of the H-bridge by outputting square waves with different duty cycles.

6. A magnetic torque drive circuit for a microsatellite according to claim 4, characterized in that, The current detection circuit includes: A sampling resistor connected in series between the power ground pin and system ground of the motor drive integrated chip; A high-side or low-side current sensing amplifier whose input is connected across a sampling resistor and whose output generates a sensing voltage.

7. A magnetic torque converter system for CubeSat attitude control, characterized in that, include: The magnetic torque coil and a magnetic torque drive circuit for a microsatellite as described in any one of claims 1 to 6, wherein the output terminal of the magnetic torque drive circuit is connected to both ends of the magnetic torque coil.

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