A negative glue QMEMS process method for quartz crystal manufacturing

Abstract

The application relates to the technical field of quartz crystal manufacturing, and discloses a negative photoresist QMEMS process method for quartz crystal manufacturing, quartz wafer pretreatment, surface deposition of a hard mask layer, negative photoresist coating, selective exposure by using a double-side alignment photoetching machine, development treatment, removal of the negative photoresist in unexposed areas, formation of a negative photoresist mask pattern, hardening treatment, multi-step etching of the quartz wafer, production of a metal electrode on the surface of the etched quartz crystal, wafer dicing and packaging to obtain a finished quartz crystal device; when the negative photoresist QMEMS process production is carried out, dry etching and negative photoresist trimming are alternately carried out, the number of times of alternation is quantitatively determined by using a sidewall angle calculation formula, the sidewall angle of the final etching pattern can be accurately controlled within a target range, the sidewall perpendicularity is obviously improved, and therefore the electrical performance and yield of the quartz crystal device are improved.

Description

Technical Field

[0001] This invention relates to the field of quartz crystal manufacturing technology, and more specifically to a negative adhesive QMEMS process method for quartz crystal manufacturing. Background Technology

[0002] Quartz crystal devices are frequency control components made based on the piezoelectric effect of quartz crystals. They mainly consist of a quartz crystal wafer, electrodes, and a package. They are divided into two categories: passive crystal oscillators and active crystal oscillators. Quartz crystal devices are widely used in communications, consumer electronics, automotive electronics, and precision instruments. As devices evolve towards miniaturization, higher frequency, and higher integration, traditional mechanical cutting and grinding methods are no longer sufficient to meet the requirements for micron-level or even submicron-level structural precision. The mass production of high-precision microstructures on quartz wafers using semiconductor processes such as photolithography and etching has rapidly developed. However, in actual production, existing QMEMS processes still face the following technical challenges when performing deep etching: In negative photoresist QMEMS processes, during deep etching of quartz wafers, the directional bombardment of ions in dry etching, the redeposition of etching byproducts, and the gradual degradation of the mask edges can cause significant tilting of the etched pattern sidewalls, affecting the frequency stability, vibrational mode purity, and batch consistency of the quartz crystal device. In existing QMEMS processes for quartz crystal manufacturing, using positive photoresist as the etching mask presents problems such as limited aspect ratio, poor sidewall steepness, and low pattern alignment accuracy. The mask is prone to pinhole defects, leading to etching protection failure and making it difficult to meet the processing requirements of quartz crystals. Although some existing technologies attempt to improve sidewall morphology by using an alternating process of "etching-trimming-re-etching," key parameters such as the number of trimmings, the time for each trimming, and the mask opening width are usually determined by repeated experiments or empirical rules, resulting in long process development cycles and high costs. Summary of the Invention

[0003] In order to overcome the above-mentioned defects of the prior art, the embodiments of the present invention provide a negative adhesive QMEMS process method for the manufacture of quartz crystals to solve the technical problems mentioned in the background art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a negative adhesive QMEMS process method for quartz crystal manufacturing, comprising the following steps: Step S1: Quartz wafer pretreatment; Step S2: A hard mask layer is deposited on the surface of the pretreated quartz wafer, and negative photoresist is applied to the surface of the hard mask layer. Step S3: Using a double-sided alignment lithography machine, align the mask pattern to the set position on the quartz wafer, and use ultraviolet light to selectively expose the negative photoresist. Step S4: Immerse the quartz wafer in the developing solution for development treatment to remove the negative photoresist in the unexposed areas and form a negative photoresist mask pattern. Step S5: Perform hardening treatment on the developed quartz wafer; Step S6: Using a negative photoresist mask as the first mask, transfer the pattern to the hard mask layer, and use the hard mask as an etch barrier layer to perform multi-step etching on the quartz wafer; Step S7: Remove the hard mask layer and negative photoresist mask remaining on the surface of the quartz wafer; Step S8: Fabricate metal electrodes on the etched quartz crystal surface, and obtain the finished quartz crystal device through wafer dicing and packaging.

[0005] In a preferred embodiment, during the pretreatment in step S1, a 4-inch Z-cut quartz wafer is selected and ultrasonically cleaned with acetone, isopropanol and deionized water for 10 minutes each, and then cleaned with a H2SO4:H2O2 solution with a volume ratio of 3:1 for 15 minutes to remove organic and inorganic contaminants. After cleaning, the quartz wafer is placed in a vacuum oven and dehydrated and baked at 140°C for 45 minutes.

[0006] In a preferred embodiment, in step S2, a hard mask layer is deposited on the surface of a quartz wafer using magnetron sputtering. The hard mask layer material is selected from one of chromium layer, nickel layer, polysilicon layer and their composite layer, and the thickness is 200-500 nm. In step S2, a negative photoresist is uniformly coated on the surface of the hard mask layer using spin coating at a speed of 1500 rpm for 40 seconds to obtain a negative photoresist layer with a thickness of 18-22 μm. The negative photoresist is one of epoxy resin-based negative photoresist, polyisoprene-based negative photoresist and chemically amplified negative photoresist.

[0007] In a preferred embodiment, in step S2, before applying the negative photoresist, a vapor deposition method is used to introduce hexamethyldisilazane vapor into the processing chamber under vacuum conditions and process it at 100°C for 3 minutes. After applying the negative photoresist, the quartz wafer coated with the negative photoresist is placed on a hot plate and pre-baked at 65-95°C for 2-10 minutes to form a dense photosensitive film.

[0008] In a preferred embodiment, in step S3, the negative photoresist is selectively exposed using ultraviolet light, with an exposure dose of 150–300 mJ / cm². 2 The exposed quartz wafer is placed on a hot plate and post-baked at 85–110°C for 5–15 minutes.

[0009] In a preferred embodiment, in step S4, the post-baked quartz wafer is immersed in a developing solution and developed at room temperature for 2-4 minutes, with shaking during development to remove the negative photoresist in unexposed areas, forming a negative photoresist mask pattern. After development, it is rinsed with isopropanol for 30 seconds, then rinsed with deionized water and dried with nitrogen. In step S5, the developed quartz wafer is hardened at a temperature of 120-150°C for 5-15 minutes.

[0010] In a preferred embodiment, in step S6, a negative photoresist mask is used as the first mask, and wet etching or reactive ion etching is used to transfer the pattern to the hard mask layer, exposing the quartz area to be etched. In step S7, the hard mask is used as an etch barrier layer to perform multi-step etching on the quartz wafer. The multi-step etching is performed by alternating dry etching and negative photoresist trimming. When performing multi-step etching on the quartz wafer, the multi-step etching is performed by alternating dry etching and negative photoresist trimming. The dry etching uses an inductively coupled plasma etching device, and the etching gas includes one or more combinations of SF6, CHF3, CF4, and C4F8. The chamber pressure is 5-50 mTorr, and the RF power is 100-500 W.

[0011] In a preferred embodiment, when performing multi-step etching in step S6, the number of alternations is determined using a sidewall angle calculation formula, which is as follows: In the formula, BJ is the final etched pattern sidewall angle after n trimmings, CJ is the initial sidewall angle of the negative photoresist mask after development and hardening, n is the number of trimmings in the alternating process, TH is the sidewall angle degradation caused by a single dry etching, XS is the material and process coefficient, r is the plasma isotropic thinning rate, t is the plasma trimming time for a single dry etching, W is the minimum opening width of the mask pattern, the final negative photoresist trimming is n, and the number of dry etchings is n+1.

[0012] In a preferred embodiment, in step S7, the hard mask layer is first removed by wet etching, and then the negative photoresist mask remaining on the surface of the quartz wafer is removed by either plasma ashing or wet stripping. The plasma ashing method uses oxygen plasma treatment with an RF power of 200-500 W and a treatment time of 5-30 minutes. The wet stripping method uses photoresist stripping solution and is immersed at a temperature of 60°C-90°C for 10-30 minutes.

[0013] In a preferred embodiment, in step S8, a metal electrode layer is deposited on the etched quartz crystal surface by magnetron sputtering or electron beam evaporation. The metal electrode layer is selected from gold, chromium, aluminum and their composite layers. The metal electrode is patterned by photolithography to form the desired electrode pattern. Finally, the wafer is cleaved and packaged to obtain the finished quartz crystal device.

[0014] The technical effects and advantages of this invention are as follows: 1. In the production of QMEMS using negative photoresist, this invention introduces a hard mask layer and negative photoresist to form a double-layer mask system, which solves the problem of insufficient stability of photoresist during long-term hydrofluoric acid etching or high-energy plasma etching. By alternating dry etching and mask trimming, and using a sidewall angle calculation formula to quantitatively determine the number of alternations, the sidewall angle of the final etched pattern can be precisely controlled within the target range, significantly improving the sidewall perpendicularity, thereby improving the electrical performance and yield of quartz crystal devices. 2. This invention significantly improves process performance by using a negative photoresist mask combined with an alternating dry etching and oxygen plasma isotropic trimming strategy. The processed mask is dense and free of pinholes, thus avoiding damage to non-etched areas. Furthermore, low-temperature baking reduces thermally induced pattern distortion rate, resulting in a 35% reduction in dynamic impedance of the fabricated quartz crystal device, an improved quality factor, and consequently, an increased device yield. 3. This invention provides a quantitative control method including a sidewall angle calculation formula. By substituting parameters such as the initial sidewall angle, single etching degradation amount, material and process coefficients, plasma thinning rate, trimming time and mask opening width, the required number of trimming times can be calculated in advance, realizing the quantitative design of process parameters, greatly shortening the process development cycle, and improving the reproducibility and stability between different batches. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the negative adhesive QMEMS process flow of the present invention. Detailed Implementation

[0016] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. In addition, the forms of the various structures described in the following embodiments are merely illustrative. The negative adhesive QMEMS process method for manufacturing quartz crystals involved in the present invention is not limited to the structures described in the following embodiments. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] Reference Figure 1 This invention provides a negative adhesive QMEMS process method for quartz crystal manufacturing, comprising the following steps: Step S1: Quartz wafer pretreatment; Step S2: A hard mask layer is deposited on the surface of the pretreated quartz wafer, and negative photoresist is applied to the surface of the hard mask layer. Step S3: Using a double-sided alignment lithography machine, align the mask pattern to the set position on the quartz wafer, and use ultraviolet light to selectively expose the negative photoresist. Step S4: Immerse the quartz wafer in the developing solution for development treatment to remove the negative photoresist in the unexposed areas and form a negative photoresist mask pattern. Step S5: Perform hardening treatment on the developed quartz wafer; Step S6: Using a negative photoresist mask as the first mask, transfer the pattern to the hard mask layer, and use the hard mask as an etch barrier layer to perform multi-step etching on the quartz wafer; Step S7: Remove the hard mask layer and negative photoresist mask remaining on the surface of the quartz wafer; Step S8: Fabricate metal electrodes on the etched quartz crystal surface, and obtain the finished quartz crystal device through wafer dicing and packaging.

[0018] In this application embodiment, a negative photoresist QMEMS process flow suitable for the fabrication of quartz crystal microstructures is provided, comprising a complete process chain from quartz wafer pretreatment, hard mask deposition, negative photoresist coating, double-sided alignment exposure, development, hard coating, pattern transfer to hard mask, multi-step etching, film removal, to electrode fabrication and die packaging. Through the organic coordination of the above steps, a complete solution for negative photoresist QMEMS microstructure fabrication is formed. The introduction of the hard mask layer provides reliable protection for subsequent long-term etching, and the multi-step etching strategy creates conditions for the active control of sidewall morphology, thereby improving the frequency consistency, vibration mode purity, and manufacturing yield of quartz crystal devices while ensuring pattern transfer accuracy.

[0019] Reference Figure 1 In step S1, during pretreatment, a 4-inch Z-cut quartz wafer is selected and ultrasonically cleaned with acetone, isopropanol and deionized water for 10 minutes each, then cleaned with a 3:1 H2SO4:H2O2 solution for 15 minutes to remove organic and inorganic contaminants. After cleaning, the quartz wafer is placed in a vacuum oven and dehydrated and baked at 140°C for 45 minutes.

[0020] In this embodiment, an ultra-clean treatment of the quartz wafer surface is achieved through a four-step cleaning process followed by a 45-minute vacuum oven dehydration process at 140°C. Acetone and isopropanol effectively remove organic contaminants such as grease, fingerprints, and photoresist residue. Deionized water ultrasonic cleaning removes ionic impurities and particles. A sulfuric acid-hydrogen peroxide mixture decomposes stubborn organic matter through strong oxidation. Vacuum dehydration treatment completely removes water molecules adsorbed on the wafer surface and in the shallow layer, significantly reducing the surface hydroxyl concentration. The above pretreatment enhances the adhesion between the negative photoresist and the quartz surface, avoiding defects such as photoresist floating, peeling, and side etching during development or etching processes.

[0021] Reference Figure 1 In step S2, a hard mask layer is deposited on the surface of a quartz wafer using magnetron sputtering. The hard mask layer material is selected from chromium, nickel, polysilicon, and their composites, and has a thickness of 200–500 nm. In step S2, negative photoresist is uniformly coated onto the surface of the hard mask layer using spin coating at a spin speed of 1500 rpm. The coating time is 40 seconds at rpm to obtain a negative photoresist layer with a thickness of 18-22 μm. The negative photoresist is one of epoxy resin-based negative photoresist, polyisoprene-based negative photoresist, and chemically amplified negative photoresist. In step S2, before coating the negative photoresist, hexamethyldisilazane vapor is introduced into the processing chamber under vacuum conditions using vapor deposition and treated at 100°C for 3 minutes. After coating the negative photoresist, the quartz wafer coated with the negative photoresist is placed on a hot plate and pre-baked at 65-95°C for 2-10 minutes to form a dense photosensitive film.

[0022] In this embodiment, an etch barrier layer with excellent resistance to hydrofluoric acid and fluorine-based plasma is obtained through a hard mask layer. Compared to solutions that rely solely on photoresist masks, the hard mask layer does not erode or peel off during long-term etching, maintaining the integrity and steepness of the pattern boundaries. A spin coating process is used to obtain a uniform negative photoresist layer on the quartz wafer surface. The 18-22 μm thickness range is optimized for deep etching of quartz; too thin a layer cannot withstand long-term etching, while too thick a layer leads to decreased pattern resolution and sidewall corner deterioration. The negative photoresist is limited to epoxy resin, polyisoprene, or chemically amplified types, all of which have high crosslinking properties. With its high density, excellent resistance to plasma etching, and high contrast, it can maintain steep mask sidewalls under small linewidth conditions, providing a high-quality initial mask pattern for subsequent precise control of the etching sidewall angles. Before coating, hexamethyldisilazane vapor is introduced by vapor deposition. Hexamethyldisilazane vapor acts as an adhesion promoter, and its silazane groups react with the silanol groups on the quartz surface to form a hydrophobic siloxane layer, transforming the hydrophilic surface into a hydrophobic surface, thereby significantly improving the wettability and adhesion of the negative photoresist. The pre-baking treatment after coating can remove organic solvents in the photoresist and partially crosslink the resin to form a dense, pinhole-free photosensitive film, reducing curling or cracking at the mask edges.

[0023] Reference Figure 1 In step S3, the negative photoresist is selectively exposed using ultraviolet light, with an exposure dose of 150–400 mJ / cm². 2 The exposed quartz wafer is placed on a hot plate and post-baked at 85–110°C for 5–15 minutes.

[0024] In this embodiment, post-baking has two key functions: first, it drives the photochemical reaction to complete, causing the photoacid generator in the exposed area to release acid and catalyze the crosslinking reaction, thereby increasing the crosslinking density; second, it smooths the sidewall roughness caused by the standing wave effect and scattering through thermal flow, making the latent image pattern more steep. Reasonable post-baking temperature and time can avoid insufficient or excessive crosslinking. Through these controls, it can also provide accurate input for the initial sidewall angle in the sidewall angle calculation formula.

[0025] Reference Figure 1 In step S4, the post-baked quartz wafer is immersed in the developing solution and developed at room temperature for 2-4 minutes, with shaking during development to remove the negative photoresist in the unexposed areas, forming a negative photoresist mask pattern. After development, it is rinsed with isopropanol for 30 seconds, then rinsed with deionized water and dried with nitrogen. In step S5, the developed quartz wafer is hardened at a temperature of 120-150°C for 5-15 minutes.

[0026] In this embodiment, the quartz wafer, after being baked, is continuously shaken while immersed in the developer at room temperature. Shaking increases the convection between the fresh developer and the surface of the photoresist, accelerating the dissolution of unexposed areas. After development, it is rinsed with isopropanol for 30 seconds. Utilizing the properties of isopropanol being miscible with water and readily volatile, it quickly replaces the developer and water adhering to the wafer surface. After rinsing with deionized water and drying with nitrogen, residual chemicals and particulate contaminants can be thoroughly removed. Hardening the film can further crosslink the resin in the negative photoresist, increasing the crosslinking density to saturation, while thoroughly removing residual solvents and developer components. After hardening, the glass transition temperature of the negative photoresist mask increases, and its mechanical hardness, etching resistance, and heat resistance are significantly enhanced.

[0027] Reference Figure 1 In step S6, a negative photoresist mask is used as the first mask, and wet etching or reactive ion etching is used to transfer the pattern to the hard mask layer, exposing the quartz area to be etched. In step S7, the hard mask is used as an etching barrier layer to perform multi-step etching on the quartz wafer. The multi-step etching is performed by alternating dry etching and negative photoresist trimming. When performing multi-step etching on the quartz wafer, the multi-step etching is performed by alternating dry etching and negative photoresist trimming. The dry etching uses an inductively coupled plasma etching device, and the etching gas includes one or more combinations of SF6, CHF3, CF4, and C4F8. The chamber pressure is 5-50 mTorr, and the RF power is 100-500 W.

[0028] In this embodiment, the process involves using a negative photoresist mask as the first mask and employing wet etching or reactive ion etching to transfer the pattern to a hard mask layer. Through this pattern transfer step, the high-precision pattern defined by the negative photoresist is faithfully copied onto the hard mask layer, allowing the hard mask to directly withstand the long-term corrosion of plasma or hydrofluoric acid during subsequent quartz etching. The process employs alternating dry etching and negative photoresist trimming for multi-step etching. Each dry etching step results in a reduction in the sidewall angle due to the directionality of ion bombardment and mask edge degradation. Subsequent negative photoresist trimming thins the mask opening edge, partially compensating for the sidewall angle loss. Through multiple alternations, the final sidewall angle can be maintained close to 90° with a sufficiently large total etching depth. Furthermore, the wide range of process parameters allows for optimization and adjustment based on specific equipment conditions and etching depth. For example, high RF power increases the etching rate but may increase sidewall roughness, while low cavity pressure increases anisotropy but reduces selectivity.

[0029] Reference Figure 1 In step S6, when performing multi-step etching, the number of alternations is determined using a sidewall angle calculation formula, which is as follows: In the formula, BJ is the final etched pattern sidewall angle after n trimmings, CJ is the initial sidewall angle of the negative photoresist mask after development and hardening, n is the number of trimmings in the alternating process, TH is the sidewall angle degradation caused by a single dry etching, XS is the material and process coefficient, r is the plasma isotropic thinning rate, t is the plasma trimming time for a single dry etching, W is the minimum opening width of the mask pattern, the final negative photoresist trimming is n, and the number of dry etchings is n+1. Here, r×t is defined as the thinning amount of a single sidewall of the mask, not the total thickness reduction. Since the trimming is isotropic, the total thickness reduction is r×t.

[0030] In this embodiment, the final etched pattern sidewall angle BJ is explicitly mathematically linked to measurable process parameters (initial sidewall angle CJ, single etch degradation TH, material and process coefficients XS, plasma isotropic thinning rate r, single trimming time t, mask aperture width W) and a variable to be designed (trimming times n). This relationship is obtained through experimental calibration: negative resist mask test patterns with different aperture widths are prepared under the same process conditions. First, a short-time dry etching process is used to induce known degradation of the sidewall angles. Then, oxygen plasma is used for trimming at different times. The change in sidewall angle and the single-side thinning of the mask are measured before and after trimming. The material and process coefficients are fitted linearly with the relationship between the change in sidewall angle and the aperture width; the slope of this regression is the material and process coefficient. The typical range of material and process coefficients is 14° to 16°. Given the initial lithography conditions and etching / trimming process parameters, the target sidewall angle BJ can be directly calculated, avoiding the blindness of traditional empirical trial and error. Based on the ideal sidewall angle required by the device, the required trimming times n or trimming time t can be deduced, realizing the pre-design of process parameters. The calculation formula of this application distinguishes between the degradation caused by etching and the improvement caused by trimming. Moreover, the trimming term is proportional to rt / W, indicating that narrow linewidth or long trimming time has a stronger effect on improving the sidewall angle. This is consistent with the physical intuition that isotropic trimming increases the relative opening expansion rate. The plasma thinning rate r is introduced to replace the empirical constant with no physical meaning in the original version, making the formula more universal and reliable.

[0031] Reference Figure 1 In step S7, the hard mask layer is first removed by wet etching, and then the negative photoresist mask remaining on the surface of the quartz wafer is removed by either plasma ashing or wet stripping. The plasma ashing method uses oxygen plasma treatment with an RF power of 200-500 W and a treatment time of 5-30 minutes. The wet stripping method uses photoresist stripping solution and is immersed at a temperature of 60℃-90℃ for 10-30 minutes.

[0032] In this embodiment, the hard mask layer is first removed by wet process, and then the negative photoresist is removed by oxygen plasma ashing or wet stripping. Through the step-by-step photoresist removal strategy, the hard mask layer and the negative photoresist are thoroughly removed in the most suitable way, avoiding damage or residue to the quartz surface caused by a single photoresist removal method. Magnetron sputtering or electron beam evaporation can ensure the uniformity and high purity of the metal electrode layer. The composite layer design takes into account both adhesion and conductivity / corrosion resistance. Photolithography patterning ensures that the electrode pattern is precisely aligned with the quartz microstructure. Finally, after wafer dicing and packaging, a quartz crystal device with excellent electrical performance and high long-term reliability is obtained.

[0033] Reference Figure 1 In step S8, a metal electrode layer is deposited on the etched quartz crystal surface by magnetron sputtering or electron beam evaporation. The metal electrode layer is selected from gold, chromium, aluminum and their composite layers. The metal electrode is patterned by photolithography to form the required electrode pattern. Finally, the wafer is cleaved and packaged to obtain the finished quartz crystal device.

[0034] In this embodiment, during electrode fabrication, a metal electrode layer is deposited using magnetron sputtering or electron beam evaporation. The metal layer is selected from gold, chromium, aluminum, and their composites. Magnetron sputtering is suitable for large-area uniform deposition, while electron beam evaporation can obtain thin films with high purity and good orientation. The composite layer design can balance adhesion and conductivity / corrosion resistance. The metal electrodes are then patterned using photolithography to form the desired electrode pattern. Finally, after wafer dicing and packaging, the finished quartz crystal device is obtained, ensuring the reliability of the device's electrical connections and long-term stability, achieving a complete transformation from process to finished device.

[0035] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented in software, the above embodiments can be implemented, in whole or in part, as a computer program product. The units and algorithm steps of the various examples described in the embodiments can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0036] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0037] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0038] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A negative glue QMEMS process method for quartz crystal manufacturing, characterized in that: Includes the following steps: Step S1: Quartz wafer pretreatment; Step S2: A hard mask layer is deposited on the surface of the pretreated quartz wafer, and negative photoresist is applied to the surface of the hard mask layer. Step S3: Using a double-sided alignment lithography machine, align the mask pattern to the set position on the quartz wafer, and use ultraviolet light to selectively expose the negative photoresist. Step S4: Immerse the quartz wafer in the developing solution for development treatment to remove the negative photoresist in the unexposed areas and form a negative photoresist mask pattern. Step S5: Perform hardening treatment on the developed quartz wafer. Step S6: Using a negative photoresist mask as the first mask, transfer the pattern to the hard mask layer, and use the hard mask as an etch barrier layer to perform multi-step etching on the quartz wafer; Step S7: Remove the hard mask layer and negative photoresist mask remaining on the surface of the quartz wafer; Step S8: Fabricate metal electrodes on the etched quartz crystal surface, and obtain the finished quartz crystal device through wafer dicing and packaging.

2. The negative glue QMEMS process method for quartz crystal manufacturing according to claim 1, wherein: In step S1, during pretreatment, a 4-inch Z-cut quartz wafer is selected and ultrasonically cleaned with acetone, isopropanol and deionized water for 10 minutes each, then cleaned with a 3:1 H2SO4:H2O2 solution for 15 minutes to remove organic and inorganic contaminants. After cleaning, the quartz wafer is placed in a vacuum oven and dehydrated and baked at 140°C for 45 minutes.

3. The negative glue QMEMS process method for quartz crystal manufacturing of claim 1, wherein: In step S2, a hard mask layer is deposited on the surface of a quartz wafer using magnetron sputtering. The hard mask layer material is selected from one of chromium layer, nickel layer, polysilicon layer and their composite layer, and the thickness is 200-500 nm. In step S2, a negative photoresist is uniformly coated on the surface of the hard mask layer using spin coating at a speed of 1500 rpm for 40 seconds to obtain a negative photoresist layer with a thickness of 18-22 μm. The negative photoresist is one of epoxy resin-based negative photoresist, polyisoprene-based negative photoresist and chemically amplified negative photoresist.

4. The negative glue QMEMS process method for quartz crystal manufacturing of claim 1, wherein: In step S2, before applying the negative photoresist, a vapor deposition method is used to introduce hexamethyldisilazane vapor into the processing chamber under vacuum conditions and process it at 100°C for 3 minutes. After applying the negative photoresist, the quartz wafer coated with the negative photoresist is placed on a hot plate and pre-baked at 65-95°C for 2-10 minutes to form a dense photosensitive film.

5. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 1, characterized in that: In the step S3, the negative photoresist is selectively exposed using ultraviolet light, and the exposure dose is 150-300 mJ / cm 2 After exposure, the quartz wafer is placed on a hot plate and subjected to a post-baking treatment at a temperature of 85-110°C for 5-15 minutes.

6. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 1, characterized in that: In step S4, the post-baked quartz wafer is immersed in the developing solution and developed at room temperature for 2-4 minutes, with shaking during development to remove the negative photoresist in the unexposed areas, forming a negative photoresist mask pattern. After development, it is rinsed with isopropanol for 30 seconds, then rinsed with deionized water and dried with nitrogen. In step S5, the developed quartz wafer is hardened at 120-150°C for 5-15 minutes.

7. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 1, characterized in that: In step S6, a negative photoresist mask is used as the first mask, and wet etching or reactive ion etching is used to transfer the pattern to the hard mask layer, exposing the quartz area to be etched. In step S7, the hard mask is used as an etching barrier layer to perform multi-step etching on the quartz wafer. The multi-step etching is performed by alternating dry etching and negative photoresist trimming. When performing multi-step etching on the quartz wafer, the multi-step etching is performed by alternating dry etching and negative photoresist trimming. The dry etching uses an inductively coupled plasma etching device, and the etching gas includes one or more combinations of SF6, CHF3, CF4, and C4F8. The chamber pressure is 5-50 mTorr, and the RF power is 100-500 W.

8. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 7, characterized in that: When performing multi-step etching in step S6, the number of alternations is determined using a sidewall angle calculation formula, which is as follows: In the formula, BJ is the final etched pattern sidewall angle after n trimmings, CJ is the initial sidewall angle of the negative photoresist mask after development and hardening, n is the number of trimmings in the alternating process, TH is the sidewall angle degradation caused by a single dry etching, XS is the material and process coefficient, r is the plasma isotropic thinning rate, t is the plasma trimming time for a single dry etching, W is the minimum opening width of the mask pattern, the final negative photoresist trimming is n, and the number of dry etchings is n+1.

9. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 1, characterized in that: In step S7, the hard mask layer is first removed by wet etching, and then the negative photoresist mask remaining on the surface of the quartz wafer is removed by either plasma ashing or wet stripping. The plasma ashing method uses oxygen plasma treatment with an RF power of 200-500 W and a treatment time of 5-30 minutes. The wet stripping method uses photoresist stripping solution and is immersed at a temperature of 60℃-90℃ for 10-30 minutes.

10. The negative adhesive QMEMS process method for quartz crystal manufacturing according to claim 1, characterized in that: In step S8, a metal electrode layer is deposited on the etched quartz crystal surface by magnetron sputtering or electron beam evaporation. The metal electrode layer is selected from gold, chromium, aluminum and their composite layers. The metal electrode is patterned by photolithography to form the required electrode pattern. Finally, the wafer is cleaved and packaged to obtain the finished quartz crystal device.

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