A method, system, and medium for continuous pick-and-place soldering of components on an ultra-long circuit board

Abstract

The application relates to a continuous patch welding method, system and medium for components on an ultra-long circuit board, and relates to the surface mounting technology field of the circuit board. The continuous patch welding method comprises the following steps: analyzing a three-dimensional diagram of the circuit board, combining component distribution, generating a plurality of virtual to-be-welded sections, segmentally deconstructing the circuit board according to the virtual to-be-welded sections, positioning and calibrating patch coordinates, generating a local patch path, monitoring the welding temperature of a patch welding point area according to the local patch path, combining a welding temperature control model, identifying a welding point temperature state, generating an abnormality control signal, cooperatively controlling welding voltage according to the abnormality control signal, generating a circuit board welding control table, and transmitting the circuit board welding control table to a cloud platform. Through a virtual segmented continuous operation mode, time-consuming links such as multiple feeding, alignment and post-period splicing in a traditional mode are eliminated, and impedance discontinuous points and mechanical joints caused by physical segmented splicing are avoided.

Description

Technical Field

[0001] This application relates to the field of surface mount technology for printed circuit boards, and in particular to a method, system and medium for continuous surface mount soldering of components on ultra-long printed circuit boards. Background Technology

[0002] Currently, for surface mount soldering of standard-sized circuit boards (usually less than 1 meter), the industry generally adopts a "continuous" SMT production line, which is a continuous operation process of "board loading machine - solder paste printer - chip mounter - stationary reflow oven - board unloading machine".

[0003] When performing surface mount soldering on ultra-long circuit boards with a total length of 2 meters or more, the ultra-long circuit board is usually first physically cut into multiple short boards, which are then soldered separately on a standard SMT production line. Finally, the multiple short boards are joined together into a long board by connectors or manual soldering.

[0004] Existing patents disclose a method, system, and storage medium for surface mount soldering of circuit boards for LED lights, including the following steps: Soldering components: Components are soldered using automated soldering equipment. During the soldering process, a temperature monitoring system is used for monitoring. The temperature monitoring system specifically includes the following process: S1: During the soldering process, real-time temperature data of the soldering area is acquired. The invention first acquires the real-time temperature value during the soldering process, calculates the deviation from the preset temperature value, and evaluates the deviation value. This allows for understanding the temperature deviation and reducing its impact on soldering quality. It includes two scenarios: normal temperature and abnormal temperature. In the case of an abnormal temperature, the degree of abnormality is assessed, including low and high abnormality. Based on the assessment results, adjustments and optimizations are made to improve subsequent soldering quality and efficiency.

[0005] The existing technical solutions mentioned above have the following drawbacks: 1. The existing physical splicing method will produce splicing gaps, resulting in discontinuous line impedance, which will affect the integrity of high-frequency signal transmission and the overall performance of the product; 2. The existing manual splicing process is inefficient, the welding quality depends on the operator's skills, the yield rate is difficult to guarantee, and the splicing seam often becomes the weak point of the overall structural strength and long-term reliability of the board, which cannot meet the strength and electrical consistency requirements of the overall structure of ultra-long circuit boards. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the purpose of this application is to provide a method, system, and medium for continuous surface mount soldering of components on ultra-long circuit boards. By using a virtual segmented continuous operation mode, the time-consuming steps of multiple loading and unloading, alignment, and subsequent splicing in the traditional method are eliminated, thereby avoiding impedance discontinuities and mechanical seams caused by physical segmentation splicing.

[0007] This was achieved using the following technical solutions: In a first aspect, this application provides a continuous surface mount soldering method for components on an ultra-long circuit board, comprising: Analyze the 3D model of the circuit board and combine it with the component distribution to generate several virtual sections to be soldered; The circuit board is segmented and deconstructed based on the virtual section to be soldered, the chip coordinates are located and calibrated, and a local chip path is generated. Based on the local surface mount path monitoring of the solder joint area, combined with the solder temperature control model, the solder joint temperature status is identified and abnormal control signals are generated. Based on the abnormal control signals, the welding voltage is controlled in a coordinated manner, a circuit board welding control table is generated, and transmitted to the cloud platform.

[0008] By adopting the above technical solution, based on the 3D diagram of the circuit board and the distribution of components, a virtual section to be soldered and local patch paths are generated using a segmented deconstruction and coordinate calibration algorithm. The solder joint temperature is monitored in real time by infrared thermal imaging. Combined with a soldering temperature control model (such as PID or neural network), abnormal states are identified and the soldering voltage is dynamically adjusted. A control table is generated and uploaded to the cloud platform, realizing refined zonal control and adaptive thermal compensation of the soldering process, improving the consistency of soldering quality, yield rate and process traceability.

[0009] This application further specifies: analyzing the 3D model of the circuit board, combining it with the component distribution, and generating several virtual sections to be soldered, including: The 3D model of the circuit board is analyzed to extract component reference numbers, 3D package data, and mounting surface. The 3D packaging data is analyzed according to the packaging type to obtain the substrate stack-up structure, copper foil thickness distribution and copper coverage graph; Based on the component reference designation and package area, kernel density estimation is performed on the components to generate a component density field. Based on the copper foil thickness distribution and the copper foil heat dissipation effect, the copper foil of each layer is projected and weighted to construct the copper foil thermal inertia field. The component density field and the copper foil thermal inertia field are normalized and fused to generate a welding thermal characteristic index field; The gradient of the welding thermal characteristic index field is calculated to obtain the spatial gradient amplitude of the plate surface; Based on the spatial gradient magnitude of the board surface, the circuit board is divided into regions and the boundaries are smoothed to obtain an initial connected homogeneous region. Thermal property analysis was performed on the initially connected homogeneous region, and the variance of the thermal property index was calculated. If the variance of the thermal property index is within the gradient tolerance range, then mark the current initial connected homogeneous region as a virtual segment to be welded; If not, then the current initial connected homogeneous region is segmented, the transition welding region is marked, and a virtual segment to be welded is constructed.

[0010] By adopting the above technical solution, based on the three-dimensional diagram of the circuit board and the distribution of components, the component density field is generated by kernel density estimation and normalized and fused with the thermal inertia field of copper foil. The homogeneous virtual section to be welded is generated by gradient segmentation of the welding thermal characteristic exponential field, which significantly improves the accuracy of welding thermal characteristic zoning and process adaptability.

[0011] This application is further configured to: segment and deconstruct the circuit board according to the virtual section to be soldered, locate and calibrate the chip coordinates, and generate a local chip path, including: The virtual section to be welded is analyzed, the boundary coordinate set of the welding section is extracted, a two-dimensional spatial index tree is constructed, and the local coordinate reference point is determined. The circuit board is deconstructed based on a two-dimensional spatial index tree to determine the coordinates of the optical positioning marks; The rigid body transformation matrix is ​​calculated by fitting the coordinates of the local coordinate reference point and the optical positioning mark. The theoretical inter-segment boundary coordinates are obtained by transforming the coordinate set of the welded segment boundary point by point using the rigid body transformation matrix. The circuit board is segmented and inspected according to the target process welding direction to determine the actual welding segments and obtain the circuit board welding diagram. Edge detection and template matching are performed on the circuit board welding diagram to calculate the boundary coordinates between solid segments; The residual offset of the segments is calculated by comparing the theoretical boundary coordinates between segments with the boundary coordinates between the physical segments. Based on the segmented residual offset, a local correction transformation matrix is ​​constructed, and the solder joint coordinates are transformed to obtain the patch coordinates; Based on the local coordinate reference point, path planning is performed on the coordinates of all patches to generate local patch paths.

[0012] By adopting the above technical solution, based on the virtual section to be soldered and optical positioning marks, the theoretical boundary is calibrated by constructing a spatial index tree and rigid body transformation matrix, and the segmented residual offset is calculated by combining physical detection and constructing a local correction matrix. Finally, high-precision patch coordinates and local patch paths are generated, which significantly improves the accuracy of circuit board patch coordinate calibration and the adaptability of path planning.

[0013] This application further specifies: based on the segmented residual offset, a local correction transformation matrix is ​​constructed, and the solder joint coordinates are transformed to obtain the patch coordinates, including: The segmented residual offset is decomposed to obtain planar rotation components and translation linear components; Based on rigid body kinematics, a local correction transformation matrix is ​​constructed by homogeneously combining the planar rotational components and translational linear components. The solder joint coordinates are expanded to obtain the homogeneous column vector of the solder joint, and combined with the local correction transformation matrix, the target position of the patch is obtained; If the target position of the patch is within the effective stroke range of the patch, the current target position of the patch is determined based on the outer rectangular boundary of the solid soldering segment; If the current patch target position is not located on the outer rectangle boundary, it indicates that the local gradient of the solid solder segment is abnormal. The current patch target position is then re-segmented to obtain the corrected solder joint coordinates. If not, then the distance between the boundary weld points of the solid welding segment and the adjacent weld points in the adjacent segment is calculated to obtain the weld point spacing; If the spacing between weld points is greater than the threshold for the distance between adjacent points, then transition interpolation is performed on the boundary weld points of the solid weld segment to obtain the corrected weld point coordinates; The solder joint coordinates are replaced and merged with the target position of the patch based on the solder joint markings to obtain the patch coordinates.

[0014] By adopting the above technical solution, based on the residual offset of the segmented rigid body kinematics decomposition as rotation and translation components, a local correction transformation matrix is ​​constructed and the homogeneous coordinates of the solder joints are transformed. Combined with the boundary discrimination of the circumscribed rectangle and the detection of the solder joint spacing, re-segmentation or transition interpolation correction is performed, thereby obtaining high-precision patch coordinates, which significantly improves the continuity of the welding path and the accuracy of patch positioning.

[0015] This application is further configured to: monitor the soldering temperature of the solder joint area based on the local surface mount path, identify the solder joint temperature status in conjunction with a soldering temperature control model, and generate abnormal control signals, including: The local patch path is parsed, the patch coordinates are extracted, and corresponding temperature measurement points are assigned to form a local temperature measurement group; Based on the preset sampling frequency and combined with the local temperature measurement group, the welding temperature of the patch solder joint area is collected to obtain the solder joint sampling temperature; The solder joint sampling temperature is correlated and filled according to the substrate stack structure to generate a solder joint temperature distribution surface. The temperature distribution surface of the weld joint is compared hierarchically based on the preset welding process temperature curve, and the temperature deviation of the weld joint is calculated. Statistical calculations were performed on the temperature deviation of the weld joints based on the collection period to obtain the mean deviation and the rate of change of deviation. By comparing the allowable tolerance range with the average deviation, and combining the solder joint temperature deviation and the rate of change of deviation, the solder joint temperature status is identified, and corresponding abnormal instructions are generated, including: If the average deviation is within the allowable tolerance range and the solder joint temperature deviation is less than the temperature deviation threshold, then the current solder joint temperature status is determined to be normal, and a temperature hold command is generated. If the average deviation is not within the allowable tolerance range, and the temperature deviation of multiple solder joints is greater than or equal to the temperature deviation threshold, then the current solder joint temperature status is determined to be a multi-point deviation in the same direction, and an overall deviation anomaly command is generated. If the average deviation is not within the allowable tolerance range, but the temperature deviation of individual solder joints is greater than or equal to the temperature deviation threshold, then the current temperature state of the solder joints is determined to be an individual solder joint deviation, and a local offset anomaly command is generated. If the mean deviation is not within the allowable tolerance range and the deviation change rate is less than the temperature deviation change rate, the current solder joint temperature state is determined to be abnormal temperature response, and a temperature response lag abnormal command is generated. The abnormal commands are traced using the welding temperature control model, and corresponding abnormal control signals are generated by combining the characteristics of the weld point distribution.

[0016] By adopting the above technical solution, temperature measurement points are allocated through local patch path and a solder joint temperature distribution surface is constructed. The mean deviation and rate of change are calculated by comparing with the preset process curve. Based on the multi-threshold state machine, temperature states such as normal, multi-point deviation in the same direction, individual deviation or temperature response lag are identified. Combined with the welding temperature control model, differentiated abnormal control signals are generated, realizing fine-grained zonal monitoring and adaptive abnormal response of patch welding temperature, which significantly improves the consistency and reliability of welding quality.

[0017] This application is further configured to: coordinately control the welding voltage based on abnormal control signals, generate a circuit board welding control table, and transmit it to a cloud platform, including: The abnormal control signal is analyzed to extract the abnormal solder joint number, abnormal type code, control method and control intensity. Match the segmented welding parameter set according to the abnormal weld point number, and extract the reference welding voltage, reference welding power and voltage adjustment range; Based on the anomaly type code and the reference welding voltage or reference welding power, the real-time welding parameters are corrected and converted, and the voltage correction amount is calculated. Calculate the comprehensive welding voltage based on the voltage correction amount and the reference welding voltage, and compare it with the voltage adjustment range; If the overall welding voltage is within the voltage regulation range and the voltage change rate is less than the allowable response slope, then the current voltage correction is deemed compliant. If multiple solder joints are controlled simultaneously, the total power increment is calculated based on the voltage correction amount and compared with the total power margin. If the total power increment is greater than or equal to the total power margin, the solder joints are queued and executed in a time-sharing manner according to their priority, generating a circuit board soldering control table and transmitting it to the cloud platform.

[0018] By adopting the above technical solution, based on the analysis of solder joint number and type using abnormal control signals, priority scheduling and power margin management algorithms are used to dynamically correct the reference welding voltage and check the voltage change rate and total power limit. A circuit board welding control table containing correction amount and execution timing is generated and uploaded to the cloud platform, realizing precise closed-loop control of multi-solder joint collaboration, improving welding quality consistency, energy efficiency and process traceability.

[0019] Secondly, this application also provides a continuous surface mount soldering system for components on ultra-long circuit boards, employing the following technical solution: A continuous surface mount soldering system for components on ultra-long circuit boards, comprising a continuous surface mount soldering method, including: The virtual segmentation module is used to parse the 3D model of the circuit board and generate several virtual segments to be soldered based on the component distribution. The chip positioning module is used to disassemble the circuit board into segments based on the virtual section to be soldered, locate and calibrate the chip coordinates, and generate local chip placement paths. The monitoring and feedback module is used to monitor the soldering temperature of the solder joint area based on the local solder path, and in combination with the soldering temperature control model, identify the temperature status of the solder joint and generate abnormal control signals. The linkage control module is used to coordinate the control of welding voltage based on abnormal control signals, generate a circuit board welding control table, and transmit it to the cloud platform.

[0020] By adopting the above technical solution, a virtual section to be soldered is generated based on the 3D map and component distribution. The local patch path is optimized through segmented deconstruction and coordinate calibration. The solder joint temperature is collected in real time using infrared thermal imaging and input into the soldering temperature control model (such as PID or neural network) to identify abnormal states. Then, the soldering voltage is dynamically corrected and a soldering table with control strategy is generated and uploaded to the cloud platform. This realizes the fine-grained zonal control and adaptive thermal compensation of the circuit board soldering process, which significantly improves the consistency of soldering quality, yield rate and process traceability.

[0021] Thirdly, this application also provides an electronic device, comprising: One or more processors; Memory, used to store one or more programs; When one or more programs are executed by one or more processors, the one or more processors implement any of the methods in the above scheme.

[0022] Fourthly, this application also provides a storage medium storing at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, at least one program, code set, or instruction set is loaded and executed by a processor to implement the continuous surface mount soldering method for components on ultra-long circuit boards as described above.

[0023] In summary, the beneficial technical effects of this application are as follows: Based on the virtual segmented continuous operation mode, the time-consuming steps of multiple loading and unloading, alignment, and subsequent splicing in the traditional method are eliminated. This avoids impedance discontinuities and mechanical seams caused by physical segment splicing, ensuring the signal integrity of the ultra-long circuit board as a whole circuit, and eliminating potential failure points caused by poor splicing, thus greatly improving the long-term reliability of the product. Attached Figure Description

[0024] Figure 1 This is a flowchart illustrating the continuous surface mount soldering method in this application; Figure 2 This is a flowchart illustrating step S2 in this application; Figure 3 This is a schematic diagram of the continuous surface mount soldering system in this application. Detailed Implementation

[0025] The present application will be further described in detail below with reference to the accompanying drawings.

[0026] Reference Figure 1 This application discloses a continuous surface mount soldering method for components on ultra-long circuit boards, comprising: S1: Analyze the 3D model of the circuit board, combine it with the component distribution, and generate several virtual sections to be soldered; S2: Deconstruct the circuit board into segments based on the virtual section to be soldered, locate and calibrate the chip coordinates, and generate local chip placement paths; S3: Monitor the soldering temperature of the solder joint area based on the local surface mount path, and combine it with the soldering temperature control model to identify the temperature status of the solder joint and generate abnormal control signals; S4: Based on the abnormal control signal, coordinate the control of the welding voltage, generate the circuit board welding control table, and transmit it to the cloud platform.

[0027] In this embodiment, in the automated surface mount soldering production line of an ultra-long flexible circuit board (3.2 meters long, 0.3 meters wide, and 0.8 mm thick) for aerospace electronic equipment, the system first analyzes the three-dimensional model of the circuit board and the distribution data of thousands of components (capacitors, resistors, connectors). Based on the component density and solder joint spacing, the circuit board is virtually divided into 32 continuous segments to be soldered, each segment being 100 mm long, and the reference points for the surface mount coordinates within each segment are marked. Subsequently, for each virtual segment to be soldered, the micro-bending deformation of the circuit board substrate is deconstructed segment by segment. The actual surface mount coordinates are located and calibrated using a dual-camera vision system, generating a local surface mount path that only covers the surface mount components within the current segment, ensuring precise pick-and-place within millimeter-level errors on the flexible board.

[0028] Immediately after placement, the components move to the soldering station. An infrared thermal imager monitors the temperature changes of each solder joint area (1.5mm in diameter) in real time at 200 frames per second. The collected temperature time-series data is input into a soldering temperature control model based on finite element method and PID parameter self-tuning. This model can identify whether the solder joint is in a temperature state such as "insufficient preheating", "normal melting", "thermal shock overshoot", or "cold soldering". When overshoot is detected in three consecutive solder joints within a certain range (peak temperature exceeds 260℃ and lasts for >50ms), the system immediately generates an abnormal control. The signal, through solid-state relays, coordinates the control of the welding voltage—linearly reducing the heating voltage of the area where the segment is located from 24V to 21V, while extending the preheating time by 0.2 seconds; the above abnormal events and control parameters are recorded in the circuit board welding control table (including segment number, abnormality type, voltage correction value, and timestamp), and transmitted in real time to the cloud platform through the 5G edge gateway, so that process engineers can perform remote analysis and model self-learning, ultimately reducing the solder joint defect rate of ultra-long circuit boards from 1.2% to 0.3%, and reducing the first piece commissioning time from 8 hours to 2 hours.

[0029] Preferably, step S1 includes: The 3D model of the circuit board is analyzed to extract component reference numbers, 3D package data, and mounting surface. The 3D packaging data is analyzed according to the packaging type to obtain the substrate stack-up structure, copper foil thickness distribution and copper coverage graph; Based on the component reference designation and package area, kernel density estimation is performed on the components to generate a component density field. Based on the copper foil thickness distribution and the copper foil heat dissipation effect, the copper foil of each layer is projected and weighted to construct the copper foil thermal inertia field. The component density field and the copper foil thermal inertia field are normalized and fused to generate a welding thermal characteristic index field; The gradient of the welding thermal characteristic index field is calculated to obtain the spatial gradient amplitude of the plate surface; Based on the spatial gradient magnitude of the board surface, the circuit board is divided into regions and the boundaries are smoothed to obtain an initial connected homogeneous region. Thermal property analysis was performed on the initially connected homogeneous region, and the variance of the thermal property index was calculated. If the variance of the thermal property index is within the gradient tolerance range, then mark the current initial connected homogeneous region as a virtual segment to be welded; If not, then the current initial connected homogeneous region is segmented, the transition welding region is marked, and a virtual segment to be welded is constructed.

[0030] In this embodiment, a CAD coordinate file (such as an ASCII format pick-and-place machine coordinate file) is read, and the reference designation, package type, center point X / Y coordinates, rotation angle, and mounting surface of each component are extracted. These discrete points are then mapped to a unified board-level coordinate system.

[0031] Analyze 3D packaging data in formats such as ODB++ or IPC-2581 to obtain the substrate's stack-up structure, copper foil thickness distribution of each layer, and copper coverage. The copper foil distribution is then meshed, transforming the continuous image into a spatially discretized copper density thermal map, typically with a resolution of 0.5–1.0 mm.

[0032] For each component, its number of solder joints, heat capacity rating, and recommended soldering temperature range are retrieved from the package library, and the component's geometric location is correlated with its thermophysical properties.

[0033] A kernel density estimation algorithm is used, with each component as the kernel center. The kernel weight is set according to the package area and thermal capacity, and the bandwidth is taken as an empirical value (such as 10-15 mm) to generate a continuous and smooth density distribution field, namely the component density field D(x,y). This field has a peak value in the BGA dense region and drops to a low value in the sparse region of resistors and capacitors.

[0034] Based on the extracted copper foil layer thickness distribution, the equivalent thermal inertia per unit area, i.e., the copper foil thermal inertia field H(x,y), is calculated. Considering the heat dissipation effect of the inner copper foil, multiple copper foil layers are projected onto the same plane, and the weighted sum of thicknesses characterizes the local heat dissipation capacity at that coordinate point.

[0035] The two fields are normalized and then fused to generate a welding thermal characteristic index field I(x,y)=α⋅Dnorm+β⋅Hnorm, where α and β are weighting coefficients adjusted according to the substrate material and welding process. This index field reflects the comprehensive characteristics of the required welding heat input and heat loss at each point on the board.

[0036] Calculate the spatial gradient of the thermal characteristic exponential field I(x,y) and then calculate the gradient magnitude ||I|. A steep gradient increase indicates a significant change in component density or copper foil thickness, representing abrupt changes in thermal characteristics.

[0037] The plate surface is divided into several connected homogeneous regions along gradient ridges using either a watershed algorithm or a threshold-based region growing method. Within each closed boundary, the variance of the thermal characteristic index is less than a preset threshold, ensuring consistent welding thermal behavior within the same segment.

[0038] The initial boundary is morphologically closed and smoothed to eliminate fragmented small areas. Isolated areas with an area smaller than the minimum weld area size (e.g., 5×5 mm) are merged into the adjacent largest area to ensure that the segmentation has practical engineering significance.

[0039] Based on the segment boundaries and region attributes, the spatial range of each virtual segment is determined and independent welding control parameters are bound to it.

[0040] Virtual segment queue establishment: Each identified homogeneous region is defined as a virtual segment Si to be soldered, and its outer rectangular range, the list of components contained therein, the average thermal characteristic index within the region, and the characteristic value of copper foil thickness are recorded.

[0041] The segment length is not a fixed value, but is naturally determined by the span of the area along the welding direction (usually the long side of the circuit board). For high-density areas, the length of the circumscribed rectangle may be small (tens of millimeters) to facilitate precise control; for low-density areas, the length can be appropriately increased.

[0042] Based on the thermal characteristic index of each segment, the corresponding preset temperature curve and basic power value are retrieved from the process database. High-index regions (dense + thick copper) are configured with high power and a gradual rise curve; low-index regions are configured with low power and a rapid rise curve. After the parameter set is associated with the segment, it is cached to the local industrial control computer on a segment-by-segment basis.

[0043] Traverse the components within each segment Si, and sort the solder joints within the segment locally according to the process path planning algorithm (such as ant colony algorithm or nearest neighbor algorithm), generating an independent chip coordinate queue Qi for this segment, which contains the precise coordinates and welding posture parameters of each solder joint.

[0044] At the boundary between two adjacent segments, a transition welding zone with a length of 5–10 mm is defined. The weld joints within this zone simultaneously reference the parameters of the preceding and following segments, using linear interpolation to smoothly transition the temperature and power, thus avoiding abrupt changes in weld quality at the segment boundaries.

[0045] The segmented queues Qi are concatenated into a global queue according to the welding process sequence, and the presence of any missing or duplicate weld point coordinates is checked. The segmented data is confirmed to be consistent with the overall system scheduling interface, ensuring that while the virtual segments are independently controlled, the global welding process remains coordinated and continuous.

[0046] Reference Figure 2 Preferably, step S2 includes: A: Analyze the virtual section to be welded, extract the boundary coordinate set of the welding section, construct a two-dimensional spatial index tree, and determine the local coordinate reference point; B: Deconstruct the circuit board based on the two-dimensional spatial index tree to determine the coordinates of the optical positioning marks; C: Calculate the rigid body transformation matrix by fitting the coordinates of the local coordinate reference point and the optical positioning mark; D: The theoretical inter-segment boundary coordinates are obtained by performing point-by-point transformation on the coordinate set of the welded segment boundary according to the rigid body transformation matrix; E: Perform segmented inspection of the circuit board according to the target process welding direction, determine the actual welding segments, and obtain the circuit board welding diagram; F: Perform edge detection and template matching on the circuit board welding diagram, and calculate the boundary coordinates between solid segments; G: Compare the theoretical inter-segment boundary coordinates with the physical inter-segment boundary coordinates to calculate the segmented residual offset; H: Based on the segmented residual offset, construct a local correction transformation matrix and perform coordinate transformation on the solder joint coordinates to obtain the patch coordinates; I: Path planning is performed on all patch coordinates based on local coordinate reference points to generate local patch paths.

[0047] In this embodiment, the cached virtual segment data packets include the boundary coordinate set, the component list, the independent coordinate queue, and the welding parameters for each segment Si.

[0048] To improve the efficiency of subsequent location queries, a two-dimensional spatial index tree is constructed based on the segment boundaries. Given the coordinates of any solder joint, the segment number to which it belongs and the local reference point of that segment can be quickly retrieved.

[0049] For each segment Si, a local coordinate system reference point Oi is assigned, typically the geometric center or lower left corner of the segment's circumscribed rectangle. This point will serve as the local reference origin for the coordinates of all solder joints within that segment.

[0050] Before the placement process begins, a laser positioning system is used to establish coordinate references for the entire circuit board, eliminating rigid offsets caused by clamping and transportation.

[0051] The circuit board has at least three optical positioning marks pre-set, distributed at the four corners and the center area of ​​the board. The laser positioning system scans these marks sequentially to obtain their actual positions Pfid_real in the device coordinate system.

[0052] The measured coordinates of the marker points are fitted with the theoretical coordinates of the marker points Pfid_cad in the CAD file using least squares to solve for the global rigid body transformation matrix Tglobal from the CAD coordinate system to the device coordinate system, which includes the rotation component R and the translation component t.

[0053] By applying this transformation matrix, the theoretical coordinates of each segment reference point Oi and all solder joints within the segment are batch converted from the CAD coordinate system to the equipment coordinate system, thus completing the global initial positioning of the entire board.

[0054] The high-resolution camera mounted on the placement head moves above the local reference point Oi of each Si segment and captures images of at least two local reference markers within that segment. For segments without dedicated markers, large component pads with distinct features within the region are selected as alternative positioning features.

[0055] The image processing module performs edge detection and template matching on the acquired image, and calculates the residual offset between the actual position of the segment and the theoretical position after global calibration. Δpi=[Δxi,Δyi,Δθi] T ; This offset reflects the nonlinear error caused by local thermal deformation and substrate expansion and contraction of the circuit board.

[0056] If the calculated offset of a certain segment exceeds the preset reasonable range, the system will trigger a re-inspection or mark the segment as "high deviation" for subsequent manual confirmation, in order to prevent miscorrection due to local dirt or obstruction.

[0057] The segment offset is applied to the coordinates of all solder joints within the segment to complete the progressive correction from global coarse positioning to segment fine positioning.

[0058] Based on the segment offset Δpi, construct the local correction transformation matrix Tlocal(i) for the segment, in the form: Tlocal(i)=[cosΔθi−sinΔθiΔxi,sinΔθicosΔθiΔyi,001]; Traverse each solder joint Pj in the segmented Si coordinate queue and apply global and local transformations in sequence: Pj′=Tlocal(i)⋅Tglobal⋅Pjcad; the updated coordinates Pj′ are the final placement target position of the solder joint in the device coordinate system.

[0059] The offset Δpi, correction matrix Tlocal(i), and correction timestamp of each segment are recorded to the industrial control computer to form a complete segmented calibration traceability log.

[0060] Using the local reference point Oi of segment Si as a reference, all calibrated solder joints within the segment are taken as path nodes. A local dynamic programming algorithm or an improved nearest neighbor algorithm is employed to generate the optimal local placement path Pati within the segment, aiming to minimize the placement head movement distance or time.

[0061] Traditional segment-by-segment isolation can lead to excessively long idle travel distances for the patch head between segments. Therefore, it is necessary to optimize the access order between segments at the global level—treating each segment as a "super node," using a traveling salesman problem solver to determine the optimal soldering order of the segments, and then splicing the internal paths of each segment to form a globally near-optimal continuous patch trajectory.

[0062] In the generated local path, a visual guidance marker is attached to each solder joint node. When the placement head moves over a solder joint, the visual feedback control system can perform a final "snapshot confirmation" of that node, achieving "unified placement position and solder joint positioning" and locking the placement accuracy to the micrometer level.

[0063] Preferably, step H includes: The segmented residual offset is decomposed to obtain planar rotation components and translation linear components; Based on rigid body kinematics, a local correction transformation matrix is ​​constructed by homogeneously combining the planar rotational components and translational linear components. The solder joint coordinates are expanded to obtain the homogeneous column vector of the solder joint, and combined with the local correction transformation matrix, the target position of the patch is obtained; If the target position of the patch is within the effective stroke range of the patch, the current target position of the patch is determined based on the outer rectangular boundary of the solid soldering segment; If the current patch target position is not located on the outer rectangle boundary, it indicates that the local gradient of the solid solder segment is abnormal. The current patch target position is then re-segmented to obtain the corrected solder joint coordinates. If not, then the distance between the boundary weld points of the solid welding segment and the adjacent weld points in the adjacent segment is calculated to obtain the weld point spacing; If the spacing between weld points is greater than the threshold for the distance between adjacent points, then transition interpolation is performed on the boundary weld points of the solid weld segment to obtain the corrected weld point coordinates; The solder joint coordinates are replaced and merged with the target position of the patch based on the solder joint markings to obtain the patch coordinates.

[0064] In this embodiment, the independent measurement deviations of each segment are obtained from the visual inspection module and organized into a computable vector form.

[0065] For each virtual segment Si, read the residual offset data packet output by the image recognition module, which contains three independent components: linear offset Δxi (mm) in the X direction, linear offset Δyi (mm) in the Y direction, and planar rotation offset Δθi (radians or degrees, uniformly converted to radians for calculation). This offset is the residual between the actual image position and the theoretical position of the segmented local reference point after global laser calibration, reflecting the mean effect of nonlinear factors such as local expansion and contraction and thermal deformation of the substrate within the segment.

[0066] Assemble the three components into an offset vector: Δpi=[Δxi, Δyi, Δθi] T Simultaneously, the measurement confidence score ci of the vector (given by the image matching score) is recorded.

[0067] Using a two-dimensional homogeneous transformation matrix Tlocal(i)∈R 3×3 This matrix can perform rotation and translation operations simultaneously in a single multiplication, making it suitable for correcting weld point coordinates in a two-dimensional plane.

[0068] Fill the sine and cosine values ​​of the rotation angle Δθi into the corresponding positions in the matrix: R 2×2 =[cosΔθi−sinΔθi,sinΔθicosΔθi]; This submatrix implements a counterclockwise rotation transformation around the segmented reference point.

[0069] Fill the first two rows of the third column of the matrix with the linear offsets Δxi and Δyi: t = [Δxi, Δyi] T ; Combining rotation, translation, and homogeneous row operations, we can construct a complete local correction transformation matrix: Tlocal(i)=[cosΔθi−sinΔθiΔxi,sinΔθicosΔθiΔyi,001]; This matrix can correct coordinate points in a piecewise local coordinate system to their precise positions after eliminating residual biases.

[0070] For each solder joint in the independent coordinate queue Qi of segmented Si, perform homogeneous coordinate transformation sequentially.

[0071] For the j-th solder joint in the queue, its original coordinates Pj=(xj,yj) (which have been transformed to the device coordinate system via a global transformation) are expanded into a homogeneous column vector: Pj=[xj, yj, 1]. T ; Matrix multiplication performs the transformation: the local correction matrix is ​​multiplied by the homogeneous vector of the solder joint to obtain the corrected homogeneous coordinates. Pj′=Tlocal(i)⋅Pj; the expansion operation is: xj′=xj⋅cosΔθi−yj⋅sinΔθi+Δxi; yj′=xj⋅sinΔθi+yj⋅cosΔθi+Δyi; Non-homogeneous coordinate restoration: Extract the first two dimensions from the transformation result to obtain the corrected Cartesian coordinates Pj′=(xj′,yj′). These coordinates represent the final patch target position after compensating for the segmented residual offset.

[0072] Perform a physical feasibility check on the transformed coordinates to ensure that they do not exceed the equipment travel or segment boundaries.

[0073] Equipment travel verification: Check point by point whether xj′ and yj′ fall within the effective travel range of the placement equipment. If any point exceeds the range, it indicates that there is an abnormal accumulation of local offsets, and the placement of that segment should be interrupted and an alarm should be triggered.

[0074] Verify whether the transformed coordinates Pj′ still fall within the bounding rectangle of segment Si. If a solder joint shifts to an adjacent segment after correction, it indicates a large local deformation gradient at the segment boundary, and the solder joint needs to be reassigned to the correct segment or included in the transition zone.

[0075] For solder joints located at the segment boundaries, check whether their corrected coordinates are reasonably spaced from the distance between adjacent solder joints in the adjacent segments. If there is an excessive jump, a transition interpolation strategy should be enabled for the boundary solder joints.

[0076] Preferably, step S3 includes: The local patch path is parsed, the patch coordinates are extracted, and corresponding temperature measurement points are assigned to form a local temperature measurement group; Based on the preset sampling frequency and combined with the local temperature measurement group, the welding temperature of the patch solder joint area is collected to obtain the solder joint sampling temperature; The solder joint sampling temperature is correlated and filled according to the substrate stack structure to generate a solder joint temperature distribution surface. The temperature distribution surface of the weld joint is compared hierarchically based on the preset welding process temperature curve, and the temperature deviation of the weld joint is calculated. Statistical calculations were performed on the temperature deviation of the weld joints based on the collection period to obtain the mean deviation and the rate of change of deviation. By comparing the allowable tolerance range with the average deviation, and combining the solder joint temperature deviation and the rate of change of deviation, the solder joint temperature status is identified, and corresponding abnormal instructions are generated, including: If the average deviation is within the allowable tolerance range and the solder joint temperature deviation is less than the temperature deviation threshold, then the current solder joint temperature status is determined to be normal, and a temperature hold command is generated. If the average deviation is not within the allowable tolerance range, and the temperature deviation of multiple solder joints is greater than or equal to the temperature deviation threshold, then the current solder joint temperature status is determined to be a multi-point deviation in the same direction, and an overall deviation anomaly command is generated. If the average deviation is not within the allowable tolerance range, but the temperature deviation of individual solder joints is greater than or equal to the temperature deviation threshold, then the current temperature state of the solder joints is determined to be an individual solder joint deviation, and a local offset anomaly command is generated. If the mean deviation is not within the allowable tolerance range and the deviation change rate is less than the temperature deviation change rate, the current solder joint temperature state is determined to be abnormal temperature response, and a temperature response lag abnormal command is generated. The abnormal commands are traced using the welding temperature control model, and corresponding abnormal control signals are generated by combining the characteristics of the weld point distribution.

[0077] In this embodiment, the local patch path Pathi of the current segment is read, which contains a sequentially arranged sequence of solder joint coordinates Pj′. A nearby temperature sensor channel is assigned to each solder joint. Typically, three temperature measurement points are selected from the area where the solder joint is located and along the length of the circuit board on both sides to form a local temperature measurement group.

[0078] Temperature sensors are arranged in a grid along the length (X-axis) and width (Y-axis) of the circuit board. The system maps the solder joint coordinates (xj′, yj′) to the nearest sensor grid node, establishing a solder joint-sensor index table.

[0079] When the chip placement robot arm completes the placement of a solder joint and moves to the next station, the system automatically switches the monitoring sensor channel group according to the current placement progress, so that the temperature acquisition window closely follows the placement path.

[0080] The current value T(xi,tk) of all temperature sensors is synchronously read at a fixed sampling frequency (e.g., 100 Hz), where xi is the position coordinate of the sensor along the length of the board, and tk is the cumulative time since the start of welding.

[0081] Discrete sampling points are filled into the corresponding positions of the 3D temperature model in real time—the X-axis corresponds to the sensor's coordinates along the length of the circuit board, the Y-axis corresponds to the soldering process time, and the Z-axis corresponds to the temperature value. A continuous temperature distribution surface is generated for the blank areas between sensors using bilinear interpolation or kriging interpolation.

[0082] For each weld point Pj′, based on its position coordinates on the X-axis and the current welding time, the measured temperature-time curve T of that point is extracted from the three-dimensional temperature model. meas (j) (t) and the current instantaneous temperature value Based on the welding parameter set of the current Si segment, read the preset temperature curve Tref(t) corresponding to the segment. This curve defines the target temperature-time relationship for each stage of preheating, heating, reflow, and cooling, and is accompanied by an allowable tolerance band [Tref(t)−δlow, Tref(t)+δup].

[0083] At each sampling time tk, calculate the instantaneous temperature deviation for the solder joint Pj′: ΔTj(tk) = T meas (j) (tk)−T ref (tk) Simultaneously calculates the cumulative deviation indices within the window: the mean deviation ΔTj and the rate of change of deviation dΔTj / dt; Normal temperature: |ΔTj(tk)|≤δ and the cumulative mean is within the tolerance band, generating a "normal temperature signal".

[0084] Temperature anomaly: If the deviation exceeds the tolerance band, it is further subdivided according to the mode: Overall offset anomaly: Multiple weld points deviate in the same direction, which may be due to improper overall heating power settings; Localized cold / hot spot anomalies: Prominent deviations at individual solder joints may indicate abnormal heat dissipation conditions or heat capacity in that area. Anomaly in response lag: The slope of the actual temperature change is significantly lower than the slope of the preset curve.

[0085] The welding thermal characteristic index I(x,y) of the segment and the thermal inertia field data of the copper foil are retrieved. If a solder joint is located in a high thermal inertia region (thick copper foil, fast heat dissipation) but the temperature is low, it can be directly diagnosed as insufficient heat due to excessive heat dissipation; conversely, if it is located in a low thermal inertia region but the temperature is high, it may be due to concentrated heating, as shown in Table 1.

[0086] Table 1 Decision Table for Regulation Strategies The overall temperature of the solder joints is relatively low. Insufficient base power Increase the welding power factor for this section by 5–10%. The overall temperature of the solder joints is too high. Excessive base power Reduce power coefficient and activate auxiliary cooling. Local solder joint temperature is too low Excessive heat dissipation or poor heat conduction Activate local auxiliary heating (such as laser heating or hot air gun targeted purging). Local solder joint temperature is too high thermal accumulation Initiate localized cooling (such as micro-injection of nitrogen or enhanced convection). Temperature response hysteresis Insufficient heating rate Adjust the slope of the power curve during the heating phase, or extend the preheating time. Multiple consecutive anomalies Systemic problems (such as voltage fluctuations) Global power compensation and notification to the central control module to record events. Based on the decision results, a structured abnormal control signal package is generated, including: solder joint number and location; abnormality type code; suggested control method (heating / cooling / power adjustment); control intensity (power increment percentage, auxiliary heating duration, etc.); control execution priority (execute immediately / execute after the current segment ends).

[0087] Anomaly control signal packets are sent to the welding equipment controller and local temperature control actuators via a real-time bus. If the anomaly involves power adjustment of the entire segment, the welding parameter set for the current segment is updated synchronously.

[0088] If the abnormality is severe (temperature deviation exceeds the safety threshold), issue an order to suspend welding of that segment according to S3-2, and resume welding only after the temperature compensation reaches the target range.

[0089] If the abnormality is minor, online dynamic compensation is performed through auxiliary heating / cooling while welding continues.

[0090] Preferably, step S4 includes: The abnormal control signal is analyzed to extract the abnormal solder joint number, abnormal type code, control method and control intensity. Match the segmented welding parameter set according to the abnormal weld point number, and extract the reference welding voltage, reference welding power and voltage adjustment range; Based on the anomaly type code and the reference welding voltage or reference welding power, the real-time welding parameters are corrected and converted, and the voltage correction amount is calculated. Calculate the comprehensive welding voltage based on the voltage correction amount and the reference welding voltage, and compare it with the voltage adjustment range; If the overall welding voltage is within the voltage regulation range and the voltage change rate is less than the allowable response slope, then the current voltage correction is deemed compliant. If multiple solder joints are controlled simultaneously, the total power increment is calculated based on the voltage correction amount and compared with the total power margin. If the total power increment is greater than or equal to the total power margin, the solder joints are queued and executed in a time-sharing manner according to their priority, generating a circuit board soldering control table and transmitting it to the cloud platform.

[0091] In this embodiment, key fields are extracted from the abnormal control signal packet: abnormal solder joint number, abnormal type code, control method (power adjustment / auxiliary heating / cooling), and control intensity (e.g., power increment percentage ΔP%). Non-electrical parameter control items that have been directly executed by auxiliary heating or cooling are discarded, and only the parts that need to be implemented through electrical parameters are retained.

[0092] The reference welding voltage Vbase, reference power Pbase, solder joint thermal characteristic index, and allowable voltage adjustment range [Vmin, Vmax] of the segment to which the solder joint belongs are retrieved from the segmented welding parameter set. The lower voltage limit is limited by the minimum value required for arc initiation or maintaining stable energy transfer, while the upper voltage limit is limited by the component withstand voltage and the thermal shock resistance of the solder pads.

[0093] The voltage regulation model F is invoked. This model takes the power change and the current temperature deviation as inputs and outputs the optimal voltage adjustment: ΔV=F(ΔP%, ΔTj, Vbase, Pbase).

[0094] The model typically incorporates the square law relationship between power and voltage (P∝V). 2 The real-time identification results of the load equivalent impedance Rload ( / R) ensure that the voltage regulation can still accurately hit the target power when the load changes.

[0095] For scenarios requiring overall power adjustment, the model calculates the equivalent voltage change based on the target power increment. If the original power is P0, the target power is P0(1+ΔP%), and the equivalent load resistance is R, then the corrected voltage Vnew and the adjustment amount ΔV are: ; If local temperature deviations are involved and power regulation is coupled with pulse width or frequency modulation, the model needs to output a multi-dimensional electrical parameter adjustment vector.

[0096] Check if Vbase+ΔV falls within the interval [Vmin, Vmax]. If it exceeds the limit, clamp to the boundary value and downgrade the control strategy.

[0097] Check whether the voltage change rate dV / dt exceeds the allowable response slope of the welding power source to avoid arc instability or electromagnetic interference caused by voltage sudden changes.

[0098] The new welding voltage setting value Vnew is written to the target register of the welding power controller via the real-time industrial bus, and the effective time of the instruction is issued synchronously (associated with the current welding position or timestamp) to ensure that the voltage adjustment is precisely synchronized with the welding point position.

[0099] Within a short window (e.g., 100 ms) after the voltage adjustment takes effect, welding current and power feedback are rapidly acquired to verify whether the actual power reaches the expected adjustment amount. If the deviation between the actual value and the target value exceeds 5%, it is determined to be an execution deviation, triggering a secondary fine-tuning.

[0100] The temperature deviation trend of the welding section after voltage adjustment is compared with the expected adjustment to confirm whether the temperature has returned to the tolerance range. If the expected result is achieved, a "adjustment completed" flag is generated; if the result is not achieved, the anomaly level is upgraded and the diagnostic process is restarted.

[0101] For operating conditions where multiple welding points are controlled simultaneously, check whether the total power increase on the grid side exceeds the power supply capacity margin, and if necessary, execute them in a time-sharing manner according to priority.

[0102] If the control command cannot be fully executed due to boundary limitations, a downgraded control signal is generated, and the adjustment is made according to the maximum actual executable range. The shortfall is then fed back to the auxiliary heating / cooling module for collaborative compensation.

[0103] Using segment Si as the unit, collect all abnormal events and control actions that occur in the segment from the start to the end of welding, including: event trigger time, abnormal weld number, abnormal type, control method, original voltage Vbase, adjusted voltage Vnew, voltage change ΔV, control duration, and temperature deviation recovery value after control.

[0104] The circuit board soldering control table R adopts a structured format, and the core fields include: board level information: circuit board number, batch number, process version; segment information: segment identifier Si, segment thermal characteristic index, reference power / voltage; event list: detailed parameters of each event (as above), stored in the form of nested arrays or sub-tables; temperature deviation pass rate, control frequency density, and final solder joint quality judgment (pass / downgrade / rework) within the segment.

[0105] According to the segmented welding sequence, the control records of each segment are spliced ​​into a complete control sequence for the whole plate, and time axis information is added to generate a master table of welding control for the whole plate. The format can be JSON or XML for easy parsing.

[0106] The control table R and the corresponding three-dimensional temperature field segment data are packaged together, with an additional device identifier and digital signature, and transmitted using TLS / SSL encryption protocol to ensure the secure delivery of industrial data over the public internet.

[0107] Set up edge filtering rules on the local industrial control computer to upload only board-level data with abundant control events (such as anomalies that have occurred and been successfully corrected) or a quality rating of critical, reducing redundant storage in the cloud. For segments with normal data and no anomalies, only upload summary statistics.

[0108] Asynchronous transmission using MQTT or OPC UA protocols avoids impacting the real-time control cycle. In the event of a network interruption, the control table is cached in local non-volatile memory, and transmission resumes in timestamp order after network recovery, ensuring no data loss.

[0109] After receiving the data, the cloud platform stores it in the data lake according to the circuit board number, batch, and date index, triggering the backend parsing service to perform structured data entry into the control table, so that each control record can be queried by SQL or big data engine.

[0110] Reference Figure 3 A continuous surface mount soldering system for components on ultra-long circuit boards, applicable to continuous surface mount soldering methods, including: The virtual segmentation module is used to parse the 3D model of the circuit board and generate several virtual segments to be soldered based on the component distribution. The chip positioning module is used to disassemble the circuit board into segments based on the virtual section to be soldered, locate and calibrate the chip coordinates, and generate local chip placement paths. The monitoring and feedback module is used to monitor the soldering temperature of the solder joint area based on the local solder path, and in combination with the soldering temperature control model, identify the temperature status of the solder joint and generate abnormal control signals. The linkage control module is used to coordinate the control of welding voltage based on abnormal control signals, generate a circuit board welding control table, and transmit it to the cloud platform.

[0111] In this embodiment, the laser positioning and patch calibration module performs initial positioning and patch placement confirmation for the ultra-long circuit board. Through a high-precision visual feedback system and dynamic path planning, it accurately controls the patch placement position and improves the patch positioning accuracy. The multi-point temperature acquisition and analysis module collects temperature values ​​at different locations during the welding process in real time. After collecting the data, the system generates a temperature distribution map, performs temperature deviation analysis on the welding and heat preservation stages, and generates temperature anomaly judgment and adjustment instructions.

[0112] The segmented welding control module divides the ultra-long circuit board into multiple welding segments, each of which is an independent control zone. Each segment supports independent chip placement, welding, temperature monitoring and control. When a welding segment malfunctions, the system can pause welding in that segment and make adjustments without affecting the normal welding of adjacent segments.

[0113] The solder joint quality feedback and image recognition module performs image recognition and quality assessment on the solder joints after soldering is completed; and uploads the solder joint parameters (soldering length, solder amount, focal length, etc.) after soldering to the cloud platform to support solder joint quality traceability; if an abnormality is found in the solder joint, the system automatically records it and feeds it back to the operation platform.

[0114] The power and temperature control linkage module automatically calculates and adjusts the welding power based on temperature deviation and power fluctuations to ensure a dynamic balance between temperature and power during the welding process.

[0115] The cloud-based data management and control module uploads information such as welding parameters, temperature data, and welding time to the cloud platform to support functions such as welding process optimization, remote equipment control, and data traceability, facilitating intelligent adjustment of welding parameters.

[0116] An electronic device, comprising: One or more processors; Memory, used to store one or more programs; When one or more programs are executed by one or more processors, the one or more processors implement any of the methods in the above scheme.

[0117] A storage medium storing at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, at least one program, code set, or instruction set is loaded and executed by a processor to implement the continuous surface mount soldering method as described above.

[0118] The embodiments described in this specific implementation are preferred embodiments of this application and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A method for continuous soldering of components on an ultra long line board, characterized by, include: Analyze the 3D model of the circuit board and combine it with the component distribution to generate several virtual sections to be soldered; Based on the virtual section to be soldered, the circuit board is segmented and deconstructed, the chip coordinates are located and calibrated, and a local chip path is generated. Based on the local patch path, monitor the soldering temperature of the patch solder joint area, combine with the soldering temperature control model, identify the solder joint temperature status, and generate abnormal control signals. Based on the abnormal control signal, the welding voltage is controlled collaboratively to generate a circuit board welding control table, which is then transmitted to the cloud platform.

2. The method for continuous soldering of components on an ultra-long circuit board according to claim 1, wherein, The analytical circuit board's 3D diagram, combined with the component distribution, generates several virtual sections to be soldered, including: The 3D model of the circuit board is analyzed to extract component reference numbers, 3D package data, and mounting surface. The 3D packaging data is analyzed according to the packaging type to obtain the substrate stack-up structure, copper foil thickness distribution and copper coverage graph; Based on the component reference designation and package area, kernel density estimation is performed on the components to generate a component density field. Based on the copper foil thickness distribution and the copper foil heat dissipation effect, the copper foil of each layer is projected and weighted to construct the copper foil thermal inertia field. The density field of the components and the thermal inertia field of the copper foil are normalized and fused to generate a welding thermal characteristic index field; The gradient of the welding thermal characteristic index field is calculated to obtain the spatial gradient amplitude of the plate surface; Based on the spatial gradient magnitude of the board surface, the circuit board is divided into regions and the boundaries are smoothed to obtain an initial connected homogeneous region. Thermal characteristic analysis is performed on the initial connected homogeneous region, and the variance of the thermal characteristic index is calculated; If the variance of the thermal property index is within the gradient tolerance range, then mark the current initial connected homogeneous region as a virtual segment to be welded; If not, then the current initial connected homogeneous region is segmented, the transition welding region is marked, and a virtual segment to be welded is constructed.

3. The method for continuous soldering of components on ultra long circuit board according to claim 1, wherein, Based on the virtual section to be soldered, the circuit board is segmented and deconstructed, the chip coordinates are located and calibrated, and a local chip placement path is generated, including: The virtual section to be welded is analyzed, the boundary coordinate set of the welding section is extracted, a two-dimensional spatial index tree is constructed, and the local coordinate reference point is determined. The circuit board is deconstructed based on a two-dimensional spatial index tree to determine the coordinates of the optical positioning marks; The rigid body transformation matrix is ​​calculated by fitting the local coordinate reference point with the coordinates of the optical positioning mark. The theoretical inter-segment boundary coordinates are obtained by performing a point-by-point transformation on the welded segment boundary coordinate set based on the rigid body transformation matrix. The circuit board is segmented and inspected according to the target process welding direction to determine the actual welding segments and obtain the circuit board welding diagram. Edge detection and template matching are performed on the circuit board welding diagram to calculate the boundary coordinates between solid segments; The residual offset of the segments is calculated by comparing the theoretical inter-segment boundary coordinates with the physical inter-segment boundary coordinates. Based on the segmented residual offset, a local correction transformation matrix is ​​constructed, and the solder joint coordinates are transformed to obtain the patch coordinates; Based on the local coordinate reference point, path planning is performed on the coordinates of all patches to generate local patch paths.

4. The method for continuous soldering of components on an ultra-long circuit board according to claim 3, wherein The step of constructing a local correction transformation matrix based on the segmented residual offset and performing coordinate transformation on the solder joint coordinates to obtain the patch coordinates includes: The segmented residual offset is decomposed to obtain planar rotation components and translation linear components; Based on rigid body kinematics, a local correction transformation matrix is ​​constructed by homogeneously combining the planar rotational components and translational linear components. The solder joint coordinates are expanded to obtain the homogeneous column vector of the solder joint, and combined with the local correction transformation matrix, the target position of the patch is obtained; If the target position of the patch is within the effective stroke range of the patch, the current target position of the patch is determined based on the outer rectangular boundary of the solid soldering segment; If the current patch target position is not located on the outer rectangle boundary, it indicates that the local gradient of the solid solder segment is abnormal. The current patch target position is then re-segmented to obtain the corrected solder joint coordinates. If not, then the distance between the boundary weld points of the solid welding segment and the adjacent weld points in the adjacent segment is calculated to obtain the weld point spacing; If the spacing between the weld points is greater than the threshold for the distance between adjacent points, then the boundary weld points of the solid weld segment are interpolated to obtain the corrected weld point coordinates. The solder joint coordinates are replaced and merged with the target position of the patch based on the solder joint markings to obtain the patch coordinates.

5. The method for continuous soldering of components on ultra long circuit board according to claim 1, wherein, Based on the local patch path monitoring of the solder joint area, and combined with the solder temperature control model, the solder joint temperature status is identified, and abnormal adjustment signals are generated, including: The local patch path is parsed, the patch coordinates are extracted, and corresponding temperature measurement points are assigned to form a local temperature measurement group; Based on the preset sampling frequency and combined with the local temperature measurement group, the welding temperature of the patch solder joint area is collected to obtain the solder joint sampling temperature; The solder joint sampling temperature is correlated and filled according to the substrate stack structure to generate a solder joint temperature distribution surface. The temperature distribution surface of the weld joint is compared hierarchically based on the preset welding process temperature curve, and the temperature deviation of the weld joint is calculated. Statistical calculations were performed on the temperature deviation of the weld joints based on the collection period to obtain the mean deviation and the rate of change of deviation. The system compares the allowable tolerance range with the average deviation, and combines the solder joint temperature deviation with the deviation change rate to identify the solder joint temperature status and generate corresponding abnormal instructions. The abnormal commands are traced using the welding temperature control model, and corresponding abnormal control signals are generated by combining the characteristics of the weld point distribution.

6. The continuous surface mount soldering method for components on ultra-long circuit boards according to claim 5, characterized in that, The process involves comparing the allowable tolerance range with the average deviation, and combining this with the solder joint temperature deviation and its rate of change to identify the solder joint temperature status and generate corresponding abnormal commands, including: If the average deviation is within the allowable tolerance range and the solder joint temperature deviation is less than the temperature deviation threshold, then the current solder joint temperature status is determined to be normal, and a temperature hold command is generated. If the average deviation is not within the allowable tolerance range, and the temperature deviation of multiple solder joints is greater than or equal to the temperature deviation threshold, then the current solder joint temperature status is determined to be a multi-point deviation in the same direction, and an overall deviation anomaly command is generated. If the average deviation is not within the allowable tolerance range, but the temperature deviation of individual solder joints is greater than or equal to the temperature deviation threshold, then the current temperature state of the solder joints is determined to be an individual solder joint deviation, and a local offset anomaly command is generated. If the average deviation is not within the allowable tolerance range and the deviation change rate is less than the temperature deviation change rate, the current solder joint temperature status is determined to be abnormal, and a temperature response lag abnormality command is generated.

7. The continuous surface mount soldering method for components on ultra-long circuit boards according to claim 1, characterized in that, Based on the abnormal control signal, the welding voltage is coordinated and controlled to generate a circuit board welding control table, which is then transmitted to the cloud platform, including: The abnormal control signal is analyzed to extract the abnormal solder joint number, abnormal type code, control method and control intensity. Match the segmented welding parameter set according to the abnormal weld point number, and extract the reference welding voltage, reference welding power and voltage adjustment range; Based on the anomaly type code and the reference welding voltage or reference welding power, the real-time welding parameters are corrected and converted, and the voltage correction amount is calculated. Calculate the comprehensive welding voltage based on the voltage correction amount and the reference welding voltage, and compare it with the voltage adjustment range; If the overall welding voltage is within the voltage regulation range and the voltage change rate is less than the allowable response slope, then the current voltage correction is deemed compliant. If multiple solder joints are controlled simultaneously, the total power increment is calculated based on the voltage correction amount and compared with the total power margin. If the total power increment is greater than or equal to the total power margin, the solder joints are queued and executed in a time-sharing manner according to their priority, generating a circuit board soldering control table and transmitting it to the cloud platform.

8. A continuous surface mount soldering system for components on ultra-long circuit boards, used to implement the continuous surface mount soldering method as described in any one of claims 1-7, characterized in that, include: The virtual segmentation module is used to parse the 3D model of the circuit board and generate several virtual segments to be soldered based on the component distribution. The chip positioning module is used to deconstruct the circuit board into segments according to the virtual section to be soldered, locate and calibrate the chip coordinates, and generate local chip placement paths; The monitoring and feedback module is used to monitor the soldering temperature of the solder joint area according to the local solder joint path, and in combination with the soldering temperature control model, identify the solder joint temperature status and generate abnormal control signals. The linkage control module is used to coordinately control the welding voltage according to the abnormal control signal, generate a circuit board welding control table, and transmit it to the cloud platform.

9. A storage medium storing at least one instruction, at least one program, a code set, or an instruction set, wherein the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the continuous surface mount soldering method as claimed in any one of claims 1 to 7.

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