A surface-mounted high-power chip packaging structure

Abstract

A surface-mounted high-power chip packaging structure, characterized in that: a packaging body, the packaging body is internally packaged with a base island, and the base island is mounted with a chip; a plurality of pins are arranged on one end of the packaging body, and a part of the pins are connected with the base island; a heat sink is mounted on the packaging body and connected with the base island. Through the arrangement of the heat sink on the packaging body and the connection of the heat sink with the base island, the heat generated by the chip can be transmitted to the heat sink through the base island, so that the heat sink can dissipate heat. That is, by arranging the heat sink, the chip packaging structure in the application can increase the heat dissipation path through the heat sink in addition to the heat dissipation through the pins and the base island. Thus, the heat dissipation performance of the chip packaging structure in the application is improved, so that the chip packaging structure can more quickly export the heat generated by the chip when in use.

Description

Technical Field

[0001] This invention relates to the field of radio frequency chip packaging technology, and in particular to a surface-mount high-power chip packaging structure. Background Technology

[0002] Currently, the packaging of high-power chips mainly adopts the following two technical routes:

[0003] The first type is metal / ceramic packaging. This type of packaging uses a metal base or a high thermal conductivity ceramic substrate as a heat dissipation channel. The chip is fixed to the base by direct sintering or eutectic bonding, achieving extremely low thermal resistance. However, metal / ceramic packaging has significant drawbacks: high material costs, complex manufacturing processes, and difficulty in achieving lightweight and low-cost mass production; generally, metal packaging requires a relatively large flange size, and the area increases with increasing power.

[0004] The second type is conventional plastic packaging (such as QFN / DFN / SOT). Plastic packaging uses epoxy resin molding compound to encapsulate the chip base leads and lead frame. It has significant advantages such as mature technology, suitability for large-scale automated production, and low material cost. The package is small in size and light in weight. However, conventional plastic packaging has limited heat dissipation capacity for the same area or volume. Its heat dissipation path is usually through the base island and pins of the lead frame to conduct heat to the printed circuit board. However, the plastic packaging material itself has a low thermal conductivity, and there are no other heat transfer paths, so the heat generated by the chip is difficult to dissipate quickly.

[0005] In summary, there is a clear performance-cost trade-off between existing high-power chip packaging technologies: metal / ceramic packaging offers excellent heat dissipation but is expensive, while conventional plastic packaging is inexpensive but lacks sufficient heat dissipation capabilities. Summary of the Invention

[0006] In view of the above problems of the prior art, this application provides a surface-mount high-power chip packaging structure to improve heat dissipation performance and quickly dissipate the heat generated by the chip.

[0007] To achieve the above objectives, this application provides a surface-mount high-power chip packaging structure, characterized in that it includes: a package body, wherein a base island is packaged within the package body, and a chip is mounted on the base island; pins, wherein multiple pins are provided and mounted at one end of the package body, and a portion of the pins are connected to the base island; and a heat sink, wherein the heat sink is mounted on the package body and connected to the base island.

[0008] As described above, by incorporating a heat sink on the package and connecting it to the base island, the heat generated by the chip can be transferred to the heat sink via the base island, thus achieving heat dissipation. In other words, by incorporating a heat sink, the chip package structure in this application can dissipate heat not only through the pins and base island but also through the heat sink, thereby increasing the heat dissipation path. This improves the heat dissipation performance of the chip package structure in this application, enabling it to dissipate heat generated by the chip more quickly during use.

[0009] Furthermore, by incorporating a heat sink, the heat dissipation performance of the chip packaging structure in this application is improved, thereby reducing the packaging requirements of the chip packaging structure. For example, conventional plastic encapsulation can also meet the heat dissipation needs of the chip packaging structure. This, in turn, reduces the packaging cost of the chip packaging structure.

[0010] As one possible implementation of this application, the heat sink is disposed at the other end of the package.

[0011] As described above, by placing the heat sink at the other end of the package, the heat sink can be kept away from the pins, thus avoiding interference with the installation of the chip package structure when soldering the pins.

[0012] As one possible implementation of this application, the heat sink is provided with a heat dissipation structure.

[0013] Therefore, by setting a heat dissipation structure on the heat sink, the heat dissipation performance of the heat sink can be improved, thereby improving the heat dissipation performance of the chip packaging structure in this application, so that the chip packaging structure can conduct heat generated by the chip more quickly during use.

[0014] As one possible implementation of this application, the heat dissipation structure is in the form of sheet-like or block-like protrusions.

[0015] As mentioned above, by setting up sheet-like or block-like protruding heat dissipation structures, the heat dissipation area of ​​the heat dissipation structure can be increased, thereby improving the heat dissipation performance.

[0016] As one possible implementation of this application, the size of the heat sink is proportional to the power of the chip.

[0017] As mentioned above, the larger the size of the heat sink, the stronger its heat dissipation performance. Conversely, the higher the power of the chip, the greater its heat dissipation requirements. This application makes the size of the heat sink proportional to the chip's power, thus allowing for the selection of a suitable heat sink size based on the chip's power. This avoids the situation where the heat sink is too small, resulting in insufficient heat dissipation and failing to meet the chip's heat dissipation needs. It also avoids the situation where the heat sink is too large, wasting heat dissipation capacity and unnecessarily increasing chip packaging and production costs.

[0018] As one possible implementation of this application, at least one of the pins is used for grounding.

[0019] As one possible implementation of this application, the grounded pin is connected to the base island.

[0020] As described above, the grounding area can be increased. Moreover, since the chip is mounted on the base island, and the base island is grounded through the pins, the grounding area of ​​the chip on one side of the base island is increased due to the connection between the heat sink and the base island, forming a large-area RF ground, thereby increasing the electromagnetic shielding performance. When used in high-power RF chips, it can effectively improve reliability and anti-interference requirements.

[0021] As one possible implementation of this application, the heat sink has a heat dissipation structure on the corresponding side of the chip.

[0022] As described above, by placing the heat dissipation structure on the side of the heat sink corresponding to the chip, the heat dissipation structure can be positioned to one side of the chip. Therefore, the chip can obtain electromagnetic shielding not only on the base island side but also on the heat dissipation mechanism side. This increases electromagnetic shielding performance and effectively improves reliability and anti-interference requirements when used in high-power RF chips.

[0023] As one possible implementation of this application, the pins are arranged in a straight line, with the grounded pin located in the middle.

[0024] As one possible implementation of this application, the ungrounded pins are symmetrically arranged on both sides of the grounded pins.

[0025] As shown above, by placing the grounded pin in the middle position, the grounded pin can provide electromagnetic shielding to the ungrounded pins on both sides, making the electromagnetic shielding performance more uniform.

[0026] These and other aspects of the invention will become more apparent from the following description of several embodiments. Attached Figure Description

[0027] The various features of the present invention and the relationships between them are further explained below with reference to the accompanying drawings. The drawings are exemplary; some features are not shown to scale, and some drawings may omit conventional features in the field of this application that are not essential to this application, or additional features that are not essential to this application may be shown. The combination of features shown in the drawings is not intended to limit the present application. Furthermore, throughout this specification, the same reference numerals refer to the same things. Specific descriptions of the drawings are as follows:

[0028] Figure 1 This is a three-dimensional structural diagram of the chip packaging structure in this application;

[0029] Figure 2 for Figure 1 A schematic diagram of the front structure of the chip packaging structure;

[0030] Figure 3 for Figure 1 A side view of the chip packaging structure;

[0031] Figure 4 for Figure 1 A side-view schematic diagram of the chip packaging structure;

[0032] Figure 5 for Figure 1 A schematic diagram of the internal structure of the chip packaging structure.

[0033] Explanation of reference numerals in the attached figures

[0034] 10 Chip package structure; 100 Package body; 110 Base island; 120 Chip; 130 Protective layer; 200 Pin; 210 First pin; 220 Second pin; 230 Third pin; 300 Heat sink; 310 Heat dissipation structure. Detailed Implementation

[0035] The terms "first," "second," "third," etc., used in the specification and claims are only used to distinguish similar objects and do not represent a specific ordering of objects. It is understood that, where permissible, a specific order or sequence may be interchanged so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0036] The term "comprising" as used in the specification and claims should not be construed as limiting itself to what follows; it does not exclude other elements. Therefore, it should be interpreted as specifying the presence of the mentioned feature, integral, or component, but does not exclude the presence or addition of one or more other features, integrals, or components, or groups thereof. Thus, the statement "equipment comprising means A and B" should not be limited to an equipment consisting solely of components A and B.

[0037] The term "an embodiment" or "an embodiment" as used in this specification means that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in at least one embodiment of the invention. Therefore, the terms "in one embodiment" or "in an embodiment" appearing throughout this specification do not necessarily refer to the same embodiment, but may refer to the same embodiment. Furthermore, in one or more embodiments, the particular features, structures, or characteristics can be combined in any suitable manner, as will be apparent to those skilled in the art from this disclosure.

[0038] Below, with reference to the accompanying drawings, possible embodiments of the surface-mount high-power chip 120 package structure 10 in this application will be described by way of example.

[0039] like Figures 1-5 As shown, the surface-mount high-power chip 120 package structure 10 of this application includes a package body 100, pins 200, and a heat sink 300. The package body 100 encapsulates a base island 110, on which the chip 120 is mounted. Multiple pins 200 are provided and installed at one end of the package body 100, with some pins 200 connected to the base island 110. The heat sink 300 is mounted on the package body 100 and connected to the base island 110.

[0040] As described above, by providing a heat sink 300 on the package 100 and connecting the heat sink 300 to the base island 110, the heat generated by the chip 120 can be transferred to the heat sink 300 via the base island 110, thereby achieving heat dissipation through the heat sink 300. In other words, by providing the heat sink 300, the chip 120 package structure 10 in this application can dissipate heat not only through the pins 200 and the base island 110, but also through the heat sink 300, thus increasing the heat dissipation path through the heat sink 300. This improves the heat dissipation performance of the chip 120 package structure 10 in this application, enabling the chip 120 package structure 10 to dissipate the heat generated by the chip 120 more quickly during use.

[0041] Furthermore, by providing a heat sink 300, the heat dissipation performance of the chip 120 package structure 10 in this application is improved, thereby reducing the packaging requirements of the chip 120 package structure 10. For example, the heat dissipation requirements of the chip 120 package structure 10 can also be met using conventional plastic encapsulation. As a result, the packaging cost of the chip 120 package structure 10 is reduced.

[0042] In some embodiments, such as Figures 1-4 As shown, the heat sink 300 is disposed at the other end of the package 100. Therefore, by disposing of the heat sink 300 at the other end of the package 100, the heat sink 300 can be kept away from the pin 200, thereby avoiding interference with the mounting of the chip 120 package structure 10 when soldering the pin 200.

[0043] In other embodiments, the heat sink 300 is located on the side of the base island 110 facing away from the chip 120.

[0044] In some embodiments, such as Figures 1-5As shown, a heat dissipation structure 310 is provided on the heat sink 300. Therefore, by providing the heat dissipation structure 310 on the heat sink 300, the heat dissipation performance of the heat sink 300 can be improved, thereby improving the heat dissipation performance of the chip 120 package structure 10 in this application, so that the chip 120 package structure 10 can conduct heat generated by the chip 120 more quickly during use.

[0045] In some embodiments, the heat dissipation structure 310 is in the form of a sheet or a block protrusion. Therefore, by providing a sheet or block protrusion heat dissipation structure 310, the heat dissipation area of ​​the heat dissipation structure 310 can be increased, thereby improving heat dissipation performance.

[0046] In some embodiments, the heat dissipation structure 310 is disposed on one side surface of the heat sink 300 and arranged in a straight line or a square array.

[0047] In some embodiments, the heat dissipation structure 310 may be a triangular or square sheet-like structure. The heat dissipation structure 310 may also be a square or rectangular block-like protrusion.

[0048] In other embodiments, a heat dissipation structure 310 is formed by slotting the heat sink 300. Slotting the heat sink 300 increases its heat dissipation area, thereby improving its heat dissipation performance.

[0049] In some embodiments, the size of the heat sink 300 is proportional to the power of the chip 120. Specifically, the larger the size of the heat sink 300, the stronger its heat dissipation performance. Conversely, the higher the power of the chip 120, the higher its heat dissipation requirements. In this application, by making the size of the heat sink 300 proportional to the power of the chip 120, a heat sink 300 of appropriate size can be set according to the power of the chip 120. This avoids the heat sink 300 being too small, resulting in insufficient heat dissipation capacity and failing to meet the heat dissipation requirements of the chip 120. It also avoids the heat sink 300 being too large, which would waste heat dissipation capacity and unnecessarily increase the chip 120 packaging structure 10 and production costs.

[0050] In some embodiments, such as Figure 5 As shown, the base island 110 is integrally formed with the pins 200 and / or the heat sink 300. Therefore, by making the base island 110 integrally formed with the pins 200 and / or the heat sink 300, the manufacturing difficulty and cost of the chip 120 package structure 10 can be reduced.

[0051] In some embodiments, at least one pin 200 is used for grounding.

[0052] In some embodiments, the grounded pin 200 is connected to the base island 110. This increases the grounding area, and since the chip 120 is mounted on the base island 110, and the base island 110 is grounded via the pin 200, the grounding area of ​​the chip on one side of the base island 110 is increased due to the heat sink 300 being connected to the base island 110. This forms a large-area RF ground, thereby increasing electromagnetic shielding performance. When used with high-power RF chips, this effectively improves reliability and anti-interference requirements.

[0053] In some embodiments, the heat sink 300 has a heat dissipation structure 310 on the side corresponding to the chip 120. Therefore, by placing the heat dissipation structure 310 on the side of the heat sink 300 corresponding to the chip 120, the heat dissipation structure 310 can be positioned on one side of the chip 120. Thus, the chip 120 can obtain electromagnetic shielding not only on the side of the base island 110 but also on the side of the heat dissipation structure 310. This increases electromagnetic shielding performance and can effectively improve reliability and anti-interference requirements when used in high-power radio frequency chips.

[0054] In some embodiments, the pins 200 are arranged in a straight line, with the grounded pin 200 located in the middle.

[0055] In some embodiments, the ungrounded pins 200 are symmetrically arranged on both sides of the grounded pins 200. Thus, by placing the grounded pins 200 in the middle position, the grounded pins 200 can provide electromagnetic shielding to the ungrounded pins 200 on both sides, making the electromagnetic shielding performance more uniform.

[0056] In some embodiments, the pin 200, the base island 110, and the heat sink 300 located in the middle are integrally formed.

[0057] In other embodiments, pin 200 may also be provided with three, four, five or other suitable plurality, and there is no limitation thereto.

[0058] The above description provides an exemplary description of possible embodiments of the surface-mount high-power chip 120 package structure 10 in this application. Below, with reference to the accompanying drawings, a detailed description of the specific structure of the surface-mount high-power chip 120 package structure 10 in this application will be provided in a specific embodiment.

[0059] like Figures 1-5As shown, the surface-mount high-power chip 120 package structure 10 includes a package body 100, a first pin 210, a second pin 220, a third pin 230, and a heat sink 300. The package body 100 includes a base island 110, on which a high-power radio frequency chip 120 is mounted. The base island 110 and the chip 120 are encapsulated internally by a protective layer 130, forming a cuboid package body 100. The second pin 220 is located at one end of the package body 100, with one end extending into the protective layer 130 and connected to the base island 110 to form a single unit. The other end of the second pin 220 protrudes from one end of the package body 100 and is used for grounding connection; that is, the second pin 220 is a grounding pin. The first pin 210 and the third pin 230 are respectively located on both sides of the second pin 220, arranged parallel to the second pin 220. One end of the first pin 210 and the third pin 230 extends into the protective layer 130 and is connected to the chip 120, while the other end is exposed from one end of the package 100.

[0060] A heat sink 300 is mounted on the other end of the package 100. One end of the heat sink 300 extends into the protective layer 130 and connects with the base island 110 to form a whole, while the other end of the package 100 is exposed. A heat dissipation structure 310 is provided on the surface of the exposed portion of the heat sink 300 corresponding to the chip 120. The heat dissipation structure 310 is a trapezoidal plate structure, with multiple pieces evenly spaced along a straight line. This increases the heat dissipation area of ​​the heat sink 300 and improves its heat dissipation performance.

[0061] As described above, during operation, the heat dissipation path of the chip 120 package structure 10 in this application conducts heat to the printed circuit board and the heat dissipation structure 310 of the heat sink 300 via the base island 110 of the lead frame and the second pin 220. This significantly improves the heat dissipation performance of the package structure 10 and increases the solderable area, effectively enhancing soldering reliability. Overall, this structure is simple to manufacture, easy to implement, convenient and practical, and suitable for large-scale mass production.

[0062] In addition, connecting the heat sink 300 to the base island 110 can increase the grounding area of ​​the chip on one side of the base island 110, thereby forming a large-area RF ground, which in turn increases the electromagnetic shielding performance. When used in high-power RF chips, it can effectively improve reliability and anti-interference requirements.

[0063] Meanwhile, by placing the heat dissipation structure 310 on the surface of the heat sink 300 corresponding to the chip 120, the chip can obtain electromagnetic shielding on one side of the heat dissipation structure 310, thus placing the chip 120 in a semi-enclosed state. This increases the electromagnetic shielding performance, effectively improving reliability and anti-interference requirements when used in high-power radio frequency chips.

[0064] Note that the above are merely preferred embodiments and the technical principles employed in this application. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present application has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, all of which fall within the scope of protection of the present invention.

Claims

1. A surface-mount high-power chip packaging structure, characterized in that, include: A package containing a base island, on which a chip is mounted; The package has multiple pins, which are mounted at one end of the package, and a portion of the pins are connected to the base island. A heat sink is mounted on the package and connected to the base island.

2. The surface-mount high-power chip packaging structure according to claim 1, characterized in that, The heat sink is located at the other end of the package.

3. The surface-mount high-power chip packaging structure according to claim 1, characterized in that, The heat sink is provided with a heat dissipation structure.

4. The surface-mount high-power chip packaging structure according to claim 1, characterized in that, The heat dissipation structure is in the form of sheet-like or block-like protrusions.

5. The surface-mount high-power chip packaging structure according to claim 1, characterized in that, The size of the heat sink is proportional to the power of the chip.

6. The surface-mount high-power chip packaging structure according to any one of claims 1-5, characterized in that, At least one of the pins is used for grounding.

7. The surface-mount high-power chip packaging structure according to claim 6, characterized in that, The grounded pin is connected to the base island.

8. The surface-mount high-power chip packaging structure according to claim 7, characterized in that, The heat sink has a heat dissipation structure on the corresponding side of the chip.

9. The surface-mount high-power chip packaging structure according to claim 7, characterized in that, The pins are arranged in a straight line, with the grounded pin located in the middle.

10. The surface-mount high-power chip packaging structure according to claim 9, characterized in that, The ungrounded pins are symmetrically arranged on both sides of the grounded pins.

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