A turret machine chip testing circuit and chip testing method

Abstract

The application provides a turret machine chip testing circuit and a chip testing method. A to-be-tested signal end of the chip testing circuit is connected with a to-be-tested chip signal through a testing station and is used for connecting a to-be-tested signal output by the to-be-tested chip; a testing signal end is connected with a tester signal and is used for outputting a testing signal to the tester based on the to-be-tested signal; a connection terminal is connected with a frequency meter and is used for transmitting the to-be-tested signal to the frequency meter; a first switch unit is connected with the to-be-tested signal end, the testing signal end and the connection terminal, and the first switch unit is used for selectively controlling one of the testing signal end and the connection terminal to be electrically connected with the to-be-tested signal end, so that the to-be-tested signal is output to the testing signal end or the connection terminal; the application directly switches a signal path through the first switch unit, avoids introduction of an additional adapter, significantly shortens a signal transmission distance, and effectively suppresses reflection, crosstalk and attenuation phenomena of a high-frequency signal.

Description

Technical Field

[0001] This application belongs to the field of circuit testing, and in particular relates to a chip testing circuit and chip testing method for a turret machine. Background Technology

[0002] In the application of automated testing equipment, when the internal resources of the testing machine, such as the time measurement unit, cannot meet the testing requirements or accuracy requirements, an external high-precision frequency meter becomes an economical and feasible supplementary means.

[0003] In related technologies, traditional test architectures rely on additional resource adapter boards to connect the sorter and the frequency meter. On the one hand, the signal transmission path is significantly lengthened, and each connector and cable introduces impedance discontinuities, causing high-frequency signal reflection, crosstalk, and attenuation, severely compromising the reliability and accuracy of the measurement results. On the other hand, the introduction of additional adapter boards also significantly increases system costs. Summary of the Invention

[0004] The purpose of this application is to provide a chip testing circuit and chip testing method for a turret machine, which has the advantages of short signal path, good signal integrity, low system cost and high testing efficiency.

[0005] A first aspect of this application provides a chip testing circuit for a turret crane, the turret crane having a testing station for placing a chip to be tested, the chip testing circuit comprising: The signal under test terminal is connected to the signal of the chip under test through the test station and is used to receive the signal under test output by the chip under test; The test signal terminal is connected to the tester signal and is used to output a test signal to the tester based on the signal under test; A connection terminal is provided for connecting to a frequency meter and for transmitting the signal to be measured to the frequency meter. A first switching unit is connected to the signal terminal under test, the test signal terminal, and the connection terminal. The first switching unit is used to selectively control one of the test signal terminal and the connection terminal to be electrically connected to the signal terminal under test, so that the signal under test is output to the test signal terminal or the connection terminal.

[0006] In some embodiments of this application, the first switching unit includes a first switching element and a second switching element. The first switching element is disposed between the test signal terminal and the signal terminal under test, and the first switching element is used to control the connection / disconnection between the test signal terminal and the signal terminal under test.

[0007] In some embodiments of this application, the first switching element and the second switching element are relays.

[0008] In some embodiments of this application, there are multiple test stations and multiple connection terminals, with each of the multiple connection terminals corresponding to one of the test stations.

[0009] In some embodiments of this application, the plurality of connection terminals are all connected to the frequency meter; The chip test circuit further includes a second switching unit, which is disposed between the plurality of connection terminals and the first switching unit. The second switching unit is used to selectively connect one of the plurality of connection terminals to the signal terminal under test.

[0010] In some embodiments of this application, there are four test stations and four connection terminals, including a first terminal, a second terminal, a third terminal, and a fourth terminal; the second switching unit includes a third switch element, a fourth switch element, and a fifth switch element, wherein the third switch element is connected to the first terminal, the fourth switch element is connected to the third terminal, the fifth switch element is connected to the fourth terminal, and the second terminal is connected to the first switching unit through a first resistor.

[0011] In some embodiments of this application, the third switch, the fourth switch, and the fifth switch are relays.

[0012] In some embodiments of this application, the signal to be tested is a high-frequency signal.

[0013] A second aspect of this application also provides a chip testing method for a turret crane, the chip testing method being applied to the chip testing circuit described above; the chip testing method includes: Place the chip to be tested onto the test station and select a test mode; the test modes include a normal test mode and a high-precision test mode; If the normal test mode is selected, the test signal terminal and the signal terminal under test are connected through the first switching unit; If the high-precision test mode is selected, the connection terminal and the signal terminal under test are connected through the first switching unit.

[0014] In some embodiments of this application, there are multiple test stations and multiple connection terminals, with each of the multiple connection terminals corresponding to one of the test stations; The chip testing method also includes: Obtain the test station in high-precision test mode from among the multiple test stations, and connect the corresponding connection terminal of the test station to the frequency meter.

[0015] The beneficial effects of this application are as follows: In the chip testing circuit and chip testing method of the turret machine of this application, the turret machine has a testing station for placing the chip to be tested. The chip testing circuit includes a signal terminal under test, a test signal terminal, a connection terminal, and a first switching unit. The signal terminal under test is connected to the chip under test through the testing station and is used to receive the signal under test output by the chip under test. The test signal terminal is connected to the test instrument and is used to output a test signal to the test instrument based on the signal under test. The connection terminal is connected to the frequency meter and is used to transmit the signal under test to the frequency meter. The first switching unit is connected to the signal terminal under test, the test signal terminal, and the connection terminal. The first switching unit is used to selectively control one of the test signal terminal and the connection terminal to be electrically connected to the signal terminal under test, so that the signal under test is output to the test signal terminal or the connection terminal. This application directly switches the signal path through the first switching unit, avoiding the introduction of an additional adapter board, significantly shortening the signal transmission distance, and effectively suppressing the reflection, crosstalk, and attenuation of high-frequency signals. It has the advantages of short signal path, good signal integrity, low system cost, and high testing efficiency. Attached Figure Description Figure 1 A schematic diagram of the frame structure of the chip testing circuit for a turret provided in an optional embodiment of this application; Figure 2 A schematic diagram of the circuit structure of the chip testing circuit for a turret provided in an optional embodiment of this application.

[0016] Specific element symbol explanations: 10-Chip test circuit, 20-Tester, 30-Test station, 40-Chip under test, 50-Frequency meter, 100-Test signal terminal, 200-First switching unit, 300-Signal terminal under test, 400-Connection terminal, K5-First switching component, K7-Second switching component, K6-Third switching component, K8-Fourth switching component, K9-Fifth switching component, R1-First resistor, S1-First terminal, S2-Second terminal, S3-Third terminal, S4-Fourth terminal, FOUT-Signal under test, CH8-Test signal. Detailed Implementation

[0017] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0018] It should be noted that when a component is referred to as being "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0019] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0020] It's important to understand that in semiconductor integrated circuit testing, when the internal resources of automated test equipment are insufficient to meet frequency measurement requirements, external frequency counters (FCDs) are commonly used. However, the introduction of resource adapters in the signal path leads to path lengthening and an increase in the number of connectors. Consequently, the signal experiences multiple impedance discontinuities during transmission, causing signal reflection, crosstalk, and attenuation, thus affecting measurement accuracy. Simultaneously, system cost, design complexity, and physical space occupation increase, which is incompatible with the high-speed parallel testing requirements of turret sorters.

[0021] For example, in a four-station turret sorting machine testing system, the signal under test (FOUT) output from the chip must pass through a test PCB, cables, a resource adapter board, and another cable before reaching the frequency meter 50. During testing, impedance mismatch at each connector transition point causes signal waveform distortion. Furthermore, when multiple stations share the frequency meter 50 for serial testing, the timing of the signal switching relays does not match the test window, resulting in wasted test cycles and reduced testing efficiency.

[0022] Based on this, this application improves the chip testing circuit 10 and chip testing method of the turret machine.

[0023] Please see Figure 1The turret machine in this embodiment has a test station 30, which is used to place the chip under test 40. The chip test circuit 10 includes a test signal FOUT terminal 300, a test signal CH8 terminal 100, a connection terminal 400, and a first switch unit 200. The test signal FOUT terminal 300 is connected to the chip under test 40 through the test station 30 and is used to receive the test signal FOUT output by the chip under test 40. The test signal CH8 terminal 100 is connected to the test instrument 20 and is used to transmit signals to the test instrument based on the test signal FOUT. 20 outputs test signal CH8; connection terminal 400 is connected to frequency meter 50 and is used to transmit the test signal FOUT to frequency meter 50; first switch unit 200 is connected to the test signal FOUT terminal 300, test signal CH8 terminal 100 and connection terminal 400, the first switch unit 200 is used to selectively control one of the test signal CH8 terminal 100 and the connection terminal 400 to be electrically connected to the test signal FOUT terminal 300, so that the test signal FOUT is output to the test signal CH8 terminal 100 or the connection terminal 400.

[0024] It should be explained that a turret machine is an automated device used for sorting and testing semiconductor chips. Its core component is a rotary table, which, through high-speed rotation, feeds the chip under test (40) from the inlet to multiple testing stations (30), where it is sorted to different outlets after testing. The testing station (30) is a specific location on the turret machine used to place the chip under test (40) and make electrical connections. Each testing station (30) is typically equipped with a probe card or test socket to establish a signal connection between the chip under test (40) and the test circuit. The chip under test (40) is an integrated circuit product whose function and performance need to be verified during the semiconductor manufacturing process. The test signal FOUT terminal (300) is an interface in the chip test circuit (10) that receives signals from the chip under test (40). This signal terminal establishes a signal connection with the chip under test (40) through the testing station (30), thereby acquiring the test signal FOUT generated by the chip under test (40) in its operating state.

[0025] Test signal CH8 terminal 100 is another interface in the chip test circuit 10. Its function is to process the test signal FOUT and output it to the external test instrument 20. The test instrument 20 analyzes these test signals CH8 to determine whether the function and performance of the chip under test 40 meet the design requirements. Connection terminal 400 is the interface in the chip test circuit 10 used to establish a connection with the external frequency meter 50. This connection terminal 400 receives the signal from the test signal FOUT terminal 300 and transmits it to the frequency meter 50 for high-precision frequency measurement. The function of the first switching unit 200 is to selectively switch the signal path. This unit can electrically connect the test signal FOUT terminal 300 to either the test signal CH8 terminal 100 or the connection terminal 400 according to the test requirements, thereby controlling the flow of the test signal FOUT. The test instrument 20 is an automatic test device used to perform functional and performance tests on semiconductor chips. The frequency meter 50 is a high-precision measuring instrument specifically used to measure the frequency of signals.

[0026] Understandably, in existing technologies, when the internal resources of automated testing equipment are insufficient or the accuracy does not meet the requirements for high-frequency signal measurement, it is usually necessary to connect an external high-precision frequency meter 50 via an additional resource adapter board and cables. This traditional approach results in a lengthy signal path, introducing problems such as impedance discontinuity, signal attenuation, reflection, and crosstalk, thereby affecting the measurement accuracy and reliability of high-frequency signals. For example, in a conventional solution, the signal path might be "chip → probe → test PCB → cable → resource adapter board → cable → frequency meter 50". In contrast, the chip test circuit 10 of this embodiment achieves direct switching of the signal under test (FOUT) between the test signal CH8 terminal 100 and the connection terminal 400 by directly integrating the first switching unit 200 on the test PCB. During high-precision frequency measurement, the signal under test (FOUT) can be directly routed from the FOUT terminal 300 to the connection terminal 400 via the first switching unit 200, and then transmitted to the frequency meter 50. This design significantly shortens the signal path, simplifying it to "chip → probe → test PCB → connection terminal 400 → frequency meter 50", reducing the number of cables and connectors. As a result, signal reflection, crosstalk, and attenuation are greatly reduced, thereby improving the measurement accuracy and stability of high-frequency signals.

[0027] Furthermore, the additional resource adapter board in the prior art not only increases hardware, design, and maintenance costs, but also complicates the system hierarchy and occupies valuable physical space. This embodiment avoids using a separate resource adapter board by integrating the signal switching function into the chip test circuit 10. This not only reduces the overall system hardware cost and complexity but also simplifies the mechanical structure and reduces potential failure points. At the same time, eliminating the adapter board frees up valuable physical space for the high-density test station 30 of the turret crane, facilitating a more compact system design.

[0028] Furthermore, the lengthy signal paths in traditional solutions introduce additional delays and instabilities, directly hindering the high-capacity efficiency of turret sorters. This embodiment effectively reduces signal transmission delays by shortening the signal path and optimizing signal routing. The electronically controlled switching mechanism of the first switching unit 200 allows for test mode switching to be completed in a very short time, without manual intervention or complex physical connection changes. This helps to gain valuable testing time, thereby improving the overall testing efficiency and capacity of the turret sorter.

[0029] Please see Figure 2 The first switching unit 200 in this application embodiment includes a first switching element K5 and a second switching element K7. The first switching element K5 is disposed between the test signal CH8 terminal 100 and the test signal FOUT terminal 300, and the first switching element K5 is used to control the on / off connection between the test signal CH8 terminal 100 and the test signal FOUT terminal 300.

[0030] It should be explained that the first switch K5 and the second switch K7 are specific components used to realize the function of switching or turning on the electrical signal. By controlling the on / off state of the first switch K5, it can be precisely determined whether the signal under test FOUT is routed to the test signal CH8 terminal 100.

[0031] Understandably, when the signal under test (FOUT) needs to be transmitted to the test signal CH8 terminal 100 for routine testing, the first switch K5 is turned on to establish an electrical connection between the FOUT terminal 300 and the CH8 terminal 100, ensuring smooth signal transmission. When the FOUT signal needs to be transmitted to the connection terminal 400 for high-precision testing, the first switch K5 is turned off to block the path between the FOUT terminal 300 and the CH8 terminal 100, while the second switch K7 establishes a connection between the FOUT terminal 300 and the connection terminal 400.

[0032] In the embodiments of this application, the first switch K5 and the second switch K7 are relays.

[0033] It needs to be explained that a relay is an electrical control device. It is an automatic control device in which the controlled quantity in the output circuit will change abruptly when the input quantity reaches a certain value. Its working principle is usually based on the electromagnetic effect. When a coil is energized, a magnetic field is generated that attracts an armature, thereby causing the contacts to close or open, realizing the on / off control of the circuit.

[0034] Understandably, when it is necessary to connect the test signal FOUT terminal 300 to the test signal CH8 terminal 100, the control coil of the first switch K5 (relay) is energized, and its contacts close, thereby establishing a path between the test signal FOUT terminal 300 and the test signal CH8 terminal 100, allowing the test signal FOUT to be transmitted to the test instrument 20. Similarly, when it is necessary to connect the test signal FOUT terminal 300 to the connection terminal 400, the control coil of the second switch K7 (relay) is energized, and its contacts close, establishing a path between the test signal FOUT terminal 300 and the connection terminal 400, allowing the test signal FOUT to be transmitted to the frequency meter 50.

[0035] In this embodiment of the application, there are multiple test stations 30 and multiple connection terminals 400, with each connection terminal 400 corresponding to a test station 30.

[0036] It should be explained that "multiple test stations 30" refers to the turret machine having more than one physical location or interface for placing the chip under test 40. "Multiple connection terminals 400" refers to the number of interfaces used to connect to the frequency counter 50 and transmit the signal under test (FOUT). The one-to-one correspondence between the multiple connection terminals 400 and the test stations 30 means that each test station 30 is explicitly associated with or assigned a specific connection terminal 400. This correspondence can be achieved through physical wiring, meaning that each test station 30 is directly connected to its corresponding connection terminal 400 via an independent signal line.

[0037] It is understood that the embodiments of this application effectively expand the processing capability of the chip testing circuit 10 by setting up multiple test stations 30 and multiple connection terminals 400, and by making the multiple connection terminals 400 correspond one-to-one with the multiple test stations 30. Specifically, when there are multiple chips 40 to be tested on the turret machine, each chip 40 to be tested can be placed on an independent test station 30. Since each test station 30 corresponds to an independent connection terminal 400, the test signal FOUT output from any test station 30 can be transmitted to the frequency meter 50 for high-precision measurement through its dedicated connection terminal 400.

[0038] In this embodiment, multiple connection terminals 400 are connected to the frequency meter 50. The chip test circuit 10 also includes a second switch unit, which is disposed between the multiple connection terminals 400 and the first switch unit 200. The second switch unit is used to selectively connect one of the multiple connection terminals 400 to the test signal FOUT terminal 300.

[0039] It should be explained that multiple connection terminals 400 are shared by the frequency meter 50, meaning that multiple independent connection terminals 400 are all connected to the same input terminal of the frequency meter 50 at the circuit level. The second switching unit is an electronic or electromechanical component whose core function is to realize the on / off switching of the circuit. It can select one or more input ports according to control commands and connect them to the output port. In this scheme, the key role of the second switching unit is that when multiple connection terminals 400 exist, it can select one specific connection terminal 400 and guide its signal path to the first switching unit 200, so that the signal of that specific connection terminal 400 can be received by the frequency meter 50.

[0040] It is understood that this embodiment, by introducing a second switching unit into the chip test circuit 10 with multiple test stations 30 and multiple connection terminals 400, and connecting the multiple connection terminals 400 together to the frequency meter 50, achieves automated and precise control of high-precision frequency measurement of the chip under test 40 at multiple test stations 30. Specifically, when frequency measurement of the chip under test 40 at a specific test station 30 is required, the second switching unit is activated and selects the connection terminal 400 corresponding to that test station 30 according to control instructions. The signal from the selected connection terminal 400 is then transmitted to the first switching unit 200 through the second switching unit. At this time, the first switching unit 200 is configured to route the signal from the connection terminal 400 to the test signal FOUT terminal 300, and then transmit the signal to the frequency meter 50 for measurement.

[0041] Please continue reading. Figure 2 In this embodiment, there are four test stations 30 and four connection terminals 400. The connection terminals 400 include a first terminal S1, a second terminal S2, a third terminal S3, and a fourth terminal S4. The second switch unit includes a third switch K6, a fourth switch K8, and a fifth switch K9. The third switch K6 is connected to the first terminal S1, the fourth switch K8 is connected to the third terminal S3, and the fifth switch K9 is connected to the fourth terminal S4. The second terminal S2 is connected to the first switch unit 200 through a first resistor R1.

[0042] It should be explained that limiting the number of test stations 30 and connection terminals 400 to four is intended to provide a clear hardware configuration basis for chip testing needs of a specific scale. Besides four, the number of test stations 30 and connection terminals 400 can also be two, eight, or more to accommodate different batch or parallel testing needs. The first terminal S1, the second terminal S2, the third terminal S3, and the fourth terminal S4 are specific names given to the four independent connection terminals 400 to clearly distinguish different signal paths in circuit design and operation. Each terminal can independently transmit the test signal FOUT output from the corresponding test station 30 to the frequency counter 50. The second switching unit is responsible for selecting one of the multiple connection terminals 400 to establish an electrical connection with the first switching unit 200, thereby realizing the routing of the test signal FOUT. The third switch K6, the fourth switch K8, and the fifth switch K9 are the specific switching elements constituting the second switching unit, used to control the on / off state of their respective corresponding connection terminals 400. The third switch K6 is connected to the first terminal S1, the fourth switch K8 is connected to the third terminal S3, and the fifth switch K9 is connected to the fourth terminal S4. This corresponding connection relationship indicates that the third switch K6 is specifically used to control the signal path of the first terminal S1, the fourth switch K8 controls the signal path of the third terminal S3, and the fifth switch K9 controls the signal path of the fourth terminal S4.

[0043] Understandably, when four chips 40 are placed on the turret crane, the test signal FOUT of each chip is led out through its corresponding test station 30 and connection terminals 400 (i.e., first terminal S1, second terminal S2, third terminal S3, and fourth terminal S4). To transmit one of the test signals FOUT to the frequency meter 50 for high-precision testing, the second switching unit is designed to include a third switch K6, a fourth switch K8, and a fifth switch K9. These switches are respectively connected to the first terminal S1, the third terminal S3, and the fourth terminal S4, allowing the operator or control system to selectively connect the signal from the first terminal S1, the third terminal S3, or the fourth terminal S4 to the first switching unit 200 by controlling the on / off state of these switches.

[0044] The third switch K6, the fourth switch K8, and the fifth switch K9 in this application embodiment are relays.

[0045] The test signal FOUT in this embodiment is a high-frequency signal.

[0046] It should be explained that the signal under test, FOUT, is a high-frequency signal, which means that the frequency of the signal is in a high range, such as signals with frequencies in the megahertz (MHz) or gigahertz (GHz) range or above.

[0047] It is understood that by explicitly defining the test signal FOUT as a high-frequency signal, the design and operation of the entire chip test circuit 10 can be optimized for high-frequency characteristics. Specifically, when the test signal FOUT terminal 300 receives a high-frequency signal, the first switching unit 200 is configured to effectively switch the high-frequency signal, routing it to the test signal CH8 terminal 100 or the connection terminal 400. If there are multiple test stations 30 and multiple connection terminals 400, the second switching unit must also meet the high-frequency signal switching requirements to selectively access the high-frequency test signal FOUT among different test stations 30. In this way, the entire test circuit can maintain the integrity of the high-frequency signal and accurately transmit it to the external test instrument 20 or frequency meter 50, thereby enabling these external devices to accurately analyze and measure the high-frequency signal. This optimized design for high-frequency signals ensures that reliable and accurate test data can be obtained when testing high-frequency chips, effectively avoiding test errors caused by signal quality degradation.

[0048] To better implement the chip testing circuit 10 of the turret crane in any of the above embodiments, this application embodiment also provides a chip testing method based on the chip testing circuit 10, the chip testing method including: Place the chip to be tested 40 onto the test station 30 and select the test mode; the test modes include the normal test mode and the high-precision test mode; If the normal test mode is selected, the test signal CH8 terminal 100 and the test signal FOUT terminal 300 are connected through the first switch unit 200; if the high-precision test mode is selected, the connection terminal 400 and the test signal FOUT terminal 300 are connected through the first switch unit 200.

[0049] Specifically, in the conventional test mode, the first switching unit 200 connects the path between the FOUT terminal 300 of the signal under test and the CH8 terminal 100 of the test signal, allowing the FOUT signal to be directly transmitted to the tester 20, supporting multi-station parallel testing to improve efficiency. In the high-precision test mode, the first switching unit 200 connects the path between the FOUT terminal 300 of the signal under test and the connection terminal 400, allowing the FOUT signal to be transmitted to the frequency meter 50 via the shortest path (e.g., “chip → probe → test PCB → connection terminal 400 → frequency meter 50”), avoiding the impedance discontinuity problem introduced by the adapter board and cables in traditional solutions. This switching is based on the switching unit integrated on the test PCB, eliminating the need for physical reconnection and ensuring signal integrity.

[0050] This application significantly reduces the signal path length and the number of connectors, thereby reducing high-frequency signal attenuation and reflection, and improving measurement accuracy. Simultaneously, it eliminates the need for dedicated resource adapter boards, simplifying the mechanical structure, reducing hardware costs and potential failure points, and freeing up physical space for the high-density testing station 30 of the turret crane. Furthermore, the electrical control switching is completed within milliseconds, effectively extending the testing time window to meet the 30-60 millisecond testing cycle requirements of a single turret crane station, ensuring high production efficiency.

[0051] In one specific implementation, when there are four test stations 30, multiple connection terminals 400 are connected to the frequency meter 50, and the connection terminals 400 of the corresponding stations are selectively connected through the second switching unit. For example, during site 1 testing, the third switch K6 and the second switch K7 are closed; during site 2 testing, the second switch K7 is closed; during site 3 testing, the fourth switch K8 and the second switch K7 are closed; and during site 4 testing, the fifth switch K9 and the second switch K7 are closed, thus achieving orderly switching of serial testing.

[0052] The chip testing method in this application embodiment further includes acquiring a test station 30 in high-precision testing mode from among a plurality of test stations 30, and connecting the connection terminal 400 corresponding to the test station 30 to the frequency meter 50.

[0053] Specifically, identifying the test station 30 currently in high-precision testing mode among multiple test stations 30 means pinpointing the test station 30 currently performing high-precision testing. Connecting the corresponding connection terminal 400 of this test station 30 to the frequency meter 50 means establishing an electrical connection between the connection terminal 400 of the identified test station 30 and the frequency meter 50. This ensures that the high-frequency test signal FOUT from a specific test station 30 can be accurately transmitted to the frequency meter 50 for measurement.

[0054] This embodiment of the application first identifies the test station 30 in high-precision test mode from among multiple test stations 30, and then connects the corresponding connection terminal 400 of the test station 30 to the frequency meter 50. This enables precise selection and routing of the high-precision test signal CH8 source in scenarios where multiple test stations 30 share a single frequency meter 50. When multiple test stations 30 can perform high-precision testing, this method ensures that the frequency meter 50 receives only the test signal FOUT from a designated test station 30 at any given time, avoiding signal aliasing or interference and guaranteeing the accuracy of the measurement results. This mechanism allows the test system to efficiently manage high-precision test tasks across multiple stations. For example, it can sequentially measure the frequency of different test stations 30 in high-precision test mode according to a preset order or priority, thereby fully utilizing the frequency meter 50 resources and improving overall test efficiency.

[0055] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0056] The basic concepts have been described above. Obviously, for those skilled in the art, the detailed disclosure above is merely illustrative and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are suggested in this application, and therefore remain within the spirit and scope of the exemplary embodiments of this application.

[0057] Furthermore, this application uses specific terms to describe embodiments of the application. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that "an embodiment," "one embodiment," or "an alternative embodiment" mentioned twice or more in different locations in this specification do not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0058] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the application requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.

[0059] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A chip testing circuit for a turret crane, characterized in that, The turret crane has a testing station for placing the chip to be tested. The chip testing circuit includes: The signal under test terminal is connected to the signal of the chip under test through the test station and is used to receive the signal under test output by the chip under test; The test signal terminal is connected to the tester signal and is used to output a test signal to the tester based on the signal under test; A connection terminal is provided for connecting to a frequency meter and for transmitting the signal to be measured to the frequency meter. A first switching unit is connected to the signal terminal under test, the test signal terminal, and the connection terminal. The first switching unit is used to selectively control one of the test signal terminal and the connection terminal to be electrically connected to the signal terminal under test, so that the signal under test is output to the test signal terminal or the connection terminal.

2. The chip testing circuit according to claim 1, characterized in that, The first switching unit includes a first switching element and a second switching element. The first switching element is disposed between the test signal terminal and the signal terminal under test, and the first switching element is used to control the connection / disconnection between the test signal terminal and the signal terminal under test.

3. The chip testing circuit according to claim 2, characterized in that, The first switching element and the second switching element are relays.

4. The chip testing circuit according to claim 1, characterized in that, There are multiple test stations and multiple connection terminals, with each connection terminal corresponding to one of the test stations.

5. The chip testing circuit according to claim 4, characterized in that, The plurality of connection terminals are all connected to the frequency meter; The chip test circuit further includes a second switching unit, which is disposed between the plurality of connection terminals and the first switching unit. The second switching unit is used to selectively connect one of the plurality of connection terminals to the signal terminal under test.

6. The chip testing circuit according to claim 5, characterized in that, The test station has four terminals and four connection terminals, including a first terminal, a second terminal, a third terminal, and a fourth terminal. The second switch unit includes a third switch element, a fourth switch element, and a fifth switch element. The third switch element is connected to the first terminal, the fourth switch element is connected to the third terminal, and the fifth switch element is connected to the fourth terminal. The second terminal is connected to the first switch unit through a first resistor.

7. The chip testing circuit according to claim 6, characterized in that, The third, fourth, and fifth switching components are relays.

8. The chip testing circuit according to any one of claims 1 to 7, characterized in that, The signal to be tested is a high-frequency signal.

9. A chip testing method for a turret crane, characterized in that, The chip testing method is applied to the chip testing circuit as described in any one of claims 1 to 8; the chip testing method includes: Place the chip to be tested onto the test station and select a test mode; the test modes include a normal test mode and a high-precision test mode; If the normal test mode is selected, the test signal terminal and the signal terminal under test are connected through the first switching unit; If the high-precision test mode is selected, the connection terminal and the signal terminal under test are connected through the first switching unit.

10. The chip testing method according to claim 9, characterized in that, There are multiple test stations and multiple connection terminals, with each connection terminal corresponding to one of the test stations. The chip testing method also includes: Obtain the test station in high-precision test mode from among the multiple test stations, and connect the corresponding connection terminal of the test station to the frequency meter.

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