Key cleaning circuit and electronic device

Abstract

The embodiment of the application relates to the technical field of electronic circuit, and discloses a key cleaning circuit and electronic equipment. The key cleaning circuit comprises a key, an impedance adjustable module and an impedance control module. The key is configured to generate a trigger signal in response to a pressing operation. The impedance control module is configured to control the impedance adjustable module to select a target equivalent impedance to be added to the key cleaning circuit based on the trigger signal. The target equivalent impedance is selected to adjust the current flowing through the key to reduce the resistance value of the contact impedance. The key cleaning circuit provided by the embodiment of the application can actively initiate a key cleaning operation, automatically switch the equivalent impedance of the impedance adjustable module, and select a suitable target equivalent impedance to be added to the key cleaning circuit. Therefore, the current flowing through the key can be adaptively adjusted to effectively clean the pollutants between the contacts, thereby reducing the contact impedance and facilitating the improvement of the overall service life of the key and the reliable and accurate detection of the key state of the key by the subsequent circuit.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a button cleaning circuit and electronic device. Background Technology

[0002] When buttons operate in harsh environments for extended periods, dust can easily accumulate on them, or the contact surfaces can rust. When a user presses a button, poor contact may occur. The self-cleaning circuit provided by related technologies outputs a fixed current when the button is pressed, causing an instantaneous electric arc that can clean away dust or rust. However, when the button is free of dust or rust and in good working condition, the self-cleaning circuit continues to output a fixed current. The arc caused by this fixed current can easily damage the button. Furthermore, when the button is heavily dusty or rusty, or in harsh conditions, the fixed current output by the self-cleaning circuit may not effectively clean the dust or rust, resulting in poor cleaning performance. Summary of the Invention

[0003] One objective of this application is to provide a button cleaning circuit and electronic device that improves the poor cleaning effect of related technologies.

[0004] In a first aspect, embodiments of this application provide a button cleaning circuit, including a button, an impedance adjustable module, and an impedance control module. The button is configured to generate a trigger signal in response to a pressing operation under the action of a system voltage, and a contact impedance is formed between the contacts of the button in the pressed state. The impedance adjustable module is electrically connected to the button and is configured to provide different equivalent impedances. The impedance control module is electrically connected to both the button and the impedance adjustable module and is configured to control the impedance adjustable module to select a target equivalent impedance to be added to the button cleaning circuit based on the trigger signal. The target equivalent impedance is selected by adjusting the current flowing through the button to reduce the resistance value of the contact impedance.

[0005] In a second aspect, embodiments of this application provide an electronic device including the aforementioned button cleaning circuit.

[0006] The embodiments of this application can achieve the following technical effects: The button cleaning circuit provided in this application can actively initiate button cleaning operations, automatically switch the equivalent impedance of the impedance adjustable module, select a suitable target equivalent impedance to add to the button cleaning circuit, thereby adaptively adjusting the current flowing through the button to effectively clean contaminants between contacts, thereby reducing contact impedance, which is beneficial to improving the overall service life of the button and facilitating the subsequent circuit to reliably and accurately detect the button status. Attached Figure Description

[0007] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 A schematic diagram of the circuit structure of the button circuit provided for related technologies; Figure 2 A schematic diagram of the circuit structure of a button cleaning circuit provided in an embodiment of this application; Figure 3 A schematic diagram of a button cleaning circuit provided for another embodiment of this application; Figure 4 A schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application; Figure 5 A schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application; Figure 6 A schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application; Figure 7 This is a schematic diagram of the specific circuit structure of a current holding module provided in an embodiment of this application; Figure 8 A schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application; Figure 9 A schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application; Figure 10 A schematic diagram of the specific circuit structure of the impedance-adjustable module and the counting reset unit provided in the embodiments of this application; Figure 11 This is a schematic diagram of the circuit structure of a button cleaning circuit provided in another embodiment of this application. Detailed Implementation

[0009] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or one or more intermediate elements may exist between them. When an element is described as being "electrically connected" to another element, it can be directly connected to the other element, or one or more intermediate elements may exist between them. The terms "upper," "lower," "inner," "outer," "bottom," etc., used in this specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0010] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items. Furthermore, technical features involved in the different embodiments of this application described below may be combined with each other as long as they do not conflict with each other.

[0011] When button contacts are dusty or rusty, a contact impedance is created between the contacts when the button is pressed. This contact impedance is the additional resistance generated when current flows through the contact interface due to the presence of surface oxide layers, dust, oil, or other contaminants, while the button contacts are closed. The magnitude of the contact impedance is positively correlated with the degree of dust accumulation or corrosion; the more severe the dust accumulation or corrosion, the greater the contact impedance, and vice versa.

[0012] Please see Figure 1 The related technology provides a button circuit including a button unit SW_P1, a sensing resistor Rs, and a controller. When the button contacts are dusty or have rust spots, the contact impedance formed between the contacts of the button unit SW_P1 is Rk. When the button unit SW_P1 is pressed, under the action of the system voltage VDC1, the voltage across the sensing resistor Rs is... The controller determines whether the button unit SW_P1 is pressed or released based on the voltage across the sensing resistor Rs. When the contact points are heavily dusty or corroded, the contact impedance Rk is relatively high. When the button unit SW_P1 is pressed, the voltage across the sensing resistor Rs becomes relatively low, and the controller cannot reliably identify whether the button unit SW_P1 is pressed based on the low voltage across the sensing resistor Rs.

[0013] To address this, this application provides a button cleaning circuit. When the current flowing through the button is less than a preset current threshold, the button cleaning circuit can adjust the current flowing through the button. For example, it can gradually increase the current flowing through the button according to the number of times the user presses the button. When the button is pressed, a larger energy arc is generated to improve the ability to clean dust or rust between the contacts, thereby reducing the contact impedance value so that the button status can be reliably and accurately detected subsequently. When the dust or rust between the contacts is severe, the gradually increased current cannot effectively and thoroughly clean the dust or rust between the contacts in one go. However, by maintaining the maximum output current, the button cleaning circuit continuously provides the current required to generate the maximum energy arc for each key press by the user, which helps to improve the ability to clean stubborn dust or rust.

[0014] This application provides a button cleaning circuit for use in electronic devices, including energy storage devices, power supply devices, etc. Please refer to... Figure 2 The button cleaning circuit 200 includes a button 300, an impedance adjustable module 400, and an impedance control module 500.

[0015] Button 300 is configured to generate a trigger signal in response to a press operation under the influence of system voltage. Contact resistance is formed between the button contacts when pressed. The system voltage is the voltage provided by the system in which the button cleaning circuit 200 is located. The system voltage can be customized by the designer based on engineering experience; for example, the system voltage may be 3.3V, 5V, or 12V.

[0016] The trigger signal is an electrical signal generated when button 300 is pressed. The trigger signal can be high or low. It is understood that the selection of the trigger signal is related to the impedance control module 500. In some embodiments, for impedance control modules 500 that support high-level triggering, the trigger signal is high. In other embodiments, for impedance control modules 500 that support low-level triggering, the trigger signal is low.

[0017] The impedance adjustable module 400 is electrically connected to the button 300 and is configured to provide different equivalent impedances. The equivalent impedance can form a voltage divider relationship with the contact impedance, controlling the current flowing through the button 300. Therefore, in this embodiment, the impedance adjustable module 400 is configured to support a circuit structure that outputs different equivalent impedances, realizing multi-level current adjustment and adaptively cleaning contaminants on buttons with different levels of contamination.

[0018] The impedance control module 500 is electrically connected to the button 300 and the impedance adjustable module 400 respectively. It is configured to control the impedance adjustable module 400 to select a target equivalent impedance to be added to the button cleaning circuit 200 based on the trigger signal. The target equivalent impedance is selected to adjust the current flowing through the button 300 to reduce the resistance value of the contact impedance.

[0019] In some embodiments, the impedance control module 500 selects an equivalent impedance sufficient to clean the contaminants on the key as the target equivalent impedance based on a trigger signal and adds it to the key cleaning circuit 200, adjusting the current flowing through the key 300 to the target current, thereby enabling the key to clean the contaminants in one go.

[0020] In other embodiments, the impedance control module 500, based on a trigger signal, successively selects the corresponding equivalent impedance as the target equivalent impedance and adds it to the button cleaning circuit 200, gradually increasing the current flowing through the button 300, thereby continuously enhancing the cleaning ability of the button to remove contaminants. At the same time, it avoids using excessive current to clean less contaminants in order to save power consumption, thus adaptively finding the best balance between cleaning effect and low power consumption, which can effectively clean the contaminants on the button and perform the contamination cleaning operation with low power consumption.

[0021] The button cleaning circuit 200 provided in this application embodiment can actively initiate button cleaning operations and automatically switch the equivalent impedance of the impedance adjustable module 400 so as to select a suitable target equivalent impedance to be added to the button cleaning circuit 200. This allows for adaptive adjustment of the current flowing through the button to effectively clean contaminants between contacts, thereby reducing contact impedance. This is beneficial for improving the overall service life of the button and facilitating reliable and accurate detection of the button status of the button 300 by subsequent circuits.

[0022] Please see Figure 3 The impedance control module 500 includes a counter 51 and a count reset unit 52. The counter 51 is electrically connected to the button 300 and the impedance adjustable module 400, respectively, and the count reset unit 52 is electrically connected to the impedance adjustable module 400 and the counter 51, respectively.

[0023] Counter 51 is configured to generate a counting signal based on a trigger signal and send the counting signal to the impedance adjustable module 400 so that the impedance adjustable module 400 selects the target equivalent impedance to add to the key cleaning circuit 200.

[0024] The trigger signal can be used as a clock signal input to counter 51. Counter 51 performs a counting operation based on the trigger signal to generate a counting signal, which represents the current count value of counter 51. For example, counter 51 is a decimal counter that can accumulate from the value 0 to the value 9 based on each trigger signal.

[0025] Counter 51 can be a quaternary counter, octal counter, decimal counter, or hexadecimal counter, etc. Please refer to Table 1. Counter 51 is selected as a decimal counter of model CD4017. The pinout and function of counter 51 are shown in Table 1. Table 1

[0026] As shown in Table 1, when counter 51 enters the reset state, the 0th decoder output Q0 outputs a high-level counting signal, while the outputs of the 1st to 9th decoder outputs are all low-level. Therefore, the output of counter 51 is "00,0000,0001", and the current count value of counter 51 is "0". The 0th decoder output Q0 of counter 51 sends a counting signal to the impedance adjustable module 400.

[0027] When button 300 is pressed, the clock signal terminal CLOCK of counter 51 receives a high-level trigger signal. Counter 51 then performs a counting operation, and the first decoder output terminal Q1 outputs a high-level counting signal. The output of counter 51 is "00,0000,0010", and the current count value of counter 51 is "1". The first decoder output terminal Q1 of counter 51 sends a counting signal to the impedance adjustable module 400.

[0028] When button 300 is pressed again, the clock signal terminal CLOCK of counter 51 receives a high-level trigger signal. Counter 51 executes a counting operation, and the second decoder output terminal Q2 outputs a high-level counting signal. The output of counter 51 is "00,0000,0100", and the current count value of counter 51 is "2". The second decoder output terminal Q2 of counter 51 sends a counting signal to the impedance adjustable module 400.

[0029] And so on, without going into detail here.

[0030] The current count value of counter 51 is negatively correlated with the target equivalent impedance. The larger the current count value of counter 51, the smaller the target equivalent impedance of the button cleaning circuit 200 selected by the impedance adjustable module 400; the smaller the current count value of counter 51, the larger the target equivalent impedance of the button cleaning circuit 200 selected by the impedance adjustable module 400.

[0031] For example, when the current count value of counter 51 is 2, the impedance adjustable module 400 selects the target equivalent impedance of the button cleaning circuit 200 to be [value missing]. When the current count value of counter 51 is 3, the impedance adjustable module 400 selects to add the target equivalent impedance of the button cleaning circuit 200. ,in, When the current count value of counter 51 is 4, the impedance adjustable module 400 selects to add the target equivalent impedance of the button cleaning circuit 200. ,in, .

[0032] The target equivalent impedance is negatively correlated with the current flowing through the button. The larger the target equivalent impedance, the smaller the current flowing through the button; the smaller the target equivalent impedance, the larger the current flowing through the button.

[0033] Understandably, counter 51 accumulates its count value based on each trigger signal. Therefore, the current count value of counter 51 reflects the number of times the user operates button 300. The user's pressing operation is affected by the degree of button contamination. The more severe the contamination, the more times the user presses the button, and the larger the current count value output by counter 51. The impedance adjustable module 400 selects a smaller target equivalent impedance to add to the button cleaning circuit 200. The larger the current flowing through the button, the easier it is to generate a higher energy arc to clean the contaminants on the button in the next pressing operation, making it easier for the button's working condition to return to normal.

[0034] Similarly, the less contamination the button is, the fewer times the user presses the button, the smaller the current count value output by counter 51, and the larger the target equivalent impedance selected by the impedance adjustable module 400 and added to the button cleaning circuit 200, the smaller the current flowing through the button, and the lower the energy arc generated in the next press operation, which can also effectively clean the contaminants on the button, thus saving power consumption.

[0035] Therefore, the button cleaning circuit 200 provided in this application embodiment has the characteristics that "the current count value of the counter is negatively correlated with the target equivalent impedance, and the target equivalent impedance is negatively correlated with the current flowing through the button". Based on the number of button presses, the target equivalent impedance is reduced step by step in order to gradually increase the current flowing through the button and improve the cleaning effect of the button. This forms a closed-loop cleaning link with good cleaning effect and low power consumption.

[0036] The counter 51 includes multiple decoding output terminals. The equivalent impedances corresponding to each decoding output terminal are connected in parallel. The equivalent impedance corresponding to the minimum decoding output terminal is the maximum equivalent impedance. The minimum decoding output terminal is the decoding output terminal corresponding to the minimum count value of the counter 51.

[0037] For example, as shown in Table 1, the count value of the 0th decoder output Q0 is 0, which is the minimum count value. Therefore, the 0th decoder output Q0 is the minimum decoder output. The equivalent impedances corresponding to the 0th decoder output Q0 to the 9th decoder output Q9 are as follows: , , , , , , , , , .in, > > > > > > > > > Therefore, the equivalent impedance corresponding to the 0th decoder output Q0 is... This is the maximum equivalent impedance.

[0038] The maximum equivalent impedance is configured to be added to the key cleaning circuit 200 by default, and the minimum decoder output is in a floating state. Therefore, the 0th decoder output Q0 is in a floating state. Regardless of whether the 0th decoder output Q0 outputs a counting signal, the equivalent impedance corresponding to the 0th decoder output Q0 is... It has been added to the button cleaning circuit 200 by default.

[0039] Understandably, in some embodiments, an equivalent impedance can be bound to each decoder output of counter 51. Whether this equivalent impedance is added to the key cleaning circuit 200 depends on the counting signal output by the corresponding decoder output. In other embodiments, it is not necessary to bind an equivalent impedance to each decoder output. For example, if the first decoder output Q1 is floating and not bound to an equivalent impedance, when the counter accumulates from a count value of "0" to a count value of "1", although the first decoder output Q1 outputs a high-level counting signal, the impedance adjustable module 400 does not have an equivalent impedance corresponding to the first decoder output Q1. Therefore, the impedance adjustable module 400 does not need to perform an impedance switching operation when the count value is "1". When the counter increments from count value "1" to count value "2", although the first decoder output terminal Q1 does not output a high-level counting signal, the second decoder output terminal Q2 outputs a high-level counting signal. The impedance adjustable module 400 selects the equivalent impedance corresponding to the second decoder output terminal Q2. It is added as the target equivalent impedance to the button cleaning circuit 200.

[0040] In some embodiments, assuming the current count value corresponding to the counting signal is the maximum count value, the target equivalent impedance is the minimum equivalent impedance. Therefore, relative to the target equivalent impedance corresponding to the previous count value, the target equivalent impedance corresponding to the maximum count value is the minimum equivalent impedance, and the current flowing through the button is the maximum current. When the counter 51 counts to the maximum count value, it indicates that the previous multiple rounds of current adjustment operations have not been able to effectively clean the stubborn contaminants on the button. This embodiment of the application needs to take advantage of the opportunity of the maximum count value to control the impedance adjustable module 400 to select the minimum equivalent impedance to be added to the button cleaning circuit 200, so that the current flowing through the button is the maximum current, providing the maximum current for the next pressing operation to generate the highest energy arc, thereby enhancing the ability and effect of cleaning stubborn contaminants.

[0041] In some embodiments, the counter reset unit 52 is configured to send a reset signal to the counter 51 in response to the current flowing through the button 300 being greater than or equal to a preset current threshold, so that the counter 51 controls the impedance adjustable module 400 to select the maximum equivalent impedance to be added to the button cleaning circuit 200.

[0042] A preset current threshold is a pre-calibrated current value used to indicate that the contaminants on the button have been cleaned and the button is in normal working condition. In some embodiments, the preset current threshold is equal to the current value output by the button under normal working condition. When the current flowing through the button 300 is equal to this current value, it indicates that the button 300 is in normal working condition. In other embodiments, considering current loss, the preset current threshold is greater than the current value output by the button under normal working condition. For example, the preset current threshold is the sum of the current value output by the button under normal working condition and a preset floating value, where the preset floating value is equal to the product of the current value output by the button under normal working condition and a preset ratio, such as 10%.

[0043] When counter 51 receives a reset signal from counter reset unit 52, counter 51 performs a reset operation. The reset operation means that the counter 51's count value returns to its initial minimum count value; that is, counter 51 sets its minimum decoder output to 1 and clears the other decoder outputs to zero. Therefore, the minimum decoder output of counter 51 outputs a high-level count signal, while the other decoder outputs output a low-level signal, resulting in a count value of "0". When counter 51 performs the reset operation, it outputs a high level through the minimum decoder output and a low level through the other decoder outputs, allowing the impedance adjustable module 400 to select the maximum equivalent impedance to be added to the button cleaning circuit 200.

[0044] The maximum equivalent impedance is the equivalent impedance corresponding to the minimum count value of counter 51, and the minimum count value is the count value corresponding to the count signal output by the minimum decoding output terminal of counter 51.

[0045] In some embodiments, the maximum equivalent impedance corresponding to the minimum decoded output of counter 51 is already added to the button cleaning circuit 200 by default, and the minimum decoded output of counter 51 is in a floating state. When counter 51 receives a reset signal, counter 51 performs a reset operation. Although the minimum decoded output of counter 51 is in a floating state, and the high level output by the minimum decoded output is not transmitted to the impedance adjustable module 400, the maximum equivalent impedance corresponding to the minimum decoded output is already added to the button cleaning circuit 200 by default. Since the other decoded outputs output a low level to the impedance adjustable module 400 at this time, the impedance adjustable module 400 does not respond to the low level output by the other decoded outputs to perform an impedance switching operation, but instead adds the maximum equivalent impedance corresponding to the minimum decoded output to the button cleaning circuit 200 by default.

[0046] For example, assuming counter 51 is the aforementioned decimal counter, the minimum decoded output terminal is the 0th decoded output terminal Q0. When the reset terminal RESET of counter 51 receives a high-level reset signal, counter 51 performs a reset operation, setting the 0th decoded output terminal Q0 to 1, and the 1st to 9th decoded output terminals Q1 to Q9 to 0. Therefore, the 0th decoded output terminal Q0 outputs a high-level counting signal, while the 1st to 9th decoded output terminals Q1 all output a low level. Overall, the output of counter 51 is "00,0000,0001". Although the 0th decoded output terminal Q0 is in a floating state, the maximum equivalent impedance corresponding to the 0th decoded output terminal Q0 has been implicitly added to the button cleaning circuit 200.

[0047] In other embodiments, the maximum equivalent impedance corresponding to the minimum decoder output terminal does not need to be included in the button cleaning circuit 200 by default; instead, it can be included in the button cleaning circuit 200 as a controlled maximum equivalent impedance. For example, the maximum equivalent impedance is connected in series with a switch electrically connected to the minimum decoder output terminal. When the switch receives a high-level counting signal from the minimum decoder output terminal, the switch enters a conducting state, causing the maximum equivalent impedance to be included in the button cleaning circuit 200.

[0048] In some embodiments, the counter reset unit 52 is configured to send a non-reset signal to the counter 51 in response to the current flowing through the button being less than a preset current threshold, so that the counter 51 continues to perform counting operations.

[0049] The non-reset signal is a signal that the counter 51 does not perform a reset operation. The counting operation refers to the operation of the counter 51 counting based on the trigger signal. For example, when the current flowing through the button is less than a preset current threshold, the counting reset unit 52 sends a low-level non-reset signal to the reset terminal RESET of the counter 51. Since only a high-level reset signal can trigger the counter 51 to perform a reset operation, i.e., the reset is active high, the counter 51 continues the counting operation when it receives a low-level non-reset signal at the reset terminal RESET.

[0050] When counter 51 is in the counting operation, counter 51 can respond to the trigger signal to continue counting and output the corresponding count value through the corresponding decoder output terminal. This allows the impedance adjustable module 400 to select the target equivalent impedance corresponding to the current count value and add it to the button cleaning circuit 200, thereby continuously increasing the current flowing through the button 300, continuously enhancing the cleaning ability of the button 300 to remove contaminants, and efficiently prompting the button 300 to return to normal working condition.

[0051] This embodiment of the application utilizes the coordinated operation of counter 51 and counter reset unit 52 to form an automatic adjustment logic of "button pressing → counter shifting → target equivalent impedance reduction → current increase". This logic adaptively adjusts the current flowing through the button based on its contamination level, enhancing the cleaning ability of the button cleaning circuit 300. When the button returns to normal operation, counter 51 controls the impedance adjustable module 400 to select the maximum equivalent impedance for the button cleaning circuit 200. This reduces the current flowing through the button, preventing high-energy arcs from damaging it during the next button press and also reducing arc energy to save power.

[0052] Please see Figure 4 The button cleaning circuit 200 also includes a current holding module 600, which is electrically connected to the target decoding output terminal of the counter 51, the counting reset unit 52, and the impedance adjustable module 400.

[0053] The current holding module 600 is configured to send a minimum impedance signal to the impedance adjustable module 400 in response to the counting signal output from the target decoding output terminal of the counter 51, so as to control the impedance adjustable module 400 to select the minimum equivalent impedance as the target equivalent impedance to be added to the key cleaning circuit 200, and to continue sending the minimum impedance signal to the impedance adjustable module 400 when the target decoding output terminal switches from output counting signal to stop output counting signal.

[0054] The selection of the target decoder output is customized by the designer based on engineering experience. In some embodiments, the count value corresponding to the target decoder output of counter 51 is the maximum count value, that is, the target decoder output is the decoder output corresponding to the maximum count value of counter 51. For example, for a decimal counter, the target decoder output is the 9th decoder output Q9. Alternatively, if the designer does not need the button cleaning circuit 200 to perform too many rounds of current adjustment, the 8th decoder output Q8 or the 7th decoder output Q7 can be set as the target decoder output.

[0055] The minimum impedance signal is the signal selected by the control impedance adjustable module 400 to add to the button cleaning circuit 200 at the minimum equivalent impedance. The equivalent impedance corresponding to the target decoding output is the minimum equivalent impedance. The level type of the minimum impedance signal depends on the working principle of the impedance adjustable module 400 in selecting the minimum equivalent impedance and the working principle of the current holding module 600.

[0056] In some embodiments, the minimum impedance signal is high level. The current holding module 600 sends a high-level minimum impedance signal to the impedance adjustable module 400 based on the counting signal output by the target decoding output terminal. The impedance adjustable module 400 selects the minimum equivalent impedance to add to the key cleaning circuit 200 based on the high-level minimum impedance signal.

[0057] In other embodiments, the minimum impedance signal is low level. The current holding module 600 sends a low-level minimum impedance signal to the impedance adjustable module 400 based on the counting signal output by the target decoding output terminal. The impedance adjustable module 400 selects the minimum equivalent impedance to add to the key cleaning circuit 200 based on the low-level minimum impedance signal.

[0058] For example, the target decoding output is the decoding output corresponding to the maximum count value of counter 51. After the user applies 9 presses to the button, counter 51 continuously accumulates from a count value of 0 to a count value of 9. At this time, the output of counter 51 is "10,0000,0000", and the 9th decoding output Q9 outputs a high-level counting signal. The current holding module 600 responds to the high-level counting signal and sends a high-level minimum impedance signal to the impedance adjustable module 400. Based on the high-level minimum impedance signal, the impedance adjustable module 400 selects the minimum equivalent impedance as the target equivalent impedance and adds it to the button cleaning circuit 200. When the minimum equivalent impedance is added to the button cleaning circuit 200, the current flowing through the button 300 is the maximum current relative to the current corresponding to the previous current adjustment operation.

[0059] Next, when the user presses button 300 for the 10th time, the maximum current flows through button 300, causing button 300 to generate an electric arc with high energy, in order to clean the contaminants on button 300, thereby enhancing the cleaning ability of button 300 to clean contaminants. Meanwhile, counter 51 performs a counting operation based on the trigger signal of the 10th press operation. However, counter 51 has overflowed and restarts the counting cycle. At this time, the output of counter 51 is "00,0000,0001". Therefore, the 9th decoder output terminal Q9 switches from outputting a high-level counting signal to stopping the output counting signal. That is, the 9th decoder output terminal Q9, which originally output a high level (equivalent to outputting a counting signal), switches to outputting a low level (equivalent to stopping the output counting signal). However, the current holding module 600 continues to send a minimum impedance signal to the impedance adjustable module 400, so that the current flowing through the button 300 remains at the maximum current. This provides a continuous and maximum current for cleaning contaminants on the button 300, ensuring that the button cleaning circuit 200 can clean stubborn contaminants on the button reliably and efficiently.

[0060] Next, when the user presses button 300 for the 11th time, the output of counter 51 is "00,0000,0010". The 9th decoder output terminal Q9 still does not output a high-level counting signal. However, the output state of the current holding module 600 during the 9th press operation has been controlled to output a high-level minimum impedance signal. Even though the 9th decoder output terminal Q9 still does not output a high-level counting signal, the current holding module 600 continues to send a minimum impedance signal to the impedance adjustable module 400, so that the current flowing through button 300 remains at the maximum current.

[0061] Understandably, no matter how many times the user presses the button 300, the current holding module 600 continues to send a minimum impedance signal to the impedance adjustable module 400, so that the current flowing through the button 300 remains at the maximum current.

[0062] In some embodiments, when the output state of the current holding module 600 is not controlled to output a minimum impedance signal, the current holding module 600 is also configured to send an impedance cancellation signal to the impedance adjustable module 400 in response to a non-counting signal output from the target decoding output terminal of the counter 51, so as to stop adding the minimum equivalent impedance of the impedance adjustable module to the key cleaning circuit.

[0063] The non-counting signal indicates that counter 51 has not counted to the count value corresponding to the target decoder output. The level type of the non-counting signal is the opposite of that of the counting signal; for example, the counting signal is high and the non-counting signal is low. The target decoder output is the decoder output corresponding to the maximum count value of counter 51. When the 9th decoder output Q9 outputs a low level, it indicates that counter 51 has not yet counted to the count value "9".

[0064] During the period when the count value of counter 51 changes from "0" to "8", the 9th decoder output terminal Q9 outputs a low level (equivalent to a non-counting signal). The current holding module 600 sends an impedance cancellation signal to the impedance adjustable module 400. Based on the impedance cancellation signal, the impedance adjustable module 400 stops adding the minimum equivalent impedance to the key cleaning circuit 200. Therefore, when the output state of the current holding module 600 is not controlled to output the minimum impedance signal, during the period when the count value of counter 51 changes from "0" to "8", the current holding module 600 does not affect the process of the impedance adjustable module 400 gradually reducing the target equivalent impedance and gradually increasing the current flowing through the key 300. This ensures that the key cleaning circuit 200 can gradually increase the current flowing through the key 300, thereby gradually improving the ability to clean contaminants from the key 300 while saving power and avoiding damage to the key 300.

[0065] In some embodiments, the current holding module 600 is further configured to send an impedance cancellation signal to the impedance adjustable module 400 in response to a reset signal, so as to stop adding the minimum equivalent impedance of the impedance adjustable module 400 to the key cleaning circuit 200 and select the maximum equivalent impedance to be added to the key cleaning circuit 200.

[0066] The impedance cancellation signal is a signal that triggers the impedance adjustable module 400 to stop adding the minimum equivalent impedance to the button cleaning circuit 200. The level of the impedance cancellation signal is mutually exclusive with the level of the minimum impedance signal. In some embodiments, when the minimum impedance signal is high, the impedance cancellation signal is low. In other embodiments, when the minimum impedance signal is low, the impedance cancellation signal is high.

[0067] When the current holding module 600 receives a reset signal, it indicates that the current flowing through the button is greater than or equal to the preset current threshold, the contaminants on the button have been cleaned, and the button's operating condition has returned to normal. The button cleaning circuit 200 does not need to maintain the current flowing through the button 300 at the maximum current to avoid generating an excessively high-energy arc that could damage the button 300. Therefore, the current holding module 600 sends an impedance cancellation signal to the impedance adjustable module 400. Based on the impedance cancellation signal, the impedance adjustable module 400 stops adding the minimum equivalent impedance to the button cleaning circuit 200 and selects the maximum equivalent impedance to add to the button cleaning circuit 200, thereby reducing the current flowing through the button, which helps save power consumption and protect the button.

[0068] Please see Figure 5 The current holding module 600 includes a comparator 61, a reference voltage circuit 62, and a voltage regulation circuit 63. The output of the comparator 61 is electrically connected to the impedance adjustable module 400. The reference voltage circuit 62 is electrically connected to the inverting input of the comparator 61. The voltage regulation circuit 63 is electrically connected to the target decoding output of the counter 51, the non-inverting input of the comparator 61, and the counting reset unit 52, respectively.

[0069] The reference voltage circuit 62 is configured to apply a reference voltage to the inverting input of the comparator 61.

[0070] The voltage regulation circuit 63 is configured to pull the voltage at the non-inverting input of the comparator 61 below the reference voltage in response to a reset signal, so that the comparator 61 sends an impedance cancellation signal to the impedance adjustable module 400. Based on the impedance cancellation signal, the impedance adjustable module 400 stops adding the minimum equivalent impedance to the key cleaning circuit 200 and selects the maximum equivalent impedance to add to the key cleaning circuit 200.

[0071] For example, both counter 51 and voltage regulation circuit 63 receive a high-level reset signal. On one hand, voltage regulation circuit 63, based on the reset signal, pulls the voltage at the non-inverting input of comparator 61 down to below the reference voltage. When the voltage at the non-inverting input of comparator 61 is less than the reference voltage at the inverting input, comparator 61 outputs a low-level impedance cancellation signal. The impedance adjustable module 400, based on the low-level impedance cancellation signal, stops adding the minimum equivalent impedance to the key cleaning circuit 200.

[0072] On the other hand, counter 51 performs a reset operation based on the reset signal. At this time, the output of counter 51 is "00,0000,0001". Counter 51 sends a counting signal to impedance adjustable module 400 through the 0th decoder output terminal Q0. Based on the counting signal output by the 0th decoder output terminal Q0, impedance adjustable module 400 selects the maximum equivalent impedance to add to key cleaning circuit 200, thereby reducing the current flowing through the key, which is beneficial for saving power consumption and protecting the key.

[0073] The voltage regulation circuit 63 is also configured to adjust the voltage at the non-inverting input of the comparator 61 based on the counting signal output from the target decoder output in response to a non-reset signal, so that the comparator 61 sends a minimum impedance signal to the impedance adjustable module 400, and controls the comparator 61 to continue sending the minimum impedance signal to the impedance adjustable module 400 when the target decoder output switches from output counting signal to stop output counting signal.

[0074] For example, both counter 51 and voltage regulation circuit 63 receive a low-level non-reset signal. Simultaneously, counter 51 has counted to "9," therefore, the 9th decoder output terminal Q9 outputs a counting signal. On one hand, voltage regulation circuit 63 responds to the non-reset signal by increasing the voltage at the non-inverting input of comparator 61 based on the counting signal output from the 9th decoder output terminal Q9. This makes the voltage at the non-inverting input of comparator 61 greater than the reference voltage at the inverting input. Comparator 61 then sends a high-level minimum impedance signal to impedance adjustable module 400, causing impedance adjustable module 400 to select the minimum equivalent impedance to be added to key cleaning circuit 200. On the other hand, counter 51 continues its counting operation based on the non-reset operation and restarts the counting cycle.

[0075] When the user presses button 300 again, the count value of counter 51 switches from "9" to "0", and the output of counter 51 switches from "10,0000,0000" to "00,0000,0001". Therefore, the 9th decoder output terminal Q9 switches from being able to output a high-level counting signal to outputting a low-level non-counting signal. However, the voltage regulation circuit 63 can still control the comparator 61 to continue sending the minimum impedance signal to the impedance adjustable module 400, so that the impedance adjustable module 400 continues to select the minimum equivalent impedance to be added to the button cleaning circuit 200.

[0076] In this embodiment, through the coordinated operation of comparator 61, reference voltage circuit 62, and voltage regulation circuit 63, when the current flowing through the button is greater than or equal to a preset current threshold, it indicates that the button's operating condition has returned to normal. Based on the reset signal transmitted by the counting reset unit 52, the voltage regulation circuit 63 sends an impedance cancellation signal to the impedance adjustable module 400. The impedance adjustable module 400 cancels the addition of the minimum equivalent impedance to the button cleaning circuit 200 and instead adds the maximum equivalent impedance. This reduces the current flowing through the button, preventing excessive current from damaging the button and increasing power consumption. When the current flowing through the button is less than the preset current threshold, it indicates that the button's operating condition is still abnormal. Based on the counting signal output from the target decoding output terminal, the voltage regulation circuit 63 controls the impedance adjustable module 400 to select the minimum equivalent impedance as the target equivalent impedance to add to the button cleaning circuit 200, ensuring that the current flowing through the button remains at the maximum current. This allows for persistent and efficient cleaning of stubborn contaminants on the button, maximizing the button's rapid recovery from abnormal to normal operating conditions.

[0077] Please see Figure 6 The voltage regulation circuit 63 includes a unidirectional conduction circuit 631, a pull-up circuit 632, a non-inverting input circuit 633, and a switching circuit 634. The unidirectional conduction circuit 631 is electrically connected between the non-inverting input and output of the comparator 61. The pull-up circuit 632 is electrically connected to the output of the comparator 61, and the output of the comparator 61 is also electrically connected to the impedance adjustable module 400. The non-inverting input circuit 633 is electrically connected to both the target decoding output of the counter 51 and the non-inverting input of the comparator 61. The switching circuit 634 is electrically connected to both the non-inverting input circuit 633 and the non-inverting input of the comparator 61.

[0078] The switching circuit 634 is configured to, in response to the non-reset signal output by the counting reset unit 52, enter the cut-off state based on the non-reset signal, so that the comparator 61 outputs the minimum impedance signal based on the counting signal and the reference voltage, provided that the non-inverting input circuit 633 transmits the counting signal to the non-inverting input terminal of the comparator 61.

[0079] For example, the switching circuit 634 enters the off state based on a non-reset signal. The voltage at the non-inverting input of comparator 61 is mainly affected by the signal output from the target decoding output. The target decoding output is the decoding output corresponding to the maximum count value of counter 51. After the user applies 9 presses to the button, counter 51 accumulates from a count value of 0 to a count value of 9. At this time, the output of counter 51 is "10,0000,0000". When the 9th decoding output Q9 outputs a high-level counting signal, the voltage at the non-inverting input of comparator 61 is greater than the reference voltage at the inverting input. Therefore, comparator 61 outputs a high-level minimum impedance signal. The impedance adjustable module 400 selects the minimum equivalent impedance based on the high-level minimum impedance signal and adds it to the button cleaning circuit 200.

[0080] The switching circuit 634 is also configured to, in response to the non-reset signal output by the counting reset unit, enter the cut-off state based on the non-reset signal, so that the pull-up circuit 632, the unidirectional conduction circuit 631 and the non-inverting input circuit 633 form a voltage feedback loop to control the comparator 61 to maintain the minimum output impedance signal, provided that the non-inverting input circuit 633 switches from transmitting a counting signal to the non-inverting input terminal of the comparator 61.

[0081] For example, when the user presses button 300 for the 10th time, the output of counter 51 is "00,0000,0001". Therefore, the 9th decoder output terminal Q9 switches from outputting a high-level counting signal to stopping the output of the counting signal. However, the current flowing through the button is still less than the preset current threshold, and the button is still in an abnormal state. The counting reset unit 52 does not output a high-level reset signal, but instead outputs a low-level non-reset signal. The switching circuit 634 enters the cutoff state based on the non-reset signal. At this time, the pull-up circuit 632, the one-way conduction circuit 631, and the non-inverting input circuit 633 form a voltage feedback loop. Under the action of the system voltage, the voltage feedback loop generates a feedback voltage at the non-inverting input terminal of comparator 61. This feedback voltage is greater than the reference voltage. Therefore, comparator 61 still maintains the output of the minimum impedance signal. The impedance adjustable module 400 continues to select the minimum equivalent impedance added to the button cleaning circuit 200.

[0082] The switching circuit 634 is also configured to enter a conducting state in response to a reset signal output by the counting reset unit 52, thereby pulling the voltage at the non-inverting input of the comparator 61 below the reference voltage, so that the comparator 61 sends an impedance cancellation signal to the impedance adjustable module 400.

[0083] For example, when the switch circuit 634 receives a reset signal, it indicates that the current flowing through the button is greater than or equal to a preset current threshold. At this time, regardless of whether the target decoding output terminal outputs a counting signal, the switch circuit 634 enters the on state based on the reset signal to pull the voltage at the non-inverting input terminal of the comparator 61 below the reference voltage. When the voltage at the non-inverting input terminal of the comparator 61 is less than the reference voltage at the inverting input terminal, the comparator 61 outputs a low-level impedance cancellation signal, and the impedance adjustable module 400 stops adding the minimum equivalent impedance to the button cleaning circuit 200 based on the low-level impedance cancellation signal.

[0084] In this embodiment, a voltage feedback loop consisting of a unidirectional conduction circuit 631, a pull-up circuit 632, and a non-inverting input circuit 633 is used to lock the comparator 61 to maintain the minimum output impedance signal. This allows the impedance adjustable module 400 to maintain the minimum equivalent impedance when added to the key cleaning circuit 200, thereby keeping the current flowing through the key 300 at its maximum. This enables the key to persistently and efficiently clean stubborn contaminants, maximizing the efficiency of quickly restoring the key from abnormal to normal operation.

[0085] Please see Figure 7 The unidirectional conduction circuit 631 includes a first diode D1, the pull-up circuit 632 includes a first resistor R1, the switching circuit 634 includes a second resistor R2 and a first NPN transistor NQ1, the non-inverting input circuit 633 includes a third resistor R3, and the reference voltage circuit 62 includes a fourth resistor R4 and a fifth resistor R5.

[0086] The anode of the first diode D1 is electrically connected to the output of comparator 61, and the cathode of the first diode D1 is electrically connected to the non-inverting input of comparator 61. The first terminal of the first resistor R1 is supplied with system voltage VDC1, and the second terminal of the first resistor R1 is electrically connected to the output of comparator 61. The first terminal of the second resistor R2 is electrically connected to the counting reset unit 52, and the second terminal of the second resistor R2 is electrically connected to the base of the first NPN transistor NQ1. The emitter of the first NPN transistor NQ1 is grounded. The collector of the first NPN transistor NQ1 is connected at the node between the first terminal of the third resistor R3 and the non-inverting input of comparator 61. The second terminal of the third resistor R3 is electrically connected to the target decoding output of counter 51 to receive the counting signal output from the target decoding output. The second terminal of the fourth resistor R4, the first terminal of the fifth resistor, and the inverting input of comparator 61 are all electrically connected to the same node, and the second terminal of the fifth resistor R5 is grounded.

[0087] Specifically, the first NPN transistor NQ1 is configured to enter the on state in response to a high-level reset signal output from the reset terminal of counter 51, thereby pulling down the voltage at the non-inverting input terminal of comparator 61; or, in response to a low-level non-reset signal output from the reset terminal of counter 51, it enters the off state. The fourth resistor R4 and the fifth resistor R5 are configured to apply a reference voltage to the inverting input terminal of comparator 61 under the influence of the system voltage.

[0088] like Figure 7 As shown, counter 51 is a decimal counter, and the target decoding output is the 9th decoding output, Q9. The working principle of the current holding module 600 is as follows: ① The case where the counting reset unit 52 outputs a low-level non-reset signal, and the 9th decoder output terminal Q9 of the counter 51 does not output a high-level counting signal (equivalent to outputting a low-level non-counting signal).

[0089] If dust or rust contaminants exist between the contacts of the button, causing the current flowing through the button to be less than the preset current threshold, the counting reset unit 52 will output a low-level non-reset signal.

[0090] The user presses the button a total of 8 times, allowing the stepwise control impedance adjustable module 400 to add a smaller target equivalent impedance to the button cleaning circuit 200, thereby gradually increasing the current flowing through the button 300. During the 8 presses, the counter 51 changes from "0" to "8". Although the current flowing through the button is gradually increased during this period, the current corresponding to the count value "8" is still less than the preset current threshold. Therefore, the counter reset unit 52 outputs a low-level non-reset signal.

[0091] The low-level non-reset signal is transmitted to the second resistor R2 through the RESET terminal. The low-level non-reset signal causes the voltage difference between the base and emitter of the first NPN transistor NQ1 to be less than the on-state voltage drop, thus the first NPN transistor NQ1 enters the off state. The voltage at the non-inverting input of comparator 61 is mainly affected by the signal output from the 9th decoder output Q9.

[0092] Since the 9th decoder output Q9 outputs a low-level non-counting signal, the voltage at the non-inverting input of comparator 61 is less than the reference voltage at the inverting input. Therefore, comparator 61 sends a low-level impedance cancellation signal to the impedance adjustable module 400. The impedance adjustable module 400 will not select the minimum equivalent impedance to be added to the key cleaning circuit 200, but will instead select the equivalent impedance corresponding to the 8th decoder output Q8 as the target equivalent impedance to be added to the key cleaning circuit 200.

[0093] ② The case where the counting reset unit 52 outputs a low-level non-reset signal, and the 9th decoder output terminal Q9 of the counter 51 outputs a high-level counting signal.

[0094] The user presses the button a total of 9 times. During these 9 presses, the counter 51's count value changes from "0" to "9", and the 9th decoder output terminal Q9 of the counter 51 outputs a high-level counting signal. Although the current flowing through the button is increased step by step during this period, the current corresponding to the count value "9" is still less than the preset current threshold. Therefore, the counting reset unit 52 outputs a low-level non-reset signal.

[0095] The low-level non-reset signal is transmitted to the second resistor R2 through the RESET terminal, and the first NPN transistor NQ1 enters the cutoff state. Since the 9th decoder output terminal Q9 outputs a high-level counting signal, the voltage at the non-inverting input terminal of comparator 61 is greater than the reference voltage at the inverting input terminal. Therefore, comparator 61 sends a high-level minimum impedance signal to the impedance adjustable module 400. The impedance adjustable module 400 selects the minimum equivalent impedance as the target equivalent impedance and adds it to the button cleaning circuit 200, so that the current flowing through the button 300 is the maximum current.

[0096] ③ The case where the counting reset unit 52 outputs a low-level non-reset signal, and the 9th decoder output terminal Q9 of the counter 51 switches from outputting a high-level counting signal to stopping outputting a high-level counting signal.

[0097] When the user presses the button a total of 10 times, between the 9th and 10th presses, the count value of counter 51 changes from "9" to "0". The 9th decoder output terminal Q9 of counter 51 switches from outputting a high-level counting signal to outputting a low-level non-counting signal (equivalent to stopping the output of a high-level counting signal).

[0098] Since the current flowing through the button is still less than the preset current threshold, the counting reset unit 52 still outputs a low-level non-reset signal. This low-level non-reset signal is transmitted to the second resistor R2 through the reset terminal RESET, and the first NPN transistor NQ1 remains in the off state. Since the output state of comparator 61 during the 9th press operation has been controlled to output a high-level minimum impedance signal, even though the 9th decoder output terminal Q9 does not output a high-level counting signal, the first resistor R1, the first diode D1, and the third resistor R3 form a voltage feedback loop under the action of the system voltage VDC1, so that the voltage at the non-inverting input terminal of comparator 61 remains greater than the reference voltage at the inverting input terminal. This causes comparator 61 to continue sending a high-level minimum impedance signal to the impedance adjustable module 400. The impedance adjustable module 400 continues to select the minimum equivalent impedance as the target equivalent impedance and adds it to the button cleaning circuit 200, so that the current flowing through the button 300 remains at the maximum current.

[0099] ④ The counting reset unit 52 outputs a high-level reset signal.

[0100] During the counting process of counter 51, regardless of any value between 0 and 9, as long as the current flowing through the button is greater than or equal to the preset current threshold, the counting reset unit 52 will output a high-level reset signal.

[0101] The high-level reset signal is transmitted to the second resistor R2 through the RESET terminal, thereby raising the base voltage of the first NPN transistor NQ1. This makes the voltage difference between the base and emitter of the first NPN transistor NQ1 greater than the on-state voltage drop, and the first NPN transistor NQ1 enters the on state. This pulls down the voltage at the non-inverting input of comparator 61, making the voltage at the non-inverting input of comparator 61 less than the reference voltage at the inverting input. Comparator 61 sends a low-level impedance cancellation signal to the impedance adjustable module 400. The impedance adjustable module 400 stops selecting the minimum equivalent impedance to be added to the button cleaning circuit 200, and instead selects the maximum equivalent impedance to be added to the button cleaning circuit 200, so that the current flowing through the button 300 is the minimum current. This helps to save power consumption and protect the button.

[0102] Please see Figure 8 The impedance-adjustable module 400 includes a charging circuit 41, a power release circuit 42, and a variable resistor network 43. The charging circuit 41 is electrically connected to the button 300, and the power release circuit 42 is electrically connected to both the charging circuit 41 and the counter reset unit 52. The variable resistor network 43 is electrically connected to the charging circuit 41, the counter 51, and the current holding module 600.

[0103] The charging circuit 41 is configured to respond to the pressing of button 300, forming a charging loop with the power release circuit 42 and the counter reset unit 52 to charge based on the system voltage. The subsequent controller can detect the voltage across the charging circuit 41 to identify that button 300 is pressed. Please refer to... Figure 1 The existing technology requires a continuous current supply to the sensing resistor Rs, increasing the voltage across Rs so that the controller can identify that the button unit SW_P1 is pressed based on the voltage across Rs. However, this approach consumes a lot of power. In contrast, the charging circuit 41 provided in this embodiment uses transient pulses for charging, which has a shorter charging time and does not require a continuous current supply to the charging circuit 41. The controller only needs to capture the voltage across the charging circuit 41 to identify that the button 300 is pressed, thus avoiding the waste of a lot of power.

[0104] The power release circuit 42 is configured to provide a power discharge path for the charging circuit 41 to discharge energy in response to the release of the button 300. As previously described, the controller uses the increase in voltage across the charging circuit 41 to identify that the button 300 is in a pressed state. In order to identify that the button 300 is in a released state, the voltage across the charging circuit 41 needs to be reduced. Therefore, this embodiment provides a power release circuit 42 that can discharge energy from the charging circuit 41, thereby reducing the voltage across the charging circuit 41 so that the controller can accurately and reliably identify that the button 300 is in a released state.

[0105] In some embodiments, the variable resistor network 43 is configured to select the minimum equivalent impedance as the target equivalent impedance and add it to the key cleaning circuit 200 based on the minimum impedance signal output by the current holding module 600. When the target decoding output of the counter 51 outputs a counting signal, the comparator 61 sends a high-level minimum impedance signal to the variable resistor network 43. The variable resistor network 43 selects the minimum equivalent impedance and adds it to the key cleaning circuit 200 based on the high-level minimum impedance signal, thereby making the current flowing through the key 300 the maximum current.

[0106] In some embodiments, the variable resistor network 43 is further configured to select a target equivalent impedance to be added to the button cleaning circuit 200 based on the count signal output by the reference decoder output of the counter 51 in response to the impedance cancellation signal output by the current holding module 600. The target equivalent impedance is connected in parallel with the impedance of the charging circuit 41, and the reference decoder output is the decoder output other than the target decoder output among the plurality of decoder outputs of the counter 51.

[0107] As mentioned earlier, the low-level impedance cancellation signal can originate from the following two situations: In the first scenario: When the switching circuit 634 receives a high-level reset signal, it enters the on state based on the reset signal, pulling the voltage at the non-inverting input of comparator 61 below the reference voltage. This causes comparator 61 to send a low-level impedance cancellation signal to the impedance-adjustable module 400. Based on the low-level impedance cancellation signal, the variable resistor network 43 stops adding the minimum equivalent impedance corresponding to the 9th decoder output Q9 to the button cleaning circuit 200.

[0108] Simultaneously, counter 51 also receives a high-level reset signal and performs a reset operation. Therefore, the 0th decoded output terminal Q0 of counter 51 is set to 1, and the 1st to 9th decoded output terminals Q1 to Q9 are all set to 0. At this time, the output of counter 51 is "00,0000,0001". Among the 0th to 9th decoded output terminals Q0, only the 0th decoded output terminal Q0 outputs a counting signal. Therefore, the 0th decoded output terminal Q0 is the reference decoded output terminal at this time. The equivalent impedance corresponding to the 0th decoded output terminal Q0 is the maximum equivalent impedance. The variable resistor network 43 selects the maximum equivalent impedance as the target equivalent impedance and adds it to the key cleaning circuit 200.

[0109] In the second scenario: the switching circuit 634 receives a low-level non-reset signal, but the target decoding output of the counter 51 does not output a high-level counting signal. Therefore, the voltage at the non-inverting input of the comparator 61 is less than the reference voltage at the inverting input, and the comparator 61 sends a low-level impedance cancellation signal to the impedance adjustable module 400.

[0110] The behavior of counter 51 in the second case differs from that in the first case. In the second case, counter 51 does not receive a reset signal, therefore, counter 51 continues its counting operation. If the current count value of counter 51 is 2, that is, if the second decoder output terminal Q2 of counter 51 outputs a counting signal, and the second decoder output terminal Q2 is a reference decoder output terminal, then counter 51 selects the equivalent impedance corresponding to the second decoder output terminal Q2 as the target equivalent impedance to be added to the button cleaning circuit.

[0111] Similarly, if the current count value of counter 51 is 3, that is, the third decoder output terminal Q3 of counter 51 outputs a count signal, and the third decoder output terminal Q3 is the reference decoder output terminal, then counter 51 selects the equivalent impedance corresponding to the third decoder output terminal Q3 as the target equivalent impedance to be added to the key cleaning circuit.

[0112] And so on, without going into detail here.

[0113] Please see Figure 9The power release circuit 42 includes a switching transistor 421 and a switching control circuit 422. The switching transistor 421 is connected in parallel across the two ends of the charging circuit 41, and the switching control circuit 422 is electrically connected to both the switching transistor 421 and the charging circuit 41.

[0114] The switch control circuit 422 is configured to control the switch transistor 421 to enter the off state in response to the button 300 being pressed, so that the charging circuit 41 can charge based on the current flowing through the button 300. The voltage across the charging circuit 41 increases as the charging process progresses. The controller can detect the increase in voltage across the charging circuit 41 and thus recognize that the button 300 is pressed.

[0115] The switch control circuit 422 is also configured to control the switch transistor 421 to enter a conducting state in response to the release of the button 300, so that the conducting switch transistor 421 and the charging circuit 41 form a discharge path to discharge the energy of the charging circuit 41. The voltage across the charging circuit 41 decreases as the discharge process proceeds. The controller detects the decrease in voltage across the charging circuit 41 and can then recognize that the button 300 is in a released state.

[0116] In this embodiment, the charging and discharging control of the charging circuit 41 is reliably realized through the coordinated cooperation between the switching transistor 421 and the switching control circuit 422. This enables the charging circuit 41 to respond promptly to changes in the pressed or released state of the button 300 and enter the charging or discharging state. This facilitates the subsequent controller to reliably identify whether the button 300 is in the pressed or released state.

[0117] In some embodiments, the switch control circuit 422 is further configured to control the switch transistor 421 to remain in the off state in response to the button 300 being pressed and the charging circuit 41 entering a fully charged state, so that the voltage across the charging circuit 41 remains unchanged. Therefore, in some usage scenarios, users may press the button for a long time, which can easily cause the charging circuit 41 to be fully charged. When the charging circuit 41 is fully charged, the switch control circuit 422 continues to control the switch transistor 421 to remain in the off state, preventing the switch transistor 421 from entering the conducting state when the charging circuit 41 is fully charged, and preventing the switch transistor 421 from discharging the power of the charging circuit 41 in the conducting state. This prevents the subsequent controller from easily misjudging that the button 300 is in the released state when in fact the button 300 is still in the pressed state. This ensures that the subsequent controller can accurately and reliably identify the button state of the button 300 in any usage scenario, which is beneficial to improving the robustness of the button state judgment.

[0118] Please see Figure 10The charging circuit 41 includes a sixth resistor R6 and a first capacitor C1. The switching transistor 421 is a second NPN transistor NQ2. The switch control circuit 422 includes a seventh resistor R7, an eighth resistor R8, and a second diode D2. The first terminal of the button 300 is supplied with the system voltage. The second terminal of the button 300, the first terminal of the first capacitor C1, the first terminal of the seventh resistor R7, the first terminal of the eighth resistor R8, and the collector of the second NPN transistor NQ2 are all electrically connected to the first node N1. The second terminal of the first capacitor C1, the first terminal of the sixth resistor R6, and the second terminal of the seventh resistor R7 are all electrically connected to the second node N2. The second terminal of the sixth resistor R6, the emitter of the second NPN transistor NQ2, and the anode of the second diode D2 are all electrically connected to the third node N3. The second terminal of resistor R8, the base of the second NPN transistor NQ2, and the cathode of the second diode D2 are electrically connected to the fourth node N4. A variable resistor network 43 is electrically connected between the second node N2 and the third node N3. The counting reset unit 52 is electrically connected to the fourth node N4. The resistance of the sixth resistor R6 is the maximum equivalent impedance. The second diode D2 is configured to, in response to the button 300 being pressed, control the second NPN transistor NQ2 to enter a cutoff state so that the first capacitor C1 charges based on the system voltage; or, in response to the button 300 being released, control the second NPN transistor NQ2 to enter a conduction state so that the first capacitor C1, the conduction second NPN transistor NQ2, and the sixth resistor R6 form a discharge path to discharge the energy of the first capacitor C1. In some embodiments, the resistance values ​​of the seventh resistor R7 and the eighth resistor R8 are both greater than the resistance value of the sixth resistor R6.

[0119] The variable resistor network 43 includes multiple impedance switching units 431 with different impedances. Each impedance switching unit corresponds to a decoding output terminal. Each impedance switching unit 431 includes a reference resistor and an NMOS transistor. The reference resistor and NMOS transistor of each impedance switching unit 431 are connected in series and then in parallel with the sixth resistor R6. The gate of the NMOS transistor is electrically connected to the corresponding decoding output terminal. The drain of the NMOS transistor is electrically connected to the first end of the reference resistor. The second end of the reference resistor is electrically connected to the first end of the sixth resistor R6. The source of the NMOS transistor is electrically connected to the second end of the sixth resistor R6 and the positive terminal of the second diode D2. The count value corresponding to the decoding output terminal is negatively correlated with the resistance value of the reference resistor of the corresponding impedance switching unit 431. The resistance values ​​of the reference resistors of all impedance switching units 431 are less than the resistance value of the sixth resistor R6.

[0120] The count value of the decoder output terminal electrically connected to the maximum impedance switching unit is greater than the natural number 1. The maximum impedance switching unit is the impedance switching unit corresponding to the maximum resistance value among all impedance switching units.

[0121] For example, the variable resistor network 43 includes eight impedance switching units 431, namely a first impedance switching unit, a second impedance switching unit, a third impedance switching unit, a fourth impedance switching unit, a fifth impedance switching unit, a sixth impedance switching unit, a seventh impedance switching unit, and an eighth impedance switching unit.

[0122] Please continue reading. Figure 10 The first impedance switching unit includes a first reference resistor Rh1 and a first NMOS transistor NM1, with the gate of the first NMOS transistor NM1 electrically connected to the second decoder output terminal Q2. The second impedance switching unit includes a second reference resistor Rh2 and a second NMOS transistor NM2, with the gate of the second NMOS transistor NM2 electrically connected to the third decoder output terminal Q3. The third impedance switching unit includes a third reference resistor Rh3 and a third NMOS transistor NM3, with the gate of the third NMOS transistor NM3 electrically connected to the fourth decoder output terminal Q4.

[0123] The fourth impedance switching unit includes a fourth reference resistor Rh4 and a fourth NMOS transistor NM4, the gate of which is electrically connected to the fifth decoder output terminal Q5. The fifth impedance switching unit includes a fifth reference resistor Rh5 and a fifth NMOS transistor NM5, the gate of which is electrically connected to the sixth decoder output terminal Q6.

[0124] The sixth impedance switching unit includes a sixth reference resistor Rh6 and a sixth NMOS transistor NM6, with the gate of NM6 electrically connected to the seventh decoder output terminal Q7. The seventh impedance switching unit includes a seventh reference resistor Rh7 and a seventh NMOS transistor NM7, with the gate of NM7 electrically connected to the eighth decoder output terminal Q8. The eighth impedance switching unit includes an eighth reference resistor Rh8 and an eighth NMOS transistor NM8, with the gate of NM8 electrically connected to the output terminal HOLD of comparator 61.

[0125] The resistance values ​​of the various reference resistors are in the following order: Rh1>Rh2>Rh3>Rh4>Rh5>Rh6>Rh7>Rh8. Furthermore, the resistance value of the sixth resistor R6 is much greater than the resistance value of any of the reference resistors from the first reference resistor Rh1 to the eighth reference resistor Rh8. Therefore, when the sixth resistor R6 is connected in parallel with any reference resistor in the button cleaning circuit 200, it can be approximately considered that the total impedance of the sixth resistor R6 and any reference resistor is approximately equal to the resistance value of that reference resistor.

[0126] Please combine Figure 10 The working principle of the impedance adjustable module 400 is as follows: When counter 51 is powered on and reset, the output of counter 51 is "00,0000,0001", that is, the 0th decoder output terminal outputs a high-level counting signal, and the count value of counter 51 is 0.

[0127] When the user presses button 300 for the first time, the current flowing through button 300 flows through the current loop formed by the first capacitor C1, the sixth resistor R6, the second diode D2, and the counting reset unit 52, and also through the current loop formed by the seventh resistor R7, the sixth resistor R6, the second diode D2, and the counting reset unit 52. At this time, the second diode D2 is already in the conducting state. The sixth resistor R6, as the equivalent impedance corresponding to the 0th decoder output terminal, is implicitly included in the button cleaning circuit 200.

[0128] Since the second diode D2 is in the conducting state, the voltage at the positive terminal of the second diode D2 is equal to the voltage at the emitter of the second NPN transistor NQ2, and the voltage at the negative terminal of the second diode D2 is equal to the voltage at the base of the second NPN transistor NQ2. This makes the voltage difference between the base and emitter of the second NPN transistor NQ2 less than the forward voltage drop of 0.7V. Therefore, the second diode D2 sets the second NPN transistor NQ2 to the cutoff state, and the first capacitor C1 enters the charging state.

[0129] Understandably, in some usage scenarios, users may press button 300 for an extended period of time, causing the first capacitor C1 to easily become fully charged. When the first capacitor C1 is fully charged, if there is no seventh resistor R7, the second diode D2 will be cut off. When the second diode D2 is cut off, the second NPN transistor NQ2 will be turned on. The discharge circuit formed by the first capacitor C1, the second NPN transistor NQ2, and the sixth resistor R6 can discharge the charge from the first capacitor C1, causing the subsequent controller to easily misjudge that button 300 is in the released state, even though button 300 is still in the pressed state. In this embodiment, by setting a seventh resistor R7, even if the first capacitor C1 is fully charged due to the user pressing the button 300 for a long time, the current loop formed by the seventh resistor R7, the sixth resistor R6, the second diode D2, and the counting reset unit 52 can still force the second diode D2 to remain in the conducting state, thereby controlling the second NPN transistor NQ2 to remain in the cut-off state. Subsequently, the controller can still detect that the button 300 is in the pressed state based on the voltage across the sixth resistor R6, thus accurately and reliably identifying the button state of the button 300, which helps to improve the robustness of the button state judgment.

[0130] Meanwhile, counter 51 receives a trigger signal and counts from a value of "0" to a value of "1". The first decoder output terminal Q1 of counter 51 outputs a high-level counting signal. If the current flowing through button 300 is less than a preset current threshold, the equivalent impedance corresponding to the first decoder output terminal Q1 of counter 51 will be added to the button cleaning circuit 200. However, in... Figure 10In the circuit, the first decoder output terminal Q1 is left floating and is not electrically connected to the NMOS transistor. Therefore, during the period when the count value is 1, the sixth resistor R6 is still added to the button cleaning circuit 200 by default as the target equivalent impedance.

[0131] When the user releases button 300 for the first time, the first capacitor C1 begins to discharge. During this discharge, the second diode D2 enters the cutoff state, and the voltage difference between the base and emitter of the second NPN transistor NQ2 exceeds the forward voltage drop. Therefore, the second NPN transistor NQ2 enters the conducting state. The first capacitor C1, the conducting second NPN transistor NQ2, and the sixth resistor R6 form a discharge path, thereby dissipating the energy from the first capacitor C1.

[0132] When the user presses button 300 for the second time, the working principle of the impedance adjustable module 400 is the same as that when the button 300 is pressed for the first time, which will not be described in detail here.

[0133] When the user presses button 300 for the 9th time, the output of counter 51 is "10,0000,0000", meaning the 9th decoder output terminal outputs a high-level counting signal, and the count value of counter 51 is 9. If the current flowing through button 300 is less than a preset current threshold, comparator 61 outputs a high-level minimum impedance signal. This high-level minimum impedance signal acts on the gate of the eighth NMOS transistor NM8, turning it on. The eighth reference resistor Rh8 is added to the button cleaning circuit 200, and since Rh8 is the minimum equivalent impedance, the current flowing through button 300 is thus maximized.

[0134] When the user presses button 300 for the 10th time, if the current flowing through button 300 is still less than the preset current threshold, since comparator 61 maintains the minimum impedance signal with a high output level, the eighth reference resistor Rh8 remains connected to the button cleaning circuit 200, and the current flowing through button 300 remains at the maximum current.

[0135] It is understandable that the reason for leaving the first decoder output terminal Q1 floating and not binding an equivalent impedance to it is because: assuming that the first decoder output terminal Q1 is not floating and is bound to an equivalent impedance controlled by an NMOS transistor, under this assumption, the counter 51 will count in response to the trigger signal generated by the first press operation. At this time, the output is "00,0000,0010". The first decoder output terminal Q1 of the counter 51 outputs a high level to the NMOS transistor, and the NMOS transistor enters the conducting state, so that the corresponding equivalent impedance is added to the button cleaning circuit 200.

[0136] However, if the current flowing through button 300 is greater than or equal to the preset current threshold, counter 51 receives a reset signal, performs a reset operation, and outputs "00,0000,0001", that is, the first decoder output terminal outputs a low-level non-counting signal. Counter 51 then disconnects the NMOS transistor electrically connected to the first decoder output terminal Q1. When the user frequently presses button 300, counter 51 needs to frequently turn the NMOS transistor electrically connected to the first decoder output terminal Q1 on or off.

[0137] By leaving the first decoder output Q1 floating and not binding it with an equivalent impedance, the advantages are as follows: Since the first decoder output Q1 is not bound to an equivalent impedance controlled by an NMOS transistor, during the first button press, even if the first decoder output Q1 outputs a high-level counting signal, since it is not electrically connected to the NMOS transistor, the impedance adjustable module 400 does not need to perform impedance switching operations. When the user frequently presses the button 300, the aforementioned scenario will not occur: the counter 51 will not need to frequently turn the NMOS transistor electrically connected to the first decoder output Q1 on or off. This approach reduces the complexity of the control logic and the cost of hardware design, making the control logic simpler and promoting more stable and reliable operation of the button cleaning circuit 200.

[0138] Please see Figure 11 The counting reset unit 52 includes a first switching unit 521 and a second switching unit 522. The first switching unit 521 is electrically connected to the impedance adjustable module 400. The second switching unit 522 is electrically connected to both the first switching unit 521 and the reset terminal of the counter 51.

[0139] The first switching unit 521 is configured to generate a first level signal in response to a current flowing through the button 300 being greater than or equal to a preset current threshold. The second switching unit 522 is configured to send a reset signal to the counter 51 in response to the first level signal, so that the counter 51 controls the impedance adjustable module 400 to select the maximum equivalent impedance to be added to the button cleaning circuit 200.

[0140] When the current flowing through button 300 is greater than or equal to a preset current threshold, the first switching unit 521 sends a low-level first-level signal to the second switching unit 522. Based on the low-level first-level signal, the second switching unit 522 sends a high-level reset signal to the counter 51, causing the counter 51 to control the impedance adjustable module 400 to select the maximum equivalent impedance to be added to the button cleaning circuit 200. For example, when the counter 51 receives the high-level reset signal, it performs a reset operation and outputs "00,0000,0001", that is, the 0th decoder output terminal Q0 outputs a high-level counting signal, and the count value of the counter 51 is 0. Therefore, the counter 51 selects the equivalent impedance corresponding to the 0th decoder output terminal Q0 as the maximum equivalent impedance to be added to the button cleaning circuit 200. In addition, the current holding module 600 also receives a high-level reset signal, and the comparator 61 outputs a low-level impedance cancellation signal, causing the eighth NMOS transistor NM8 to be turned off, and the eighth reference resistor Rh8 is not added to the button cleaning circuit 200.

[0141] The first switching unit 521 is further configured to generate a second-level signal in response to the current flowing through the button 300 being less than a preset current threshold. The second switching unit 522 is further configured to send a non-reset signal to the counter 51 in response to the second-level signal, so that the counter 51 continues to perform counting operations.

[0142] The second level signal and the first level signal are two mutually exclusive level signals. When the first level signal is low, the second level signal is high. When the first level signal is high, the second level signal is low.

[0143] When the current flowing through button 300 is less than a preset current threshold, the first switching unit 521 sends a high-level second-level signal to the second switching unit 522. Based on the high-level second-level signal, the second switching unit 522 sends a low-level non-reset signal to the counter 51, and the counter 51 continues to perform counting operations.

[0144] Please continue reading. Figure 10 The first switching unit 521 includes a ninth resistor R9 and a third NPN transistor NQ3, and the second switching unit 522 includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12 and a first PNP transistor PQ1.

[0145] The first terminal of the ninth resistor R9 and the base of the third NPN transistor NQ3 are both electrically connected to the fourth node N4. The second terminal of the ninth resistor R9 and the emitter of the third NPN transistor NQ3 are both grounded. The collector of the third NPN transistor NQ3 is electrically connected to the first terminal of the tenth resistor R10. The second terminal of the tenth resistor R10, the first terminal of the eleventh resistor R11, and the base of the first PNP transistor PQ1 are all electrically connected to the fifth node N5. The second terminal of the eleventh resistor R11 and the emitter of the first PNP transistor PQ1 are both subject to a system voltage. The collector of the first PNP transistor PQ1 and the first terminal of the twelfth resistor R12 are both electrically connected. Connected to the sixth node N6, the sixth node N6 is configured to output a reset signal or a non-reset signal, and the second end of the twelfth resistor R12 is grounded; the ninth resistor R9 is configured to control the third NPN transistor NQ3 to enter the conducting state in response to the current flowing through the button 300 being greater than or equal to a preset current threshold, so that the system voltage forms a loop through the eleventh resistor R11, the tenth resistor R10 and the third NPN transistor NQ3 to control the first PNP transistor PQ1 to enter the conducting state; the first PNP transistor PQ1 is configured to pull the system voltage to the sixth node N6 in the conducting state, so that the sixth node N6 outputs a high-level reset signal.

[0146] Please combine Figure 10 The working principle of the counting reset unit 52 is as follows: The current flowing through button 300 flows through the ninth resistor R9. If the current flowing through button 300 is greater than or equal to the preset current threshold, it means that the button's operating condition has returned to normal. The voltage across the ninth resistor R9 is greater than the on-state voltage drop of the third NPN transistor NQ3. For example, if the voltage across the ninth resistor R9 is greater than 0.7V, the third NPN transistor NQ3 enters the conducting state, pulling down the collector voltage of the third NPN transistor NQ3, which is equivalent to outputting a low-level first-level signal.

[0147] When the third NPN transistor NQ3 turns on and its collector voltage is pulled low, the system voltage VDC1 forms a circuit through the eleventh resistor R11, the tenth resistor R10, and the third NPN transistor NQ3. This makes the voltage difference between the emitter and base of the first PNP transistor PQ1 greater than the on-state voltage drop, causing the first PNP transistor PQ1 to turn on. When the first PNP transistor PQ1 turns on, the system voltage VDC1 is almost pulled to the reset terminal RESET, which is equivalent to outputting a high-level reset signal to the reset terminal RESET. Counter 51 receives the reset signal and performs a reset operation, outputting a high-level counting signal from the 0th decoder output terminal Q0.

[0148] exist Figure 10In this circuit, the 0th decoder output Q0 is left floating, but the equivalent impedance corresponding to the 0th decoder output Q0 is the sixth resistor R6, which is already included in the button cleaning circuit 200 by default. Simultaneously, the current holding module 600 receives a high-level reset signal, and comparator 61 outputs a low-level impedance cancellation signal, causing the eighth NMOS transistor NM8 to be turned off. Therefore, the eighth reference resistor Rh8 is not included in the button cleaning circuit 200. Furthermore, all reference resistors are not included in the button cleaning circuit 200.

[0149] Since the sixth resistor R6 is the maximum equivalent impedance, and relative to the other reference resistors, only the sixth resistor R6 is added to the button cleaning circuit 200, and the resistance of the sixth resistor R6 is very large, the current flowing through the button 300 is relatively small. This avoids generating an excessively high energy arc that could damage the button when it is pressed again, and also saves power consumption.

[0150] If the current flowing through button 300 is less than the preset current threshold, it indicates that the button is in an abnormal state. The voltage across the ninth resistor R9 is less than the forward voltage drop of the third NPN transistor NQ3, so the third NPN transistor NQ3 enters the cutoff state. The collector voltage of the third NPN transistor NQ3 is equal to the system voltage VDC1, thus making the voltage difference between the emitter and base voltages of the first PNP transistor PQ1 less than the forward voltage drop, so the first PNP transistor PQ1 enters the cutoff state.

[0151] When the first PNP transistor PQ1 enters the cutoff state, no current flows through the twelfth resistor R12, therefore, the RESET terminal is applied low. Counter 51 receives a low-level non-reset signal and continues counting. If the current count value of counter 51 is 2, that is, the second decoder output Q2 of counter 51 outputs a counting signal, the first NMOS transistor NM1 enters the conducting state, and the first reference resistor Rh1 is added to the button cleaning circuit.

[0152] Similarly, if the current count value of counter 51 is 3, that is, if the third decoder output terminal Q3 of counter 51 outputs a counting signal, the second NMOS transistor NM2 enters the conducting state, and the second reference resistor Rh2 is added to the button cleaning circuit. And so on, which will not be elaborated here.

[0153] As the number of key presses increases, the key cleaning circuit 200 continuously increases the current flowing through the key, thereby enhancing its ability to clean contaminants from the key 300 and thus improving the cleaning effect.

[0154] When the number of key presses increases to the 9th time, the key cleaning circuit 200 increases the current flowing through the key to the maximum current. When the number of key presses increases to the 10th time or more, the key cleaning circuit 200 still maintains the current flowing through the key at the maximum current, thus providing a continuous and maximum current for cleaning contaminants from the key 300, ensuring that the key cleaning circuit 200 can reliably and efficiently clean stubborn contaminants from the key.

[0155] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A button cleaning circuit, characterized in that, include: The button is configured to generate a trigger signal in response to a press operation under the influence of system voltage, and the contacts of the button form a contact resistance when pressed. An impedance-adjustable module, electrically connected to the button, is configured to provide different equivalent impedances; An impedance control module, electrically connected to both the button and the impedance adjustable module, is configured to control the impedance adjustable module to select a target equivalent impedance to be added to the button cleaning circuit based on the trigger signal. The target equivalent impedance is selected to adjust the current flowing through the button to reduce the resistance value of the contact impedance.

2. The button cleaning circuit according to claim 1, characterized in that, The impedance control module includes: A counter, electrically connected to both the button and the impedance-adjustable module, is configured to generate a counting signal based on the trigger signal and send the counting signal to the impedance-adjustable module so that the impedance-adjustable module selects a target equivalent impedance to add to the button cleaning circuit. The counting signal is used to represent the current count value of the counter. The counting reset unit, electrically connected to the impedance adjustable module and the counter respectively, is configured to send a reset signal to the counter in response to the current flowing through the button being greater than or equal to a preset current threshold, so that the counter controls the impedance adjustable module to select the maximum equivalent impedance to be added to the button cleaning circuit; or, in response to the current flowing through the button being less than the preset current threshold, send a non-reset signal to the counter so that the counter continues to perform counting operations.

3. The button cleaning circuit according to claim 2, characterized in that, The current count value of the counter is negatively correlated with the target equivalent impedance, and the target equivalent impedance is negatively correlated with the current flowing through the button; and / or, The preset current threshold is greater than or equal to the current value output by the button under normal operating conditions; and / or, Provided that the current count value corresponding to the counting signal is the maximum count value, the target equivalent impedance is the minimum equivalent impedance; and / or, The counter includes multiple decoding output terminals, and the equivalent impedances corresponding to each decoding output terminal are connected in parallel. The equivalent impedance corresponding to the minimum decoding output terminal is the maximum equivalent impedance. The minimum decoding output terminal is the decoding output terminal corresponding to the minimum count value of the counter. And / or, The maximum equivalent impedance is configured to be added to the button cleaning circuit by default, and the minimum decoder output is left floating.

4. The button cleaning circuit according to claim 2, characterized in that, It also includes a current holding module, which is electrically connected to the target decoding output terminal of the counter, the counting reset unit, and the impedance adjustable module, respectively. The current holding module is configured to send a minimum impedance signal to the impedance adjustable module in response to the counting signal output by the target decoding output terminal of the counter, so as to control the impedance adjustable module to select the minimum equivalent impedance as the target equivalent impedance to be added to the key cleaning circuit. When the target decoding output terminal switches from output counting signal to stop output counting signal, it continues to send the minimum impedance signal to the impedance adjustable module, or, in response to the reset signal, sends an impedance cancellation signal to the impedance adjustable module to stop adding the minimum equivalent impedance of the impedance adjustable module to the key cleaning circuit.

5. The button cleaning circuit according to claim 4, characterized in that, The current holding module includes: The comparator, the output of which is electrically connected to the impedance-adjustable module; A reference voltage circuit, electrically connected to the inverting input of the comparator, is configured to apply a reference voltage to the inverting input of the comparator. A voltage regulation circuit, electrically connected to the target decoding output of the counter, the non-inverting input of the comparator, and the counting reset unit, is configured to: in response to the reset signal, pull the voltage of the non-inverting input of the comparator below the reference voltage, causing the comparator to send an impedance cancellation signal to the impedance adjustable module; or, in response to the non-reset signal, adjust the voltage of the non-inverting input of the comparator based on the counting signal output from the target decoding output, causing the comparator to send a minimum impedance signal to the impedance adjustable module, and when the target decoding output switches from output counting signal to stop output counting signal, control the comparator to continue sending the minimum impedance signal to the impedance adjustable module.

6. The button cleaning circuit according to claim 5, characterized in that, The voltage regulation circuit includes: A unidirectional conduction circuit is electrically connected between the non-inverting input terminal and the output terminal of the comparator. A pull-up circuit is electrically connected to the output terminal of the comparator, and the output terminal of the comparator is also electrically connected to the impedance adjustable module; The non-inverting input circuit is electrically connected to the target decoding output terminal of the counter and the non-inverting input terminal of the comparator, respectively. The non-inverting input circuit is configured to receive the counting signal or non-counting signal output from the target decoding output terminal of the counter. A switching circuit, electrically connected to the non-inverting input circuit, the non-inverting input of the comparator, and the counting reset unit, is configured to, under the premise that the non-inverting input circuit transmits a counting signal to the non-inverting input of the comparator, respond to a non-reset signal output by the counting reset unit and enter a cutoff state based on the non-reset signal, causing the comparator to output a minimum impedance signal based on the counting signal and the reference voltage; or, under the premise that the non-inverting input circuit switches from transmitting a counting signal to the non-inverting input of the comparator to stopping transmitting a counting signal to the non-inverting input of the comparator, respond to a non-reset signal output by the counting reset unit and enter a cutoff state based on the non-reset signal, causing the pull-up circuit, the unidirectional conduction circuit, and the non-inverting input circuit to form a voltage feedback loop to control the comparator to maintain the minimum impedance output signal; or, in response to a reset signal output by the counting reset unit, enter a conduction state to pull the voltage at the non-inverting input of the comparator below the reference voltage, causing the comparator to send an impedance cancellation signal to the impedance adjustable module.

7. The button cleaning circuit according to claim 6, characterized in that, The count value corresponding to the target decoding output of the counter is the maximum count value; and / or, The unidirectional conduction circuit includes a first diode, the pull-up circuit includes a first resistor, the switching circuit includes a second resistor and a first NPN transistor, the non-inverting input circuit includes a third resistor, and the reference voltage circuit includes a fourth resistor and a fifth resistor. The positive terminal of the first diode is electrically connected to the output terminal of the comparator, the negative terminal of the first diode is electrically connected to the non-inverting input terminal of the comparator, the first terminal of the first resistor is subjected to the system voltage, and the second terminal of the first resistor is electrically connected to the output terminal of the comparator. The first end of the second resistor is electrically connected to the counting reset unit, the second end of the second resistor is electrically connected to the base of the first NPN transistor, the emitter of the first NPN transistor is grounded, and the collector of the first NPN transistor is electrically connected to the node between the first end of the third resistor and the non-inverting input of the comparator. The second end of the third resistor is electrically connected to the target decoding output of the counter, and is used to receive the counting signal output by the target decoding output. The first end of the fourth resistor is applied with system voltage. The second end of the fourth resistor, the first end of the fifth resistor, and the inverting input of the comparator are all electrically connected to the same node. The second end of the fifth resistor is grounded.

8. The button cleaning circuit according to claim 4, characterized in that, The impedance-adjustable module includes a charging circuit, a power release circuit, and a variable resistor network. The charging circuit is electrically connected to the button and is configured to form a charging loop with the power release circuit and the counting reset unit in response to the button being pressed, so as to charge based on the system voltage. The power release circuit is electrically connected to the charging circuit and the counting reset unit respectively, and is configured to provide a power discharge path for the charging circuit to discharge the energy of the charging circuit in response to the release of the button. A variable resistor network, electrically connected to the charging circuit, the counter, and the current holding module, is configured to select the minimum equivalent impedance as the target equivalent impedance and add it to the button cleaning circuit based on the minimum impedance signal output by the current holding module, or, in response to the impedance cancellation signal output by the current holding module, select the target equivalent impedance and add it to the button cleaning circuit based on the counting signal output by the reference decoding output terminal of the counter. The target equivalent impedance is connected in parallel with the impedance of the charging circuit, and the reference decoding output terminal is one of the multiple decoding output terminals of the counter excluding the target decoding output terminal.

9. The button cleaning circuit according to claim 8, characterized in that, The power release circuit includes: A switching transistor is connected in parallel across the two ends of the charging circuit; A switch control circuit, electrically connected to the switch transistor and the charging circuit respectively, is configured to, in response to the button being pressed, control the switch transistor to enter the off state so that the charging circuit charges based on the current flowing through the button, or, in response to the button being released, control the switch transistor to enter the on state so that the on switch transistor and the charging circuit form a power discharge path to discharge the energy of the charging circuit.

10. The button cleaning circuit according to claim 9, characterized in that, The charging circuit includes a sixth resistor and a first capacitor. The switching transistor is a second NPN transistor. The switch control circuit includes a seventh resistor, an eighth resistor, and a second diode. The first terminal of the button is supplied with system voltage. The second terminal of the button, the first terminal of the first capacitor, the first terminal of the seventh resistor, the first terminal of the eighth resistor, and the collector of the second NPN transistor are all electrically connected to a first node. The second terminal of the first capacitor, the first terminal of the sixth resistor, and the second terminal of the seventh resistor are all electrically connected to a second node. The second terminal of the sixth resistor, the emitter of the second NPN transistor, and the anode of the second diode are all electrically connected to a third node. The second terminal of the eighth resistor... The base of the second NPN transistor and the cathode of the second diode are electrically connected to the fourth node. The variable resistor network is electrically connected between the second node and the third node. The counting reset unit is electrically connected to the fourth node. The resistance of the sixth resistor is the maximum equivalent impedance. The second diode is configured to, in response to the button being pressed, control the second NPN transistor to enter the cutoff state so that the first capacitor is charged based on the system voltage, or, in response to the button being released, control the second NPN transistor to enter the conduction state so that the first capacitor, the conduction second NPN transistor, and the sixth resistor form a discharge path to discharge the energy of the first capacitor. The variable resistor network includes multiple impedance switching units with different impedances. Each impedance switching unit corresponds to a decoding output terminal. Each impedance switching unit includes a reference resistor and an NMOS transistor. The reference resistor and NMOS transistor of each impedance switching unit are connected in series and then in parallel with the sixth resistor. The gate of the NMOS transistor is electrically connected to the corresponding decoding output terminal. The drain of the NMOS transistor is electrically connected to the first end of the reference resistor. The second end of the reference resistor is electrically connected to the first end of the sixth resistor. The source of the NMOS transistor is electrically connected to the second end of the sixth resistor and the positive terminal of the second diode, respectively. The count value corresponding to the decoding output terminal is negatively correlated with the resistance value of the reference resistor of the corresponding impedance switching unit. The resistance values ​​of the reference resistors of all impedance switching units are less than the resistance value of the sixth resistor.

11. The button cleaning circuit according to any one of claims 2 to 10, characterized in that, The counting reset unit includes: The first switching unit is electrically connected to the impedance adjustable module and is configured to generate a first level signal in response to the current flowing through the button being greater than or equal to a preset current threshold, or to generate a second level signal in response to the current flowing through the button being less than the preset current threshold. The second switching unit, electrically connected to the first switching unit and the reset terminal of the counter, is configured to send a reset signal to the counter in response to the first level signal, so that the counter controls the impedance adjustable module to select the maximum equivalent impedance to be added to the button cleaning circuit, or to send a non-reset signal to the counter in response to the second level signal, so that the counter continues to perform counting operations.

12. The button cleaning circuit according to claim 11, characterized in that, The first switching unit includes a ninth resistor and a third NPN transistor, and the second switching unit includes a tenth resistor, an eleventh resistor, a twelfth resistor, and a first PNP transistor; The first terminal of the ninth resistor and the base of the third NPN transistor are both electrically connected to the fourth node. The second terminal of the ninth resistor and the emitter of the third NPN transistor are both grounded. The collector of the third NPN transistor is electrically connected to the first terminal of the tenth resistor. The second terminal of the tenth resistor, the first terminal of the eleventh resistor, and the base of the first PNP transistor are all electrically connected to the fifth node. The second terminal of the eleventh resistor and the emitter of the first PNP transistor are both subject to a system voltage. The collector of the first PNP transistor and the first terminal of the twelfth resistor are both electrically connected to the sixth node. The sixth node is configured to output a reset signal or a non-reset signal, and the second terminal of the twelfth resistor is grounded; the ninth resistor is configured to control the third NPN transistor to enter the conducting state in response to the current flowing through the button being greater than or equal to a preset current threshold, so that the system voltage forms a loop through the eleventh resistor, the tenth resistor, and the third NPN transistor to control the first PNP transistor to enter the conducting state; the first PNP transistor is configured to pull the system voltage to the sixth node in the conducting state, so that the sixth node outputs a high-level reset signal.

13. An electronic device, characterized in that, Includes the button cleaning circuit as described in any one of claims 1 to 12.

Images