Membrane-based microelectromechanical system (MEMS) devices and methods of making

Abstract

The application relates to the technical field of semiconductors, and discloses a MEMS device and a preparation method thereof. The preparation method of the MEMS device comprises the following steps: providing a semiconductor wafer, wherein the semiconductor wafer at least comprises a substrate layer and a device layer with primary initial doping formed on the substrate layer; etching the device layer to form a first resonator and a temperature measurement structure in the device layer; forming a sacrificial layer covering the temperature measurement structure on the device layer; and after the first resonator on the device layer is subjected to secondary re-doping, the sacrificial layer is removed to obtain the first resonator with a low-frequency temperature coefficient and the temperature measurement structure with high sensitivity. The application improves the stability of the MEMS device.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a MEMS device and its fabrication method. Background Technology

[0002] Micro-Electro-Mechanical Systems (MEMS) devices (such as MEMS resonators, gyroscopes, accelerometers, and pressure sensors) are highly sensitive to changes in ambient temperature during operation. Taking resonators as an example, the resonant frequency of a MEMS resonator typically drifts with changes in ambient temperature, severely affecting the frequency stability and measurement accuracy of the device. Therefore, frequency drift caused by temperature changes is one of the main challenges faced by MEMS resonators.

[0003] In related technologies, reducing the impact of temperature on MEMS resonators can be achieved through either passive compensation, which modifies the temperature coefficient of frequency (TCF) of the silicon material in the resonator to make the TCF flatter, or active compensation, which integrates a temperature sensing structure on the same MEMS resonator chip to measure the chip temperature in real time and uses external circuitry to compensate for the resonator's frequency drift. However, how to combine active and passive compensation to simultaneously obtain a resonator with a low TCF and a high-sensitivity temperature sensor on the same MEMS device remains a pressing problem in current MEMS device temperature compensation technology. Summary of the Invention

[0004] In view of this, this application provides a MEMS device and a method for fabricating the same, in order to solve the aforementioned technical problems.

[0005] In a first aspect, embodiments of this application disclose a method for fabricating a MEMS device, including: A semiconductor wafer is provided, the semiconductor wafer comprising at least a substrate layer and a device layer having a primary initial doping formed on the substrate layer; The device layer is etched to form a first resonator and a temperature sensing structure in the device layer; A sacrificial layer covering the temperature sensing structure is formed on the device layer; After the first resonator on the device layer is subjected to secondary heavy doping, the sacrificial layer is removed to obtain the first resonator with a low frequency temperature coefficient and the temperature sensing structure with high sensitivity.

[0006] In one possible example, the top surface of the substrate layer has multiple cavity structures formed, or, The semiconductor wafer further includes a connection layer formed between the substrate layer and the device layer, and the cavity structure is formed on the connection layer.

[0007] In one possible example, the etching of the device layer to form a first resonator and a temperature sensing structure in the device layer includes: The device layer is etched using a deep reactive ion etching process, and the first resonator and the temperature sensing structure are simultaneously formed on the device layer; the temperature sensing structure includes a second resonator or a resistance strip.

[0008] In one possible example, forming a sacrificial layer covering the temperature sensing structure on the device layer includes: Sacrificial material is deposited in the temperature-sensing structure region of the device layer, or photoresist is coated in the temperature-sensing structure region of the device layer.

[0009] In one possible example, the first resonator is re-doped using a solid-state diffusion source or ion implantation.

[0010] In one possible example, the secondary heavy doping of the first resonator using the solid-state diffusion source includes: Phosphosilicate glass or borosilicate glass is deposited on the entire semiconductor wafer using chemical vapor deposition. High-temperature diffusion annealing is used to allow doped ions to diffuse from the phosphosilicate glass or borosilicate glass into the outer surface and sidewalls of the first resonator to form a heavily doped region.

[0011] In one possible example, the removal of the sacrificial layer includes: wet etching of the sacrificial layer using a hydrogen fluoride solution, or removal of the sacrificial layer using plasma.

[0012] In one possible example, after etching the device layer, the cavity structure divides the connection layer into a plurality of spaced-apart anchor points; the first resonator includes spaced-apart electrodes and oscillators, and each anchor point is connected to the corresponding electrode and the oscillator.

[0013] In one possible example, when the temperature sensing structure includes resistance strips, the resistance strips are arranged in a spiral structure on the substrate.

[0014] Secondly, this application discloses a MEMS device, which is fabricated by the MEMS device fabrication method described in any of the above embodiments.

[0015] In summary, compared with the prior art, this application discloses a MEMS device and its fabrication method. The MEMS device fabrication method includes: providing a semiconductor wafer, the semiconductor wafer including at least a substrate layer and a device layer with primary initial doping formed on the substrate layer; etching the device layer to form a first resonator and a temperature sensing structure in the device layer; forming a sacrificial layer covering the temperature sensing structure on the device layer; performing secondary heavy doping on the first resonator on the device layer, and removing the sacrificial layer to obtain a first resonator with a low-frequency temperature coefficient (TCF) and a high-sensitivity temperature sensing structure. That is, through the above settings, the first resonator and the temperature sensing structure are simultaneously etched in the device layer with primary initial doping, and the temperature sensing structure is selectively protected by the sacrificial layer, and only the first resonator is subjected to secondary heavy doping, thereby simultaneously realizing a first resonator with a low-frequency temperature coefficient (TCF) and a high-sensitivity temperature sensing structure on the same MEMS chip. It effectively balances the needs of passive and active compensation, reduces the frequency temperature drift of the main resonator, and retains the high temperature sensitivity of the temperature measurement structure, providing a reliable guarantee for accurate frequency compensation and significantly improving the frequency stability of MEMS devices across the entire temperature range. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of the MEMS device fabrication method of this application; Figure 2 This is a schematic diagram of the structure of the first MEMS device in this application during the fabrication process; Figure 3 This is a schematic diagram of the structure of the second type of MEMS device in the fabrication process of this application; Figure 4 This is a schematic diagram of the fabrication process of the third type of MEMS device in this application; Figure 5 This is a schematic diagram of the fourth type of MEMS device in the fabrication process of this application; Figure 6 This is a schematic diagram of the structure of the fifth type of MEMS device in this application during the fabrication process; Figure 7 This is a three-dimensional structural schematic diagram of a MEMS device according to this application. Detailed Implementation

[0018] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the claims.

[0019] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0020] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0021] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0022] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0023] The technical solutions shown in this application will be described in detail below through specific embodiments. It should be noted that the order of description of the following embodiments is not intended to limit the priority of the embodiments.

[0024] Please refer to Figure 1 The MEMS device fabrication method in this application includes: S101, a semiconductor wafer is provided, the semiconductor wafer including at least a substrate layer and a device layer having a primary initial doping formed on the substrate layer; S102, Etch the device layer to form the first resonator and temperature sensing structure in the device layer; S103, a sacrificial layer covering the temperature sensing structure is formed on the device layer; S104, after the first resonator on the device layer is re-doped twice, the sacrificial layer is removed to obtain a first resonator with a low frequency temperature coefficient and a high-sensitivity temperature measurement structure.

[0025] Therefore, in this embodiment, the first resonator and the temperature sensing structure are simultaneously etched in the device layer after initial doping. A sacrificial layer is used to selectively protect the temperature sensing structure, and only the first resonator is subjected to secondary heavy doping. This allows for the simultaneous realization of a low-frequency temperature coefficient (TCF) first resonator and a high-sensitivity temperature sensing structure on the same MEMS chip. This effectively balances the needs of passive and active compensation, reduces the frequency-temperature drift of the main resonator, and retains the high temperature sensitivity of the temperature sensing structure, providing a reliable guarantee for accurate frequency compensation and significantly improving the frequency stability of the MEMS device across the entire temperature range.

[0026] The following continues... Figures 2 to 7 The specific steps for fabricating MEMS devices according to the embodiments of this application are described.

[0027] refer to Figure 2 A semiconductor wafer 1 is provided, the semiconductor wafer 1 including at least a substrate layer 11 and a device layer 12 having a primary initial doping formed on the substrate layer 11.

[0028] In specific implementation, the semiconductor wafer 1 includes at least a substrate layer 11 and a device layer 12 stacked from bottom to top. The substrate layer 11 is used to provide overall mechanical support, and the device layer 12 is used to subsequently form micromechanical structures such as the first resonator and temperature sensing structure.

[0029] The device layer 12 has a primary initial doping. In this embodiment, the primary initial doping is a light doping, such as phosphorus doping or boron doping, with a resistivity range of 10~20 Ω·cm, used to control the basic electrical properties of the silicon material.

[0030] Optionally, a plurality of cavity structures are formed on the top surface of the substrate layer 11. The device layer 12 covers the substrate layer 11 and is disposed opposite to the cavity structures. The cavity structures provide vibration space for the resonator subsequently formed.

[0031] Optionally, the semiconductor wafer 1 may further include a connection layer 13 formed between the substrate layer 11 and the device layer 12. The connection layer 13 is preferably an insulating layer, such as a silicon dioxide layer. A cavity structure is formed on the connection layer 13, i.e., a cavity pattern is etched into the connection layer 13, or a cavity is formed between the connection layer 13 and the device layer 12. The device layer 12 is located above the connection layer 13, and the cavity structure provides space for the vibration of the resonator.

[0032] It is understood that the cavity structure can be formed by etching the substrate layer 11 or the interconnect layer 13 and then bonding the device layer 12, or it can be directly obtained using a cavity silicon-on-insulator (CSOI) wafer. Both of the above structural forms are applicable to the manufacturing method of this embodiment.

[0033] refer to Figure 3 and Figure 4 The device layer 12 is etched to form the first resonator 2 and the temperature sensing structure 3. That is, after the semiconductor wafer 1 is fabricated, the device layer 12 is patterned and etched to form the first resonator 2 and the temperature sensing structure 3.

[0034] Preferably, a deep reactive ion etching (DRIE) process is used to anisotropically etch the device layer 12. Based on a pre-defined mask pattern, the three-dimensional structures of the first resonator 2 and the temperature sensing structure 3 are simultaneously etched. Both the first resonator 2 and the temperature sensing structure 3 are formed from the same device layer 12 through a single etching process, therefore they have the same initial doping concentration (i.e., initial doping).

[0035] The temperature measuring structure 3 includes a second resonator 3a or a resistance bar 3b.

[0036] When the temperature sensing structure 3 is the second resonator, the second resonator 3a and the first resonator 2 are formed by etching the same device layer 12 in one step, and both have the same initial light doping concentration. In order to achieve accurate temperature measurement and avoid frequency interference with the first resonator 2, the operating frequency of the second resonator 3a is designed to be different from the operating frequency of the first resonator 2.

[0037] Continue to combine Figure 7 When the temperature sensing structure 3 is a resistor strip 3b, to improve temperature sensing sensitivity and fully utilize the chip area, the resistor strip 3b is arranged in a spiral structure on the substrate layer 11. Specifically, when the device layer 12 is patterned using deep reactive ion etching (DRIE), the spiral pattern of the resistor strip 3b is formed simultaneously. The spiral structure can be a square spiral, a circular spiral, or a hexagonal spiral, and the number of spiral turns is determined according to the required resistance value and chip area. In this embodiment, the resistor strip 3b is a square spiral structure, which wraps around the chip layer from the outside in, maintaining a uniform gap between adjacent turns.

[0038] Since the resistor strip 3b and the first resonator 2 are formed by etching the same device layer 12 in a single step, they both have the same initial light doping concentration (e.g., resistivity 10~20 Ω·cm). This lightly doped silicon material has a high temperature coefficient of resistance (TCR), typically reaching 1000~2000 ppm / K. Simultaneously, the spiral structure design allows for a longer resistance length (e.g., several millimeters to several centimeters) within a limited chip area, further increasing the absolute resistance value and temperature response signal of the resistor strip 3b, facilitating subsequent circuit detection.

[0039] It should be noted that the two ends of the resistor strip 3b may be provided with metal lead pads for electrical connection with external circuits.

[0040] Continue to refer to Figure 4 A sacrificial layer 4 covering the temperature sensing structure 3 is formed on the device layer 12.

[0041] In the specific implementation process, after the etching of device layer 12 is completed and the first resonator 2 and temperature sensing structure 3 are formed, a sacrificial layer 4 covering temperature sensing structure 3 is formed on device layer 12 to protect temperature sensing structure 3 from being doped in subsequent secondary heavy doping processes.

[0042] Specifically, forming the sacrificial layer 4 involves depositing a sacrificial material. That is, a layer of sacrificial material is deposited on the device layer 12. The sacrificial material can be selected from silicon dioxide, silicon nitride, or other materials that can be selectively etched. After deposition, the sacrificial material above the region of the first resonator 2 is removed by photolithography and etching processes, leaving only the sacrificial layer 4 covering the temperature sensing structure 3. In this embodiment, plasma-enhanced chemical vapor deposition (PECVD) is preferably used to deposit silicon dioxide as the sacrificial layer to ensure sufficient barrier effect during subsequent doping processes.

[0043] In another example, forming the sacrificial layer 4 involves coating with photoresist. Specifically, a layer of photoresist (such as positive or negative photoresist) is coated onto the device layer 12 using a spin-coating process. The photoresist in the region of the first resonator 2 is removed through exposure and development processes, leaving only the photoresist layer covering the temperature sensing structure 3 as the sacrificial layer 4.

[0044] refer to Figure 5 and Figure 6 After the first resonator 2 on the device layer 12 is subjected to secondary heavy doping, the sacrificial layer 4 is removed to obtain the first resonator 2 with a low frequency temperature coefficient and the temperature measurement structure 3 with high sensitivity.

[0045] In the specific implementation process, after forming the sacrificial layer 4 covering the temperature sensing structure 3, the exposed first resonator 2 undergoes a secondary heavy doping treatment to reduce its temperature coefficient of frequency (TCF). Meanwhile, the temperature sensing structure 3, covered by the sacrificial layer 4, retains its initial doping concentration. Thus, a low-TCF first resonator and a high-sensitivity temperature sensing structure are simultaneously realized on the same MEMS chip. This effectively balances the needs of passive and active compensation, reduces the frequency-temperature drift of the main resonator, and retains the high temperature sensitivity of the temperature sensing structure, providing a reliable guarantee for accurate frequency compensation and significantly improving the frequency stability of MEMS devices across the entire temperature range.

[0046] In one example, the first resonator 2 is re-doped using a solid-state diffusion source. Specifically, the re-doping of the first resonator 2 using a solid-state diffusion source includes depositing a layer of solid-state diffusion source on the entire semiconductor wafer 1 using a chemical vapor deposition process. The solid-state diffusion source is selected according to the required doping type: if N-type doping (such as phosphorus doping) is required, phosphosilicate glass (PSG) is deposited; if P-type doping (such as boron doping) is required, borosilicate glass (BSG) is deposited. In this example, plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD) is preferably used to deposit the PSG.

[0047] In this embodiment, since a first resonator 2 and a sacrificial layer 4 covering the temperature sensing structure 3 have already been formed on the semiconductor wafer 1, the deposited PSG layer simultaneously covers the exposed surface of the first resonator 2 (including the upper surface and the etched sidewalls) and the upper surface of the sacrificial layer 4. The presence of the sacrificial layer 4 prevents the PSG from directly contacting the temperature sensing structure 3.

[0048] Furthermore, the semiconductor wafer 1 with deposited phosphosilicate glass or borosilicate glass is placed in a high-temperature diffusion furnace for annealing. Under high-temperature conditions, doped ions diffuse from the phosphosilicate glass or borosilicate glass into the outer surface and sidewalls of the first resonator 2 to form a heavily doped region 2a.

[0049] Taking PSG as an example, during the annealing process, the phosphorus in PSG gains sufficient energy to diffuse out of PSG and into the exposed silicon region in direct contact with it. Since the upper surface and sidewalls of the first resonator 2 are not shielded, the doped ions not only diffuse vertically from the top but also diffuse laterally from the sidewalls, thereby forming a uniform and highly concentrated heavily doped region 2a inside the first resonator 2.

[0050] In contrast, because the temperature sensing structure 3 is completely covered by the sacrificial layer 4, phosphorus atoms in the PSG cannot penetrate the sacrificial layer 4 to enter the interior of the temperature sensing structure 3. Therefore, during the diffusion annealing process, the doping concentration of the temperature sensing structure 3 remains at the initial light doping level and is unaffected.

[0051] In another example, the first resonator 2 is re-doped using ion implantation. Specifically, after forming the sacrificial layer 4 covering the temperature sensing structure 3, ion implantation is performed on the first resonator 2. Since ion implantation is directional (usually perpendicular or at a small angle), and the temperature sensing structure 3 is already covered by the sacrificial layer 4, the sacrificial layer 4 itself can act as a barrier layer for ion implantation. An ion implanter is used to perform doping ion implantation on the semiconductor wafer 1. The ion source is selected according to the desired doping type; if N-type doping is required, phosphorus ions or arsenic ions are selected; if P-type doping is required, boron ions or boron difluoride ions are selected. During ion implantation, high-energy dopant ions penetrate the surface of the first resonator 2 and are implanted into the silicon lattice, forming a heavily doped region 2a.

[0052] Furthermore, after ion implantation, the dopant ions are located in the interstitial positions of the silicon lattice and are in a non-electrically activated state; ion bombardment can also damage the lattice. Therefore, annealing is performed to repair lattice damage and activate the dopant ions.

[0053] In one example, removing the sacrificial layer 4 includes: wet etching of the sacrificial layer 4 using a hydrogen fluoride solution, or removing the sacrificial layer 4 using plasma.

[0054] Specifically, after completing the secondary heavy doping of the first resonator 2, the sacrificial layer 4 covering the temperature sensing structure 3 needs to be removed to expose the temperature sensing structure 3 so that it can be used for subsequent temperature detection.

[0055] When the sacrificial layer 4 is silicon dioxide, wet etching can be performed using a hydrogen fluoride (HF)-based solution. Specifically, the semiconductor wafer 1, after secondary heavy doping, is immersed in diluted hydrofluoric acid or buffered hydrofluoric acid for several seconds to several minutes until the sacrificial layer 4 is completely removed. Hydrogen fluoride solution exhibits highly selective etching ability towards silicon dioxide, while showing almost no corrosion towards silicon (the material of the first resonator 2 and the temperature sensing structure 3). Therefore, the sacrificial layer 4 can be safely removed without damaging the resonator structure.

[0056] When the sacrificial layer 4 is photoresist or an organic material, it is removed using a plasma ashing process. Specifically, the semiconductor wafer 1 is placed in a plasma photoresist remover, and oxygen or a mixture of oxygen and nitrogen is introduced. Oxygen plasma is generated under RF power excitation. The reactive oxygen radicals in the oxygen plasma react with the hydrocarbons in the photoresist to produce gaseous products such as carbon dioxide and water vapor, thereby completely removing the sacrificial layer 4.

[0057] Regardless of the removal method used, after removing the sacrificial layer 4, the temperature sensing structure 3 is completely released, and its surface and sidewalls are not affected by secondary heavy doping, maintaining the initial light doping level. At this point, the first resonator 2 has completed heavy doping and naturally has a low TCF, while the temperature sensing structure 3 still maintains high sensitivity.

[0058] It should be noted that, in the above embodiments, after etching the device layer 12, the cavity structure segmentation connection layer 13 consists of several anchor points arranged at intervals.

[0059] Furthermore, the first resonator 2 includes electrodes and oscillators arranged at intervals, with each anchor point corresponding to an electrode and an oscillator.

[0060] In this embodiment, after etching the device layer 12 to form the first resonator 2 and the temperature sensing structure 3, since there is a cavity structure below the device layer 12 (whether formed on the top surface of the substrate layer 11 or in the connection layer 13), the cavity structure divides the connection layer 13 into several spaced anchor points.

[0061] When the semiconductor wafer 1 includes a connection layer 13 (e.g., a silicon dioxide insulating layer) and a cavity structure is formed on the connection layer 13, the connection layer 13 is completely removed in the cavity region by deep reactive ion etching (DRIE) through the device layer 12 and exposing the cavity region, leaving only the unetched areas. These remaining portions of the connection layer 13 form multiple discrete anchor points, each anchor point corresponding to the structure of the upper device layer 12, for supporting and fixing resonators, electrodes, etc.

[0062] In a further example, the first resonator 2 includes spaced-apart electrodes and oscillators. The first resonator 2 consists of at least one oscillator and multiple electrodes. The oscillator is a movable mass block used to generate mechanical vibration; the electrodes include driving electrodes and sensing electrodes, forming a capacitive gap with the oscillator. Both the oscillator and electrodes are fixedly connected to the substrate layer 11 via anchor points below. Each anchor point is connected to a corresponding electrode or oscillator, ensuring that the oscillator can vibrate freely in a certain direction. Through this anchor point design, the various components of the first resonator 2 (electrodes and oscillators) are independently and stably supported on the substrate, while cooperating with the cavity structure to provide sufficient vibration space for the oscillator and avoid contact with the substrate. Similarly, the temperature sensing structure 3 (second resonator 3a) can also be fixed and supported via corresponding anchor points.

[0063] It should be noted that the spacing between the electrodes and the oscillator, as well as the number and position of the anchoring points, can be adjusted according to the specific design of the resonator, and this embodiment is not strictly limited. The above structure enables the first resonator 2 to operate normally and obtain low TCF characteristics through secondary heavy doping, while the temperature sensing structure 3 maintains high sensitivity.

[0064] In summary, this application achieves monolithic integration of a low-frequency temperature coefficient (TCF) main resonator and a high-sensitivity temperature sensor by simultaneously etching a first resonator 2 and a temperature sensing structure 3 in the device layer 12 of the same semiconductor wafer 1, and selectively protecting the temperature sensing structure 3 with a sacrificial layer 4, while only performing secondary heavy doping on the first resonator 2. This method, on the one hand, flattens the TCF of the main resonator (approaching 0 ppm / K), significantly reducing its frequency drift with temperature; on the other hand, the temperature sensing structure 3 retains its initial light doping, thus preserving a high TCF (if it is the second resonator 3a) or a high resistance temperature coefficient (if it is the resistor strip 3b), enabling precise sensing of minute temperature changes. The integration of these two components eliminates the temperature gradient between the external temperature sensing element and the main resonator, reducing the system TCF to within ±1 ppm / ℃. This provides a reliable guarantee for accurate frequency compensation and significantly improves the frequency stability of MEMS devices across the entire temperature range.

[0065] This application also discloses a MEMS device, which is fabricated by the MEMS device fabrication method of any of the above embodiments. For other working principles and processes of the MEMS device in this embodiment, please refer to the foregoing description of the MEMS device fabrication method in this embodiment, which will not be repeated here.

[0066] The foregoing has provided a detailed description of the MEMS devices and their fabrication methods provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. It should be noted that the descriptions of each embodiment in this application have different focuses; parts not described in detail or in a particular embodiment can be referred to in the relevant descriptions of other embodiments.

[0067] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. The technical features of the technical solution of this application can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are also included within the patent protection scope of this application, as long as the combination of these technical features does not contradict each other.

[0068] The present application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only for the purpose of helping to understand the core ideas of the present application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present application. Therefore, the content of this specification should not be construed as a limitation of the present application.

Claims

1. A method for fabricating a MEMS device, characterized in that, include: A semiconductor wafer is provided, the semiconductor wafer comprising at least a substrate layer and a device layer having a primary initial doping formed on the substrate layer; The device layer is etched to form a first resonator and a temperature sensing structure in the device layer; A sacrificial layer covering the temperature sensing structure is formed on the device layer; After the first resonator on the device layer is subjected to secondary heavy doping, the sacrificial layer is removed to obtain the first resonator with a low frequency temperature coefficient and the temperature sensing structure with high sensitivity.

2. The MEMS device fabrication method according to claim 1, characterized in that, The top surface of the substrate layer has multiple cavity structures, or, The semiconductor wafer further includes a connection layer formed between the substrate layer and the device layer, and the cavity structure is formed on the connection layer.

3. The MEMS device fabrication method as described in claim 1, characterized in that, The etching of the device layer to form a first resonator and a temperature sensing structure in the device layer includes: The device layer is etched using a deep reactive ion etching process, and the first resonator and the temperature sensing structure are simultaneously formed on the device layer; the temperature sensing structure includes a second resonator or a resistance strip.

4. The MEMS device fabrication method according to claim 1, characterized in that, The formation of a sacrificial layer covering the temperature sensing structure on the device layer includes: Sacrificial material is deposited in the temperature-sensing structure region of the device layer, or photoresist is coated in the temperature-sensing structure region of the device layer.

5. The MEMS device fabrication method according to claim 1, characterized in that, The first resonator is subjected to secondary heavy doping using a solid-state diffusion source or ion implantation.

6. The MEMS device fabrication method as described in claim 5, characterized in that, The method of using the solid-state diffusion source to perform secondary heavy doping on the first resonator includes: Phosphosilicate glass or borosilicate glass is deposited on the entire semiconductor wafer using chemical vapor deposition. High-temperature diffusion annealing is used to allow doped ions to diffuse from the phosphosilicate glass or borosilicate glass into the outer surface and sidewalls of the first resonator to form a heavily doped region.

7. The MEMS device fabrication method according to claim 1, characterized in that, The removal of the sacrificial layer includes: wet etching of the sacrificial layer using a hydrogen fluoride solution, or removal of the sacrificial layer using plasma.

8. The MEMS device fabrication method as described in claim 2, characterized in that, After etching the device layer, the cavity structure divides the connection layer into a plurality of spaced anchor points; the first resonator includes spaced electrodes and oscillators, and each anchor point is connected to the corresponding electrode and the oscillator.

9. The MEMS device fabrication method according to claim 3, characterized in that, When the temperature measuring structure includes resistance strips, the resistance strips are arranged in a spiral structure on the substrate layer.

10. A MEMS device, characterized in that, The MEMS device is fabricated by the MEMS device fabrication method according to any one of claims 1 to 9.

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