Controllable aperture composite solid-state nanopore electrochemical etching method and device

Abstract

The application discloses a kind of aperture controllable composite solid-state nanopore electrochemical etching method, first to single crystal silicon wafer is pretreated, both sides deposit silicon nitride mask and open microscale window by photolithography.Silicon wafer is sealed and clamped in double-chamber mold, inject potassium hydroxide solution and delay etching, rely on crystal face self-limiting formation high-curvature inverted pyramid cone tip.Change etching liquid and conductive liquid, access electrochemical control loop with relay, turn on circuit after stabilizing voltage, directional electrochemical breakdown etching at cone tip, controllable generation 5~20nm straight pipe blind hole.Subsequently switch reagent from back thinning silicon substrate, monitor loop current in real time by means of electrometer, when current is suddenly increased from picoampere level to nanoampere level, etching is terminated.The method can control aperture size by electric parameter and etching process, and can prepare taper-straight pipe composite structure nanopore, and process is stable and controllable, and finished product aperture precision is high.

Description

Technical Field

[0001] This invention relates to the field of gene detection equipment technology, and in particular to a composite solid-state nanopore electrochemical etching method and device with controllable pore size. Background Technology

[0002] Solid-state nanopores, as core sensing elements in single-molecule sequencing and biomolecule detection, have attracted much attention due to their label-free, high-throughput, and size-tunable characteristics. However, their commercialization requires simultaneous achievement of sub-10-nanometer pore size, high capture rate and long residence time, as well as low-cost manufacturing, all of which current mainstream technologies cannot simultaneously achieve. At present, the preparation of high-precision solid-state nanopores in the laboratory relies heavily on high-energy physical beam drilling techniques such as focused ion beam (FIB). Although these methods offer extremely high precision, the equipment costs can easily reach millions or tens of millions of dollars, and each pore must be processed individually, which is extremely time-consuming and completely impractical for wafer-level mass production.

[0003] To reduce costs, the industry has attempted to use anisotropic pure wet etching or flat-film dielectric breakdown techniques on silicon-based materials, but both have encountered serious bottlenecks in precision and performance. Pure chemical reactions lack precise in-situ termination methods at the nanoscale, making them prone to irreversible "over-etching," leading to uncontrolled pore size. Furthermore, simple wet etching cannot naturally form complex channel structures that are both conducive to electric field focusing and possess steric hindrance length. On the other hand, traditional electrical breakdown research has mostly focused on ultrathin silicon nitride flat films. Due to the uniform surface electric field distribution, the breakdown location is highly random, and the formed channels are mostly extremely thin straight pores, lacking the ability to focus and capture target molecules, resulting in low signal-to-noise ratios in sequencing. In summary, existing solid-state nanopore fabrication technologies face irreconcilable technical contradictions between 'high precision and low cost' and 'low cost and high performance,' thus restricting their large-scale commercial application. Therefore, there is an urgent need in this field to develop a novel process route that can achieve high-yield, low-cost, and high-performance composite nanopore fabrication without relying on expensive high-energy beam equipment. Summary of the Invention

[0004] To address the aforementioned shortcomings, the present invention aims to propose a composite solid-state nanopore electrochemical etching method with controllable pore size to solve the above problems.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] A composite solid-state nanopore electrochemical etching method with controllable pore size includes the following steps:

[0007] S100, substrate pretreatment, select a single crystal silicon wafer, and deposit a silicon nitride mask layer on both sides; use double-sided photolithography to prepare a square window in the center of the back side and open a micron-level square window at the corresponding position on the front side;

[0008] S200, front-side KOH pre-etching: The single crystal silicon wafer obtained in step S100 is sealed and clamped in a double-chamber mold in one go; KOH solution is injected into the front-side etching tank for 10%~15% delayed etching; the self-limiting characteristics of crystal surface etching are used to eliminate the micro-flat bottom of the hole and form a high-curvature inverted pyramid cone tip.

[0009] S300, electrochemical breakdown: the KOH solution in the front etching tank of the single crystal silicon wafer is drained and cleaned in situ; a mixed etching solution containing hydrofluoric acid is injected into the front etching tank; a conductive liquid is injected into the back etching tank and an excitation electrode is inserted; a relay control module is connected in series in the electrochemical control circuit; the DC power supply is turned on first, and after the output voltage stabilizes, the circuit is closed through the relay to eliminate transient errors during the voltage rise period; a constant breakdown voltage is applied at the tip of the inverted pyramid and the relay conduction time is controlled; utilizing the positive correlation between voltage and final aperture, directional etching is performed along the vertical direction to form nano-straight tube blind holes with a diameter of 5~20nm;

[0010] S400: Thinning is performed on the back side to form a hole. While maintaining the clamping state, the liquid in the dual chamber is emptied in situ and cleaned. KOH solution is injected into the back side to thin the silicon layer. Probe conductive liquid is injected into the front side etching tank. An electrochemical control loop is connected to an electrometer and a constant detection voltage is applied. The loop current is monitored in real time during the back side thinning process. When the electrometer detects a sudden change in leakage current from the picoampere level to the nanoampere level, the liquid is immediately emptied and cleaned to stop the etching reaction, thus obtaining a solid nanopore with a conical-straight tube composite spatial geometry.

[0011] Preferably, in step S100, the single-crystal silicon wafer is an N-type low-doped single-crystal silicon wafer with a thickness of 100-200μm and a size of 0.5-2cm×0.5-2cm.

[0012] The mask layer is a silicon nitride layer with a front thickness of 50-200 nm and a back thickness of 200-350 nm.

[0013] Preferably, in step S100, the side length of the micron-sized square window on the front mask is 4~6μm;

[0014] The micrometer-scale square window can be a single window or an array of windows.

[0015] Preferably, in step S200, the mass fraction of the KOH solution injected into the front etching tank is 20% to 40%, and the operating temperature is room temperature to 40°C.

[0016] Preferably, in step S300, the mixed etching solution is prepared by mixing a 5% HF solution, deionized water and ethanol in a volume ratio of 1:8:3.

[0017] The conductive liquid injected into the back etching groove and the probe conductive liquid injected in step S400 are both 1 mol / L KCl solutions.

[0018] Furthermore, in step S300, after the DC power supply is turned on, the delayed closing time of the relay is more than 1 second; the constant breakdown voltage ranges from 5.0V to 20.0V; and the conduction time of the relay ranges from 5.0s to 15.0s.

[0019] Furthermore, in step S400, the mass fraction of the KOH etching solution injected into the back etching tank is 20% to 40%; the constant detection voltage ranges from 100mV to 500mV.

[0020] Furthermore, in step S400, the back-side thinning process initially employs 40°C to 60°C for heating and etching, and later switches to room temperature 25°C for monitored etching.

[0021] Furthermore, the electrochemical control circuit in step S200 includes a DC power supply module, a relay control module, a first excitation electrode, and a second excitation electrode;

[0022] The first output terminal of the DC power supply module is connected to the input terminal of the relay control module, and the output terminal of the relay control module is connected to the first excitation electrode; the second excitation electrode is connected to the second output terminal of the DC power supply module, thereby constructing a series closed loop externally.

[0023] The dual-chamber mold includes a front etching groove, a back etching groove, a front sealing gasket, and a back sealing gasket. The front etching groove and the back etching groove are respectively provided with axially opposite channel windows for conducting the power chemical reaction.

[0024] The monocrystalline silicon wafer is vertically sandwiched between the front etching groove and the back etching groove; a front sealing gasket is fitted between the front side of the monocrystalline silicon wafer and the front etching groove, and a back sealing gasket is fitted between the back side of the monocrystalline silicon wafer and the back etching groove; the monocrystalline silicon wafer, the front sealing gasket, and the back sealing gasket together divide the internal space of the dual-chamber mold into a physically blocked and fluid-isolated front etching cavity and a back etching cavity;

[0025] The first excitation electrode is mounted on the front etching groove and extends suspended into the front etching cavity; the second excitation electrode is mounted on the back etching groove and extends suspended into the back etching cavity. The first excitation electrode and the second excitation electrode are physically isolated in space and are disposed on opposite sides of the single crystal silicon wafer.

[0026] On the other hand, a solid-state nanoporous device is also proposed, which is prepared by the above method and adopts the following technical solution.

[0027] A solid-state nanoporous device prepared by the above method has a conical-straight tube composite spatial geometry, wherein the structure is composed of an upper inverted pyramidal conical segment and a lower custom-length straight tube segment.

[0028] One of the above technical solutions includes the following beneficial effects: This invention does not require expensive high-energy beam equipment. It prepares high-curvature cone tips through self-limiting delayed etching, and with the precise timing of electrochemical breakdown controlled by relays and real-time current monitoring by electrometers, it achieves precise control of 5–20 nm aperture and high yield. The entire process is completed in situ with one clamping, reducing the breakage of single-crystal silicon wafers. The resulting cone-straight tube composite nanopore has good electric field focusing effect, high molecular capture rate, long residence time, and clear detection signal. It balances low cost and high performance, which is conducive to the large-scale production of solid nanopores. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the solid-state nanopore preparation process of the present invention;

[0030] Figure 2 This is a schematic diagram of the preparation system for the electrochemical breakdown step of the present invention;

[0031] Figure 3 yes Figure 2 A schematic diagram of the clamping state of a single-crystal silicon wafer;

[0032] Figure 4 This is a schematic diagram illustrating the principle of applying the composite solid nanopore of the present invention to biomolecular sequencing;

[0033] Figure 5 This is a perforation current diagram of the composite solid nanopore of this invention applied to protein molecule sequencing;

[0034] Figure 6 These are scanning electron microscope (SEM) images of solid nanopores with different pore sizes prepared in Examples 1 to 4 of this invention;

[0035] The components include: DC power supply module 100, relay control module 200, first excitation electrode 300, second excitation electrode 400, front etching groove 600, back etching groove 700, front sealing gasket 610, back sealing gasket 710, and single crystal silicon wafer 500. Detailed Implementation

[0036] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0037] like Figure 1 As shown, the electrochemical etching method for composite solid-state nanopores with controllable pore size includes the following steps:

[0038] S100, substrate pretreatment, select a single crystal silicon wafer, and deposit a silicon nitride mask layer on both sides; use double-sided photolithography to prepare a square window in the center of the back side and open a micron-level square window at the corresponding position on the front side;

[0039] S200, front-side KOH pre-etching: The single crystal silicon wafer obtained in step S100 is sealed and clamped in a double-chamber mold in one go; KOH solution is injected into the front-side etching tank for 10%~15% delayed etching; the self-limiting characteristics of crystal surface etching are used to eliminate the micro-flat bottom of the hole and form a high-curvature inverted pyramid cone tip.

[0040] S300, electrochemical breakdown: the KOH solution in the front etching tank of the single crystal silicon wafer is drained and cleaned in situ; a mixed etching solution containing hydrofluoric acid is injected into the front etching tank; a conductive liquid is injected into the back etching tank and an excitation electrode is inserted; a relay control module is connected in series in the electrochemical control circuit; the DC power supply is turned on first, and after the output voltage stabilizes, the circuit is closed through the relay to eliminate transient errors during the voltage rise period; a constant breakdown voltage is applied at the tip of the inverted pyramid and the relay conduction time is controlled; utilizing the positive correlation between voltage and final aperture, directional etching is performed along the vertical direction to form nano-straight tube blind holes with a diameter of 5~20nm;

[0041] S400: Thinning is performed on the back side to form a hole. While maintaining the clamping state, the liquid in the dual chamber is emptied in situ and cleaned. KOH solution is injected into the back side to thin the silicon layer. Probe conductive liquid is injected into the front side etching tank. An electrochemical control loop is connected to an electrometer and a constant detection voltage is applied. The loop current is monitored in real time during the back side thinning process. When the electrometer detects a sudden change in leakage current from the picoampere level to the nanoampere level, the liquid is immediately emptied and cleaned to stop the etching reaction, thus obtaining a solid nanopore with a conical-straight tube composite spatial geometry.

[0042] This invention eliminates the need for expensive high-energy beam equipment. It prepares high-curvature cone tips through self-limiting delayed etching, combined with electrochemical breakdown controlled by relays and real-time current monitoring by an electrometer. This achieves precise control of 5–20 nm apertures with high yield. The entire process is completed in situ in a single clamping operation, reducing damage to single-crystal silicon wafers. The resulting cone-straight tube composite nanopore structure exhibits good electric field focusing effect, high molecular capture rate, long residence time, and clear detection signal. It balances low cost and high performance, which is conducive to the large-scale production of solid-state nanopores.

[0043] In step S100, the single-crystal silicon wafer is an N-type low-doped single-crystal silicon wafer with a thickness of 100-200μm and a size of 0.5-2cm×0.5-2cm.

[0044] The mask layer is a silicon nitride layer with a front thickness of 50-200 nm and a back thickness of 200-350 nm.

[0045] The front mask serves only as a window mask for anisotropic etching. Limited to 50-200nm, after the silicon wafer is completely etched into a cone shape, the elasticity and micro-stress of the film itself can be used to stably maintain the "inverted cone" geometric boundary on the front side, and provide a stable electric field lateral boundary for the subsequent growth of blind via straight sections;

[0046] In steps S200 and S300, the back mask layer must withstand the external environment for an extended period. Particularly in step S400, the back etching trench requires KOH injection for large-scale silicon thinning. Thickening the back mask to 200-350 nm generates a sufficient loss layer, ensuring that the back mask does not experience localized perforation due to gradual wear throughout the entire thinning monitoring cycle. This maintains the process window, prevents parasitic etching in non-window areas on the back, and guarantees high dimensional reproducibility of the final solid-state nanopores.

[0047] In step S100, the side length of the micron-sized square window on the front mask is 4~6μm;

[0048] The micrometer-scale square window can be a single window or an array of windows.

[0049] Micrometer-scale square windows of 4–6 μm, combined with the anisotropic etching pattern of silicon crystal surfaces, can form micrometer-scale inverted conical entrances with a moderate depth-to-aperture ratio (depth approximately 2.8–4.2 μm). If the window is too large, the volume of the conical entrance and the dead volume will be too large, which will not only reduce the mechanical stability of the thin film structure, but also increase the diffusion resistance of the target molecules and the difficulty of entering the nanopores. If the window is too small, it will be limited by the photolithography precision and will not be conducive to the subsequent penetration of macroscopic solutions and the effective focusing of microscopic electric fields. This size achieves the best balance between providing good molecular conduction and maintaining the mechanical strength of the device; at the same time, the array window design greatly improves the device fabrication density on a single silicon wafer, which is conducive to realizing high-throughput parallel detection.

[0050] In step S200, the mass fraction of the KOH solution injected into the front etching tank is 20% to 40%, and the working temperature is room temperature to 40°C.

[0051] The core purpose of using a low-concentration KOH solution (20%–40%) and etching at a low temperature of room to 40°C is to actively reduce the etching rate, allowing sufficient time tolerance for process control. Under this specific mild chemical environment, the etching solution can smoothly etch downwards along the crystal plane angles of the silicon wafer until the four bevels naturally converge into a sharp V-shaped cone with no flat bottom residue, providing a perfect electric field focusing point for the next step of electrical breakdown. Furthermore, the low temperature effectively suppresses the chemical erosion of the front-side silicon nitride protective film by the strong alkaline solution, ensuring the integrity of the mask.

[0052] In step S300, the mixed etching solution is prepared by mixing 5% HF solution, deionized water and ethanol in a volume ratio of 1:8:3.

[0053] The conductive liquid injected into the back etching groove and the probe conductive liquid injected in step S400 are both 1 mol / L KCl solutions.

[0054] In step S300, a mixed etching solution with added ethanol is used, which significantly reduces the surface tension of the solution, allowing the etching solution to smoothly penetrate and fully wet the bottom of the deep V-shaped high-curvature micron-tip with strong hydrophobicity, thereby ensuring the electrochemical breakdown reaction. Uniformity and continuity at the tip. The back-side conductive liquid and probe conductive liquid are selected from 1 mol / L KCl solution, which possesses excellent conductivity and stable ion migration characteristics. This not only provides a sufficient conductive network during the breakdown stage but also conducts weak transient currents from picoamperes to nanoamperes without attenuation during the S400 detection stage, greatly reducing background noise and ensuring high sensitivity and high signal-to-noise ratio of the electrometer.

[0055] In step S300, after the DC power supply is turned on, the delayed closing time of the relay is more than 1 second; the constant breakdown voltage ranges from 5.0V to 20.0V; and the conduction time of the relay ranges from 5.0s to 15.0s.

[0056] The relay's closing delay of more than 1 second effectively avoids voltage rise and surge overshoot during DC power-on, ensuring an absolutely smooth and stable initial voltage applied to the fragile cone tip, preventing lateral aperture cracking or loss of control due to transient high voltage. A constant breakdown voltage of 5.0V to 20.0V combined with a conduction duration of 5.0s to 15.0s constitutes a precise energy input control window: the breakdown voltage determines the lateral aperture expansion driving force of avalanche breakdown, while the conduction duration limits the growth depth of the longitudinal blind via and the sidewall reaction time. The two work together to precisely lock the size of the blind via within the 5~20nm nanometer range, avoiding over-etching.

[0057] In step S400, the mass fraction of KOH etching solution injected into the back etching tank is 20% to 40%; the constant detection voltage ranges from 100mV to 500mV.

[0058] Using a 20%–40% KOH etching solution during the back-side thinning process provides a stable and isotropic substrate removal rate, ensuring a smooth progress of large-area back-side etching interfaces. A constant probe voltage of 100mV–500mV has been carefully selected: this bias voltage is both large enough to neutralize ambient electrical noise and to generate a nanoampere-level characteristic leakage current signal easily captured by an electrometer at the moment the aperture is connected; and small enough to completely avoid secondary electrochemical breakdown or Joule thermal expansion at the fragile moment when the aperture is just physically connected, perfectly protecting the newly formed nanoscale initial aperture from damage.

[0059] In step S400, the back-side thinning process initially uses 40°C to 60°C for heating and etching, and later switches to room temperature 25°C for monitored etching.

[0060] A two-stage temperature-controlled thinning strategy, employing "high-temperature rapid etching followed by room-temperature monitoring," perfectly balances production efficiency and extreme processing precision. The initial 40℃–60℃ high-temperature etching significantly increases the stripping speed of KOH on redundant silicon substrates hundreds of micrometers thick, substantially shortening the overall process cycle. The subsequent switch to room-temperature etching at 25℃ allows the back-side etching front to approach the bottom of the blind via at an extremely slow rate, artificially amplifying the time window for the microscopic penetration process. This provides invaluable buffer time for the electrometer to capture sudden signals, trigger the relay to cut off power, and drain the elution solution, effectively avoiding the "over-etching after breakthrough" phenomenon caused by system response delays.

[0061] like Figure 2 and Figure 3 As shown, the electrochemical control circuit in step S200 includes a DC power supply module 100, a relay control module 200, a first excitation electrode 300, and a second excitation electrode 400.

[0062] The first output terminal of the DC power module 100 is connected to the input terminal of the relay control module 200, and the output terminal of the relay control module 200 is connected to the first excitation electrode 300; the second excitation electrode 400 is connected to the second output terminal of the DC power module 100, thereby constructing a series closed loop externally.

[0063] The dual-chamber mold includes a front etching groove 600, a back etching groove 700, a front sealing gasket 610, and a back sealing gasket 710. The front etching groove 600 and the back etching groove 700 are respectively provided with axially opposite channel windows for conducting the power chemical reaction.

[0064] The monocrystalline silicon wafer 500 is vertically sandwiched between the front etching groove 600 and the back etching groove 700; a front sealing gasket 610 is attached between the front side of the monocrystalline silicon wafer and the front etching groove 600, and a back sealing gasket 710 is attached between the back side of the monocrystalline silicon wafer and the back etching groove 700; the monocrystalline silicon wafer, the front sealing gasket 610, and the back sealing gasket 710 together divide the internal space of the dual-chamber mold into a physically blocked and fluid-isolated front etching cavity and a back etching cavity;

[0065] The first excitation electrode 300 is mounted on the front etching groove 600 and extends suspended into the front etching cavity; the second excitation electrode 400 is mounted on the back etching groove 700 and extends suspended into the back etching cavity 700. The first excitation electrode 300 and the second excitation electrode 400 are physically isolated in space and are disposed on both sides of the single crystal silicon wafer 500.

[0066] A special dual-chamber mold, combined with front and back sealing gaskets, vertically clamps the monocrystalline silicon wafer, achieving absolute dual isolation between the fluid and physical space on both sides. This structure forces the electric field lines during the electrochemical reaction to pass only through the high-curvature cone tip of the front silicon wafer, achieving a high degree of electric field convergence and precise vertical downward directional etching. Simultaneously, by integrating a high-sensitivity electrometer into the electrochemical circuit, a dynamic monitoring mechanism based on leakage current abrupt changes is constructed: at the instant the back thinning precisely opens the bottom of the blind via and the solutions on both sides are physically connected, the nanoampere-level step signal captured by the electrometer can immediately serve as a reliable feedback basis for triggering power-off (such as triggering a relay) and emptying the chemical solution, largely avoiding aperture loss caused by blind over-etching.

[0067] like Figure 4 , Figure 5 and Figure 6 As shown, a solid-state nanoporous device prepared by the above method has a conical-straight tube composite spatial geometry, which is composed of an upper inverted pyramidal conical segment and a lower custom-length straight tube segment.

[0068] The inverted pyramidal section at the top of the device forms a microscopic flow-guiding opening, generating a strong electric field focusing effect. This focused electric field not only significantly reduces the overall access resistance of the device to suppress substrate noise, but also efficiently captures and pulls target molecules (such as proteins, genes, and other biomolecules) in the solution to the pore opening, thereby greatly improving the throughput and capture rate of molecules through the pore. Meanwhile, the custom-length straight tube section at the bottom provides a uniform and controlled electric field confinement domain for the analyte single molecule, effectively extending the molecule's translocation residence time by utilizing steric hindrance. The combination of these two elements perfectly solves the problem of excessively fast molecule passage through traditional ultrathin flat membrane pores, balancing the requirements of high-throughput molecule capture and high spatial resolution detection.

[0069] Example 1:

[0070] Specific preparation of 5-nanometer composite solid-state nanopores;

[0071] High curvature cone tip prefabrication: Select a thickness of 200μm <100> An N-type, lightly doped single-crystal silicon wafer is deposited with 200 nm thick silicon nitride (SiNx) mask layers on both sides. A 4.5 µm × 4.5 µm square window is created on the front mask using photolithography. After cleaning, the wafer is sealed and clamped in a Teflon dual-chamber mold. A 33.3% w / w KOH solution at room temperature is injected into the front chamber. Based on the window size and the etching rate at room temperature, the theoretical etching time is calculated to be approximately 2 hours. To ensure absolute sharpness, the actual etching time is set to 2.2 hours (delayed over-etching). Utilizing the self-limiting property of the crystal plane, a highly curved inverted pyramidal tip is formed.

[0072] Electrochemical transient polarization pre-fabricated blind via: The front-side KOH solution is drained and the cis- and anti-cis chambers are thoroughly rinsed with deionized water. The front-side (cis) chamber is then filled with 5% KOH solution. An electrochemical etching solution was used, and a 1 mol / L KCl conductive solution was filled into the reverse (inverted) chamber, after which platinum electrodes were inserted. A relay control module was connected in series with a DC power supply. The power supply output voltage was set to 5.0V. After power-on, the relay closed after a 2.0-second delay to eliminate voltage rise errors. The relay maintained precise conduction for 10.0 seconds before automatically disconnecting. A strong focused electric field formed at the cone tip, causing avalanche breakdown and locally generating positive charge carriers or holes. After acquiring holes at the tip, silicon atoms are oxidized and dissolved by HF complexation under low current density. The main chemical reaction equations are as follows: Because the sidewalls lack cavities, and the cavities continuously move towards the bottom of the hole where the electric field is strongest, the etching has a very strong directionality, and the pores grow vertically downwards, ultimately producing straight tube blind holes with a diameter of about 5nm.

[0073] Backside dynamic monitoring during thinning and via formation: Liquid was drained in situ and rinsed with deionized water. A 33.3% w / w KOH solution was injected into the reverse chamber (backside) and a 1 mol / L KCl probe solution was injected into the cis chamber (frontside). With an initial substrate thickness of 200 μm, rapid thinning was first performed at 50 °C for 3 hours, followed by monitoring at room temperature. A Keithley 6487 high-sensitivity electrometer was connected to the circuit, and a constant detection voltage of 200 mV was applied. The initial baseline leakage current stabilized at approximately 10 pA. As the backside silicon layer was continuously thinned, the electrometer instantly detected a sudden current jump to 2.5 nA as soon as the backside etching interface connected to the bottom of the blind via. Liquid was immediately drained and the via was rinsed with deionized water, abruptly stopping the etching reaction and ultimately obtaining a "cone-straight tube" composite via with a diameter of approximately 5 nm.

[0074] Example 2:

[0075] Specific preparation of 10 nm composite solid nanopores;

[0076] High curvature cone tip prefabrication: Select a thickness of 150μm <100> An N-type, lightly doped single-crystal silicon wafer is deposited with 150 nm thick silicon nitride (SiNx) mask layers on both sides. A 4.0 µm × 4.0 µm square window is created on the front mask using photolithography. After cleaning, the wafer is sealed and clamped in a Teflon dual-chamber mold. A 30% w / w KOH solution at 30 °C is injected into the front chamber. Based on the window size and etching rate under heating conditions, the theoretical etching time is calculated to be approximately 1.7 hours. To ensure absolute sharpness, the actual etching time is set to 1.9 hours (delayed over-etching). Utilizing the self-limiting property of the crystal plane, a highly curved inverted pyramidal tip is formed.

[0077] Electrochemical transient polarization pre-fabricated blind via: The front-side KOH solution is drained and the cis- and anti-cis chambers are thoroughly rinsed with deionized water. The front-side (cis) chamber is then filled with 5% KOH solution. An electrochemical etching solution was used, and a 1 mol / L KCl conductive solution was filled into the reverse (inverted) chamber, after which platinum electrodes were inserted. A relay control module was connected in series with a DC power supply. The power supply output voltage was set to 8.0V. After power-on, the relay closed after a 1.5-second delay to eliminate voltage rise errors. The relay maintained precise conduction for 12.0 seconds before automatically disconnecting. A strong focused electric field formed at the cone tip, causing avalanche breakdown and locally generating positive charge carriers or holes. After acquiring holes at the tip, silicon atoms are oxidized and dissolved by HF complexation under low current density. The main chemical reaction equations are as follows: Because the sidewalls lack cavities, and the cavities continuously move towards the bottom of the hole where the electric field is strongest, the etching has a very strong directionality, and the pores grow vertically downwards, ultimately producing straight tube blind holes with a diameter of about 10 nm.

[0078] Backside dynamic monitoring of thinning during via formation: Liquid was drained in situ and rinsed with deionized water. A 30% w / w KOH solution was injected into the reverse chamber (backside) and a 1 mol / L KCl probe solution was injected into the cis chamber (frontside). With an initial substrate thickness of 150 μm, rapid thinning was first performed at 45 °C for 2.5 hours, followed by monitoring at room temperature. A Keithley 6487 high-sensitivity electrometer was connected to the circuit, and a constant detection voltage of 300 mV was applied. The initial baseline leakage current stabilized at approximately 10 pA. As the backside silicon layer was continuously thinned, the electrometer instantly detected a sudden current jump to 3.8 nA as soon as the backside etching interface connected to the bottom of the blind via. Liquid was immediately drained and rinsed with deionized water, abruptly stopping the etching reaction and ultimately obtaining a "cone-straight tube" composite via with a diameter of approximately 10 nm.

[0079] Example 3:

[0080] Specific preparation of 15 nm composite solid nanopores;

[0081] High curvature cone tip prefabrication: Select a thickness of 100μm <100> An N-type, lightly doped single-crystal silicon wafer is deposited with 100 nm thick silicon nitride (SiNx) mask layers on both sides. A 6.0 µm × 6.0 µm square window is created on the front mask using photolithography. After cleaning, the wafer is sealed and clamped in a Teflon dual-chamber mold. A 40% w / w KOH solution at 40 °C is injected into the front chamber. Based on the window size and etching rate under heating conditions, the theoretical etching time is calculated to be approximately 1.0 hour. To ensure absolute sharpness, the actual etching time is set to 1.1 hours (delayed over-etching). Utilizing the self-limiting property of the crystal plane, a highly curved inverted pyramidal tip is formed.

[0082] Electrochemical transient polarization pre-fabricated blind via: The front-side KOH solution is drained and the cis- and anti-cis chambers are thoroughly rinsed with deionized water. The front-side (cis) chamber is then filled with 5% KOH solution. An electrochemical etching solution was used, and a 1 mol / L KCl conductive solution was filled into the reverse (inverted) chamber, after which platinum electrodes were inserted. A relay control module was connected in series with a DC power supply. The power supply output voltage was set to 12.0V. After power-on, the relay closed after a 2.0-second delay to eliminate voltage rise errors. The relay maintained precise conduction for 8.0 seconds before automatically disconnecting. A strong focused electric field formed at the cone tip, causing avalanche breakdown and locally generating positive charge carriers or holes. After acquiring holes at the tip, silicon atoms are oxidized and dissolved by HF complexation under low current density. The main chemical reaction equations are as follows: Because the sidewalls lack cavities, and the cavities continuously move towards the bottom of the hole where the electric field is strongest, the etching has a very strong directionality, and the pores grow vertically downwards, ultimately producing straight tube blind holes with a diameter of about 15nm.

[0083] Backside dynamic monitoring of thinning during via formation: Liquid was drained in situ and rinsed with deionized water. A 40% w / w KOH solution was injected into the reverse chamber (backside) and a 1 mol / L KCl probe solution was injected into the cis chamber (frontside). With an initial substrate thickness of 100 μm, rapid thinning was first performed at 60 °C for 1.5 hours, followed by monitoring at room temperature. A Keithley 6487 high-sensitivity electrometer was connected to the circuit, and a constant detection voltage of 400 mV was applied. The initial baseline leakage current stabilized at approximately 10 pA. As the backside silicon layer was continuously thinned, the electrometer instantly detected a sudden current jump to 4.5 nA as soon as the backside etching interface connected to the bottom of the blind via. The liquid was immediately drained and rinsed with deionized water, abruptly stopping the etching reaction and ultimately obtaining a "cone-straight tube" composite via with a diameter of approximately 15 nm.

[0084] Example 4:

[0085] Specific preparation of 20 nm composite solid nanopores;

[0086] High curvature cone tip prefabrication: Select a thickness of 120μm <100> An N-type, lightly doped single-crystal silicon wafer is deposited with 120 nm thick silicon nitride (SiNx) mask layers on both sides. A 5.0 µm × 5.0 µm square window is created on the front mask using photolithography. After cleaning, the wafer is sealed and clamped in a Teflon dual-chamber mold. A 20% w / w KOH solution at 35 °C is injected into the front chamber. Based on the window size and etching rate under heating conditions, the theoretical etching time is calculated to be approximately 1.4 hours. To ensure absolute sharpness, the actual etching time is set to 1.6 hours (delayed over-etching). Utilizing the self-limiting property of the crystal plane, a highly curved inverted pyramidal tip is formed.

[0087] Electrochemical transient polarization pre-fabricated blind via: The front-side KOH solution is drained and the cis- and anti-cis chambers are thoroughly rinsed with deionized water. The front-side (cis) chamber is then filled with 5% KOH solution. An electrochemical etching solution was used, and a 1 mol / L KCl conductive solution was filled into the reverse (inverted) chamber, after which platinum electrodes were inserted. A relay control module was connected in series with a DC power supply. The power supply output voltage was set to 16.0V. After power-on, the relay closed after a 1.0-second delay to eliminate voltage rise errors. The relay maintained precise conduction for 5.0 seconds before automatically disconnecting. A strong focused electric field formed at the cone tip, causing avalanche breakdown and locally generating positive charge carriers or holes. After acquiring holes at the tip, silicon atoms are oxidized and dissolved by HF complexation under low current density. The main chemical reaction equations are as follows: Because the sidewalls lack cavities, and the cavities continuously move towards the bottom of the hole where the electric field is strongest, the etching has a very strong directionality, and the pores grow vertically downwards, ultimately producing straight tube blind holes with a diameter of about 20nm.

[0088] Backside dynamic monitoring during thinning and via formation: Liquid was drained in situ and rinsed with deionized water. A 20% w / w KOH solution was injected into the reverse chamber (backside) and a 1 mol / L KCl probe solution was injected into the cis chamber (frontside). With an initial substrate thickness of 120 μm, rapid thinning was first performed at 55 °C for 2 hours, followed by monitoring at room temperature. A Keithley 6487 high-sensitivity electrometer was connected to the circuit, and a constant detection voltage of 500 mV was applied. The initial baseline leakage current stabilized at approximately 10 pA. As the backside silicon layer was continuously thinned, the electrometer instantly detected a sudden current jump to 6.3 nA as soon as the backside etching interface connected to the bottom of the blind via. Liquid was immediately drained and the via was rinsed with deionized water, abruptly stopping the etching reaction and ultimately obtaining a "cone-straight tube" composite via with a diameter of approximately 20 nm.

[0089] The technical principles of the present invention have been described above with reference to specific embodiments. These descriptions are merely for explaining the principles of the invention and should not be construed as limiting the scope of protection of the invention in any way. Based on this explanation, those skilled in the art can readily conceive of other specific embodiments of the invention without inventive effort, and these embodiments will all fall within the scope of protection of the present invention.

Claims

1. A composite solid-state nanopore electrochemical etching method with controllable pore size, characterized in that, The steps include the following: S100, substrate pretreatment, select a single crystal silicon wafer, and deposit a silicon nitride mask layer on both sides; use double-sided photolithography to prepare a square window in the center of the back side and open a micron-level square window at the corresponding position on the front side; S200, front-side KOH pre-etching: The single crystal silicon wafer obtained in step S100 is sealed and clamped in a double-chamber mold in one go; KOH solution is injected into the front-side etching tank for 10%~15% delayed etching; The self-limiting characteristics of crystal etching are used to eliminate the microscopic flat bottom left at the bottom of the hole, forming a high-curvature inverted pyramid tip; S300, electrochemical breakdown: the KOH solution in the front etching tank of the single crystal silicon wafer is drained and cleaned in situ; a mixed etching solution containing hydrofluoric acid is injected into the front etching tank; a conductive liquid is injected into the back etching tank and an excitation electrode is inserted; a relay control module is connected in series in the electrochemical control circuit; the DC power supply is turned on first, and after the output voltage stabilizes, the circuit is closed through the relay to eliminate transient errors during the voltage rise period; a constant breakdown voltage is applied at the tip of the inverted pyramid and the relay conduction time is controlled; utilizing the positive correlation between voltage and final aperture, directional etching is performed along the vertical direction to form nano-straight tube blind holes with a diameter of 5~20nm; S400, thinning the back side to form a hole, keeping the clamping state unchanged, draining the liquid in the dual chamber in situ and cleaning, injecting KOH solution into the back side to thin the silicon layer, and injecting probe conductive liquid into the front side etching tank; the electrochemical control circuit is connected to an electrometer and a constant detection voltage is applied; During the back-side thinning process, the loop current is monitored in real time. When the electrometer detects a sudden change in leakage current from the picoampere level to the nanoampere level, the liquid is immediately drained and the etching reaction is stopped, thus obtaining a solid nanopore with a conical-straight tube composite spatial geometry.

2. The composite solid-state nanopore electrochemical etching method with controllable pore size according to claim 1, characterized in that, In step S100, the single-crystal silicon wafer is an N-type low-doped single-crystal silicon wafer with a thickness of 100-200μm and a size of 0.5-2cm×0.5-2cm. The mask layer is a silicon nitride layer with a front thickness of 50-200 nm and a back thickness of 200-350 nm.

3. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, In step S100, the side length of the micron-sized square window on the front mask is 4~6μm; The micrometer-scale square window can be a single window or an array of windows.

4. The composite solid-state nanopore electrochemical etching method with controllable pore size according to claim 1, characterized in that, In step S200, the mass fraction of the KOH solution injected into the front etching tank is 20% to 40%, and the working temperature is room temperature to 40°C.

5. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, In step S300, the mixed etching solution is prepared by mixing 5% HF solution, deionized water and ethanol in a volume ratio of 1:8:

3. The conductive liquid injected into the back etching groove and the probe conductive liquid injected in step S400 are both 1 mol / L KCl solutions.

6. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, In step S300, after the DC power supply is turned on, the delayed closing time of the relay is more than 1 second; the constant breakdown voltage ranges from 5.0V to 20.0V; and the conduction time of the relay ranges from 5.0s to 15.0s.

7. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, In step S400, the mass fraction of KOH etching solution injected into the back etching tank is 20% to 40%; the constant detection voltage ranges from 100mV to 500mV.

8. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, In step S400, the back-side thinning process initially uses 40°C to 60°C for heating and etching, and later switches to room temperature 25°C for monitored etching.

9. The method for electrochemical etching of composite solid-state nanopores with controllable pore size according to claim 1, characterized in that, The electrochemical control circuit in step S200 includes a DC power supply module, a relay control module, a first excitation electrode, and a second excitation electrode; The first output terminal of the DC power supply module is connected to the input terminal of the relay control module, and the output terminal of the relay control module is connected to the first excitation electrode; the second excitation electrode is connected to the second output terminal of the DC power supply module, thereby constructing a series closed loop externally. The dual-chamber mold includes a front etching groove, a back etching groove, a front sealing gasket, and a back sealing gasket. The front etching groove and the back etching groove are respectively provided with axially opposite channel windows for conducting the power chemical reaction. The monocrystalline silicon wafer is vertically sandwiched between the front etching groove and the back etching groove; a front sealing gasket is fitted between the front side of the monocrystalline silicon wafer and the front etching groove, and a back sealing gasket is fitted between the back side of the monocrystalline silicon wafer and the back etching groove; the monocrystalline silicon wafer, the front sealing gasket, and the back sealing gasket together divide the internal space of the dual-chamber mold into a physically blocked and fluid-isolated front etching cavity and a back etching cavity; The first excitation electrode is mounted on the front etching groove and extends suspended into the front etching cavity; the second excitation electrode is mounted on the back etching groove and extends suspended into the back etching cavity. The first excitation electrode and the second excitation electrode are physically isolated in space and are disposed on opposite sides of the single crystal silicon wafer.

10. A solid-state nanoporous device prepared by the method according to any one of claims 1-9, characterized in that, The solid-state nanoporous device has a conical-straight tube composite spatial geometry, which consists of an upper inverted pyramidal conical segment and a lower custom-length straight tube segment connected together.

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