High-integration bidirectional active balancing system and method for multi-section battery pack

Abstract

This application relates to the field of integrated circuit design and battery management systems, and discloses a highly integrated bidirectional active balancing system and method suitable for multi-cell battery packs. The system includes a secondary-side active balancing control chip, a primary-side active balancing control chip, a multi-winding planar transformer, and an optocoupler. The primary-side chip integrates a low-side high-voltage HV MOS power switch, and the secondary-side chip integrates multiple pairs of unidirectional power switches composed of back-to-back NMOS transistors, with each pair of switches corresponding to a cell channel. During both the discharging and charging stages, the secondary-side chip unidirectionally transmits feedback signals to the primary-side chip via the optocoupler. The primary and secondary windings of the multi-winding planar transformer are alternately stacked in a multi-layer PCB, with the winding ends directly connected to the chip pads via PCB traces. During balancing, a two-stage energy transfer strategy via a DC common terminal is employed to achieve bidirectional active balancing between any two cells.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design and battery management systems, and in particular to a bidirectional active balancing system and active balancing method technology suitable for multi-cell series-connected battery packs. Background Technology

[0002] With the continuous expansion of lithium battery pack applications in electric vehicle power battery systems, large-scale energy storage power stations, and portable electronic devices, the management of voltage and state of charge consistency among cells in a battery pack has become a core technical challenge in battery management system design. In electric vehicle applications, power battery packs typically consist of dozens or even hundreds of cells connected in series. Due to slight differences in manufacturing processes, internal resistance, and self-discharge rates among the cells, voltage and state of charge inevitably become discrete after multiple charge-discharge cycles. This not only reduces the effective usable capacity of the battery pack but may also lead to overcharging or over-discharging of individual cells, causing safety risks. In large-scale energy storage power station scenarios, the number of cells connected in series in battery modules is even greater, and the operating temperature range is wider. The cumulative effect of inconsistencies between cells is more significant, placing higher demands on the balancing system's ability to efficiently transfer energy between any two cells. In portable electronic device scenarios, the internal space of the device is extremely limited, imposing strict constraints on the size, complexity of peripheral circuits, and integration of the balancing system.

[0003] Currently, most mainstream active balancing solutions using inductor-based topologies can only transfer energy between adjacent cells. When balancing between non-adjacent cells is required, multiple stages of relay are necessary, causing the cumulative energy transfer efficiency to significantly decrease with increasing relay stages, and the balancing time to lengthen accordingly. While isolation-based solutions offer more flexible energy routing, they typically require more external discrete components—including external discrete power MOSFETs, external driver chips, external clamping components, and external winding transformers—increasing system cost and PCB footprint. Furthermore, parasitic inductance from external leads and solder joints can cause voltage spikes when the power switch is turned off, increasing the requirements for the power switch's withstand voltage margin. In addition, in multi-cell balancing systems, the power switches of other channels must remain reliably off when one channel is operating. If the switching structure cannot effectively block backflow caused by cell voltage differences and parasitic conduction caused by transformer mutual inductance coupling, the system's efficiency and reliability will be affected. Therefore, there is an urgent need for an active battery balancing technology that supports bidirectional direct balancing between any cells in a multi-cell series battery pack under the constraints of high integration and small size, while also taking into account reliable isolation between power channels and system operating efficiency. Summary of the Invention

[0004] The purpose of this application is to provide a highly integrated bidirectional active balancing system and method suitable for multi-cell battery packs, so as to solve the problems mentioned in the background art.

[0005] This application discloses a highly integrated bidirectional active balancing system suitable for multi-cell battery packs, including a secondary-side active balancing control chip, a primary-side active balancing control chip, a multi-winding planar transformer, and an optocoupler; The primary-side active balancing control chip is powered by a DC common terminal and integrates a controller, power stage circuit and power switch. The secondary active balancing control chip is powered by the multi-cell battery pack. It integrates a controller, power stage circuit and multiple pairs of unidirectional power switches. Each pair of unidirectional power switches corresponds to the balancing channel of a cell. The multi-winding planar transformer has a primary winding and multiple secondary windings. The primary winding is coupled to the power switch in the primary active balancing control chip, and the multiple secondary windings are respectively coupled to multiple pairs of unidirectional power switches in the secondary active balancing control chip. The multi-winding planar transformer is used to complete the energy conversion between the primary active balancing control chip and the secondary active balancing control chip. The output terminal of the optocoupler controller in the secondary-side active balancing control chip is electrically connected to the feedback input terminal FB in the primary-side active balancing control chip via the optocoupler. During both the cell discharge balancing stage and the cell charge balancing stage, the secondary-side active balancing control chip transmits feedback signals unidirectionally to the primary-side active balancing control chip via the optocoupler to coordinately control the conduction timing of the power switch in the primary-side active balancing control chip.

[0006] In a preferred embodiment, the controller in the secondary-side active balancing control chip includes a cell voltage monitoring circuit, a demagnetization detection circuit, an error amplifier, a frequency adaptive adjustment module, a PWM modulator, an overcurrent detection circuit, and an optocoupler controller; the power stage circuit in the secondary-side active balancing control chip includes a current sensor, a zero-current detection circuit (ZCD), a drive circuit, and the multiple pairs of unidirectional power switches. The cell voltage monitoring circuit is used to detect the positive and negative voltages of each cell. The system identifies the battery cells that need balancing and connects them to the corresponding balancing channel; the current sensor is used to detect the current information in the balancing channel in real time. The error amplifier is used to convert the current information. The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The frequency adaptive adjustment module is used to adjust according to the error signal. Determine the operating frequency of the equalization system The PWM modulator at the operating frequency The following is based on the demagnetization state of the multi-winding planar transformer and the current information of the equalization channel. A control signal is issued, and the drive circuit controls the unidirectional power switch pair to turn on or off; the overcurrent detection circuit is used to process the current information acquired by the current sensor. The overcurrent signal OCP is compared with an overcurrent threshold to control the PWM modulator to avoid overcurrent in the equalization channel; the optocoupler controller is used to output an OPC signal to drive the optocoupler during the cell discharge equalization phase and the cell charge equalization phase; the demagnetization detection circuit is used to detect the demagnetization time of the multi-winding planar transformer during the cell discharge equalization phase; the zero current detection circuit ZCD is used to detect the zero-crossing time of the secondary inductor current during the cell charge equalization phase.

[0007] In a preferred embodiment, the controller in the primary-side active balancing control chip includes a demagnetization detection circuit, an error amplifier, a PWM modulator, a frequency adaptive adjustment module, and an overcurrent detection circuit; the power stage circuit in the primary-side active balancing control chip includes a current sensor, a zero-current detection circuit (ZCD), a drive circuit, and the power switch, wherein the power switch is a low-side high-voltage HV MOS power switch, and the low-side high-voltage HV MOS power switch is configured to bear the primary-side inductor reflected voltage stress of the multi-winding planar transformer; The error amplifier in the primary-side active equalization control chip receives the feedback signal FB output by the optocoupler, subtracts it from the reference signal, and amplifies it to obtain the primary-side error signal. The frequency adaptive adjustment module in the primary-side active equalization control chip is used to adjust the frequency according to the primary-side error signal. Determine the operating frequency of the equalization system The current sensor in the primary-side active balancing control chip is used to acquire the current information of the primary-side path. The PWM modulator in the primary-side active equalization control chip operates at the specified frequency. Based on the demagnetization state of the multi-winding planar transformer and the current information... A control signal is issued, and the driving circuit controls the on / off state of the low-side high-voltage HV MOS power switch; the overcurrent detection circuit in the primary-side active balancing control chip is used to transmit the current information. A current signal OCP is generated by comparing the current with an overcurrent threshold to control the PWM modulator and prevent overcurrent in the primary-side path. The demagnetization detection circuit in the primary-side active balancing control chip is used to detect the demagnetization moment of the multi-winding planar transformer during the cell charging balancing phase. The zero-current detection circuit ZCD in the primary-side active balancing control chip is used to detect the primary-side inductor current during the cell discharging balancing phase. The moment of zero crossing.

[0008] In a preferred embodiment, the multi-winding planar transformer is a printed circuit transformer, integrated on a multilayer circuit board containing the primary-side active balancing control chip and the secondary-side active balancing control chip. The primary winding and multiple secondary windings are alternately stacked in different signal layers of the multilayer printed circuit board. The starting and ending points of the primary winding and the multiple secondary windings extend through traces on the printed circuit board to the soldering pins of the primary-side active balancing control chip and the secondary-side active balancing control chip, respectively, to achieve leadless interconnection between the multi-winding planar transformer and the primary-side active balancing control chip and the secondary-side active balancing control chip. The multi-winding planar transformer also includes an E-type magnetic core with a center post that penetrates the multilayer printed circuit board. The overall height of the multi-winding planar transformer is limited by the thickness of the E-type magnetic core.

[0009] In a preferred embodiment, the unidirectional power switch pair consists of two back-to-back NMOS transistors connected at their sources, with their body diodes arranged in reverse opposite directions to form a bidirectional voltage blocking structure. The NMOS transistor closer to the secondary winding of the multi-winding planar transformer is a high-voltage HV MOS, configured to bear the reflected voltage stress on the multi-winding planar transformer side. The NMOS transistor closer to the cell side is a low-voltage LV MOS, which achieves lower on-resistance in a relatively smaller area. The low-voltage LV MOS is configured to reduce conduction losses when the corresponding cell channel is selected, and when the corresponding cell channel is not selected, it, together with the body diodes of the high-voltage HV MOS, is arranged in reverse opposite directions to form the bidirectional voltage blocking structure, thus blocking reverse current flow when the battery voltages are inconsistent.

[0010] In a preferred embodiment, the frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal output by the error amplifier in the secondary-side active equalization control chip. Adjust the operating frequency of the equalization system The frequency adaptive adjustment module in the primary-side active equalization control chip adjusts according to the primary-side error signal output by the error amplifier in the primary-side active equalization control chip. Adjust the operating frequency of the equalization system ; Furthermore, the frequency adaptive adjustment module in the secondary-side active equalization control chip only operates when the demagnetization detection circuit in the secondary-side active equalization control chip detects that the multi-winding planar transformer has completed demagnetization, and the frequency adaptive adjustment module itself adjusts according to... The PWM modulator in the secondary-side active equalization control chip is triggered to enter the next working cycle only when both conditions for the start-up timing end are met simultaneously. The frequency adaptive adjustment module in the primary-side active equalization control chip is triggered to enter the next working cycle only when the demagnetization detection circuit in the primary-side active equalization control chip detects that the multi-winding planar transformer has completed demagnetization, and the frequency adaptive adjustment module itself is triggered to enter the next working cycle based on the feedback signal FB output by the optocoupler. in, The error amplifier in the secondary-side active equalization control chip will use the current information of the equalization channel. The error signal output after subtracting from the reference signal and amplifying it; The primary-side error signal is the result of the difference between the feedback signal FB output by the optocoupler and the reference signal, amplified by the error amplifier in the primary-side active equalization control chip. The operating frequency of the equalization system is denoted as .

[0011] In a preferred embodiment, the equalization system is configured to employ a two-stage energy transfer when performing equalization of non-adjacent cells: During the cell discharge equalization phase, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, so that the cell to be equalized charges the primary-side inductor through the multi-winding planar transformer; after the unidirectional power switch pair is turned off, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip through the optocoupler, and the power switch in the primary-side active equalization control chip turns on based on the feedback signal, so that the energy input from the cell to be equalized in the multi-winding planar transformer is transferred to the DC common terminal; During the cell charging equalization phase, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip via the optocoupler. The power switch in the primary-side active equalization control chip is turned on based on this feedback signal, enabling the DC common terminal to charge the multi-winding planar transformer. After the power switch in the primary-side active equalization control chip is turned off, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, transferring the energy input from the DC common terminal in the multi-winding planar transformer to the cell to be equalized.

[0012] This application also discloses a highly integrated bidirectional active balancing method suitable for multi-cell battery packs, which is implemented using the aforementioned highly integrated bidirectional active balancing system, wherein... The secondary-side active balancing control chip detects the voltage of each cell and locates the cell to be balanced through its cell voltage monitoring circuit; when performing non-adjacent cell balancing, the balancing method includes the following two-stage energy transfer: During the cell discharge equalization stage, the secondary-side active equalization control chip controls the unidirectional power switch pair corresponding to the cell to be equalized to be turned on, so that the cell to be equalized charges the primary-side inductor through the multi-winding planar transformer; after the unidirectional power switch pair is turned off, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip through the optocoupler, and the primary-side active equalization control chip controls the power switch inside it to be turned on based on the feedback signal, so as to release the energy in the multi-winding planar transformer to the DC common terminal; During the cell charging equalization phase, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip via the optocoupler. Based on the feedback signal, the primary-side active equalization control chip controls its internal power switch to turn on, so that the DC common terminal charges the secondary-side inductor through the multi-winding planar transformer. After the power switch in the primary-side active equalization control chip turns off, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, so that the energy in the multi-winding planar transformer is released to the cell to be equalized through the unidirectional power switch pair.

[0013] In a preferred embodiment, the cell discharge equalization stage specifically includes the following steps: S11. The cell voltage monitoring circuit in the secondary-side active balancing control chip determines the cell that needs to be discharged and balanced, and connects the cell to the corresponding balancing channel. The corresponding unidirectional power switch is turned on, and the secondary-side inductor current of the multi-winding planar transformer is increased. rise; S12. The current sensor in the secondary-side active balancing control chip detects the current information in the balancing channel in real time. The error amplifier in the secondary-side active equalization control chip will convert the current information... The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal. Adaptive adjustment of the operating frequency of the equalization system ; S13. At the beginning of each working cycle, the PWM modulator in the secondary-side active balancing control chip sets the output signal to 1, causing the cell to be balanced to discharge and the secondary-side inductor current to... Rise; when the secondary inductor current rises. Exceeding the error signal At this time, the PWM modulator sets the output signal to 0, the unidirectional power switch is turned off, and the secondary current returns to zero; simultaneously, the overcurrent detection circuit in the secondary active equalization control chip compares the secondary inductor current in real time. With an overcurrent threshold, an overcurrent signal OCP is issued to prematurely disconnect the unidirectional power switch pair once an overcurrent occurs; S14. After the unidirectional power switch is turned off, the optocoupler controller in the secondary-side active balancing control chip outputs an OPC signal to drive the optocoupler. The optocoupler outputs a feedback signal FB to the primary-side active balancing control chip. Based on the feedback signal FB, the primary-side active balancing control chip controls the internal power switch to turn on. The energy output by the cell to be balanced is induced in the primary-side inductor through the multi-winding planar transformer. The primary-side inductor begins to charge and store energy at the DC common terminal. The zero-current detection circuit ZCD in the primary-side active balancing control chip continuously detects the primary-side inductor current. Whether it crosses zero; if it crosses zero, the power switch is turned off. S15. During the operation of the primary-side active equalization control chip, the demagnetization detection circuit in the secondary-side active equalization control chip detects whether the multi-winding planar transformer is demagnetized. Simultaneously, the frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal. Start timing; when timing ends and the two conditions of the multi-winding planar transformer being demagnetized are met simultaneously, trigger the PWM modulator to start the next working cycle; cyclically execute steps S13~S15 until the voltage of the cell to be balanced is consistent with that of other cells, and the cell discharge balancing phase ends.

[0014] In a preferred embodiment, the cell charging equalization stage specifically includes the following steps: S21. The cell voltage monitoring circuit in the secondary active balancing control chip determines the cell that needs to be charged and balanced, and connects the cell to the corresponding balancing channel. S22. The current sensor in the secondary-side active balancing control chip detects the current information in the balancing channel in real time. The error amplifier in the secondary-side active equalization control chip will convert the current information... The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The optocoupler controller in the secondary-side active equalization control chip determines the error signal based on the... The output OPC signal drives the optocoupler to feed back the error signal to the primary-side active equalization control chip. The error amplifier in the primary-side active equalization control chip receives the feedback signal FB output by the optocoupler and obtains the primary-side error signal. The frequency adaptive adjustment module in the primary-side active equalization control chip adjusts according to the primary-side error signal. Adaptive adjustment of the operating frequency of the equalization system ; S23. At the beginning of each working cycle, the PWM modulator in the primary-side active equalization control chip sets the output signal to 1, causing the DC common terminal to discharge and the primary-side inductor current to decrease. Rise; when the primary inductor current rises. Exceeding the original side error signal At this time, the PWM modulator sets the output signal to 0, the power switch in the primary-side active balancing control chip is turned off, and the primary-side current returns to zero; simultaneously, the overcurrent detection circuit in the primary-side active balancing control chip compares the primary-side inductor current in real time. With an overcurrent threshold, an overcurrent signal OCP is issued to prematurely disconnect the power switch once an overcurrent occurs; S24. After the power switch in the primary-side active balancing control chip is turned off, the secondary-side active balancing control chip controls the unidirectional power switch corresponding to the cell to be balanced to be turned on. The energy output from the DC common terminal is induced in the secondary inductor through the multi-winding planar transformer, and the secondary inductor begins to charge the cell to be balanced. The zero-current detection circuit ZCD in the secondary-side active balancing control chip continuously detects the current of the secondary inductor. Whether it crosses zero; if it crosses zero, the unidirectional power switch pair is turned off. S25. During the operation of the secondary-side active balancing control chip, the demagnetization detection circuit in the primary-side active balancing control chip detects whether the multi-winding planar transformer has demagnetized. At the same time, the frequency adaptive adjustment module in the primary-side active balancing control chip starts timing according to the feedback signal FB output by the optocoupler. When the timing ends and the two conditions of the multi-winding planar transformer being demagnetized are met simultaneously, the PWM modulator is triggered to start the next working cycle. Steps S22 to S25 are executed repeatedly until the voltage of the cell to be balanced is consistent with that of other cells, and the cell charging balancing stage ends.

[0015] In a preferred embodiment, during the cell discharge equalization phase, the cell voltage monitoring circuit in the secondary-side active equalization control chip adjusts the detected positive and negative voltages of each cell based on... The cell with the highest voltage in the multi-cell battery pack is identified as the cell to be balanced. During the cell charging equalization phase, the cell voltage monitoring circuit in the secondary-side active equalization control chip monitors the positive and negative voltages of each cell. The cell with the lowest voltage in the multi-cell battery pack is selected as the cell to be balanced.

[0016] The highly integrated bidirectional active balancing system and method for multi-cell battery packs provided in this application achieves interconnected technical effects in the balancing application scenario of multi-cell series-connected battery packs through the specific structural relationship and coordinated control between the secondary-side active balancing control chip, the primary-side active balancing control chip, the multi-winding planar transformer, and the optocoupler.

[0017] In terms of the overall system architecture, the primary-side active balancing control chip is powered by a common DC terminal and integrates a power switch internally, while the secondary-side active balancing control chip is powered by the battery pack and internally configures a pair of unidirectional power switches for each balancing channel containing each cell (e.g., ...). Figure 1 , Figure 2 As shown in the figure, the two chips achieve energy coupling through a multi-winding planar transformer and form a unidirectional isolated feedback channel from the secondary side to the primary side through an optocoupler. This architecture enables energy to be transferred through the DC common terminal during both the cell discharge equalization stage and the cell charging equalization stage. The bidirectional energy transfer between any two cells (including non-adjacent cells) can be completed in only one two-stage transfer through "source cell → common terminal → target cell", without the need for step-by-step transfer along adjacent cells. This avoids the cumulative efficiency decay and significant increase in equalization time caused by multiple transfers in the traditional adjacent inductor equalization scheme.

[0018] Regarding the coordination between the controller and power stage of the secondary-side active equalization control chip (e.g.) Figure 3 As shown), the cell voltage monitoring circuit detects the positive and negative voltage V of each cell.cell_N The system identifies the cells that need balancing and connects them to the corresponding balancing channel; a current sensor detects the current information I in the balancing channel in real time. drn_N After differential amplification with the reference signal by the error amplifier, the output error signal V is obtained. err The V err Simultaneously, it serves as the turn-off comparison reference for the PWM modulator and determines the operating frequency f using the frequency adaptive adjustment module. s The input allows the control loop to adaptively adjust the switching frequency based on the real-time current deviation of the equalization path; the overcurrent detection circuit will input I... drn_N An OCP signal is emitted after comparison with the overcurrent threshold, and this signal takes precedence over V. err The conventional comparison results cause the PWM modulator to turn off the power switch in advance, thereby providing overcurrent protection for the equalization channel. The optocoupler controller outputs OPC signals to drive the optocoupler during both the cell discharge equalization and cell charging equalization phases. The demagnetization detection circuit detects the moment of transformer demagnetization during the discharge phase, and the zero-current detection circuit (ZCD) detects the moment when the secondary inductor current crosses zero during the charging phase. The integrated configuration of the above controller module and power stage module within the secondary chip enables the secondary side to autonomously complete the entire control process from cell selection, current regulation, frequency adaptation, overcurrent protection to optocoupler feedback drive within the same chip, avoiding dependence on external control devices and external drive chips.

[0019] Regarding the primary-side active equalization control chip (such as...) Figure 4 As shown), its error amplifier receives the feedback signal FB output by the optocoupler and performs differential amplification with the reference signal to obtain the primary-side error signal. The frequency adaptive adjustment module determines the operating frequency f based on this. s The PWM modulator at this frequency uses the demagnetization state and primary path current information I... cs The control circuit turns the low-side high-voltage HVMOS power switch on or off. The demagnetization detection circuit detects the transformer demagnetization during the charging phase, while the ZCD detects the primary inductor current I during the discharging phase. cs At the zero-crossing moment—the low-side high-voltage HV MOS power switch is configured to bear the reflected voltage stress of the primary inductor of the multi-winding planar transformer. It forms a symmetrical configuration on both the primary and secondary sides with the high-voltage HV MOS on the transformer side of each pair of unidirectional power switches on the secondary side in terms of bearing the reflected voltage stress. This allows both the primary and secondary sides to directly absorb the reflected voltage from the transformer side using high-voltage devices integrated inside the chip, without the need for external clamping circuits or RCD absorption loops. This helps to simplify the peripheral circuits and reduce system cost and board area.

[0020] Regarding the structure of multi-winding planar transformers (such as...) Figure 5As shown, the primary winding and multiple secondary windings are alternately stacked in different signal layers of a multilayer printed circuit board. The start and end of the windings are extended to the solder pins of the primary and secondary active balancing control chips through PCB traces to achieve leadless interconnection. The central column of the E-type core runs through the multilayer PCB. This structure eliminates the parasitic inductance caused by redundant solder joints and external leads in traditional wire-wound transformer solutions. In the flyback architecture, the voltage spike generated when the power switch is turned off is reduced due to the reduction of lead parasitic inductance, thereby reducing the requirements for the voltage withstand margin of the power switch and helping to reduce switching losses. At the same time, the alternating stacked winding layout shortens the physical distance between the primary winding and each secondary winding, which helps to reduce leakage inductance and improve the energy coupling efficiency between the primary and secondary sides. The overall height of the transformer is limited only by the core thickness, allowing the balancing system to be integrated into an extremely thin volume.

[0021] Regarding the internal structure of a unidirectional power switch pair (e.g.) Figure 2 As shown in the lower right corner, it consists of two back-to-back NMOS transistors. The sources of the two NMOS transistors are connected, and their body diodes are arranged in reverse opposite directions to form a bidirectional voltage blocking structure. The high-voltage HV MOS closer to the secondary winding of the transformer is configured to bear the reflected voltage stress, while the low-voltage LV MOS closer to the cell side, because it does not directly face the reflected voltage of the transformer side, can use a lower withstand voltage rating process, achieving lower on-resistance in a relatively smaller area, thereby reducing conduction losses when the channel is selected. This asymmetrical configuration, under the constraint of chip area, simultaneously meets the withstand voltage requirements of the transformer side and the low conduction losses when the channel is selected. Furthermore, when a channel is not selected, the two body diodes are arranged in reverse opposite directions so that at least one body diode is in a reverse bias state regardless of the voltage polarity at both ends of the channel, thereby blocking the current and preventing current from flowing back through the unselected channel when the voltages of the cells in the battery pack are inconsistent. It is worth noting that there is a synergistic effect between the controlled bidirectional blocking structure and the multi-winding planar transformer: at the moment of turn-off of a primary winding of the transformer, the unidirectional power switching pairs of the other unselected channels not only block the static back current caused by the cell voltage difference, but also prevent the parasitic conduction current that may be generated by the mutual inductance coupling of other secondary windings, thereby ensuring that only one secondary winding participates in energy transfer in each equalization cycle and avoiding energy crosstalk between multiple windings.

[0022] Regarding the dual precondition triggering logic of the frequency adaptive adjustment module, the secondary-side frequency adaptive adjustment module only activates when the demagnetization detection circuit detects that the transformer has completed demagnetization, and the module itself determines the precondition triggering logic based on V. errThe PWM modulator is triggered to enter the next working cycle only when both the start-up timing and the end-of-time conditions are met simultaneously. Similarly, the frequency adaptive adjustment module on the primary side is only triggered to enter the next working cycle when both the demagnetization is completed and the timing based on the feedback signal FB is met simultaneously. This dual precondition design ensures that the magnetization energy in the transformer has been released before the start of each working cycle, avoiding the risk of flux accumulation saturation caused by residual magnetic flux in the core and the dangerous condition of simultaneous conduction of the primary and secondary switches. Combined with the ZCD's multiple criteria for turning off the power switch when the inductor current crosses zero and the OCP overcurrent protection, the reliability of the system is guaranteed under different voltage differences and load conditions.

[0023] Regarding the specific control process of the two-stage energy transfer, in the cell discharge equalization stage (such as...) Figure 6 (as shown) and the cell charging equalization phase (as shown) Figure 7 In the diagram, the same unidirectional feedback link consisting of "secondary-side optocoupler controller → optocoupler → primary-side feedback input terminal FB" is multiplexed, with only the roles of the primary and secondary sides switching as the stage changes. During the cell discharge equalization stage, the secondary-side chip drives the unidirectional power switch pair corresponding to the cell to be equalized to conduct, allowing the cell to charge the primary-side inductor via the transformer. After the switch pair is disconnected, the secondary-side chip transmits a feedback signal to the primary-side chip via the optocoupler. The primary-side power switch then conducts based on this feedback signal, releasing energy to the DC common terminal. The optocoupler controller only outputs an OPC signal to trigger the primary-side low-side switch to conduct after the secondary-side power switch pair is completely disconnected. This timing constraint helps prevent the secondary-side switch disconnection and the primary-side switch conduction from overlapping in timing. During the cell charging equalization stage, the secondary-side chip transmits a feedback signal to the primary-side chip via the optocoupler. The primary-side power switch then conducts based on this feedback signal, allowing the common terminal to charge the transformer. After the primary-side power switch is disconnected, the secondary-side chip drives the switch pair corresponding to the target cell to conduct, releasing energy to the cell. In both stages, the power switch turn-on timing of the primary and secondary sides is adaptively and autonomously controlled by each chip based on its own ZCD, demagnetization detection, OCP and PWM modulator, without the need for external master controller coordination, thus ensuring the non-overlapping of the switching timing on both sides.

[0024] Regarding the detailed steps of the discharge equalization phase, the current sensor detects the secondary inductor current I in real time. drn_N Error amplifier output V err The PWM modulator sets the output to 1 at the beginning of each working cycle to discharge the battery cell. When I drn_N More than V err When the output is set to 0, the switch is opened, and the overcurrent detection circuit is in I. drn_N When the overcurrent threshold is exceeded, an OCP signal is issued to prematurely disconnect the switch pair. After the switch pair is disconnected, the optocoupler controller outputs an OPC signal to drive the optocoupler to turn on the primary-side low-side switch. The primary-side ZCD is at I csThe primary-side switch is turned off when the zero-crossing occurs. After the dual preconditions of demagnetization detection and frequency adaptive timing are met, the next cycle begins—this detailed step involves the judgment nodes (I...). drn_N With V err The comparison, OCP priority turn-off, ZCD zero-crossing turn-off, and demagnetization and timing dual pre-setting constitute a complete multi-protection criterion system, so that the system is subject to multiple constraints of current limiting, overcurrent protection, demagnetization lockout and zero-crossing detection in each micro-operating cycle.

[0025] Regarding the detailed steps of the charging equalization phase, the secondary error amplifier outputs V err And it is fed back to the primary side via an optocoupler, and the primary side error amplifier obtains the result accordingly. f is determined by the primary-side frequency adaptive adjustment module. s The primary-side PWM modulator sets the output to 1 at the beginning of each working cycle to discharge the common terminal. When I... cs Exceed When the output is set to 0, the primary-side switch is opened. The primary-side overcurrent detection circuit sends an OCP signal to disconnect in advance when there is an overcurrent. After the primary-side switch is opened, the secondary-side chip controls the corresponding switch of the target cell to conduct, so that energy is released to the cell. The secondary-side ZCD is in I drn_N The switch is turned off when the zero point is crossed. After the dual preconditions of primary-side demagnetization detection and frequency adaptive timing are met, the next cycle begins. The error signal of the charging stage is fed back from the secondary side to the primary side via an optocoupler. This closed-loop control method enables the primary-side chip to dynamically adjust the control parameters of subsequent working cycles according to the actual current state of the secondary side, thereby maintaining the effectiveness of closed-loop regulation during the balancing process of the continuously changing cell voltage on the secondary side.

[0026] Regarding the positioning strategy for cells to be balanced, during the discharge balancing phase, the cell voltage monitoring circuit locates the cell with the highest voltage in the battery pack as the discharge target, and during the charging balancing phase, it locates the cell with the lowest voltage as the charging target. This strategy based on the positioning of the highest and lowest voltage cells ensures that each two-stage energy transfer directly acts on the two cells with the largest voltage difference in the battery pack, thereby directly narrowing the difference between the highest and lowest voltages and improving the efficiency of each energy transfer in improving the balancing.

[0027] In summary, the aforementioned technical features do not function in isolation within the system of this application. Instead, they work together through specific structural connections and coordinated control timing to form a bidirectional active balancing technology solution for multi-cell series-connected battery packs. At the system architecture level, this solution uses a DC common terminal as an intermediary to achieve bidirectional energy transfer between any two cells. At the power switch level, HV / LV asymmetric MOS is used to balance voltage withstand and losses under area constraints, as well as bidirectional blocking between channels. At the transformer level, alternating PCB stacking and leadless interconnection reduce parasitic inductance and achieve thin integration. At the control level, demagnetization lockout and frequency adaptation, combined with multiple protections from ZCD and OCP, ensure the non-overlapping of switching timing and system reliability.

[0028] The specification of this application contains numerous technical features distributed across various technical solutions. Listing all possible combinations of these technical features (i.e., technical solutions) would make the specification excessively lengthy. To avoid this problem, the various technical features disclosed in the above-described invention, the various technical features disclosed in the following embodiments and examples, and the various technical features disclosed in the accompanying drawings can be freely combined to form various new technical solutions (all of which are considered to have been described in this specification), unless such a combination of technical features is technically infeasible. For example, one example discloses feature A+B+C, and another example discloses feature A+B+D+E. Features C and D are equivalent technical means that serve the same function, and technically only one needs to be used; they cannot be used simultaneously. Feature E can technically be combined with feature C. Therefore, the solution A+B+C+D should not be considered as described because it is technically infeasible, while the solution A+B+C+E should be considered as described. Attached Figure Description

[0029] Figure 1 This is a system block diagram of a highly integrated bidirectional active balancing system applicable to multi-cell battery packs, according to an embodiment of this application.

[0030] Figure 2 This is a power stage topology block diagram and current path schematic diagram of a highly integrated bidirectional active balancing system according to an embodiment of this application.

[0031] Figure 3 This is an internal block diagram of a secondary-side active equalization control chip according to an embodiment of this application.

[0032] Figure 4 This is an internal block diagram of the primary-side active equalization control chip according to an embodiment of this application.

[0033] Figure 5 This is a schematic diagram of the structure of a multi-winding planar transformer according to an embodiment of this application.

[0034] Figure 6 This is a flowchart of the cell discharge equalization stage according to an embodiment of this application.

[0035] Figure 7 This is a flowchart of the cell charging equalization stage according to an embodiment of this application. Detailed Implementation

[0036] In the following description, many technical details are presented to help the reader better understand this application. However, those skilled in the art will understand that the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0037] Explanation of some concepts: "Primary side" refers to the side connected to the DC common terminal in the equalization system topology of this application. Since the equalization system involved in this application has bidirectional energy transfer capability, energy can flow from the secondary side to the primary side or from the primary side to the secondary side. Therefore, "primary side" only indicates the topology connection position and not the energy flow direction. This definition remains unchanged in the discharge equalization stage and the charge equalization stage.

[0038] "Secondary side" refers to the side in the equalization system topology of this application that connects each cell. Corresponding to the definition of "primary side", "secondary side" also only indicates the topology connection position rather than the energy flow direction, and this definition remains unchanged in the discharge equalization stage and the charge equalization stage.

[0039] A "unidirectional power switch pair" refers to a controlled bidirectional blocking switch pair consisting of two back-to-back NMOS transistors. The sources of the two NMOS transistors are connected, and their body diodes are arranged in opposite directions. When the switch is turned on, current can flow bidirectionally, and when it is not turned on, it blocks voltage bidirectionally to prevent current backflow caused by inconsistent cell voltage. In this application, it is also referred to as a "controlled bidirectional blocking switch pair".

[0040] "Single-cycle bidirectional active balancing" refers to the process where the discharge of the source cell to the DC common terminal and the charging of the target cell from the DC common terminal together constitute a complete energy transfer cycle. This cycle can be repeated until a preset balancing threshold condition is met (e.g., the voltage difference ΔV between the cells decreases to the threshold ΔV). th (See below). "Bidirectional" means that any battery cell can be used as both a discharge source and a charging target.

[0041] "DC common terminal" refers to an energy transfer node independent of the battery pack, specifically including a bus capacitor C. cd Its voltage is V cdThe DC common terminal receives energy from the source cell during the discharge equalization phase for charging and energy storage, and releases the stored energy to the target cell during the charging equalization phase.

[0042] A "multi-winding planar transformer" refers to a transformer that uses a printed circuit board integrated structure. Its primary winding and multiple secondary windings are formed in different conductive layers of the same multi-layer PCB. The winding ends extend directly to the solder pins of the control chip through PCB traces. The magnetic core adopts an E-type structure with a central column and runs through multiple layers of PCB.

[0043] V err This refers to the error amplifier in the secondary-side active equalization control chip converting the current information I of the equalization channel. drn_N The error signal, obtained by subtracting from and amplifying the reference signal, serves both as the turn-off comparison reference for the secondary PWM modulator and as the basis for determining the operating frequency f by the secondary frequency adaptive adjustment module. s Input.

[0044] This refers to the primary-side error signal output by the error amplifier in the primary-side active equalization control chip, which is the difference between the feedback signal FB output by the optocoupler and the reference signal, and then amplified. This error signal is used as the input to the primary-side PWM modulator and the primary-side frequency adaptive adjustment module.

[0045] OPC refers to the control signal output by the optocoupler controller in the secondary-side active equalization control chip, which is used to drive the input terminal of the optocoupler.

[0046] FB refers to the feedback signal sent from the output of the optocoupler to the primary-side active equalization control chip.

[0047] OCP refers to the overcurrent protection signal output by the overcurrent detection circuit when the inductor current exceeds the overcurrent threshold. It is used to enable the PWM modulator to turn off the corresponding power switch in advance, taking precedence over the conventional comparison result of the inductor current and the error signal.

[0048] The following is a brief summary of some of the innovative aspects of this application: In summary, the technical solution involved in this application is not a simple superposition or patchwork of existing flyback equalization topologies and known power switch structures. Rather, it is a system-level technical solution with a specific cooperative mode proposed by the inventor after in-depth analysis of the inherent coupling relationship between energy transfer paths, power switch stress distribution and isolation feedback loops, driven by the complex technical contradiction of "how to simultaneously solve bidirectional energy transfer between arbitrary cells, parasitic coupling conduction suppression between power channels and ensuring the non-overlapping timing of primary and secondary side switches of flyback converters under chip area constraints and high common-mode voltage environment of multiple series-connected cells".

[0049] Specifically, this application configures a pair of unidirectional power switches (e.g., source-connected, body diodes arranged in reverse opposite directions) within the secondary-side active balancing control chip for the balancing channel of each cell. Figure 2 As shown in Figure SW), a high-voltage HV MOS is configured near the transformer side to bear the reflected voltage stress, while a low-voltage LV MOS is configured near the cell side to reduce the on-resistance. This switch forms a bidirectional voltage blocking structure when the channel is not selected, which not only suppresses the static back current caused by the cell voltage difference, but also—this is only apparent when this structure works in conjunction with a multi-winding planar transformer—prevents parasitic on-currents that may be generated in other unselected channels due to mutual inductance coupling at the moment when one of the primary windings of the transformer is turned off, thus ensuring that only one secondary winding participates in energy transfer in each equalization cycle. At the same time, the multi-winding planar transformer (such as...) Figure 5 As shown, the primary winding and each secondary winding are alternately stacked in a multi-layer PCB. The winding ends are directly extended to the solder pins of the primary and secondary active balancing control chips through PCB traces to achieve leadless interconnection. This eliminates the parasitic inductance caused by redundant solder joints and external leads. The reduction of this parasitic inductance, in turn, reduces the voltage spike at the moment of power switch turn-off, which tightens the voltage margin design of the aforementioned HV MOS, thus facilitating the full integration of power transistors under chip area constraints.

[0050] Furthermore, based on the above structural coordination, this application utilizes an isolated feedback channel consisting of "secondary-side optocoupler controller outputting OPC signal → optocoupler → primary-side feedback input terminal FB," which unidirectionally transmits feedback signals from the secondary side to the primary side during both the cell discharge equalization and cell charge equalization phases. This is combined with the frequency adaptive adjustment modules within the respective chips of the secondary and primary sides, which set the completion of demagnetization and the end of timing as dual preconditions for triggering the next cycle's PWM pulse. Additionally, a zero-current detection circuit ZCD is used to detect the inductor current (secondary-side I). drn_N Original side I cs The multiple timing constraints of turning off the corresponding power switch at zero crossing ensure the non-overlapping conduction sequence of the primary and secondary switches. This non-overlapping guarantee is interdependent with the channel isolation function of the aforementioned controlled bidirectional blocking MOS pair. Without the timing non-overlapping constraints, the primary and secondary sides of the transformer may conduct simultaneously, rendering the bidirectional blocking structure meaningless. Conversely, without bidirectional blocking of each channel, even with non-overlapping timing, parasitic coupling conduction of non-target channels cannot be avoided. This interdependent and inseparable synergistic relationship between the above structural and control features means that the technical effect of the present application's solution as an organic whole is not simply the sum of the effects of its individual features.

[0051] Furthermore, the inventors of this application have discovered through long-term in-depth research that the difficulties faced by existing active battery balancing technology do not stem from a single technical bottleneck, but rather from a complex technical contradiction caused by the inherent coupling relationship between energy transfer path, power switch stress distribution, and isolation feedback control.

[0052] After in-depth analysis of the principles of existing inductor-based adjacent cell balancing schemes, the inventors discovered that the reason why such schemes experience significant efficiency and speed degradation when the number of cells is large is that energy must be transferred step-by-step along adjacent cells. When there are N-1 cells between the source cell and the target cell, energy needs to go through N-1 transfers, each of which is accompanied by a certain proportion of loss. The overall efficiency is reduced accordingly. The energy decays exponentially, and the equalization time increases proportionally with the number of transfer stages. This makes it difficult for adjacent inductor solutions to meet practical engineering requirements in worst-case voltage drop scenarios, such as electric vehicle battery modules or large-scale energy storage power stations where there are many series-connected cells. The inventors thus realized that the key to solving this problem lies in constructing an architecture that bypasses the step-by-step transfer between adjacent cells, allowing energy transfer between any source cell and any target cell to be completed through only one intermediate energy storage stage.

[0053] Furthermore, after long-term practical observation of existing isolation equalization schemes based on flyback transformers, the inventors found that although such schemes can achieve energy transfer between non-adjacent cells to a certain extent by utilizing the multi-winding structure of the transformer, the prominent contradictions they face in actual engineering implementation are: the extensive use of external discrete power MOSFETs, external driver chips, external clamping components, and external winding transformers not only increases the PCB footprint and system cost, but also causes voltage spikes due to the parasitic inductance generated by external leads and redundant solder joints at the moment the power switch is turned off. This forces power switches to have a larger voltage rating margin, which in turn increases the switch's on-resistance and chip area—this parasitic parameter problem and the system integration problem are fundamentally the same: the more discrete peripheral components and the longer the interconnection paths, the greater the parasitic inductance and the worse the electrical performance. The inventors realized that breaking this vicious cycle requires addressing the physical interconnection between the transformer and the chip, integrating the power stage circuitry and controller onto the same chip, and embedding the transformer windings into the PCB where the chip is located to eliminate parasitic inductance caused by external leads and redundant solder joints at its source.

[0054] More importantly, after repeatedly analyzing the operation of the power switch in a multi-cell balancing system, the inventors discovered that in a topology where multiple secondary windings coexist on the same transformer core, when one channel is operating, the other channels not only face the risk of static backflow caused by cell voltage difference, but also the dynamic risk of parasitic conduction caused by mutual inductance coupling at the moment of transformer turn-off. The simultaneous existence of these two risks means that the power switch not only needs to bidirectionally block cell voltage difference under static conditions, but also needs to prevent parasitic coupling conduction during dynamic switching transients. The single MOS or diode-type anti-backflow structure commonly used in existing solutions is difficult to cope with both types of risks simultaneously. The inventors further realized that the stress distribution problem of the power switch is closely related to the parasitic parameters of the transformer and the conduction sequence of the primary and secondary switches. The larger the transformer leakage inductance, the higher the reflected voltage at the moment of turn-off, and the greater the voltage withstand requirement of the switch. If the primary and secondary switches overlap in the timing sequence, the large current caused by the simultaneous conduction of the primary and secondary sides of the transformer will exceed the safe operating area of ​​the switch, and the reliability risk will deteriorate accordingly. Improvements in a single dimension alone cannot simultaneously achieve multi-channel independent selection, reflected voltage tolerance, conduction loss optimization, and bidirectional blocking capability.

[0055] Based on the above in-depth research, the inventors of this application propose a dual-chip collaborative architecture consisting of a secondary-side active balancing control chip, a primary-side active balancing control chip, a multi-winding planar transformer, and an optocoupler. This architecture achieves bidirectional balancing between any cells through a two-stage energy transfer with the DC common terminal as the transfer point. Simultaneously, it reduces parasitic inductance by using leadless interconnection of planar transformers with multiple alternating layers on the PCB. The controlled bidirectional blocking switch pair composed of back-to-back HV / LV asymmetric NMOS ensures both channel isolation and low loss. The dual preconditions of demagnetization lockout and frequency adaptation, combined with ZCD and OCP multiple protections, ensure the non-overlapping timing of the primary and secondary side switches.

[0056] To make the objectives, technical solutions, and technical effects of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application.

[0057] I. Definition of Terms Before describing the specific implementation of this application, several terms involved in this application are defined and agreed upon to ensure consistent understanding in the subsequent description.

[0058] In this application, "primary side" refers to the side connected to the DC common terminal, and "secondary side" refers to the side connected to each battery cell. Since the equalization system involved in this application has bidirectional energy transfer capability, energy can flow from the secondary side to the primary side (battery cell discharge equalization stage) or from the primary side to the secondary side (battery cell charging equalization stage). Therefore, "primary side" and "secondary side" only indicate the topological connection position, not the direction of energy flow. This definition remains unchanged in the discharge equalization stage and the charging equalization stage.

[0059] A "unidirectional power switch pair" refers to a controlled bidirectional blocking switch pair consisting of two back-to-back NMOS transistors. When the switch is turned on, current can flow bidirectionally, and when it is turned off, voltage is blocked bidirectionally to prevent backflow of current due to inconsistent cell voltage. In this application, it is also referred to as a "controlled bidirectional blocking switch pair".

[0060] "Single-cycle bidirectional active balancing" refers to the process where the discharge of the source cell to the DC common terminal and the charging of the target cell from the DC common terminal together constitute a complete energy transfer cycle. This cycle can be repeated until a preset balancing threshold condition is met (e.g., the voltage difference between the cells). Drop to threshold (See below). "Bidirectional" means that any battery cell can be used as both a discharge source and a charging target.

[0061] "DC common terminal" refers to an energy transfer node independent of the battery pack, specifically including a bus capacitor. Its voltage is The DC common terminal receives energy from the source cell during the discharge equalization phase for charging and energy storage, and releases the stored energy to the target cell during the charging equalization phase.

[0062] This application applies to multi-cell series-connected battery packs. ,in (Number of battery cells).

[0063] Example 1: High-Integration Bidirectional Active Balancing System. As shown in Figure 1, this example provides a highly integrated bidirectional active balancing system suitable for multi-cell series-connected battery packs. The system comprises four parts: a secondary-side active balancing control chip, a primary-side active balancing control chip, a multi-winding planar transformer, and an optocoupler.

[0064] Specifically, the primary-side active balancing control chip is powered by a DC common terminal and integrates a controller, power stage circuitry, and power switch. The DC common terminal includes a bus capacitor independent of the multi-cell battery pack. The bus capacitor, acting as an intermediate energy storage element in the two-stage energy transfer process, receives energy transferred from the source cell via the transformer during the cell discharge equalization stage, and releases the stored energy to the target cell via the transformer during the cell charging equalization stage. The secondary-side active equalization control chip is powered by multiple battery cells and integrates a controller, power stage circuitry, and multiple pairs of unidirectional power switches. Each pair of unidirectional power switches corresponds to the equalization channel of a single cell. This design, with each cell channel independently configured with a pair of controlled switches, allows the system to select any equalization channel at any time, thus supporting combinations from any source cell to any target cell. The multi-winding planar transformer has one primary winding and multiple secondary windings. The primary winding is coupled to the power switches in the primary-side active equalization control chip, and the multiple secondary windings are each coupled to multiple pairs of unidirectional power switches in the secondary-side active equalization control chip, used to complete the energy conversion between the primary-side and secondary-side active equalization control chips. The output of the optocoupler controller in the secondary-side active balancing control chip is electrically connected to the feedback input terminal FB in the primary-side active balancing control chip via the optocoupler, forming a unidirectional isolated feedback channel from the secondary side to the primary side. During both the cell discharge balancing and cell charge balancing phases, the secondary-side active balancing control chip unidirectionally transmits feedback signals to the primary-side active balancing control chip via this optocoupler to coordinate the control of the power switch conduction timing in the primary-side active balancing control chip. The direction of this feedback signal is always "secondary side → optocoupler → primary side," not the reverse. Only the roles (charging side or releasing side) of the primary and secondary sides change with the phase transition.

[0065] It should be noted that the overall architecture adopted by this system is based on a flyback topology. In a flyback converter, the transformer magnetizes the inductor to store energy during the source-side switch's conduction period, and the magnetized energy is released through the controlled path on the target side after the source-side switch is turned off. This system utilizes this mechanism to control the switching timing of the primary and secondary sides in two stages, respectively, to complete the bidirectional energy transfer. The entire system consists of only two chips, a multi-winding planar transformer, and an optocoupler, making the peripheral circuitry extremely simple.

[0066] II. Power Stage Topology and Current Path: As shown in Figure 2, the battery pack consists of... It consists of several series-connected battery cells, each marked as follows: , , ... Adjacent cells are connected by nodes , ... Connections. Each cell corresponds to one balancing channel, and each channel includes one secondary winding and a pair of unidirectional power switches (labeled SW1, SW2, ..., SWN). The primary side has one primary winding and one low-side high-voltage HV MOS power switch. The primary winding and all secondary windings are wound together on the same magnetic core to form a multi-winding planar transformer. The DC common terminal is connected to the primary side and includes the bus capacitor. .

[0067] Figure 2 shows the current direction in both stages. During the cell discharge equalization stage, current flows from the cell to be equalized into the corresponding secondary winding, and after transformer coupling, the energy is transferred to the primary side, affecting the bus capacitance at the DC common terminal. Energy storage during charging. During the cell charging equalization phase, current flows from the DC common terminal into the primary winding, and after coupling through the transformer, the energy is transferred to the secondary side to charge the target cell.

[0068] Furthermore, the lower right corner of Figure 2 shows the internal structure of the unidirectional power switch pair SW. This switch pair consists of two back-to-back NMOS transistors, with their sources connected and their body diodes arranged in opposite directions to form a bidirectional voltage blocking structure. The NMOS transistor closer to the secondary winding of the multi-winding planar transformer is a high-voltage HV MOS, configured to bear the reflected voltage stress from the multi-winding planar transformer side; the NMOS transistor closer to the battery cell side is a low-voltage LV MOS. The core consideration for this asymmetrical configuration is that the high-voltage HV MOS mainly bears the total voltage stress resulting from the reflection voltage generated during transformer switching, superimposed with the battery cell voltage, and therefore needs a high withstand voltage rating; while the low-voltage LV MOS does not directly face the reflected voltage from the transformer side, and the maximum voltage it withstands is essentially only the battery cell voltage. Therefore, a process with a relatively low withstand voltage rating can be used to obtain a lower on-resistance in a relatively smaller chip area. This reduces conduction losses during channel selection.

[0069] When a channel is not selected, the gates of both NMOS transistors corresponding to that channel are in the off state. Since the body diodes of the two transistors are arranged in reverse relative to each other, regardless of the voltage polarity across the channel, at least one body diode is in a reverse-biased state, thus blocking current flow through the channel. This characteristic is particularly important in scenarios where the cell voltages in a battery pack are inconsistent, preventing current from flowing back to other cells through the unselected channel and ensuring that only the selected cell participates in energy transfer during the equalization process. This asymmetric pairing of high-voltage HV MOS and low-voltage LV MOS, within the constraints of chip area, simultaneously addresses the transformer-side withstand voltage requirements, low conduction losses when the channel is selected, and bidirectional blocking capability when the channel is not selected. This is one of the key structural features that distinguishes this application from other Flyback equalization schemes. More specifically, there is also a synergistic effect between this controlled bidirectional blocking structure and the multi-winding planar transformer. When a primary winding is switched off, the unidirectional power switches of the other unselected windings not only block the static back current caused by the cell voltage difference, but also prevent the parasitic conduction current that may be generated by mutual inductance coupling of other secondary windings at the moment of transformer turn-off. This ensures that only one secondary winding participates in energy transfer in each equalization cycle, avoiding energy crosstalk between multiple windings.

[0070] III. The secondary-side active equalization control chip is shown in Figure 3. The secondary-side active equalization control chip is divided into two parts: a controller and a power stage.

[0071] The controller section includes a cell voltage monitoring circuit, a demagnetization detection circuit, an error amplifier, a frequency adaptive adjustment module, a PWM modulator, an overcurrent detection circuit, and an optocoupler controller. The cell voltage monitoring circuit detects the positive and negative voltages of each cell. (in Indicates the first The system identifies cells requiring equalization and connects them to the corresponding equalization channel. Since the cells are connected in series, the cell voltage monitoring circuit needs to accurately acquire the terminal voltage difference of each cell under a relatively high common-mode voltage. The demagnetization detection circuit detects the demagnetization moment of the multi-winding planar transformer during the cell discharge equalization phase. A current sensor is used to detect the current information in the equalization channel in real time. ,in Indicates the second side. The real-time inductor current flowing through the secondary winding in the equalization channel. The error amplifier converts the current information acquired by the current sensor... The difference between the error signal and the reference signal is calculated and amplified to output the error signal. . It serves as a turn-off comparison reference for the secondary-side PWM modulator—when the secondary-side inductor current... Rise to When the corresponding current threshold is reached, the PWM modulator sets the output to zero to turn off the power switch—which in turn determines the operating frequency as a secondary frequency adaptive adjustment module. The input signal. The frequency adaptive adjustment module adjusts according to the error signal. High and low adaptive adjustment system operating frequency The specific control strategy is detailed in Section 6 below. The PWM modulator operates at the system frequency... Below, based on the transformer's demagnetization state and the current information of the equalization channel... A control signal is sent, which, via the drive circuit, controls the unidirectional power switch pair to turn on or off. The overcurrent detection circuit is used to process the current information acquired by the current sensor. Compared with the overcurrent threshold, when When the current exceeds this threshold, the overcurrent detection circuit issues an overcurrent signal OCP, which takes precedence over the inductor current and error signal. The conventional comparison results cause the PWM modulator to turn off the corresponding power switch in advance to avoid overcurrent in the equalization channel. The optocoupler controller is used to output OPC signals to drive the optocouplers during the cell discharge equalization phase and the cell charge equalization phase. Its specific multiplexing method is detailed in Section 7 below.

[0072] The power stage includes a current sensor, a zero-current detection circuit (ZCD), a drive circuit, and multiple pairs of unidirectional power switches. The ZCD detects the zero-crossing moment of the secondary inductor current during the cell charging equalization phase. When the secondary inductor current drops to zero, it outputs a detection signal, turning off the corresponding unidirectional power switch pair to prevent reverse current flow. The drive circuit drives the gates of each pair of unidirectional power switches.

[0073] IV. The primary-side active equalization control chip is shown in Figure 4. The primary-side active equalization control chip is also divided into two parts: a controller and a power stage.

[0074] The controller section includes a demagnetization detection circuit, an error amplifier, a PWM modulator, a frequency adaptive adjustment module, and an overcurrent detection circuit. The error amplifier on the primary side receives the feedback signal FB from the optocoupler output, subtracts it from the reference signal, and amplifies it to obtain the primary-side error signal. .Should In a physical sense, it is related to the secondary side. Similarly, both are control signals characterizing the degree of deviation in the equalization path current, but It is generated by comparing the FB signal received from the optocoupler feedback on the primary side with the reference signal (this symbol is physically similar to V_err on the secondary side, but is used differently in this paper for clarity). The frequency adaptive adjustment module on the primary side adjusts according to... Determine the system operating frequency Its dual precondition triggering logic is the same as that of the secondary side, as detailed in Section 6. The PWM modulator on the primary side operates at a frequency... Below, based on the demagnetization state of the multi-winding planar transformer and the current information of the primary path... The system sends control signals, which, via the drive circuit, control the on / off state of the low-side high-voltage HV MOS power switch. The primary-side demagnetization detection circuit detects the demagnetization moment of the multi-winding planar transformer during the cell charging equalization phase. The primary-side overcurrent detection circuit transmits primary-side current information. The signal is compared with an overcurrent threshold, and an overcurrent signal OCP is issued to control the PWM modulator to avoid overcurrent in the primary path.

[0075] The power stage includes a current sensor, a zero-current detection (ZCD) circuit, a drive circuit, and a low-side high-voltage HVMOS power switch. The current sensor acquires the real-time inductor current of the primary path. ,in This represents the real-time inductor current flowing through the primary winding, controlled by the low-side high-voltage HV MOS power switch. The zero-current detection circuit (ZCD) detects the primary inductor current during the cell discharge equalization phase. At the zero-crossing moment, when the primary inductor current When the voltage drops to zero, the ZCD output signal turns off the low-side high-voltage HV MOS power switch. The drive circuit is used to drive the gate of the low-side high-voltage HV MOS power switch. The low-side high-voltage HV MOS power switch is located on the low side of the DC common terminal, and its withstand voltage is configured to cover the DC common terminal voltage. The sum of the voltage reflected from the transformer.

[0076] It should be noted that the low-side high-voltage HV MOS power switch in the primary-side active balancing control chip also bears the reflected voltage stress of the primary-side inductance of the multi-winding planar transformer. This forms a symmetrical configuration on both the primary and secondary sides with the high-voltage HV MOS on the transformer side of each pair of unidirectional power switches on the secondary side bearing the reflected voltage stress. This allows both the primary and secondary sides to directly absorb the reflected voltage from the transformer side using high-voltage devices, without the need for external clamping circuits or RCD absorption circuits.

[0077] V. Multi-winding planar transformer As shown in Figure 5, the multi-winding planar transformer used in this embodiment is a printed circuit type transformer, which is integrated on the multilayer printed circuit board (PCB) where the primary-side active balancing control chip and the secondary-side active balancing control chip are located.

[0078] This transformer is mainly composed of a magnetic core and winding patterns on a multi-layer PCB. The magnetic core adopts an E-type structure with a center post that runs through the multi-layer PCB. The primary winding and multiple secondary windings are alternately stacked and distributed in different signal layers of the multi-layer PCB. For example, if a battery pack contains... If the battery is saved, the transformer will have one primary winding layer and Each secondary winding layer; in the PCB stack-up direction, the primary winding layer and each secondary winding layer are arranged alternately, for example, they can be arranged according to... — — — — —... in sequence (where Represents the primary winding layer. Representing the The primary winding can be arranged in layers (or alternatively, alternating layers) according to specific layer constraints. This alternating layered structure makes the physical distance between the primary winding and each secondary winding extremely short, thereby significantly reducing the leakage inductance of the transformer and improving the energy coupling efficiency between the primary and secondary windings.

[0079] Furthermore, the start and end points of each winding are directly extended to the soldering pins of the primary-side and secondary-side active balancing control chips via PCB traces, achieving leadless interconnection between the multi-winding planar transformer and the two control chips. This design eliminates the parasitic inductance generated by redundant solder joints and external leads in traditional wound transformer designs. In flyback architectures, parasitic inductance generates voltage spikes at the moment the power switch is turned off. The voltage spike can be represented as: in, For lead parasitic inductance, This represents the rate of change of current at the instant the power switch is turned off. It is achieved by directly connecting the PCB traces to the pads. This reduces the switching spike voltage. This reduces the requirements for the withstand voltage margin of power switches and reduces switching losses.

[0080] Because the windings are embedded inside the PCB instead of using traditional wire winding, the overall height of the multi-winding planar transformer is limited only by the thickness of the E-type core, allowing the equalization system to be integrated into an extremely thin volume. It should be noted that there is also a synergistic effect between the controlled bidirectional blocking MOS switch pairs and the multi-winding PCB planar transformer: at the moment a primary winding in the transformer is turned off, voltages are induced on other unselected secondary windings due to mutual inductive coupling; at this time, the unidirectional conducting power switches in the unselected channels, being in a bidirectional blocking state, can prevent parasitic conduction in these non-target channels, avoiding energy leakage through unexpected paths, thus ensuring the selection independence between each channel. In other words, the controlled bidirectional blocking MOS switch pairs not only block reverse current in static cell voltage difference scenarios but also prevent parasitic coupling conduction in dynamic switching transient scenarios; the two work together to achieve reliable independent operation of each channel in the multi-channel transformer system.

[0081] VI. Frequency Adaptive Flyback Control and Demagnetization Lockout Mechanism The equalization system in this embodiment adopts a frequency adaptive flyback control strategy with dual preconditions of demagnetization completion and timing termination.

[0082] Specifically, on the secondary side, the frequency adaptive adjustment module adjusts according to the error signal. Dynamically determine the operating frequency The trigger condition for the next PWM pulse cycle is locked to the simultaneous fulfillment of the following two conditions: First, the secondary demagnetization detection circuit detects that the multi-winding planar transformer has completed demagnetization; second, the frequency adaptive adjustment module itself adjusts according to... The start-up timing has ended. On the primary side, the primary side frequency adaptive adjustment module adjusts according to the primary side error signal. Dynamically determine the operating frequency The trigger condition for the next PWM pulse cycle is also locked to the simultaneous fulfillment of two conditions: demagnetization completion and timing end.

[0083] This dual precondition design helps ensure that the magnetization energy in the transformer is essentially released before the start of each operating cycle, avoiding the risk of flux saturation due to residual magnetic flux in the core and the dangerous situation of simultaneous unexpected conduction of the primary and secondary switches. Combined with multiple protection criteria—ZCD turning off the corresponding power switch when the inductor current crosses zero and OCP turning off the corresponding power switch in advance when the current exceeds a threshold—the system can maintain reliable operation under different voltage differences and load conditions.

[0084] VII. Reuse of Optocoupler Feedback Channel In this embodiment, the cell discharge equalization stage and the cell charge equalization stage share the same unidirectional feedback link consisting of "secondary optocoupler controller → optocoupler → primary feedback input terminal FB".

[0085] During the discharge equalization phase, the optocoupler controller only outputs an OPC signal to drive the optocoupler after the secondary-side power switch is completely disconnected and the secondary-side current returns to zero. This causes the optocoupler to output a feedback signal FB, triggering the primary-side controller to turn on the primary-side low-side switch. This timing constraint—that is, the optocoupler controller only… The OPC signal is output later—this helps to ensure that the timing of the secondary switch disconnection and the primary switch conduction does not overlap, thus avoiding simultaneous conduction of the primary and secondary sides of the transformer.

[0086] During the charging equalization phase, the optocoupler controller adjusts the output of the error amplifier. The OPC signal output drives the optocoupler to feed back the error information to the primary side. The primary side error amplifier receives the FB signal and then obtains the error information. This controls the operation of the primary-side PWM modulator.

[0087] It should be noted that in the two stages, the roles of the primary and secondary sides switch with each stage, but the direction of feedback signal transmission remains unidirectional, from the secondary side to the primary side. The turn-on timing of the power switches within the primary and secondary sides is adaptively and autonomously controlled by each chip based on its own inductor current zero-crossing detection, demagnetization detection, overcurrent detection, and PWM modulator. No external master controller is required to coordinate the turn-on timing between the primary and secondary side switches, thus ensuring the non-overlapping of the switch timings on both sides.

[0088] VIII. System Collaborative Operation Overview As shown in Figure 2, when the equalization system performs non-adjacent cell equalization, a two-stage energy transfer strategy is adopted. During the cell discharge equalization stage, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to conduct, so that the cell to be equalized charges the primary-side inductor through the multi-winding planar transformer; after the unidirectional power switch pair is de-energized, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip through an optocoupler. The power switch in the primary-side active equalization control chip conducts based on the feedback signal, so that the magnetization energy input from the cell to be equalized in the transformer is released to the bus capacitor of the DC common terminal through the primary-side controlled path. .

[0089] During the cell charging equalization phase, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip via an optocoupler. The power switch in the primary-side active equalization control chip is turned on based on this feedback signal, enabling the DC common terminal to charge the primary inductor of the multi-winding planar transformer. After the primary-side power switch is turned off, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, so that the magnetization energy input from the DC common terminal in the transformer is released to the cell to be equalized through the secondary-side controlled path.

[0090] During the two-stage operation described above, the turn-on timing of the power switches on the primary and secondary sides is adaptively and autonomously controlled by each chip based on its own inductor current zero-crossing detection, demagnetization detection, overcurrent detection, and PWM modulator. No external master controller is required to coordinate the turn-on timing between the primary and secondary side switches, thus ensuring the non-overlapping of the switch timing on both sides.

[0091] Example 2: High-Integration Bidirectional Active Balancing Method This example provides a high-integration bidirectional active balancing method suitable for multi-cell battery packs, executed using the high-integration bidirectional active balancing system described in Example 1. The secondary-side active balancing control chip detects the voltage of each cell and locates the cell to be balanced through its cell voltage monitoring circuit. When balancing non-adjacent cells, this balancing method includes two stages: a cell discharge balancing stage and a cell charge balancing stage. Optionally, in the cell discharge balancing stage, the cell voltage monitoring circuit adjusts the positive and negative voltages of each cell based on the detected values. The system first identifies the cell with the highest voltage in the battery pack as the cell to be balanced; during the cell charging balancing phase, the cell voltage monitoring circuit identifies the cell with the lowest voltage in the battery pack as the cell to be balanced. These two phases are executed alternately to directly narrow the difference between the highest and lowest voltages within the battery pack, maximizing the contribution of each energy transfer to improving the balancing process.

[0092] I. Cell Discharge Equalization Stage As shown in Figure 6, the cell discharge equalization stage specifically includes the following steps.

[0093] Step 100: The cell voltage monitoring circuit in the secondary-side active balancing control chip detects the positive and negative voltages of each cell. The cell with the highest voltage in the battery pack is identified as the cell to be balanced (i.e., the discharge target), and this cell is connected to the corresponding balancing channel. The corresponding unidirectional power switch is turned on under the control of the drive circuit.

[0094] Step 200: The secondary controller begins operation. The secondary inductor current of the multi-winding planar transformer... It begins to rise. The current sensor monitors the current information in the equalization channel in real time. The error amplifier will input current information. The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The frequency adaptive adjustment module adjusts according to the error signal. Adaptive adjustment of system operating frequency .

[0095] Step 300: At the beginning of each working cycle, the PWM modulator sets the output signal to 1, and waits for the equalization cell to start discharging, then the secondary inductor current... The current continues to rise, and the transformer's magnetizing inductance stores energy. This process involves two parallel judgments: Step 310: When the secondary inductor current... Rise to error signal When the corresponding current threshold is reached, the PWM modulator sets the output signal to 0, the unidirectional power switch is turned off, and the secondary current returns to zero.

[0096] Step 320: Simultaneously, the overcurrent detection circuit continuously compares the secondary inductor current in real time. With overcurrent threshold ,once Exceed If the overcurrent detection circuit outputs an overcurrent signal OCP, it will disconnect the unidirectional power switch pair ahead of the conventional comparison result in step 310.

[0097] Step 400: After the unidirectional power switch pair is disconnected, the optocoupler controller outputs an OPC signal to drive the optocoupler. It should be noted that the optocoupler controller only activates when the secondary power switch pair is completely disconnected (i.e.,...). Only after this is the OPC signal output to avoid simultaneous bidirectional conduction on both the primary and secondary sides of the transformer. The optocoupler outputs a feedback signal FB to the primary-side active balancing control chip. The primary-side controller receives the feedback signal FB and begins operation, controlling the internal low-side high-voltage HV MOS power switch to turn on. At this time, the energy previously output from the cell to be balanced and stored in the transformer's magnetizing inductance is induced in the primary-side inductor by the transformer, and the primary-side inductor begins to interact with the bus capacitance at the DC common terminal. To perform charging and energy storage.

[0098] Step 410: The zero-current detection circuit (ZCD) in the primary-side active balancing control chip continuously detects the primary-side inductor current. Whether it crosses zero. Once If the voltage crosses zero, the low-side high-voltage HV MOS power switch is turned off, indicating that the energy in the transformer has been completely transferred to the DC common terminal during this operating cycle.

[0099] Step 500: While the primary-side controller is operating, the demagnetization detection circuit in the secondary-side active equalization control chip detects whether the multi-winding planar transformer is demagnetized. Simultaneously, the frequency adaptive adjustment module adjusts the frequency based on the error signal. Start timing. When the timing ends and the multi-winding planar transformer has been demagnetized, both conditions are met simultaneously, trigger the PWM modulator to enter the next working cycle, and return to step 300 to continue execution.

[0100] Step 600: Repeat steps 300 to 500 until the voltage difference between the cell to be balanced and other cells in the battery pack is equalized. Meets the preset equalization threshold conditions (e.g.) The cell discharge equalization phase ends.

[0101] II. Cell charging equalization stage, as shown in Figure 7, includes the following steps.

[0102] Step 700: The cell voltage monitoring circuit in the secondary-side active balancing control chip detects the positive and negative voltages of each cell. The cell with the lowest voltage in the battery pack is identified as the cell to be balanced (i.e., the charging target), and this cell is connected to the corresponding balancing channel.

[0103] Step 800: The secondary controller begins operation. The current sensor monitors the current information in the equalization channel in real time. The error amplifier will input current information. The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The optocoupler controller is based on... The output OPC signal drives the optocoupler to feed back the error information to the primary side. The error amplifier in the primary-side active equalization control chip receives the feedback signal FB output by the optocoupler, subtracts it from the reference signal, and amplifies it to obtain the primary-side error signal. The primary-side frequency adaptive adjustment module adjusts according to... Adaptive adjustment of system operating frequency .

[0104] Step 900: At the beginning of each working cycle, the primary-side PWM modulator sets the output signal to 1, the DC common terminal begins to discharge, and the primary-side inductor current... The current continues to rise, and the transformer's magnetizing inductance stores energy. This process involves two parallel judgments: Step 910: When the primary inductor current... Rise to When the corresponding current threshold is reached, the PWM modulator sets the output signal to 0, the primary-side low-voltage HV MOS power switch is turned off, and the primary-side current returns to zero.

[0105] Step 920: Simultaneously, the primary-side overcurrent detection circuit continuously compares the primary-side inductor current in real time. The system is configured to use an overcurrent threshold. Once an overcurrent occurs, an overcurrent signal OCP is issued, which disconnects the primary-side power switch ahead of the normal comparison result in step 910.

[0106] Step 1000: After the primary-side power switch is turned off, the secondary-side controller starts working, controlling the unidirectional power switch pair corresponding to the cell to be balanced to turn on. At this time, the energy previously output from the DC common terminal and stored in the transformer's magnetizing inductance is induced in the secondary-side inductor through the transformer, and the secondary-side inductor begins to charge the cell to be balanced. During this process, the secondary-side error amplifier continuously receives secondary-side current information. The error with the reference signal is amplified and fed back to the primary side via an optocoupler, enabling the primary side to dynamically adjust the control parameters for subsequent work cycles.

[0107] Step 1010: The zero-current detection circuit (ZCD) in the secondary-side active balancing control chip continuously detects the secondary-side inductor current. Whether it crosses zero. Once If the voltage crosses zero, the unidirectional power switch pair is turned off, indicating that the energy in the transformer has been completely transferred to the target cell during this working cycle.

[0108] Step 1100: While the secondary controller is operating, the demagnetization detection circuit in the primary-side active equalization control chip detects whether the multi-winding planar transformer has demagnetized. Simultaneously, the primary-side frequency adaptive adjustment module starts timing based on the feedback signal FB output by the optocoupler. When both conditions are met—timing ends and the multi-winding planar transformer has demagnetized—the primary-side PWM modulator is triggered to enter the next working cycle, and the process returns to step 900 to continue execution.

[0109] Step 1200: Repeat steps 900 to 1100 until the voltage difference between the cell to be balanced and other cells in the battery pack is reached. Meets the preset equalization threshold conditions (e.g.) The cell charging equalization phase ends.

[0110] By alternating between the cell discharge balancing stage and the cell charge balancing stage, this application achieves bidirectional active balancing between any two (including non-adjacent) cells in a multi-cell series battery pack.

[0111] III. Explanation of the Flyback Energy Transfer Mechanism To further explain the physical mechanism of the two-stage energy transfer in this embodiment, the cell discharge equalization stage is used as an example. In step 300, during the conduction period of the secondary power switch, the voltage of the cell to be equalized is applied to the secondary winding, and the magnetizing inductance of the transformer... Energy storage. The energy stored in the magnetized inductor within a single cycle. It can be represented as: in, For transformer magnetizing inductance, This is the peak inductor current at the moment the secondary power switch is turned off. Subject to error signal The corresponding current threshold and overcurrent threshold Due to the combined constraints, the smaller of the two values ​​is taken. In steps 400 and 410, after the secondary power switch is turned off, the magnetization energy is released to the bus capacitor at the DC common terminal through the primary controlled path (the synchronous rectification path formed by the conduction of the low-side high-voltage HV MOS power switch). The energy transfer direction during the cell charging equalization phase is symmetrical: the primary-side power switch turns on to store energy in the magnetizing inductor at the common terminal, and after it turns off, the secondary-side power switch turns on to release the magnetizing energy to the cell to be equalized.

[0112] IV. Description of Non-Adjacent Cell Balancing Scenarios: Optionally, when the source cell and target cell requiring balancing in the battery pack are non-adjacent cells, the system first performs the cell discharge balancing stage described above, transferring excess energy from the source cell (the cell with the highest voltage) to the DC common terminal for temporary storage via the corresponding secondary winding; subsequently, it performs the cell charging balancing stage, transferring the energy temporarily stored in the DC common terminal to the target cell (the cell with the lowest voltage) via the primary winding. Since each cell corresponds to an independent secondary winding and a pair of independent unidirectional power switches, the source cell and target cell can be cells located anywhere in the battery pack, without needing to pass through multiple transfers via adjacent cells.

[0113] For example, for a battery pack containing 16 cells connected in series, if the voltage of cell 1 is the highest and the voltage of cell 16 is the lowest, in a traditional adjacent inductor balancing scheme, it would require 15 successive transfers to complete the energy transfer from cell 1 to cell 16. The cumulative efficiency is calculated as follows: Exponential decay (where For single transfer efficiency, The balancing time increases significantly with the number of relay stages; however, the system in this embodiment only requires a two-stage transfer of "Section 1 → Common Terminal → Section 16" to complete the balancing process, which significantly shortens the balancing time and improves the overall balancing efficiency.

[0114] The above embodiments have the following technical effects: First, by using a dual-chip collaborative architecture—where the secondary-side active balancing control chip controls each cell, the primary-side active balancing control chip controls the DC common terminal, a multi-winding planar transformer achieves energy mediation coupling, and an optocoupler achieves isolation feedback—bidirectional active balancing between any two cells (including non-adjacent cells) is achieved, avoiding the cumulative efficiency decay and extended balancing time caused by the multiple transfers required by the traditional adjacent inductor scheme.

[0115] Secondly, the primary-side active balancing control chip integrates a low-side high-voltage HV MOS power switch, and the secondary-side active balancing control chip integrates multiple pairs of unidirectional power switches. The entire system consists of only two chips, a multi-winding planar transformer, and an optocoupler. It eliminates the need for external discrete power MOS, external driver chips, and external clamping components, resulting in a simple peripheral circuit that helps reduce system cost and PCB footprint.

[0116] Third, the unidirectional power switch pair in each equalization channel employs a controlled bidirectional voltage blocking structure composed of two back-to-back NMOS transistors with their sources connected and body diodes arranged in reverse opposite directions. This structure blocks the reverse current caused by the cell voltage difference when the channel is not selected and prevents parasitic conduction currents generated by mutual inductive coupling in other secondary windings. The asymmetrical configuration of high-voltage HVMOS and low-voltage LVMOS, within the chip area constraint, balances voltage withstand capability and conduction loss, which is a key feature that distinguishes this application from other Flyback equalization schemes.

[0117] Fourth, the multi-winding planar transformer adopts a structure in which the primary winding and multiple secondary windings are alternately stacked in a multi-layer PCB. The winding ends extend directly to the control chip soldering pins through PCB traces, realizing leadless interconnection, reducing parasitic inductance, improving primary and secondary coupling efficiency, and the overall height of the transformer is only limited by the core thickness, allowing the system to be integrated into an extremely thin volume.

[0118] Fifth, the frequency adaptive adjustment module sets the completion of demagnetization and the end of timing as dual preconditions for triggering the next cycle PWM pulse. Combined with the multiple criteria of ZCD zero-crossing turn-off and OCP overcurrent protection, it helps to ensure that the flyback energy is fully released in each working cycle before starting the next pulse, avoiding the accidental simultaneous conduction of the primary and secondary switches, and maintaining the reliability of the system under different voltage differences and load conditions.

[0119] This application is not limited to the above embodiments. Those skilled in the art can make several equivalent substitutions without departing from the spirit and scope of this application. For example, replacing the optocoupler with a digital isolator or a transformer-isolated feedback device; replacing the N-channel MOS power switch with a GaN HEMT device; replacing the E-type magnetic core with an EI-type, EQ-type, or RM-type magnetic core; replacing the bus capacitor with a supercapacitor or auxiliary energy storage battery; and replacing the rigid PCB planar transformer with a flexible PCB planar transformer, etc. All these equivalent substitutions should fall within the protection scope of this application.

[0120] The embodiments of this application are further explained below by way of example.

[0121] DC common terminal bus capacitor The operating voltage range can be set according to the total battery pack voltage and transformer turns ratio. Its capacity is selected based on the balancing current and switching frequency to ensure that the common-terminal voltage fluctuation does not exceed a preset range during continuous balancing cycles. Upon system power-up, a pre-charge resistor or soft-start circuit can be used to... Pre-charge to the operating voltage range to avoid surge current at power-on. When the common terminal voltage exceeds the overvoltage threshold, the excess energy can be dissipated through the discharge circuit to protect the system.

[0122] The cell voltage monitoring circuit employs a switched capacitor sampling method. A time-division multiplexed switch array sequentially collects the positive and negative voltages of each cell into a low-voltage analog processing domain. A sample-and-hold circuit eliminates common-mode offset, thus achieving accurate individual cell voltage detection within a relatively small circuit area. The common-mode input range covers the entire series voltage from the negative to the positive terminal of the battery pack, and a limiting protection structure is provided at the input of each sampling channel.

[0123] The demagnetization detection circuit can be implemented using drain voltage detection. Specifically, the demagnetization detection circuit monitors the drain node voltage of the power switch connected to the transformer winding; specifically, on the secondary side, it monitors the drain voltage of the high-voltage HV MOS near the multi-winding planar transformer side of the Nth unidirectional power switch pair. The primary side monitors the drain voltage Vcd of the low-side high-voltage HVMOS power switch. After the power switch is turned off and the inductor current has fully released and the transformer has completed demagnetization, the drain voltage exhibits ringing decay characteristics. In other words, when the power switch is turned off and the inductor current has fully released and the transformer has completed demagnetization, the drain voltage exhibits ringing decay characteristics. The demagnetization detection circuit detects the falling edge of this drain voltage or a crossover event at a specific voltage threshold using a comparator, and outputs a demagnetization completion signal. This demagnetization completion signal is sent to the frequency adaptive adjustment module, where it is ANDed with the frequency timing end signal. Only when both signals are true is the next PWM pulse allowed to be triggered.

[0124] The frequency adaptive adjustment module can be implemented using a linear mapping method. and The correspondence between them: in, This is the frequency-adjustable gain coefficient. Based on the operating frequency, This is the error signal output by the error amplifier. Operating frequency. Limited to Within the range. When When the value is large, the system operating frequency increases to speed up the equalization process. When the frequency is low, the system operating frequency is reduced to decrease switching losses. Optionally, the frequency adaptive adjustment module can also use a segmented lookup table method to... Several discrete intervals are mapped to corresponding frequency values. Regardless of the mapping method used, a logic latching condition is set: the next pulse triggering is prohibited if demagnetization is not completed.

[0125] The zero-current detection circuit can be implemented by sampling the drain node voltage of the power transistor and using a comparator; wherein, the secondary side samples the drain voltage of the high-voltage HV MOS near the multi-winding planar transformer on the side of the Nth unidirectional power switch. The primary-side sampling method detects the drain voltage Vcd of the low-side high-voltage HV MOS power switch. The sampled drain node voltage is then fed into a high-sensitivity comparator. As the inductor current drops to near zero, the drain node voltage gradually rises from a negative voltage to near zero. When the voltage exceeds a preset zero-crossing threshold, the comparator flips its output to show a zero-crossing signal, triggering the drive circuit to turn off the corresponding power switch (turning off the primary-side low-side high-voltage HV MOS power switch during discharge and the secondary-side unidirectional power switch pair during charging) to prevent reverse current flow and ensure complete release of magnetization energy to the target side.

[0126] This embodiment employs a single optocoupler dual-mode multiplexing scheme. During the cell discharge equalization phase, the optocoupler operates in digital trigger mode. After the secondary power switch pair is completely disconnected, the optocoupler controller outputs a pulsed OPC signal to drive the LED terminal of the optocoupler. The optocoupler output then generates a corresponding pulse signal FB to trigger the primary controller. During the cell charging equalization phase, the optocoupler operates in analog feedback mode. The optocoupler controller adjusts the signal based on the error signal... The duty cycle or amplitude of the modulated OPC signal is transmitted via an optocoupler to the feedback input terminal FB of the primary-side error amplifier, which then generates the primary-side error signal. The two stages select the corresponding driving mode through the mode switching logic inside the secondary controller, without the need for additional optocouplers. To compensate for the drift of the optocoupler current transfer ratio (CTR) with temperature and aging, a compensation network can be set on the primary side to correct the FB signal.

[0127] In this embodiment, the gates of the high-voltage HV MOS and the low-voltage LV MOS in the same unidirectional power switch pair are controlled by the same drive signal (common drive mode). The drive circuit outputs a single control signal to simultaneously drive the gates of both NMOS transistors, causing the two transistors to turn on or off synchronously. When the equalization channel is not selected, the gate voltages of both transistors remain at a low level, and both transistors are in the off state. The body diodes are arranged in reverse opposite directions to form a bidirectional voltage blocking mechanism.

[0128] The opposite-name terminal of the primary winding is the end closest to the positive terminal of the common power supply, and the same-name terminal of each secondary winding is the end closest to the positive terminal of the corresponding cell. The setting of the same-name terminals for each winding follows the operating sequence of the flyback transformer—that is, during the primary-side switch's conduction and energy storage period, the same-name terminal of the secondary winding is negative, the opposite-name terminal is positive, and the secondary power switch is in the off state; after the primary-side switch is turned off, the secondary winding voltage flips, and the secondary power switch conducts to release energy. The turns ratio of each secondary winding to the primary winding is designed so that the number of turns in each secondary winding is equal. This ensures that each cell channel achieves symmetrical energy conversion conditions during equilibrium. The turns ratio can also be adjusted based on the ratio of the common terminal voltage to the cell voltage.

[0129] It should be noted that in this patent application, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. In this patent application, if it refers to performing an action according to an element, it means performing the action at least according to that element, including two cases: performing the action only according to that element, and performing the action according to that element and other elements. Expressions such as "multiple," "repeatedly," and "various" include two, two times, two kinds, and more than two, more than two times, and more than two kinds.

[0130] All documents mentioned in this application are considered to be incorporated in their entirety into the disclosure of this application so that they can serve as a basis for modifications if necessary. Furthermore, it should be understood that after reading the foregoing disclosure of this application, those skilled in the art can make various alterations or modifications to this application, and these equivalent forms also fall within the scope of protection claimed in this application.

Claims

1. A highly integrated bidirectional active balancing system suitable for multi-cell battery packs, characterized in that, This includes a secondary-side active balancing control chip, a primary-side active balancing control chip, a multi-winding planar transformer, and an optocoupler; The primary-side active balancing control chip is powered by a DC common terminal and integrates a controller, power stage circuit and power switch. The secondary-side active balancing control chip is powered by the multi-cell battery pack. It integrates a controller, power stage circuit and multiple pairs of unidirectional power switches. Each pair of unidirectional power switches corresponds to the balancing channel of a cell. The multi-winding planar transformer has a primary winding and multiple secondary windings. The primary winding is coupled to the power switch in the primary active balancing control chip, and the multiple secondary windings are respectively coupled to multiple pairs of unidirectional power switches in the secondary active balancing control chip. The multi-winding planar transformer is used to complete the energy conversion between the primary active balancing control chip and the secondary active balancing control chip. The output terminal of the optocoupler controller in the secondary-side active balancing control chip is electrically connected to the feedback input terminal FB in the primary-side active balancing control chip via the optocoupler. During both the cell discharge balancing stage and the cell charge balancing stage, the secondary-side active balancing control chip transmits feedback signals unidirectionally to the primary-side active balancing control chip via the optocoupler to coordinately control the conduction timing of the power switch in the primary-side active balancing control chip.

2. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The controller in the secondary-side active balancing control chip includes a cell voltage monitoring circuit, a demagnetization detection circuit, an error amplifier, a frequency adaptive adjustment module, a PWM modulator, an overcurrent detection circuit, and an optocoupler controller; the power stage circuit in the secondary-side active balancing control chip includes a current sensor, a zero current detection circuit (ZCD), a drive circuit, and the multiple pairs of unidirectional power switches. The cell voltage monitoring circuit is used to detect the positive and negative voltages of each cell. The system identifies the battery cells that need balancing and connects them to the corresponding balancing channel; the current sensor is used to detect the current information in the balancing channel in real time. The error amplifier is used to convert the current information. The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The frequency adaptive adjustment module is used to adjust according to the error signal. Determine the operating frequency of the equalization system. The PWM modulator at the operating frequency The following is based on the demagnetization state of the multi-winding planar transformer and the current information of the equalization channel. A control signal is issued, and the drive circuit controls the unidirectional power switch pair to turn on or off; the overcurrent detection circuit is used to process the current information acquired by the current sensor. The overcurrent signal OCP is compared with an overcurrent threshold to control the PWM modulator to avoid overcurrent in the equalization channel; the optocoupler controller is used to output an OPC signal to drive the optocoupler during the cell discharge equalization phase and the cell charge equalization phase; the demagnetization detection circuit is used to detect the demagnetization time of the multi-winding planar transformer during the cell discharge equalization phase; the zero current detection circuit ZCD is used to detect the zero-crossing time of the secondary inductor current during the cell charge equalization phase.

3. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The controller in the primary-side active balancing control chip includes a demagnetization detection circuit, an error amplifier, a PWM modulator, a frequency adaptive adjustment module, and an overcurrent detection circuit; the power stage circuit in the primary-side active balancing control chip includes a current sensor, a zero-current detection circuit (ZCD), a drive circuit, and the power switch, wherein the power switch is a low-side high-voltage HVMOS power switch, and the low-side high-voltage HVMOS power switch is configured to bear the primary-side inductor reflected voltage stress of the multi-winding planar transformer; The error amplifier in the primary-side active equalization control chip receives the feedback signal FB output by the optocoupler, subtracts it from the reference signal, and amplifies it to obtain the primary-side error signal. The frequency adaptive adjustment module in the primary-side active equalization control chip is used to adjust the frequency according to the primary-side error signal. Determine the operating frequency of the equalization system. The current sensor in the primary-side active balancing control chip is used to acquire the current information of the primary-side path. The PWM modulator in the primary-side active equalization control chip operates at the specified frequency. Based on the demagnetization state of the multi-winding planar transformer and the current information... A control signal is issued, and the driving circuit controls the low-side high-voltage HVMOS power switch to turn on or off; the overcurrent detection circuit in the primary-side active balancing control chip is used to process the current information. A comparison with an overcurrent threshold is made, and an overcurrent signal OCP is issued to control the PWM modulator to avoid overcurrent in the primary-side path; the demagnetization detection circuit in the primary-side active balancing control chip is used to detect the demagnetization moment of the multi-winding planar transformer during the cell charging balancing phase; the zero-current detection circuit ZCD in the primary-side active balancing control chip is used to detect the primary-side inductor current during the cell discharging balancing phase. The moment of zero crossing.

4. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The multi-winding planar transformer is a printed circuit type transformer, integrated on a multilayer circuit board containing the primary-side active balancing control chip and the secondary-side active balancing control chip. The primary-side winding and multiple secondary-side windings are alternately stacked in different signal layers of the multilayer printed circuit board. The starting and ending points of the primary-side winding and the multiple secondary-side windings extend through printed circuit board traces to the soldering pins of the primary-side active balancing control chip and the secondary-side active balancing control chip, respectively, to achieve leadless interconnection between the multi-winding planar transformer and the primary-side active balancing control chip and the secondary-side active balancing control chip. The multi-winding planar transformer also includes an E-type magnetic core with a central column that penetrates the multilayer printed circuit board. The overall height of the multi-winding planar transformer is limited by the thickness of the E-type magnetic core.

5. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The unidirectional power switch pair consists of two back-to-back NMOS transistors with their sources connected. The body diodes of the two NMOS transistors are arranged in reverse opposite directions to form a bidirectional voltage blocking structure. The NMOS transistor closer to the secondary winding of the multi-winding planar transformer is a high-voltage HVMOS, configured to bear the reflected voltage stress on the multi-winding planar transformer side. The NMOS transistor closer to the cell side is a low-voltage LVMOS, which achieves lower on-resistance in a relatively smaller area. The low-voltage LVMOS is configured to reduce conduction losses when the corresponding cell channel is selected, and when the corresponding cell channel is not selected, it and the body diodes of the high-voltage HVMOS are arranged in reverse opposite directions to form the bidirectional voltage blocking structure, thereby blocking reverse current flow when the battery voltage is inconsistent.

6. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal output by the error amplifier in the secondary-side active equalization control chip. Adjust the operating frequency of the equalization system The frequency adaptive adjustment module in the primary-side active equalization control chip adjusts according to the primary-side error signal output by the error amplifier in the primary-side active equalization control chip. Adjust the operating frequency of the equalization system ; Furthermore, the frequency adaptive adjustment module in the secondary-side active equalization control chip only operates when the demagnetization detection circuit in the secondary-side active equalization control chip detects that the multi-winding planar transformer has completed demagnetization, and the frequency adaptive adjustment module itself adjusts according to... The PWM modulator in the secondary-side active equalization control chip is triggered to enter the next working cycle only when both conditions for the start-up timing end are met simultaneously. The frequency adaptive adjustment module in the primary-side active equalization control chip is triggered to enter the next working cycle only when the demagnetization detection circuit in the primary-side active equalization control chip detects that the multi-winding planar transformer has completed demagnetization, and the frequency adaptive adjustment module itself is triggered to enter the next working cycle based on the feedback signal FB output by the optocoupler. in, The error amplifier in the secondary-side active equalization control chip will use the current information of the equalization channel. The error signal output after subtracting from the reference signal and amplifying it; The primary-side error signal is the result of the difference between the feedback signal FB output by the optocoupler and the reference signal, amplified by the error amplifier in the primary-side active equalization control chip. The operating frequency of the equalization system is denoted as .

7. The highly integrated bidirectional active equalization system according to claim 1, characterized in that: The equalization system is configured to employ a two-stage energy transfer when performing equalization of non-adjacent cells: During the cell discharge equalization stage, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, so that the cell to be equalized charges the primary-side inductor through the multi-winding planar transformer. After the unidirectional power switch is disconnected, the secondary-side active balancing control chip transmits a feedback signal to the primary-side active balancing control chip via the optocoupler. The power switch in the primary-side active balancing control chip is turned on based on the feedback signal, so that the energy input from the cell to be balanced in the multi-winding planar transformer is transferred to the DC common terminal. During the cell charging equalization phase, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip via the optocoupler. The power switch in the primary-side active equalization control chip is turned on based on this feedback signal, enabling the DC common terminal to charge the multi-winding planar transformer. After the power switch in the primary-side active equalization control chip is turned off, the secondary-side active equalization control chip drives the unidirectional power switch pair corresponding to the cell to be equalized to turn on, transferring the energy input from the DC common terminal in the multi-winding planar transformer to the cell to be equalized.

8. A highly integrated bidirectional active balancing method suitable for multi-cell battery packs, executed using the highly integrated bidirectional active balancing system as described in claim 1, characterized in that: The secondary-side active balancing control chip detects the voltage of each cell and locates the cell to be balanced through its cell voltage monitoring circuit; when performing non-adjacent cell balancing, the balancing method includes the following two-stage energy transfer: During the cell discharge equalization stage, the secondary-side active equalization control chip controls the unidirectional power switch pair corresponding to the cell to be equalized to be turned on, so that the cell to be equalized charges the primary-side inductor through the multi-winding planar transformer; after the unidirectional power switch pair is turned off, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip through the optocoupler, and the primary-side active equalization control chip controls the power switch inside it to be turned on based on the feedback signal, so as to release the energy in the multi-winding planar transformer to the DC common terminal; During the cell charging equalization stage, the secondary-side active equalization control chip transmits a feedback signal to the primary-side active equalization control chip via the optocoupler. The primary-side active equalization control chip controls the internal power switch to turn on based on the feedback signal, so that the DC common terminal charges the secondary-side inductor through the multi-winding planar transformer. After the power switch in the primary-side active balancing control chip is turned off, the secondary-side active balancing control chip drives the unidirectional power switch pair corresponding to the cell to be balanced to be turned on, so that the energy in the multi-winding planar transformer is released to the cell to be balanced through the unidirectional power switch pair.

9. The highly integrated bidirectional active equalization method according to claim 8, characterized in that, The cell discharge equalization stage specifically includes the following steps: S11. The cell voltage monitoring circuit in the secondary-side active balancing control chip determines the cell that needs to be discharged and balanced, and connects the cell to the corresponding balancing channel. The corresponding unidirectional power switch is turned on, and the secondary-side inductor current of the multi-winding planar transformer is increased. rise; S12. The current sensor in the secondary-side active balancing control chip detects the current information in the balancing channel in real time. The error amplifier in the secondary-side active equalization control chip will convert the current information... The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal. Adaptive adjustment of the operating frequency of the equalization system ; S13. At the beginning of each working cycle, the PWM modulator in the secondary-side active balancing control chip sets the output signal to 1, causing the cell to be balanced to discharge and the secondary-side inductor current to... Rise; when the secondary inductor current rises. Exceeding the error signal At this time, the PWM modulator sets the output signal to 0, the unidirectional power switch is turned off, and the secondary current returns to zero; simultaneously, the overcurrent detection circuit in the secondary active equalization control chip compares the secondary inductor current in real time. With an overcurrent threshold, an overcurrent signal OCP is issued to prematurely disconnect the unidirectional power switch pair once an overcurrent occurs; S14. After the unidirectional power switch is turned off, the optocoupler controller in the secondary-side active balancing control chip outputs an OPC signal to drive the optocoupler. The optocoupler outputs a feedback signal FB to the primary-side active balancing control chip. Based on the feedback signal FB, the primary-side active balancing control chip controls the internal power switch to turn on. The energy output by the cell to be balanced is induced in the primary-side inductor through the multi-winding planar transformer. The primary-side inductor begins to charge and store energy at the DC common terminal. The zero-current detection circuit ZCD in the primary-side active balancing control chip continuously detects the primary-side inductor current. Whether it crosses zero; if it crosses zero, the power switch is turned off. S15. During the operation of the primary-side active equalization control chip, the demagnetization detection circuit in the secondary-side active equalization control chip detects whether the multi-winding planar transformer is demagnetized. Simultaneously, the frequency adaptive adjustment module in the secondary-side active equalization control chip adjusts according to the error signal. Start timing; when timing ends and the two conditions of the multi-winding planar transformer being demagnetized are met simultaneously, trigger the PWM modulator to start the next working cycle; cyclically execute steps S13~S15 until the voltage of the cell to be balanced is consistent with that of other cells, and the cell discharge balancing phase ends.

10. The highly integrated bidirectional active equalization method according to claim 8, characterized in that, The cell charging equalization phase specifically includes the following steps: S21. The cell voltage monitoring circuit in the secondary active balancing control chip determines the cell that needs to be charged and balanced, and connects the cell to the corresponding balancing channel. S22. The current sensor in the secondary-side active balancing control chip detects the current information in the balancing channel in real time. The error amplifier in the secondary-side active equalization control chip will convert the current information... The difference between the error signal and the reference signal is calculated and amplified to output the error signal. The optocoupler controller in the secondary-side active equalization control chip determines the error signal based on the... The output OPC signal drives the optocoupler to feed back the error signal to the primary-side active equalization control chip. The error amplifier in the primary-side active equalization control chip receives the feedback signal FB output by the optocoupler and obtains the primary-side error signal. The frequency adaptive adjustment module in the primary-side active equalization control chip adjusts according to the primary-side error signal. Adaptive adjustment of the operating frequency of the equalization system ; S23. At the beginning of each working cycle, the PWM modulator in the primary-side active equalization control chip sets the output signal to 1, causing the DC common terminal to discharge and the primary-side inductor current to decrease. Rise; when the primary inductor current rises. Exceeding the primary side error signal At this time, the PWM modulator sets the output signal to 0, the power switch in the primary-side active balancing control chip is turned off, and the primary-side current returns to zero; simultaneously, the overcurrent detection circuit in the primary-side active balancing control chip compares the primary-side inductor current in real time. With an overcurrent threshold, an overcurrent signal OCP is issued to prematurely disconnect the power switch once an overcurrent occurs; S24. After the power switch in the primary-side active balancing control chip is turned off, the secondary-side active balancing control chip controls the unidirectional power switch corresponding to the cell to be balanced to be turned on. The energy output from the DC common terminal is induced in the secondary inductor through the multi-winding planar transformer, and the secondary inductor begins to charge the cell to be balanced. The zero-current detection circuit ZCD in the secondary-side active balancing control chip continuously detects the current of the secondary inductor. Whether it crosses zero; if it crosses zero, the unidirectional power switch pair is turned off. S25. During the operation of the secondary-side active balancing control chip, the demagnetization detection circuit in the primary-side active balancing control chip detects whether the multi-winding planar transformer has demagnetized. At the same time, the frequency adaptive adjustment module in the primary-side active balancing control chip starts timing according to the feedback signal FB output by the optocoupler. When the timing ends and the two conditions of the multi-winding planar transformer being demagnetized are met simultaneously, the PWM modulator is triggered to start the next working cycle. Steps S22 to S25 are executed repeatedly until the voltage of the cell to be balanced is consistent with that of other cells, and the cell charging balancing stage ends.

11. The highly integrated bidirectional active equalization method according to claim 8, characterized in that: During the cell discharge equalization phase, the cell voltage monitoring circuit in the secondary-side active equalization control chip monitors the positive and negative voltages of each cell. The cell with the highest voltage in the multi-cell battery pack is identified as the cell to be balanced. During the cell charging equalization phase, the cell voltage monitoring circuit in the secondary-side active equalization control chip monitors the positive and negative voltages of each cell. The cell with the lowest voltage in the multi-cell battery pack is selected as the cell to be balanced.

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