Modulation method of hybrid clamped converter for suppressing low frequency ripple and enhancing harmonic performance

Abstract

The application discloses a hybrid clamping converter modulation method for suppressing low-frequency ripples and enhancing harmonic performance, relates to the technical field of power electronic conversion, and combines a carrier redistribution modulation strategy CRPWM and a double-modulation-wave carrier phase-shifting modulation strategy DW-PSPWM to propose a hybrid double-waveform carrier redistribution modulation strategy HDW-CRPWM, which contains two modulation types of DW-CRPWM-T1 and DW-CRPWM-T2. The two modulation types are reasonably switched, and zero sequence voltage ZSV injection and duty cycle adjustment are combined to realize active capacitor voltage balance, so that comprehensive optimization is realized in aspects such as suppression of low-frequency voltage fluctuation of a direct-current capacitor, improvement of output waveform harmonic performance, acceleration of direct-current capacitor voltage dynamic response speed, realization of seamless switching of modulation strategies to ensure system stability, and the like. The application provides an efficient and reliable modulation solution for 5L-HC converters in medium and high-voltage power electronic systems.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, specifically to a hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance. Background Technology

[0002] Clamped converters, with their compact and efficient structure, have been widely used in medium- and high-voltage power electronics. Among them, the neutral-point clamped NPC converter, as a classic clamped topology, has significant advantages such as low total harmonic distortion (THD) and ease of implementation, playing an important role in many power electronics applications. However, NPC converters suffer from neutral-point NP voltage imbalance, and the difficulty of balancing the DC-side split capacitors increases further with the increase in the number of output voltage levels. The five-level hybrid clamped converter, as an important type of clamped converter, has two neutral points, and its DC-side capacitors are divided into C... d1 C d2 C d3 Three parts, the floating side includes C f1x C f2x The capacitors themselves pose a significant challenge, making capacitor voltage balance a critical technical hurdle in the application of this converter, requiring an effective solution.

[0003] In medium- and high-voltage power electronic system applications, traditional modulation strategies for 5L-HC converters have many limitations. Traditional phase-shifted PWM strategies mainly rely on natural balancing mechanisms to maintain capacitor voltage. Although they can achieve capacitor voltage balance to a certain extent, this method is difficult to meet the application scenarios with high requirements for output waveform quality. Carrier redistribution modulation strategies improve harmonic performance by optimizing carrier allocation and have some effect on reducing the harmonic content of output waveform. However, under low power factor conditions, they are difficult to effectively suppress low-frequency voltage ripple of DC-side capacitors, resulting in large capacitor voltage fluctuations. Dual-modulation wave carrier phase-shifting modulation strategies can reduce NP current, thereby suppressing low-frequency voltage ripple to a certain extent. However, their output harmonic performance is poor and cannot meet the application requirements with strict requirements for output waveform quality. Auxiliary circuit methods achieve capacitor voltage balance by adding additional circuit structures, but this method increases the cost and complexity of the system, reduces the reliability of the system, and is subject to many limitations in practical applications. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a hybrid clamp converter modulation method that suppresses low-frequency ripple and enhances harmonic performance. By combining the carrier redistribution modulation strategy CRPWM and the dual-modulation wave carrier phase-shifting modulation strategy DW-PSPWM, a hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM is proposed, which includes two modulation types: DW-CRPWM-T1 and DW-CRPWM-T2. By reasonably switching between the two modulation types and combining zero-sequence voltage ZSV injection and duty cycle adjustment to achieve active capacitor voltage balance, comprehensive optimization is achieved in many aspects, such as suppressing low-frequency voltage fluctuations of DC-side capacitors, improving output waveform harmonic performance, accelerating the dynamic response speed of DC-side capacitor voltage, and achieving seamless switching of modulation strategies to ensure system stability. This provides an efficient and reliable modulation solution for 5L-HC converters in medium and high voltage power electronic systems.

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a hybrid clamp converter modulation method that suppresses low-frequency ripple and enhances harmonic performance. This method includes the following specific steps:

[0006] S1: Based on the circuit diagram of the five-level hybrid clamped HC converter, derive the switching state, and derive the output phase voltage, floating capacitor current, single-phase NP current, and DC-side capacitor current, clarify the DC-side capacitor value, and thus obtain the three-phase reference modulation voltage.

[0007] S2: Construct a hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM, which consists of two modulation strategies, DW-CRPWM-T1 and DW-CRPWM-T2. Calculate the total three-phase current based on the NP current generated by the two modulation strategies.

[0008] S3: Design of HDW-CRPWM switching strategy and active capacitor voltage balancing method:

[0009] The DC-side capacitor voltage is balanced by injecting a zero-sequence voltage ZSV, and the new three-phase current after ZSV injection is calculated based on the obtained total three-phase current.

[0010] The duty cycle adjustment of each switch after the zero-sequence voltage is injected is calculated based on the capacitance fluctuation equation, and the drive signal of each switch is generated.

[0011] Furthermore, in step S1, based on the circuit topology of the five-level HC converter, 16 switching states are derived, and the converter can output five voltage levels: 0, E, 2E, 3E, and 4E. Switch S... 1x -S 5x Complementary switches Reverse working, S 1x -S 5xThey share the same gate signal, and x represents phases a, b, and c.

[0012] Furthermore, in step S1, the steps of deriving the output phase voltage, floating capacitor current, single-phase NP current, and DC-side capacitor current, and clarifying the DC-side capacitor value, to obtain the three-phase reference modulation voltage are as follows:

[0013] Output phase voltage: based on switch S 1x S 2x S 3x and S 4x The combination of on / off states yields ;

[0014] From floating capacitor C f1x and C f2x The outflowing current is: ;

[0015] Similarly, a single-phase NP current can be expressed as: ,but ;

[0016] Based on the distribution of the DC-side capacitance, the relationship between the DC-side capacitance values ​​is C. d1 =2C d2 =C d3 =C d， Therefore, the current flowing out of the DC-side capacitor is: ;

[0017] The three-phase reference modulation voltage is defined as: ;

[0018] In the formula for During carrier period T c The average value within, ∈[0,1].

[0019] Furthermore, in step S2, DW-CRPWM-T1 achieves carrier reallocation in the following manner: switching switch S 3x With S 4x The polarity and carrier wave, for 0.25 < ≤0.5 and 0.75< Carrier C in the ≤1 interval 1x C 3x , and 0≤ ≤0.25 and 0.5< Carrier C in the ≤0.75 range 2x C 4x A π / 2 phase shift is applied to suppress low-frequency voltage ripple and enhance harmonic performance. The resulting NP current is calculated using the following formula: .

[0020] Furthermore, in step S2, DW-CRPWM-T2 and DW-CRPWM-T1 are switched by phase shifting carriers C1x and C3x. The switching process does not affect harmonic performance, and DW-CRPWM-T2 is used to generate high total three-phase NP current, the calculation formula of which is: .

[0021] Furthermore, in step S2, the total three-phase current is expressed as: .

[0022] Furthermore, in step S3, the DC-side capacitor C d1 and C d3 The total three-phase NP current required for voltage balance between them is: ,in For carrier period, and C respectively d1 and C d3 The capacitor voltage;

[0023] Injecting ZSV into the reference modulation voltage generates the required three-phase NP total current: In the formula ZSV is limited by the linear modulation range: ;

[0024] Accordingly, the generated NP current can be modified as follows: .

[0025] Furthermore, in step S3, only by determining the selection of DW-CRPWM-T or DW-CRPWM-T2 can the total three-phase NP current be determined. DW-CRPWM-T1 and DW-CRPWM-T2 are used for low-frequency ripple suppression and dynamic performance of DC-side capacitor voltage, respectively. Their common goal is to produce the closest possible signal to DC-side capacitor voltage. of This minimizes the DC-side capacitor C. d1 and C d3 The voltage difference between them, expressed by the cost function, is: Based on the cost function, a modulation strategy that generates the optimal NP current can be selected. The specific steps for calculating the optimal NP current and the corresponding optimal ZSVs are as follows:

[0026] according to The constraint selects k ZSVs at equal intervals, labeled as where n∈[1,2,…,k];

[0027] Will Substituting into the NP current calculation formula for DW-CRPWM-T1, we obtain the NP current of DW-CRPWM-T1. The required NP current Depend on Derivation;

[0028] Based on the cost function, each and Compare and choose the closest. of As the optimal NP current The corresponding ZSV is ;

[0029] Similarly, Substituting the values ​​into the NP current calculation formula for DW-CRPWM-T2, and repeating the above steps, we obtain the optimal NP current for DW-CRPWM-T2. and ;

[0030] According to the cost function, if we choose Then select DW-CRPWM-T1 and Otherwise, choose DW-CRPWM-T2 and By exchanging C d1 and C d3 The phase shift is used to switch between the two modulation strategies;

[0031] After determining the modulation strategy, the determined ZSV is injected into the three-phase reference modulation voltage. In order to satisfy the optimality of the Chern function, the DC-side capacitor C is balanced. d1 and C d3 The voltage between them.

[0032] Furthermore, in step S3, the duty cycle adjustment of each switch after the zero-sequence voltage injection is calculated based on the capacitance fluctuation equation, and the capacitor voltage calculation formula is as follows: ,in , , For duty cycle adjustment, the formula is derived from the capacitor voltage fluctuation model and is as follows: Therefore, the NP current can be modified as follows: .

[0033] Compared with existing technologies, this hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance has the following advantages:

[0034] The proposed hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM integrates the advantages of CRPWM and DW-PSPWM, achieving dual optimization of low-frequency ripple suppression and harmonic performance. The DW-CRPWM-T1 modulation type effectively limits the neutral point NP current by redistributing the carrier phase in a specific interval, thus significantly suppressing low-frequency voltage fluctuations of the DC-side capacitor under low power factor and high modulation index conditions. Simultaneously, this strategy inherits the carrier redistribution advantages of CRPWM, resulting in a significant improvement in the harmonic performance of the output waveform. The lower total harmonic distortion (THD) of the voltage meets the high power quality requirements of medium and high voltage power electronic systems. The DW-CRPWM-T2 modulation type effectively improves the dynamic response speed of the DC-side capacitor voltage and reduces the voltage fluctuation frequency of the floating-side capacitor by generating a high total three-phase NP current. In addition, seamless switching between the two modulation types is achieved through carrier phase shift switching, and the switching process does not affect the output harmonic performance, ensuring the stable operation of the system under complex operating conditions. This invention can meet the high-performance requirements of power electronic converters in various application scenarios of medium and high voltage power electronic systems, such as renewable energy power generation, variable speed hydropower applications, and transportation.

[0035] Other advantages, objectives and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination or study, or may be learned from the practice of the invention. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0037] Figure 1 This is a circuit diagram for a 5L-HC circuit.

[0038] Figure 2 It uses the DW-CRPWM-T1 modulation strategy;

[0039] Figure 3 It is a DW-CRPWM-T1 pulse model;

[0040] Figure 4 It is a DW-CRPWM-T2 modulation strategy;

[0041] Figure 5 It is a DW-CRPWM-T2 pulse model;

[0042] Figure 6 This is a block diagram of the HDW-CRPWM switching strategy.

[0043] Figure 7 This is a comparison of the dynamic performance of the five-level HC converter HDW-CRPWM modulation strategy with other PS-PWM modulation strategies under variable f with m=1;

[0044] Figure 8 Comparison of steady-state performance of HDW-CRPWM modulation strategy of five-level HC converter with other PS-PWM modulation strategies when m=1;

[0045] Figure 9 Comparison of steady-state performance of HDW-CRPWM modulation strategy of five-level HC converter with other PS-PWM modulation strategies under unbalanced load with m=1;

[0046] Figure 10 Comparison of low-frequency voltage ripple between HDW-CRPWM modulation strategy and other PS-PWM modulation strategies in five-level HC converter;

[0047] Figure 11 Switching between different modulation strategies in the five-level HC converter HDW-CRPWM modulation strategy;

[0048] Figure 12 A comparison of the line voltage THD of the five-level HC converter HDW-CRPWM modulation strategy with other PS-PWM modulation strategies;

[0049] Figure 13 It is the maximum three-phase NP total current generated by different PS-PWM methods within the fundamental frequency period of m=1. Detailed Implementation

[0050] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.

[0051] This invention provides a hybrid clamping converter modulation method that suppresses low-frequency ripple and enhances harmonic performance. By combining the carrier redistribution modulation strategy CRPWM and the dual-modulation wave carrier phase-shifting modulation strategy DW-PSPWM, a hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM is proposed, which includes two modulation types: DW-CRPWM-T1 and DW-CRPWM-T2. By reasonably switching between the two modulation types and combining zero-sequence voltage ZSV injection and duty cycle adjustment to achieve active capacitor voltage balance, comprehensive optimization is achieved in many aspects, such as suppressing low-frequency voltage fluctuations of DC-side capacitors, improving output waveform harmonic performance, accelerating the dynamic response speed of DC-side capacitor voltage, and achieving seamless switching of modulation strategies to ensure system stability. This provides an efficient and reliable modulation solution for 5L-HC converters in medium and high voltage power electronic systems.

[0052] This invention provides a hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance, based on... Figure 1 The circuit diagram of the 5L-HC converter shown indicates that the converter consists of ten power switches and five capacitors, with the DC link consisting of capacitor C. d1 C d2 C d3 It is divided into three parts and provides two neutral points N1 and N2. The floating side includes a capacitor C. f1x and C f2x Determine switch S 1x -S 5x The 16 switch states are shown in the table below:

[0053]

[0054] Clearly define switch S 1x -S 5x and corresponding switches The complementary working logic, and S 1x -S 5x Using the same gate signal and taking the negative DC terminal as the zero-point reference voltage, derive the output phase voltage. The expression for the floating capacitor C is obtained based on circuit analysis. f1x and C f2x Expression of outflowing current Then, based on the relationship between the floating capacitor current and the neutral point NP current, the expression for the single-phase NP current is derived. ,but Combined with the DC side capacitor value C d1 =2C d2 =C d3 =C d， The distribution relationship is used to calculate the capacitor C on the DC side. d1 C d2 Cd3 The outflowing current; the three-phase reference modulation voltage Defined as During carrier period T c The average value within, i.e. The derivation of the total three-phase reference voltage is completed.

[0055] Combining the harmonic optimization advantages of the carrier redistribution modulation strategy CRPWM with the ripple suppression capability of the dual-modulation wave carrier phase-shifting modulation strategy DW-PSPWM, a hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM is constructed. This strategy includes two modulation types: DW-CRPWM-T1 and DW-CRPWM-T2. The modulation strategy of DW-CRPWM-T1 is as follows: Figure 2 As shown, by switching switch S 3x and S 4x The polarity and carrier wave, for 0.25 < ≤0.5 and 0.75< Carrier C in the ≤1 interval 1x C 3x , and 0≤ ≤0.25 and 0.5< Carrier C in the ≤0.75 range 2x C 4x Carrier redistribution is achieved by performing π / 2 phase shifts, and the pulse model is as follows: Figure 3 As shown, similar to CRPWM but with an equivalent switching frequency reduced by half, the generated NP current satisfies It is mainly used to suppress low-frequency voltage ripple and enhance harmonic performance; the modulation strategy of DW-CRPWM-T2 is as follows: Figure 4 As shown, the switching between DW-CRPWM-T1 and DW-CRPWM-T1 is achieved solely through the phase shift exchange of carriers C1x and C3x. The switching process does not affect harmonic performance, and its pulse model is as follows. Figure 5 As shown, consistent with the output voltage pulse model of DW-CRPWM-T1, the generated NP current satisfies It is mainly used to generate high total three-phase NP current to improve the dynamic performance of DC-side capacitor voltage; the total three-phase current is expressed as: .

[0056] According to such Figure 6 The HDW-CRPWM switching strategy switching block diagram shown illustrates the design of a switching strategy and active capacitor voltage balancing method to match HDW-CRPWM. First, based on the DC-side capacitor C... d1 and C d3 Capacitor voltage u d1 u d3 and carrier period ,pass The total reference three-phase NP current required for voltage balance between the two phases is calculated. Injecting the zero-sequence voltage ZSVuz into the reference modulation voltage yields... ,in Satisfy linear modulation range constraints And modify the NP current generated after ZSV injection. ;according to Constraints are used to select k ZSV candidate values ​​at equal intervals. Substitute the values ​​into the NP current calculation formulas for DW-CRPWM-T1 and DW-CRPWM-T2 respectively, and combine them with... and constraints, through The cost function selects the optimal NP current for the two modulation types. , and corresponding ZSV , , choice and The modulation type and ZSV corresponding to the closest NP current are obtained by exchanging C. d1 and C d3 The phase shift completes the switching between the two modulation types, realizing C d1 and C d3 Voltage balance; for floating capacitor C f1x C f2x and DC side capacitor C d2 The duty cycle adjustment amount is derived based on the capacitor voltage fluctuation model. , , ,Will Modified to include an optimized formula for duty cycle adjustment. Furthermore, the total duty cycle adjustment is limited to within 10% of the original reference modulation voltage to achieve voltage balance for this type of capacitor. Finally, based on the three-phase reference voltage and duty cycle adjustment after ZSV injection, drive signals for each switch are generated to complete the overall performance optimization of the converter.

[0057] Figure 7 This is a comparison of the dynamic performance of the five-level HC converter with HDW-CRPWM modulation strategy and other PS-PWM modulation strategies under the condition that m=1. Figure 7The dynamic performance under variable f is shown. The experiment was conducted with f abruptly changing from 50Hz to 20Hz. Consequently, the low-frequency voltage ripple of DW-PSPWM, CRPWM, and traditional PSPWM increased from 3.48V, 4.88V, and 4.79V to 10.9V, 21.2V, and 21.4V, respectively. Furthermore, the fluctuation increased by approximately 3.1 times, 4.1 times, and 4.2 times, respectively. In contrast, the voltage fluctuation of the proposed HDW-CRPWM only increased by 2.9 times, from 2.76V to 8.12V, validating its superior low-frequency ripple suppression capability.

[0058] Figure 8 This is a comparison of the steady-state performance of the five-level HC converter's HDW-CRPWM modulation strategy with other PS-PWM modulation strategies when m=1. Experimental results are shown below for similar power factors but different f values. Figure 8 As shown, both the proposed HDW-CRPWM and CRPWM can reallocate the carrier to generate different stepped line-to-line voltage waveforms, thus demonstrating the optimal THDS of the line-to-line voltage. At a frequency of 50Hz, R=2.5Ω, and L=40mH, the THDs of HDW-CRPWM and CRPWM are 17.70% and 18.03%, respectively; at a frequency of 10Hz, R=2.5Ω, and L=170mH, the THDs are 1737% and 17.45%, respectively. Compared with the traditional PSPWM, DW-PSPWM has a higher THDs. Specifically, under the experimental conditions of 50Hz frequency, DW-PSPWM and traditional PSPWM are 22.07% and 22.42%, respectively, while under the conditions of 10Hz, they are 21.28% and 21.37%, respectively. When it comes to low-frequency voltage fluctuations occurring in the capacitors of the DC link, the proposed HDW-CRPWM and DW-PSPWM both demonstrate superior ability in suppressing voltage fluctuations. The voltage fluctuations were 2.76V and 3.48V at 50Hz, and 5.97V and 8.09V at 10Hz. Significant low-frequency voltage ripple was observed in both CRPWM and traditional PSPWM. Specifically, the voltage ripple amplitudes measured at 50Hz were 4.88V and 4.79V, respectively, while those measured at 10Hz were 24.8V and 24.2V. Compared to existing methods, the proposed HDW-CRPWM reduced voltage fluctuations by 21%, 43%, and 42% at 50Hz, and by 26%, 76%, and 75% at 10Hz. The proposed HDW-CRPWM exhibits optimal output performance and the lowest low-frequency voltage fluctuation.

[0059] Figure 9This is a comparison of the Cd1 and Cd3 active capacitor voltage balance between the HDW-CRPWM modulation strategy of the five-level HC converter and other PS-PWM modulation strategies. Figure 9 A comparison of the dynamic performance of the DC-side upper and lower capacitor voltages under different modulation strategies is presented, C d1 and C d3 The experimental setup for the difference between the values ​​suddenly changed to 20V, then returned to 0V after 0.1s. C d1 and C d3 The dynamic performance is mainly affected by the NP current. HDW-CRPWM combines DW-CRPWM-T1 and DW-CRPWM-T2 to improve the amplitude of the NP current, thereby improving the dynamic performance of the capacitor voltage. Therefore, the proposed method exhibits excellent capacitor voltage dynamic performance, reaching steady state in 7.4ms and 4.5ms, respectively. In contrast, the voltage dynamic characteristics of DW-PSPWM, CRPWM and traditional PSPWM are relatively poor, with the time required to reach the first steady state being 21ms, 28ms and 25ms, respectively, and the time required to reach the second steady state being 17ms, 29ms and 28ms, respectively. Among them, the proposed HDW-CRPWM method shortens the time by more than 65% and has the best voltage dynamic performance.

[0060] Figure 10 This paper compares the low-frequency voltage ripple of the HDW-CRPWM modulation strategy of the five-level HC converter with other PS-PWM modulation strategies, and examines the impact of different methods on low-frequency voltage ripple. Figure 10 As shown, when the value of m is large, both HDW-CRPWM and DW-PSPWM can effectively suppress low-frequency voltage ripple. In contrast, CRPWM and traditional PSPWM have poor performance in suppressing low-frequency ripple. When m is less than or equal to 0.6, all methods can suppress low-frequency voltage fluctuations well, and there is no significant difference. Overall, HDW-CRPWM has the lowest low-frequency voltage fluctuation and shows the best performance among all methods.

[0061] Figure 11 It is a five-level HC converter that switches between different modulation strategies using the HDW-CRPWM modulation strategy, integrating both DW-CRPWM-T1 and DW-CRPWM-T2 modulation strategies. Figure 11The effects of switching between these different strategies on low-frequency voltage ripple are shown. First, DW-CRPWM-T2 is implemented. This modulation strategy generates a large NP current, improving the dynamic performance of the DC link capacitor voltage. However, it is difficult to suppress low-frequency voltage ripple through ZSV, resulting in severe fluctuations in the upper and lower DC link capacitor voltages, with a maximum value of 52.6V. Subsequently, the modulation strategy is switched to DW-CRPWM-T1. The proposed DW-CRPWM-T1 generates a relatively small NP current, which helps suppress low-frequency voltage ripple, thus reducing the voltage fluctuation to 7.52V. Finally, the HDW-CRPWM strategy, combining DW-CRPWM-T1 and DW-CRPWM-T2, is implemented. The low-frequency voltage ripple is further reduced to 5.97V, demonstrating excellent low-frequency voltage ripple suppression capability.

[0062] Figure 12 This comparison examines the line voltage THD of the five-level HC converter's HDW-CRPWM modulation strategy with other PS-PWM modulation strategies, including a comparison of the line voltage total harmonic distortion (THD). Figure 12 As shown, among the existing modulation schemes, both the proposed HDW-CRPWM and CRPWM redistribute the carrier and exhibit the best total harmonic distortion of line voltage under any modulation intensity m. In contrast, the total harmonic distortion of line voltage of DW-PSPWM and traditional PSPWM is relatively poor. Overall, the total harmonic distortion of line voltage of the proposed HDW-CRPWM is comparable to that of CRPWM.

[0063] Figure 13 Within the fundamental frequency period of m=1, the maximum three-phase total NP current generated by different PS-PWM methods, when cos(φ)=1, both DW-CRPWM-T1 and DW-CRPWM-T2 have NP current adjustment ranges including i`N=0, and can adjust the NP current to zero within one carrier period through ZSV injection, effectively suppressing low-frequency voltage ripple of the device. When cos(φ)≤0.8, neither can completely include i`N=0. =0 will generate low-frequency voltage ripple. Among them, the region where i`N=0 in the NP current adjustment range of DW-CRPWM-T1 remains almost unchanged with the change of power factor, and has a good effect on suppressing low-frequency voltage ripple. However, the low NP current amplitude limits the dynamic performance of capacitor voltage. The adjustment range of DW-CRPWM-T2 shrinks as the power factor decreases, while the NP current amplitude is the opposite. It is not conducive to suppressing low-frequency voltage fluctuations, but it can make up for the shortcomings of DW-CRPWM-T1.

[0064] In summary, the method proposed in this invention reduces low-frequency voltage fluctuations in the 5L-HC capacitor by switching between two modulation strategies, resulting in faster capacitor voltage dynamics and improved line-to-line voltage harmonic performance.

[0065] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance, characterized in that, The method includes the following specific steps: S1: Based on the circuit diagram of the five-level hybrid clamped HC converter, derive the switching state, output phase voltage, floating capacitor current, single-phase NP current, and DC-side capacitor current, determine the DC-side capacitor value, and thus obtain the three-phase reference modulation voltage. S2: Construct a hybrid dual-waveform carrier redistribution modulation strategy HDW-CRPWM, which consists of two modulation strategies, DW-CRPWM-T1 and DW-CRPWM-T2. Calculate the total three-phase current based on the NP current generated by the two modulation strategies. S3: Design of HDW-CRPWM switching strategy and active capacitor voltage balancing method: The DC-side capacitor voltage is balanced by injecting a zero-sequence voltage ZSV, and the new three-phase current after ZSV injection is calculated based on the obtained total three-phase current. The duty cycle adjustment of each switch after the zero-sequence voltage is injected is calculated based on the capacitance fluctuation equation, and the drive signal of each switch is generated.

2. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S1, based on the circuit topology of the five-level HC converter, 16 switching states are derived. The converter can output five voltage levels: 0, E, 2E, 3E, and 4E. 1x -S 5x Complementary switches Reverse working, S 1x -S 5x They share the same gate signal, and x represents phases a, b, and c.

3. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S1, the steps of deriving the output phase voltage, floating capacitor current, single-phase NP current, and DC-side capacitor current, and clarifying the DC-side capacitor value, to obtain the three-phase reference modulation voltage are as follows: Output phase voltage: based on switch S 1x S 2x S 3x and S 4x The combination of on / off states yields ； From floating capacitor C f1x and C f2x The outflowing current is: ; Similarly, a single-phase NP current can be expressed as: ,but ; Based on the distribution of the DC-side capacitance, the relationship between the DC-side capacitance values ​​is C. d1 =2C d2 =C d3 =C d， Therefore, the current flowing out of the DC-side capacitor is: ; The three-phase reference modulation voltage is defined as: ; In the formula for During carrier period T c The average value within, ∈[0,1].

4. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S2, DW-CRPWM-T1 achieves carrier redistribution in the following manner: switching switch S 3x With S 4x The polarity and carrier wave, for 0.25 < ≤0.5 and 0.75< Carrier C in the ≤1 interval 1x C 3x , and 0≤ ≤0.25 and 0.5< Carrier C in the ≤0.75 range 2x C 4x A π / 2 phase shift is applied to suppress low-frequency voltage ripple and enhance harmonic performance. The resulting NP current is calculated using the following formula: .

5. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S2, DW-CRPWM-T2 and DW-CRPWM-T1 are switched by phase shifting carriers C1x and C3x. The switching process does not affect harmonic performance, and DW-CRPWM-T2 is used to generate high total three-phase NP current, the calculation formula of which is: .

6. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S2, the total three-phase current is expressed as: .

7. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S3, the DC-side capacitor C d1 and C d3 The total three-phase NP current required for voltage balance between them is: ,in For carrier period, and C respectively d1 and C d3 The capacitor voltage; Injecting ZSV into the reference modulation voltage generates the required three-phase NP total current: In the formula ZSV is limited by the linear modulation range: ; Accordingly, the generated NP current can be modified as follows: .

8. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S3, only by confirming the selection of DW-CRPWM-T or DW-CRPWM-T2 can the total three-phase NP current be determined. DW-CRPWM-T1 and DW-CRPWM-T2 are used for low-frequency ripple suppression and dynamic performance of DC-side capacitor voltage, respectively. Their common goal is to produce the closest possible signal to DC-side capacitor voltage. of This minimizes the DC-side capacitor C. d1 and C d3 The voltage difference between them, expressed by the cost function, is: Based on the cost function, a modulation strategy that generates the optimal NP current can be selected. The specific steps for calculating the optimal NP current and the corresponding optimal ZSVs are as follows: according to The constraint is to select k ZSVs at equal intervals, and mark them as where n∈[1,2,…,k]; Will Substituting into the NP current calculation formula for DW-CRPWM-T1, we obtain the NP current of DW-CRPWM-T1. The required NP current Depend on Derivation; Based on the cost function, each and Compare and choose the closest. of As the optimal NP current The corresponding ZSV is ; Similarly, Substituting the values ​​into the NP current calculation formula for DW-CRPWM-T2, and repeating the above steps, we obtain the optimal NP current for DW-CRPWM-T2. and ; According to the cost function, if we choose Then select DW-CRPWM-T1 and Otherwise, choose DW-CRPWM-T2 and By exchanging C d1 and C d3 The phase shift is used to switch between the two modulation strategies; After determining the modulation strategy, the determined ZSV is injected into the three-phase reference modulation voltage. In order to satisfy the optimality of the Chern function, the DC-side capacitor C is balanced. d1 and C d3 The voltage between them.

9. The hybrid clamp converter modulation method for suppressing low-frequency ripple and enhancing harmonic performance according to claim 1, characterized in that, In step S3, the duty cycle adjustment of each switch after the zero-sequence voltage injection is calculated based on the capacitance fluctuation equation. The formula for calculating the capacitor voltage is as follows: ,in , , For duty cycle adjustment, the formula is derived from the capacitor voltage fluctuation model and is as follows: Therefore, the NP current can be modified as follows: .

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