A power management output regulation feedback network optimization circuit and system

Abstract

The application discloses a power management output regulation feedback network optimization circuit and system, comprising a power conversion module, an output voltage proportional network, a bias voltage proportional network and an operation unit, and relates to the technical field of power management. The output voltage proportional network introduces the output voltage into the operation unit according to a first proportion, the bias voltage proportional network introduces the bias voltage into the operation unit according to a second proportion, the operation unit generates a feedback voltage by operating two input signals and inputs the feedback voltage into the feedback end of the power conversion module, thereby establishing a new corresponding relationship between the output voltage and the feedback voltage, and by adjusting the size of the bias voltage and the proportional relationship of the output voltage proportional network and the bias voltage proportional network, the corresponding output voltage is not limited to the regulation range of the traditional feedback network when the power conversion module reaches balance between the feedback voltage and the internal reference voltage, and therefore the output voltage can be lower than the internal reference voltage of the control chip.

Description

Technical Field

[0001] This invention relates to the field of power management technology, and in particular to a power management output regulation feedback network optimization circuit and system. Background Technology

[0002] Power conversion circuits are widely used in power management systems to convert input voltage to output voltage. Existing power conversion circuits typically use a resistor divider feedback network to sample the output voltage at a fixed ratio to form a sampled voltage, which is then input to the feedback terminal of the power conversion control chip. The error amplifier inside the control chip compares the feedback sampled voltage with the internal reference voltage, thereby achieving stable regulation of the output voltage through closed-loop control.

[0003] like Figure 1 As shown, resistors R9 (ninth) and R10 (tenth) form a resistor divider feedback network, outputting the sampled voltage to the feedback terminal FB of the power conversion control chip, as follows. Figure 2 As shown, the sampled voltage is input to the inverting input of the error amplifier inside the control chip. The non-inverting input of the error amplifier is input to the reference voltage V1 provided by the reference source. The output voltage is adjusted by comparing the sampled voltage and the reference voltage V1, so that the sampled voltage is stabilized near the reference voltage V1. Thus, the output voltage is V1×(R9+R10) / R10. Due to the structural limitations of the resistor voltage divider feedback network, the output voltage is always greater than or equal to the reference voltage V1. It is impossible to obtain an output voltage less than the reference voltage V1, which limits its application range. Summary of the Invention

[0004] The purpose of this invention is to provide a power management output regulation feedback network optimization circuit and system to solve the problem that the output voltage of existing power conversion circuits cannot be lower than the reference voltage inside the control chip.

[0005] To address the aforementioned technical problems, this invention provides a power management output regulation feedback network optimization circuit, comprising: Power conversion module, output voltage proportional network, bias voltage proportional network, and arithmetic unit; The output terminal of the power conversion module is connected to the input terminal of the output voltage proportional network, and the feedback terminal of the power conversion module is connected to the output terminal of the arithmetic unit. The power conversion module is used to adjust the output voltage of the output terminal according to the relationship between the feedback voltage received at the feedback terminal and the reference voltage. The output terminal of the output voltage proportional network is connected to the input terminal of the arithmetic unit, and is used to introduce the output voltage according to the first ratio and transmit it to the input terminal of the arithmetic unit; The input terminal of the bias voltage proportional network is used to receive the bias voltage, and the output terminal of the bias voltage proportional network is connected to the input terminal of the arithmetic unit, for introducing the bias voltage according to the second ratio and transmitting it to the input terminal of the arithmetic unit. The arithmetic unit is used to generate the feedback voltage based on the signal output by the output voltage proportional network and the signal output by the bias voltage proportional network.

[0006] Optionally, the arithmetic unit includes: Operational amplifier, first resistor; The inverting input terminal of the operational amplifier is connected to the first terminal of the first resistor; the second terminal of the first resistor is connected to the output terminal of the operational amplifier and serves as the output terminal of the operational unit; the non-inverting input terminal of the operational amplifier serves as the input terminal of the operational unit.

[0007] Optionally, the output voltage proportional network includes a second resistor; the first end of the second resistor serves as the input terminal of the output voltage proportional network, and the second end of the second resistor serves as the output terminal of the output voltage proportional network.

[0008] Optionally, the bias voltage proportional network includes a third resistor; the first end of the third resistor serves as the input terminal of the bias voltage proportional network, and the second end of the third resistor serves as the output terminal of the bias voltage proportional network.

[0009] Optionally, the power conversion module includes a control chip and a power conversion circuit; The feedback terminal of the control chip serves as the feedback terminal of the power conversion module, and the output terminal of the control chip is connected to the control terminal of the power conversion circuit for outputting control signals. The output terminal of the power conversion circuit serves as the output terminal of the power conversion module for performing voltage conversion according to the control signals, and using the converted voltage as the output voltage.

[0010] Optionally, the bias voltage is the output voltage of the digital-to-analog converter or the analog control voltage output by the controller.

[0011] Optional, also includes: First balancing resistor, second balancing resistor; The first end of the first balancing resistor is connected to the inverting input of the operational amplifier, and the second end of the first balancing resistor is grounded; the first end of the second balancing resistor is connected to the non-inverting input of the operational amplifier, and the second end of the second balancing resistor is grounded.

[0012] Optionally, there may be multiple bias voltage proportional networks, each bias voltage proportional network is used to connect to a different bias voltage, and the output terminal of each bias voltage proportional network is connected to the input terminal of the arithmetic unit.

[0013] Optionally, the power conversion circuit is a boost power conversion circuit, a buck power conversion circuit, a buck-boost power conversion circuit, or a low-dropout linear regulated power conversion circuit.

[0014] To address the aforementioned technical problems, the present invention also provides a power management output regulation feedback network optimization system, including a power supply and the aforementioned power management output regulation feedback network optimization circuit; the power supply is connected to the power input terminal of the power conversion module.

[0015] This invention provides a power management output regulation feedback network optimization circuit, including a power conversion module, an output voltage proportional network, a bias voltage proportional network, and a computation unit. The output voltage proportional network introduces the output voltage into the computation unit according to a first ratio, and the bias voltage proportional network introduces the bias voltage into the computation unit according to a second ratio. The computation unit performs calculations on the two input signals to generate a feedback voltage, which is then input to the feedback terminal of the power conversion module. In existing technologies, the feedback voltage is entirely composed of the output voltage varying at a fixed ratio of no more than 1. However, in this solution, the feedback voltage is no longer determined solely by the output voltage, but jointly by the output voltage and the bias voltage. This establishes a new correspondence between the output voltage and the feedback voltage. By adjusting the magnitude of the bias voltage and the proportional relationship between the output voltage proportional network and the bias voltage proportional network, the output voltage corresponding to the feedback voltage can be changed. When the feedback voltage and the internal reference voltage of the power conversion module reach equilibrium, the corresponding output voltage is not limited by the adjustment range of traditional feedback networks. Therefore, it is possible to achieve an output voltage lower than the internal reference voltage of the control chip, expanding the adjustable range of the output voltage. It can meet low-voltage output requirements without changing the power conversion module itself, and has advantages such as simple circuit structure and good compatibility.

[0016] Furthermore, the same effect applies to the power management output regulation feedback network optimization system provided by this invention. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of an existing power conversion circuit; Figure 2 This is a diagram of the internal topology of the control chip in an existing power conversion circuit. Figure 3 This is a schematic diagram of a power management output regulation feedback network optimization circuit provided by the present invention. Detailed Implementation

[0019] The core of this invention is to provide a power management output regulation feedback network optimization circuit and system.

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Power conversion circuits are widely used in power management systems to convert between input voltage and output voltage Vout. Existing power conversion circuits typically use a resistor divider feedback network to sample the output voltage Vout at a fixed ratio to form a sampled voltage, which is then input to the feedback terminal of the power conversion control chip IC1. The error amplifier EA inside the control chip IC1 compares the feedback sampled voltage with the internal reference voltage V1, thereby achieving stable regulation of the output voltage Vout through closed-loop control.

[0022] For details, please see Figure 1 , Figure 1 This is a schematic diagram of an existing power conversion circuit. (For example...) Figure 1As shown, the ninth resistor R9 and the tenth resistor R10 form a resistor divider feedback network, outputting the sampled voltage to the feedback terminal FB of the power conversion control chip IC1. The third capacitor C3 provides bus voltage support and power decoupling for the power chip; the eighth resistor R8 connects the power input and the chip enable pin, providing pull-up current; the fourth capacitor C4 acts as a decoupling capacitor, connected to the VCC terminal of the power chip, which is the internal power supply pin of the power chip; the PG pin is the error output pin of the power chip, an open-drain output, and the sixth resistor R6 provides pull-up voltage; the first capacitor C1 and the seventh resistor R7 form a bootstrap boost circuit, providing drive voltage for the high-side switching transistor inside the chip; the first inductor L1 and the second capacitor C2 form a power output filter circuit. The internal switching transistors of the power chip switch at a certain frequency, and the SW pin outputs a square wave voltage. The square wave voltage is filtered into a stable DC voltage by a filter circuit composed of the first inductor L1 and the second capacitor C2. The output voltage is sampled by a feedback circuit to form a sampling voltage. The sampling voltage is compared with the reference voltage V1 by the error amplifier EA inside the chip. If the sampling voltage is greater than the reference voltage V1, the on-time of the switching transistor is reduced; otherwise, the duty cycle is increased to stabilize the output voltage Vout.

[0023] Please see Figure 2 , Figure 2 This is a diagram of the internal topology of the control chip IC1 in an existing power conversion circuit. (Example:) Figure 2 As shown, the fifth capacitor C5, the sixth capacitor C6, and the eleventh resistor R11 together form the loop compensation network of the error amplifier EA. The sampled voltage is input to the inverting input terminal of the error amplifier EA inside the control chip IC1. The non-inverting input terminal of the error amplifier EA is input to the reference voltage V1 provided by the reference source Reference. By comparing the sampled voltage and the reference voltage V1, the output voltage Vout is adjusted so that the sampled voltage is stabilized near the reference voltage V1. Thus, the output voltage Vout is V1×(R9+R10) / R10. Due to the structural limitations of the resistor voltage divider feedback network, the output voltage Vout is always greater than or equal to the reference voltage V1. It is impossible to obtain an output voltage Vout less than the reference voltage V1, which limits its application range.

[0024] To address the aforementioned technical problems, this invention provides a power management output regulation feedback network optimization circuit.

[0025] For details, please see Figure 3 , Figure 3 This is a schematic diagram of a power management output regulation feedback network optimization circuit provided by the present invention.

[0026] like Figure 3 As shown, the circuit includes: Power conversion module 1, output voltage proportional network 2, bias voltage proportional network 3, arithmetic unit 4; The output terminal of the power conversion module 1 is connected to the input terminal of the output voltage proportional network 2, and the feedback terminal of the power conversion module 1 is connected to the output terminal of the arithmetic unit 4. The power conversion module 1 is used to adjust the output voltage Vout of the output terminal according to the relationship between the feedback voltage Vfb received at the feedback terminal and the reference voltage V1. The output terminal of the output voltage proportional network 2 is connected to the input terminal of the arithmetic unit 4, and is used to introduce the output voltage Vout according to the first ratio k1 and transmit it to the input terminal of the arithmetic unit 4. The input terminal of the bias voltage proportional network 3 is used to connect the bias voltage Vref, and the output terminal of the bias voltage proportional network 3 is connected to the input terminal of the arithmetic unit 4, which is used to introduce the bias voltage Vref according to the second ratio k2 and transmit it to the input terminal of the arithmetic unit 4. The arithmetic unit 4 is used to generate a feedback voltage Vfb based on the signal output by the output voltage proportional network 2 and the signal output by the bias voltage proportional network 3.

[0027] Specifically, in existing power management feedback networks, the feedback voltage Vfb is typically formed solely by transforming the output voltage Vout through a fixed voltage divider structure. This means there is only one unique correspondence between the feedback voltage Vfb and the output voltage Vout. Since this voltage divider structure is a passive resistor divider network, its voltage division ratio is numerically no greater than 1. Therefore, when the feedback voltage Vfb reaches a steady state equal to the internal reference voltage V1 of the control chip IC1, the corresponding output voltage Vout is always no less than the reference voltage V1, making it impossible to obtain an output voltage Vout lower than the reference voltage V1. This embodiment no longer allows the feedback voltage Vfb to be formed solely by transforming the output voltage Vout. Instead, it introduces a second independent bias voltage Vref, which, along with the output voltage Vout, is transformed according to their respective ratios and then fed into the arithmetic unit 4 for calculation to generate the final feedback voltage Vfb. Since the feedback voltage Vfb is determined by two independent signals, the output voltage Vout and the feedback voltage Vfb are no longer in a single fixed correspondence. Instead, they are affected by the combined influence of the proportional magnitudes of the two signals, thus freeing the output voltage Vout from the limitations of the fixed voltage divider structure in existing technologies.

[0028] Specifically, when the power management system is operating in steady state, the power conversion module 1 maintains the feedback voltage Vfb at its feedback terminal at the level of the internal reference voltage V1 through closed-loop regulation. Since the output voltage proportional network 2 introduces the output voltage Vout according to the first ratio k1 and transmits it to the input terminal of the arithmetic unit 4, and the bias voltage proportional network 3 introduces the bias voltage Vref according to the second ratio k2 and transmits it to the input terminal of the arithmetic unit 4, the arithmetic unit 4 superimposes the two input parameters, multiplies them by the third ratio k3, and outputs the result as the feedback voltage Vfb. Therefore, the feedback voltage Vfb satisfies: ; Since the steady-state condition V1 = Vfb, we obtain the following relation: ; Therefore, the output voltage Vout is obtained as follows: ; As shown in the above equation, by changing the proportional coefficient and the bias voltage Vref, the output voltage Vout can be adjusted, and the output voltage Vout can be made to be less than the reference voltage V1. For example, when the bias voltage Vref is 0, it is only necessary to make 1 / k1k2 less than 1 to make the output voltage Vout less than the reference voltage V1.

[0029] Specifically, the power conversion module 1 adjusts the output voltage Vout based on the relationship between the feedback voltage Vfb received at the feedback terminal and the internal reference voltage V1. The power conversion module 1 integrates a control chip IC1 and a power conversion circuit. The control chip IC1 includes an error amplifier EA and a reference voltage V1 source, used to compare the feedback voltage Vfb with the internal reference voltage V1 and adjust the output voltage Vout accordingly, ultimately making the feedback voltage Vfb and the reference voltage V1 approximately equal. It should be noted that the power conversion circuit inside the power conversion module 1 can be any power conversion circuit with feedback regulation function, such as a boost power conversion circuit, a buck power conversion circuit, a buck-boost power conversion circuit, or a low-dropout linear regulated power conversion circuit. This embodiment does not limit its specific topology.

[0030] Specifically, as an example, the output voltage proportional network 2 includes a second resistor R2. The first end of the second resistor R2 serves as the input terminal of the output voltage proportional network 2 and is connected to the output terminal of the power conversion module 1. The second end of the second resistor R2 serves as the output terminal of the output voltage proportional network 2. As an example, the bias voltage proportional network 3 includes a third resistor R3. The first end of the third resistor R3 serves as the input terminal of the bias voltage proportional network 3, used to connect the bias voltage Vref. The second end serves as the output terminal of the bias voltage proportional network 3. As an example, the operational unit 4 includes an operational amplifier and a first resistor R1. The inverting input terminal of the operational amplifier is connected to the first end of the first resistor R1; the second end of the first resistor R1 is connected to the output terminal of the operational amplifier and serves as the output terminal of the operational unit 4; the non-inverting input terminal of the operational amplifier serves as the input terminal of the operational unit 4. During operation, the output voltage Vout flows through the second resistor R2 and the bias voltage Vref flows through the third resistor R3 into the non-inverting input of the operational amplifier. The two currents are superimposed and converted into the feedback voltage Vfb output through the first resistor R1. In addition, the first balancing resistor R4 and the second balancing resistor R5 are used to balance the bias current at the two inputs of the operational amplifier and improve the accuracy of the calculation results.

[0031] As can be seen, in this embodiment, since the feedback voltage Vfb is no longer determined solely by the output voltage Vout, but jointly by the output voltage Vout and the bias voltage Vref, a new correspondence between the output voltage Vout and the feedback voltage Vfb is established. By adjusting the magnitude of the bias voltage Vref and the proportional relationship between the output voltage proportional network 2 and the bias voltage proportional network 3, the output voltage Vout corresponding to the feedback voltage Vfb can be changed. When the feedback voltage Vfb and the internal reference voltage V1 are balanced, the output voltage Vout of the power conversion module 1 is not limited by the adjustment range of the traditional feedback network. Therefore, the output voltage Vout can be lower than the internal reference voltage V1 of the control chip IC1, expanding the adjustable range of the output voltage Vout. The low voltage output requirement can be met without changing the power conversion module 1 itself, which has the advantages of simple circuit structure and good compatibility.

[0032] As an optional embodiment, the arithmetic unit 4 includes: Operational amplifier, first resistor R1; The inverting input of the operational amplifier is connected to the first end of the first resistor R1; the second end of the first resistor R1 is connected to the output of the operational amplifier and serves as the output of the operational unit 4; the non-inverting input of the operational amplifier serves as the input of the operational unit 4.

[0033] Specifically, the non-inverting input terminal of the operational amplifier serves as the signal input terminal of the operation unit 4, and receives the signal collectively sent by the output voltage proportional network 2 and the bias voltage proportional network 3; the inverting input terminal of the operational amplifier is connected to its output terminal via the first resistor R1, forming a negative feedback closed loop. Due to the effect of negative feedback, the operational amplifier operates in the linear amplification region, and its non-inverting input terminal and inverting input terminal satisfy the virtual short and virtual open characteristics. The operational amplifier generates a stable feedback voltage Vfb after superimposing and weighting the voltage signal at the non-inverting input terminal, and inputs the voltage from its output terminal to the feedback pin of the power conversion control chip IC1.

[0034] Specifically, after the bias voltage Vref and the output voltage Vout are combined, the feedback voltage Vfb output by the output terminal of the operational amplifier is: ; Since the feedback voltage Vfb is equal to the reference voltage V1 inside the power conversion module 1 under the regulation of the power conversion module 1, the following relational expression is obtained: ; Solving the relational expression gives the output voltage Vout as: ; It can be obtained from the above formula that adjusting the proportional coefficient and the bias voltage Vref can change the output voltage Vout, so that the output voltage Vout is less than the reference voltage V1. For example, when Vref is set to 0V and R2 < R1, the output voltage Vout can be less than the reference voltage V1 of the power management chip; when V1 / R1=Vref / R3 is set, the output voltage Vout can even be set to 0V.

[0035] It can be seen that in this embodiment, the operational amplifier is used in cooperation with the first resistor R1 to form a non-inverting addition and proportional operation circuit. Through this specific operation circuit, the bias voltage Vref is substituted into the closed-loop control logic in the form of inverting cancellation, so that the power converter can not only output a low voltage less than the reference voltage V1, but also achieve an ultra-low output of 0V.

[0036] As an optional embodiment, the output voltage proportional network 2 comprises a second resistor R2; the first end of the second resistor R2 serves as the input end of the output voltage proportional network 2, and the second end of the second resistor R2 serves as the output end of the output voltage proportional network 2.

[0037] Specifically, the output voltage proportional network 2 is formed by the second resistor R2, and the second resistor R2 is connected between the output end of the power conversion module 1 and the input end of the operation unit 4. The resistance value of the second resistor R2 is used to realize proportional weighted attenuation on the output voltage Vout, and send the attenuated signal to the operation unit 4. The resistance value of the second resistor R2 determines the magnitude of the first proportional coefficient k1.

[0038] As can be seen, this embodiment utilizes the second resistor R2 to achieve high linearity voltage sampling, has a simple structure, and the first ratio k1 is determined only by the resistance value of the second resistor R2, which is convenient for flexible configuration according to actual design requirements.

[0039] As an optional embodiment, the bias voltage proportional network 3 includes a third resistor R3; the first end of the third resistor R3 serves as the input terminal of the bias voltage proportional network 3, and the second end of the third resistor R3 serves as the output terminal of the bias voltage proportional network 3.

[0040] Specifically, the bias voltage proportional network 3 is composed of a third resistor R3, which is connected between the bias voltage Vref source and the input terminal of the arithmetic unit 4. Its resistance value is used to achieve proportional weighted attenuation of the output voltage Vout and send it to the arithmetic unit 4. The resistance value of the third resistor R3 determines the size of the second proportional k2.

[0041] As can be seen, this embodiment uses the third resistor R3 to realize the bias voltage proportional network 3, which has a simple structure. Moreover, the second ratio k2 is determined only by the resistance value of the third resistor R3, which makes it easy to adjust independently of the output voltage proportional network 2, thus improving the flexibility of the two signal ratio configuration.

[0042] As an optional embodiment, the power conversion module 1 includes a control chip IC1 and a power conversion circuit; The feedback terminal of the control chip IC1 serves as the feedback terminal of the power conversion module 1. The output terminal of the control chip IC1 is connected to the control terminal of the power conversion circuit and is used to output control signals. The output terminal of the power conversion circuit serves as the output terminal of the power conversion module 1 and is used to perform voltage conversion according to the control signals, and the converted voltage is used as the output voltage Vout.

[0043] Specifically, the feedback voltage Vfb output by the arithmetic unit 4 is input to the feedback terminal of the control chip IC1. The control chip IC1 compares it with the internal reference voltage V1 and dynamically adjusts the output control signal. The power conversion circuit adjusts the output voltage Vout according to the control signal.

[0044] Specifically, this embodiment uses a buck converter circuit as an example to illustrate the working process of power conversion module 1. The third capacitor C3 provides bus voltage support and power decoupling for the power chip; the eighth resistor R8 connects the power input and the chip enable pin, providing pull-up current; the fourth capacitor C4 acts as a decoupling capacitor, connected to the VCC terminal of the power chip, which is the internal power supply pin of the power chip; the PG pin is the error output pin of the power chip, an open-drain output, and the sixth resistor R6 provides pull-up voltage; the first capacitor C1 and the seventh resistor R7 form a bootstrap circuit, providing drive voltage for the high-side switching transistor inside the chip; the first inductor L1 and the second capacitor C2 form a power output filter circuit. The internal switching transistor of the power chip switches at a certain frequency, and the SW pin outputs a square wave voltage. The filter circuit composed of the first inductor L1 and the second capacitor C2 filters the square wave voltage into a stable DC voltage. The output voltage is sampled by the feedback circuit to form a sampling voltage, which is compared with the reference voltage V1 by the internal error amplifier EA. If the sampling voltage is greater than the reference voltage V1, the on-time of the switching transistor is reduced; otherwise, the duty cycle is increased, thereby stabilizing the output voltage Vout.

[0045] As can be seen, in this embodiment, the power conversion module 1 is divided into two parts: the control chip IC1 and the power conversion circuit. The control chip IC1 is responsible for comparing the feedback voltage Vfb and generating the control signal, while the power conversion circuit is responsible for the actual voltage conversion. Since this embodiment does not limit the specific topology of the power conversion circuit, it can be applied to various voltage conversion scenarios such as boost, buck, and buck-boost, and has good versatility and adaptability.

[0046] As an optional embodiment, the bias voltage Vref is the output voltage of the digital-to-analog converter or the analog control voltage output by the controller.

[0047] Specifically, the bias voltage Vref can be generated in different ways. For example, the digital voltage regulation code can be converted into a smooth and continuous analog bias voltage Vref by a digital-to-analog converter, or the controller can output a digital square wave with a specific duty cycle using its high-frequency pulse width modulation pin. After the square wave passes through an RC low-pass filter circuit or a level conversion circuit, high-frequency noise is smoothly filtered out, and then demodulated to generate a stable analog control voltage, which is injected into the bias voltage proportional network 3 as the bias voltage Vref.

[0048] As can be seen, this embodiment uses a digital-to-analog converter or controller to output analog voltage, enabling the bias voltage Vref to be dynamically and continuously adjusted with high precision, thereby driving the power supply output voltage Vout to undergo smooth, stepless voltage transformation. Furthermore, the controller's PWM hardware interface is directly reused in conjunction with RC filtering to generate the reference voltage V1, eliminating the need for complex external circuitry and reducing hardware costs and PCB footprint.

[0049] As an optional embodiment, it also includes: First balancing resistor R4, second balancing resistor R5; The first terminal of the first balancing resistor R4 is connected to the inverting input terminal of the operational amplifier, and the second terminal of the first balancing resistor R4 is grounded; the first terminal of the second balancing resistor R5 is connected to the non-inverting input terminal of the operational amplifier, and the second terminal of the second balancing resistor R5 is grounded.

[0050] Specifically, in practical applications, operational amplifiers are not ideal devices; their internal transistor input stages have a small static bias current. If the equivalent DC resistances connected to the non-inverting and inverting inputs of the op-amp are not equal, the input bias current will generate unequal voltage drops across them, which will then be converted into an input offset voltage. This causes the operational result at the op-amp output to deviate from the theoretically calculated value, resulting in an output static DC error. To eliminate this error, this embodiment introduces a first balancing resistor R4 and a second balancing resistor R5. During the design, by appropriately selecting the resistance values, the equivalent DC impedances of the non-inverting and inverting inputs of the operational amplifier are made completely equal. At this time, the DC voltage drops generated by the input bias current at the non-inverting and inverting inputs are the same, thereby ensuring the accuracy of the calculated feedback voltage Vfb.

[0051] Specifically, such as Figure 3 As shown, in this circuit, the first balancing resistor R4 and the second balancing resistor R5 need to satisfy the following: ; As can be seen, this embodiment sets a first balancing resistor R4 and a second balancing resistor R5. Through impedance balancing design, the offset voltage caused by the op-amp input bias current is effectively offset, and the DC drift of the feedback voltage Vfb is prevented, so that the power supply output voltage Vout has high control accuracy.

[0052] As an optional embodiment, there are multiple bias voltage proportional networks 3, each bias voltage proportional network 3 is used to connect to a different bias voltage Vref, and the output of each bias voltage proportional network 3 is connected to the input of the arithmetic unit 4.

[0053] Specifically, in practical applications, multiple bias voltage proportional networks 3 can be set up, allowing the arithmetic unit 4 to simultaneously receive multiple independent bias signals and perform synthesis operations. Since each bias voltage Vref can be provided independently, the synthesis method of the feedback voltage Vfb is more flexible than that of an embodiment with only a single bias voltage Vref branch. For example, it includes a first bias voltage proportional network 3 and a second bias voltage proportional network 3. Each bias voltage proportional network 3 is used to connect different bias voltages Vref. The first bias voltage Vref can be set as a coarse adjustment bias voltage Vref with a larger step and a wider adjustment range, used to quickly adjust the output voltage Vout to near the target range. The second bias voltage Vref can be set as a fine adjustment bias voltage Vref with a smaller step and a narrower adjustment range, used to finely correct the output voltage Vout based on the coarse adjustment. The combination of the two can achieve a smaller overall adjustment step than a single bias voltage Vref branch, thereby improving the adjustment accuracy of the output voltage Vout.

[0054] As can be seen, by setting multiple bias voltages Vref, this embodiment enables the arithmetic unit 4 to simultaneously receive multiple independent bias signals and perform synthesis calculations, thereby improving the circuit's adjustment flexibility under complex operating conditions.

[0055] As an optional embodiment, the power conversion circuit is a boost power conversion circuit, a buck power conversion circuit, a buck-boost power conversion circuit, or a low-dropout linear regulated power conversion circuit.

[0056] Specifically, when the power conversion circuit is a boost converter, it internally includes a switching transistor and an energy storage inductor. The control signal output by the control chip IC1 controls the switching transistor's on and off states: during the switching transistor's on state, the energy storage inductor stores energy; during the switching transistor's off state, the energy storage inductor releases energy and, after rectification and filtering, adds it to the input voltage, making the output voltage Vout higher than the input voltage, thus achieving boost conversion. When the power conversion circuit is a buck converter, it also includes a switching transistor and an energy storage inductor. The control signal controls the switching transistor's on and off states, making the output voltage Vout the average value of the input voltage over each switching cycle, with Vout lower than the input voltage, thus achieving buck conversion. When the power conversion circuit is a buck-boost converter, its internal structure can combine the characteristics of both boost and buck conversion methods. The control signal flexibly controls the operating state of the internal switching transistor, allowing the output voltage Vout to be higher than, lower than, or equal to the input voltage, adapting to application scenarios where the input voltage range and output voltage Vout requirements overlap. When the power conversion circuit is a low-dropout linear regulated power conversion circuit, it includes a power adjustment transistor that operates in the linear region. The control signal output by the control chip IC1 is used to continuously adjust the conduction level of the power adjustment transistor so that the output voltage Vout is always the input voltage minus the voltage drop across the power adjustment transistor. By continuously adjusting this voltage drop, the output voltage Vout is stabilized and regulated.

[0057] As can be seen, this embodiment illustrates various specific topology implementations of power conversion circuits, covering two major categories of common power conversion scenarios: switching voltage conversion and linear voltage conversion. Since the improvement of this invention is located in the feedback signal processing section before the feedback terminal of the control chip IC1, it is independent of the specific conversion topology used in the power conversion circuit itself. Therefore, it can be adapted to the aforementioned various power conversion circuits and has strong versatility.

[0058] To address the aforementioned technical problems, the present invention also provides a power management output regulation feedback network optimization system, including a power supply and the aforementioned power management output regulation feedback network optimization circuit; the power supply is connected to the power input terminal of the power conversion module 1.

[0059] For a description of the power management output regulation feedback network optimization system provided by this invention, please refer to the embodiment of the power management output regulation feedback network optimization circuit described above. This invention will not be repeated here.

[0060] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0061] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A power management output regulation feedback network optimization circuit, characterized in that, include: Power conversion module, output voltage proportional network, bias voltage proportional network, and arithmetic unit; The output terminal of the power conversion module is connected to the input terminal of the output voltage proportional network, and the feedback terminal of the power conversion module is connected to the output terminal of the arithmetic unit. The power conversion module is used to adjust the output voltage of the output terminal according to the relationship between the feedback voltage received at the feedback terminal and the reference voltage. The output terminal of the output voltage proportional network is connected to the input terminal of the arithmetic unit, and is used to introduce the output voltage according to the first ratio and transmit it to the input terminal of the arithmetic unit; The input terminal of the bias voltage proportional network is used to receive the bias voltage, and the output terminal of the bias voltage proportional network is connected to the input terminal of the arithmetic unit, for introducing the bias voltage according to the second ratio and transmitting it to the input terminal of the arithmetic unit. The arithmetic unit is used to generate the feedback voltage based on the signal output by the output voltage proportional network and the signal output by the bias voltage proportional network.

2. The power management output regulation feedback network optimization circuit as described in claim 1, characterized in that, The arithmetic unit includes: Operational amplifier, first resistor; The inverting input terminal of the operational amplifier is connected to the first terminal of the first resistor; the second terminal of the first resistor is connected to the output terminal of the operational amplifier and serves as the output terminal of the operational unit; the non-inverting input terminal of the operational amplifier serves as the input terminal of the operational unit.

3. The power management output regulation feedback network optimization circuit as described in claim 1, characterized in that, The output voltage proportional network includes a second resistor; the first end of the second resistor serves as the input terminal of the output voltage proportional network, and the second end of the second resistor serves as the output terminal of the output voltage proportional network.

4. The power management output regulation feedback network optimization circuit as described in claim 1, characterized in that, The bias voltage proportional network includes a third resistor; the first end of the third resistor serves as the input terminal of the bias voltage proportional network, and the second end of the third resistor serves as the output terminal of the bias voltage proportional network.

5. The power management output regulation feedback network optimization circuit as described in claim 1, characterized in that, The power conversion module includes a control chip and a power conversion circuit; The feedback terminal of the control chip serves as the feedback terminal of the power conversion module, and the output terminal of the control chip is connected to the control terminal of the power conversion circuit for outputting control signals. The output terminal of the power conversion circuit serves as the output terminal of the power conversion module for performing voltage conversion according to the control signals, and using the converted voltage as the output voltage.

6. The power management output regulation feedback network optimization circuit as described in claim 1, characterized in that, The bias voltage is the output voltage of the digital-to-analog converter or the analog control voltage output by the controller.

7. The power management output regulation feedback network optimization circuit as described in claim 2, characterized in that, Also includes: First balancing resistor, second balancing resistor; The first end of the first balancing resistor is connected to the inverting input of the operational amplifier, and the second end of the first balancing resistor is grounded; the first end of the second balancing resistor is connected to the non-inverting input of the operational amplifier, and the second end of the second balancing resistor is grounded.

8. The power management output regulation feedback network optimization circuit as described in any one of claims 1 to 7, characterized in that, There are multiple bias voltage proportional networks, each of which is used to connect to a different bias voltage, and the output of each bias voltage proportional network is connected to the input of the arithmetic unit.

9. The power management output regulation feedback network optimization circuit as described in claim 5, characterized in that, The power conversion circuit is a boost power conversion circuit, a buck power conversion circuit, a buck-boost power conversion circuit, or a low-dropout linear regulated power conversion circuit.

10. A power management output regulation feedback network optimization system, comprising a power supply, characterized in that, It also includes a power management output regulation feedback network optimization circuit as described in any one of claims 1 to 9; the power supply is connected to the power input terminal of the power conversion module.

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