A control method and system of an ac voltage regulation topology

Abstract

The application discloses an AC voltage-regulating topology control method and system, and belongs to the technical field of power electronic conversion. The application comprises the following steps: determining whether the change slope of the input voltage effective value is stable by calculating the change slope of the input voltage effective value; if not, generating a transition mode control signal, and if yes, comparing the effective value with a target threshold value to generate a bypass, boost or buck mode control signal; constructing a double-loop control system of an output voltage outer loop and an inductor current inner loop, collecting feedback signals to generate modulation signals; and according to the mode control signal and the modulation signal, PWM driving full-controlled devices to make the topology work in the selected mode in a steady state and smoothly transition through the transition mode in an unstable state. The method can avoid mode misjudgment caused by effective value detection delay, effectively suppress voltage and current impact and resonance oscillation in the mode switching process, realize smooth transition between different working modes, and improve the amplitude stability and waveform quality of the output voltage.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, and specifically to a control method and system for an AC voltage regulation topology. Background Technology

[0002] AC voltage regulation technology is one of the core technologies in the field of power electronic conversion. Its basic goal is to provide the downstream load with an AC voltage that is stable in amplitude and meets the required waveform quality when the grid input voltage fluctuates. With the advancement of power semiconductor devices and control technology, AC voltage regulation schemes based on Buck, Boost and their derivative topologies have gradually become the mainstream implementation method due to their advantages such as small size, high efficiency and wide voltage regulation range.

[0003] In existing Buck-Boost integrated topology AC voltage regulation schemes, an LC filter is typically configured between the front-end converter and the output to filter out high-frequency switching ripple. However, when the parameters of the DC bus capacitor and the filter inductor in this topology are not properly matched, they can easily form an underdamped resonant network. During the high-frequency switching operation of the power switch, the generated high-order harmonic currents continuously excite this resonant circuit, resulting in significant oscillation spikes superimposed on the DC bus voltage. At the same time, a reciprocating and potentially amplifying circulating current appears between the inductor and capacitor. This resonance phenomenon not only directly causes distortion of the output voltage waveform, reducing voltage regulation accuracy and output power quality, but also poses a serious threat to the long-term operational reliability of key components such as the power switch and capacitors.

[0004] Furthermore, in practical applications, the grid input voltage often deviates from the rated range, requiring the AC voltage regulating topology to switch between bypass mode, boost mode, and buck mode to ensure output voltage stability. Conventional control methods mostly switch modes directly based on the degree of voltage deviation, without fully considering the dynamic characteristics of the aforementioned LC resonant network. When mode switching occurs, the transient disturbance caused by abrupt changes in the control structure or modulation strategy can easily further excite underdamped resonance, leading to significant transient voltage drops or overshoots in the output voltage, accompanied by severe ringing, prolonging the transition process, and potentially triggering overvoltage or overcurrent protection, affecting the stable operation of the system.

[0005] Therefore, how to effectively suppress voltage and current oscillations caused by underdamped resonance of LC filters, and achieve smooth transition between different voltage regulation modes when the grid voltage fluctuates, so as to ensure the amplitude stability and waveform quality of the output voltage, has become a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to provide a control method and system for an AC voltage regulation topology, so as to overcome the problems of voltage and current oscillation caused by underdamped resonance of LC filter and transient impact and ringing of output voltage caused by direct mode switching during grid fluctuations in the prior art.

[0007] The present invention solves the above-mentioned technical problems through the following technical solution: This invention provides a control method for an AC voltage regulating topology, comprising the following steps: The AC side voltage of the AC voltage regulation topology is sampled in real time, and the effective value of the input voltage is calculated based on the root mean square algorithm. Calculate the slope of the change in the effective value of the input voltage, and determine whether the effective value of the input voltage is in a stable state based on the slope of the change; If the judgment result is negative, a mode control signal representing the transition mode is generated; if the judgment result is positive, the effective value of the input voltage in the steady state is compared with the preset target voltage threshold range, and a mode control signal representing the bypass mode, boost mode or buck mode is generated based on the comparison result. A dual closed-loop control system consisting of an outer loop for output voltage and an inner loop for inductor current is constructed and run. The output voltage and inductor current are collected as feedback signals, and a modulation signal for PWM modulation is generated based on the feedback signals. Based on the generated mode control signal and modulation signal, PWM modulation is applied to the fully controlled power electronic devices in the AC voltage regulation topology so that the AC voltage regulation topology operates in the selected mode in steady state and achieves smooth transition through transition mode in unstable state.

[0008] A further improvement of this invention lies in generating a mode control signal characterizing bypass mode, boost mode, or buck mode based on the comparison result, specifically: If the effective value of the input voltage in the steady state is greater than the target voltage upper limit threshold, a mode control signal characterizing the buck mode is generated. If the effective value of the input voltage in the steady state is less than the target lower voltage threshold, a mode control signal representing the boost mode is generated; if the effective value of the input voltage in the steady state is between the target upper voltage threshold and the target lower voltage threshold, a mode control signal representing the bypass mode is generated.

[0009] A further improvement of this invention lies in generating a modulation signal for PWM modulation based on the feedback signal, specifically: The outer loop is the output voltage loop, which generates and limits the error between the output voltage (used as feedback signal) and the target voltage reference value through a regulator, and then outputs a current reference command. The inner loop is the inductor current loop, which generates a modulation signal for PWM modulation through a high-bandwidth regulator based on the error between the inductor current (used as feedback signal) and the current reference command.

[0010] A further improvement of this invention lies in calculating the effective value of the input voltage based on the root mean square algorithm, specifically:

[0011] in, This is the effective value of the input voltage; Let N be the instantaneous voltage value of the i-th sampling point within a calculation window; N is the total number of sampling points within the calculation window.

[0012] A further improvement of this invention lies in determining whether the effective value of the input voltage is in a stable state based on the slope of change, specifically:

[0013] Where k is the slope of change; Δt is the time interval between two adjacent sampling points; This is the effective value of the input voltage at the previous sampling point; This is the effective value of the input voltage at the next sampling point.

[0014] A further improvement of the present invention is that the AC voltage regulating topology is a single-phase AC voltage regulating topology or a three-phase AC voltage regulating topology.

[0015] A further improvement of the present invention is that, when the AC voltage regulation topology is a single-phase AC voltage regulation topology, it includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, a second inductor L2, a first resistor R1, a first fully controlled power electronic device S1 and its anti-parallel first diode D1, a second fully controlled power electronic device S2 and its anti-parallel second diode D2, a third fully controlled power electronic device S3 and its anti-parallel third diode D3, a fourth fully controlled power electronic device S4 and its anti-parallel fourth diode D4, a fifth fully controlled power electronic device S5 and its anti-parallel fifth diode D5, and a sixth fully controlled power electronic device S6 and its anti-parallel sixth diode D6. The single-phase AC voltage regulating topology also includes four ports: a first port, a second port, a third port, and a fourth port; wherein, the first port and the second port are used to connect the two ends of the AC power supply, and the first capacitor C1 is connected in parallel across the two ends of the AC power supply; the third port and the fourth port are used to connect the two ends of the load or the charging power supply, and the third capacitor C3 is connected in parallel across the two ends of the load or the charging power supply. One end of the first inductor L1 is connected to the first port, and the other end is connected to the drain of the first fully controlled power electronic device S1 and the source of the fourth fully controlled power electronic device S4, respectively. The source of the first fully controlled power electronic device S1 is connected to the cathode of the first diode D1 to form a connection terminal A. The connection terminal A is connected to the source of the second fully controlled power electronic device S2, the source of the third fully controlled power electronic device S3, and one end of the series branch of the second capacitor C2 and the first resistor R1. The drain of the second fully controlled power electronic device S2 is connected to the source of the fifth fully controlled power electronic device S5. The drain of the third fully controlled power electronic device S3 is connected to the anode of the third diode D3 and then connected to the source of the sixth fully controlled power electronic device S6 and one end of the second inductor L2. The other end of the second inductor L2 is connected to the third port. The drain of the fourth fully controlled power electronic device S4 is connected to the anode of the fourth diode D4 to form a connection terminal B. The connection terminal B is connected to the drain of the fifth fully controlled power electronic device S5, the drain of the sixth fully controlled power electronic device S6, and the other end of the series branch of the second capacitor C2 and the first resistor R1. The second and fourth ports are directly connected via a power supply line, which has a connection terminal C. The source of the fifth fully controlled power electronic device S5 is connected to the connection terminal C.

[0016] A further improvement of this invention lies in that, based on the generated mode control signal and modulation signal, PWM modulation is applied to drive the fully controlled power electronic devices in the AC voltage regulation topology, specifically as follows: The third fully controlled power electronic device S3 and the fourth fully controlled power electronic device S4 perform power frequency commutation according to the polarity of the input voltage; When the mode control signal characterizes the buck mode, a modulation signal for PWM modulation based on the feedback signal is applied to the fifth fully controlled power electronic device S5 and the sixth fully controlled power electronic device S6 in the AC voltage regulation topology. When the mode control signal characterizes the boost mode, a modulation signal for PWM modulation based on the feedback signal is applied to the first fully controlled power electronic device S1 and the second fully controlled power electronic device S2 in the AC voltage regulation topology. When the mode control signal indicates bypass mode, the AC input voltage provided by the AC power supply is directly transmitted to the load or charging power supply.

[0017] A further improvement of this invention is that the fully controllable power electronic device is a MOSFET.

[0018] The present invention also provides a control system for an AC voltage regulating topology, for implementing the control method of the AC voltage regulating topology as described above, comprising: The first module is used to sample the AC side voltage of the AC voltage regulation topology in real time and calculate the effective value of the input voltage based on the root mean square algorithm. The second module is used to calculate the slope of the change in the effective value of the input voltage and to determine whether the effective value of the input voltage is in a stable state based on the slope of the change. The third module is used to generate a mode control signal representing the transition mode when the effective value of the input voltage is not in a stable state; when the effective value of the input voltage is in a stable state, it compares the effective value of the input voltage in the stable state with the preset target voltage threshold range, and generates a mode control signal representing the bypass mode, boost mode or buck mode based on the comparison result. The fourth module is used to build and run a dual closed-loop control system with an outer loop of output voltage and an inner loop of inductor current. It collects output voltage and inductor current as feedback signals and generates modulation signals for PWM modulation based on the feedback signals. The fifth module is used to perform PWM modulation drive on the fully controlled power electronic devices in the AC voltage regulation topology according to the generated mode control signal and modulation signal, so that the AC voltage regulation topology operates in the selected mode in steady state and achieves smooth transition through the transition mode in unstable state.

[0019] Compared with the prior art, the positive and progressive effects of the present invention are as follows: The control method of the AC voltage regulation topology provided by this invention introduces a stable state judgment mechanism based on the slope of the change in the effective value of the input voltage, and sets a transition mode during the period of unstable detection, which avoids misjudgment of boost, buck and bypass modes caused by the delay in effective value detection; in the transition mode, the current control state is maintained, and accurate mode switching is performed after the detected value stabilizes, thereby effectively suppressing voltage drop, overshoot and ringing phenomena during the mode switching process, and realizing a smooth transition between different working modes.

[0020] Furthermore, a dual closed-loop control architecture with an outer loop for output voltage and an inner loop for inductor current is adopted. The high bandwidth design of the inner loop can quickly suppress inductor current disturbances, while the outer loop ensures that the output voltage accurately tracks the target value. At the same time, through the feedback control of the inner loop for inductor current, the resonant current oscillation caused by the underdamped characteristics of the LC filter can be effectively suppressed, improving the output voltage waveform quality, enhancing voltage regulation accuracy, and improving the system's operational stability. Attached Figure Description

[0021] The accompanying drawings are provided to further understand the invention and constitute a part of this invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0022] Figure 1 This is the circuit topology diagram with a damping resistor added to capacitor C1; Figure 2 The current flow path diagram for achieving positive half-cycle boost of input AC voltage (Phase 1); Figure 3 Current flow path diagram for achieving positive half-cycle boost of input AC voltage (Phase 2); Figure 4 The current flow path diagram for achieving voltage boost during the negative half-cycle of the input AC voltage (Phase 1); Figure 5 The current flow path diagram for achieving voltage boost during the negative half-cycle of the input AC voltage (Phase 2); Figure 6 Current flow path diagram for achieving voltage reduction during the positive half-cycle of the input AC voltage (Stage 1); Figure 7 The current flow path diagram for achieving voltage reduction during the positive half-cycle of the input AC voltage (Stage 2); Figure 8 The current flow path diagram for achieving voltage reduction during the negative half-cycle of the input AC voltage (Stage 1); Figure 9 The current flow path diagram for achieving voltage reduction during the negative half-cycle of the input AC voltage (Phase 2); Figure 10 This is the topology diagram of this circuit when it is applied to a three-phase circuit; Figure 11 This is a schematic diagram of the effective value of the input voltage RMS. Figure 12 This is a schematic diagram showing the calculated slope k; Figure 13 A schematic diagram of the RMS value stability assessment signal; Figure 14 This is a schematic diagram of the mode switching output control signal; Figure 15 The waveform diagram is for the control signal. Figure 16 The input voltage and output voltage waveform diagrams are shown below. Figure 17 This is a diagram showing the dual closed-loop control of voltage and current. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0024] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0025] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0026] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper," "lower," "horizontal," or "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Furthermore, terms such as "first" and "second" are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0027] Furthermore, it should be noted that, for ease of description, MOSFET is used to represent the controllable (on and off) switch in the embodiments of the present invention. However, the switch in the present invention is not limited to MOSFET; it can also be other fully controllable switch. MOSFET is used as an example for illustration. In the embodiments of the present invention, the first terminal of the MOSFET refers to the source, the second terminal to the drain, and the control terminal to the gate. A drive control signal is applied to the control terminal of each switch in the embodiments of the present invention. For the sake of brevity, further details will not be provided later.

[0028] AC voltage regulation technology is widely used in home appliances, industrial control, and civil lighting. While voltage regulation schemes based on Buck, Boost, and their derivative topologies offer advantages such as small size, high efficiency, and wide voltage regulation range, they also have inherent drawbacks. Their DC bus capacitor and filter inductor are prone to forming an underdamped resonant network, which, under the excitation of switching harmonics, can cause voltage and current oscillations, leading to output waveform distortion and reduced device reliability. Furthermore, the inherent delay in detecting the effective value of the input voltage can easily cause mode misjudgment, and conventional direct switching methods can generate transient disturbances, resulting in output voltage overshoot or drop, affecting the stable operation of the system.

[0029] Based on the above background, this application provides a control method for an AC voltage regulation topology. By sampling the AC side voltage in real time and calculating its effective value, the slope of the effective value change is used to distinguish between steady-state and transient processes. During the transient period, a transition mode is entered to avoid misjudgment. In the steady state, the corresponding voltage regulation mode is selected based on the comparison between the input voltage and the target threshold. At the same time, a dual closed-loop control system of output voltage outer loop and inductor current inner loop is constructed to generate modulation signals. Combined with the mode control signals, the fully controllable power electronic devices are driven to achieve smooth transition between different modes, effectively suppress resonance and transient disturbances, and ensure the stability and waveform quality of the output voltage.

[0030] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0031] Example 1 This embodiment provides a control method for an AC voltage regulating topology, specifically including the following steps: The AC side voltage of the AC voltage regulator topology is sampled in real time, and the effective value of the input voltage is calculated based on the root mean square algorithm. The AC side voltage is the AC power supply voltage at the input terminal of the AC voltage regulator topology. Real-time sampling can obtain continuous instantaneous voltage data, providing a basis for subsequent effective value calculation. The effective value of the input voltage can accurately reflect the magnitude of the AC voltage and is the core basis for determining the voltage regulation mode.

[0032] The slope of the input voltage RMS value is calculated, and the stability of the input voltage RMS value is determined based on the slope. The slope characterizes the rate of change of the input voltage RMS value over time. By continuously calculating the ratio of the RMS value change to the time interval between adjacent moments, the trend of the RMS value can be monitored in real time. Based on the slope, the transient process and steady-state result of the input voltage RMS value calculation can be reliably distinguished, providing an accurate basis for subsequent mode decision-making.

[0033] If the judgment result is negative, a mode control signal representing the transition mode is generated; if the judgment result is positive, the effective value of the input voltage in the steady state is compared with the preset target voltage threshold range, and a mode control signal representing the bypass mode, boost mode, or buck mode is generated based on the comparison result. In the transition mode, the system maintains the original control logic to avoid mode misjudgment caused by the delay in effective value detection; in the steady state mode, an appropriate voltage regulation mode is selected according to the degree of deviation between the input voltage and the target threshold to ensure that the output voltage is stable within the target range.

[0034] A dual-closed-loop control system, consisting of an outer loop for output voltage and an inner loop for inductor current, is constructed and operated. Output voltage and inductor current are collected as feedback signals, and a modulation signal for PWM modulation is generated based on these feedback signals. The dual-closed-loop control system adopts a cascaded structure: the outer loop ensures the steady-state accuracy of the output voltage, while the inner loop improves the system's dynamic response speed and provides overcurrent protection. By collecting real-time feedback values ​​of the output voltage and inductor current, closed-loop regulation of the system's operating state can be achieved, generating accurate modulation signals to control the switching action of power devices.

[0035] Based on the generated mode control signal and modulation signal, PWM modulation is applied to drive the fully controlled power electronic devices in the AC voltage regulation topology. This ensures that the AC voltage regulation topology operates in the selected mode under steady state and achieves a smooth transition through a transition mode under unstable conditions. Different mode control signals correspond to different power device driving strategies. The PWM modulation signal is used to control the on and off times of the power devices. Through the buffering effect of the transition mode, voltage and current surges caused by sudden changes in control commands during mode switching can be avoided, achieving a smooth transition between different voltage regulation modes and effectively suppressing transient disturbances and resonance phenomena.

[0036] Example 2 In this embodiment, the control method of the above-described AC voltage regulation topology is further explained.

[0037] When calculating the effective value of the input voltage based on the root mean square algorithm, the following calculation formula can be used:

[0038] in, This is the effective value of the input voltage; Let be the instantaneous voltage value of the i-th sampling point within a calculation window; N is the total number of sampling points within the calculation window. This formula can accurately calculate the effective value of the AC voltage. The length of the calculation window can be adjusted according to actual needs, typically set to one or more power frequency cycles to ensure the accuracy of the calculation results.

[0039] When determining whether the effective value of the input voltage is in a stable state based on the slope of change, the following calculation formula can be used:

[0040] Where k is the slope of change; Δt is the time interval between two adjacent sampling points; This is the effective value of the input voltage at the previous sampling point; This represents the effective value of the input voltage at the next sampling point. By calculating the slope of the change in the effective value between adjacent time points, the trend of input voltage change can be monitored in real time.

[0041] When the effective value of the input voltage is in a stable state, a mode control signal representing bypass mode, boost mode, or buck mode is generated based on the comparison result. Specifically: if the effective value of the input voltage in the stable state is greater than the target voltage upper limit threshold, a mode control signal representing buck mode is generated; if the effective value of the input voltage in the stable state is less than the target voltage lower limit threshold, a mode control signal representing boost mode is generated; if the effective value of the input voltage in the stable state is between the target voltage upper limit threshold and the target voltage lower limit threshold, a mode control signal representing bypass mode is generated. The target voltage upper limit threshold and the target voltage lower limit threshold can be preset according to the load's requirements for voltage stability. By setting a reasonable threshold range, frequent mode switching can be avoided, improving the stability of system operation.

[0042] When generating the modulation signal for PWM modulation based on the feedback signal, the outer loop is the output voltage loop. The error between the output voltage (used as the feedback signal) and the target voltage reference value is generated by the regulator, limited, and then output as a current reference command. The inner loop is the inductor current loop. The error between the inductor current (used as the feedback signal) and the current reference command is generated by a high-bandwidth regulator to produce the modulation signal for PWM modulation. The outer loop regulator can use a PI regulator or other suitable control algorithm. Its output current reference command has an upper limit value, corresponding to the maximum safe current allowed by the system, which can realize overload and short-circuit protection. The inner loop regulator adopts a high-bandwidth design, which can quickly track the current reference command and suppress current disturbances, improving the dynamic response performance of the system. Optionally, a fixed bias can be superimposed on the modulation signal output by the inner loop before it is sent to the PWM modulator to ensure that it is within a reasonable range of 0 to 1, preventing overmodulation.

[0043] The AC voltage regulating topology described in this application can be a single-phase AC voltage regulating topology or a three-phase AC voltage regulating topology. When applied to a three-phase AC voltage regulating topology, due to the symmetry of the three-phase circuit, each phase can be independently controlled using the control method described in this application.

[0044] In one embodiment of this application, the AC voltage regulation topology is a single-phase AC voltage regulation topology structure, including a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, a second inductor L2, a first resistor R1, a first fully controlled power electronic device S1 and its anti-parallel first diode D1, a second fully controlled power electronic device S2 and its anti-parallel second diode D2, a third fully controlled power electronic device S3 and its anti-parallel third diode D3, a fourth fully controlled power electronic device S4 and its anti-parallel fourth diode D4, a fifth fully controlled power electronic device S5 and its anti-parallel fifth diode D5, and a sixth fully controlled power electronic device S6 and its anti-parallel sixth diode D6.

[0045] The single-phase AC voltage regulating topology also includes four ports: a first port, a second port, a third port, and a fourth port. The first and second ports are used to connect the two ends of the AC power supply, and the first capacitor C1 is connected in parallel across the two ends of the AC power supply. The third and fourth ports are used to connect the two ends of the load or charging power supply, and the third capacitor C3 is connected in parallel across the two ends of the load or charging power supply.

[0046] One end of the first inductor L1 is connected to the first port, and the other end is connected to the drain of the first fully controlled power electronic device S1 and the source of the fourth fully controlled power electronic device S4, respectively.

[0047] The source of the first fully controlled power electronic device S1 is connected to the cathode of the first diode D1 to form a connection terminal A. The connection terminal A is connected to the source of the second fully controlled power electronic device S2, the source of the third fully controlled power electronic device S3, and one end of the series branch of the second capacitor C2 and the first resistor R1. The drain of the second fully controlled power electronic device S2 is connected to the source of the fifth fully controlled power electronic device S5.

[0048] The drain of the third fully controlled power electronic device S3 is connected to the anode of the third diode D3 and then connected to the source of the sixth fully controlled power electronic device S6 and one end of the second inductor L2. The other end of the second inductor L2 is connected to the third port.

[0049] The drain of the fourth fully controlled power electronic device S4 is connected to the anode of the fourth diode D4 to form a connection terminal B. The connection terminal B is connected to the drain of the fifth fully controlled power electronic device S5, the drain of the sixth fully controlled power electronic device S6, and the other end of the series branch of the second capacitor C2 and the first resistor R1.

[0050] The second and fourth ports are directly connected via a power supply line, which has a connection terminal C. The source of the fifth fully controlled power electronic device S5 is connected to the connection terminal C.

[0051] Optionally, the first resistor R1 is a damping resistor, connected in series in the branch of the second capacitor C2, used to suppress underdamped resonance of the DC bus. When the topology is running under no-load, the load current is approximately zero, and the energy of the LC resonant circuit on the bus side cannot be consumed by the load, easily leading to continuous oscillation. At this time, the first resistor R1 can form an RLC damping circuit to consume the resonant energy and rapidly attenuate the bus voltage oscillation. When the topology is running under load, the load can consume the resonant energy. At this time, the first resistor R1 can be short-circuited by a bypass switch to avoid the resistor consuming active power and ensure the load-carrying efficiency of the topology.

[0052] Based on the generated mode control signal and modulation signal, PWM modulation drive is performed on the fully controlled power electronic devices in the AC voltage regulation topology. Specifically, the third fully controlled power electronic device S3 and the fourth fully controlled power electronic device S4 are controlled to perform power frequency commutation according to the polarity of the input voltage. When the mode control signal represents buck mode, modulation signals for PWM modulation based on feedback signals are applied to the fifth fully controlled power electronic device S5 and the sixth fully controlled power electronic device S6 in the AC voltage regulation topology. When the mode control signal represents boost mode, modulation signals for PWM modulation based on feedback signals are applied to the first fully controlled power electronic device S1 and the second fully controlled power electronic device S2 in the AC voltage regulation topology. When the mode control signal represents bypass mode, the AC input voltage provided by the AC power supply is directly transmitted to the load or charging power supply.

[0053] In a specific embodiment of the present invention, a control method for an AC voltage regulating topology specifically includes the following steps: Step 1: Based on the original topology, a bypass resistor is connected in series with the bus capacitor. When the topology is running under no-load, the load current is approximately zero. At this time, the energy of the LC resonant circuit on the bus side cannot be consumed by the load, which can easily lead to continuous oscillation. This is achieved by using the bypass resistor to suppress resonance. This circuit topology can also be applied to three-phase circuits. Due to the symmetry of three-phase circuits, only the circuit control of one phase will be explained. Step 1.1, Figure 1 The diagram shows the circuit topology with a bypass resistor added to capacitor C1. Since the resistor is not connected in series with the bus capacitor C1, the bus capacitor C1 will form a resonant circuit with L1 of the LC filter, which will cause large oscillations and spikes in the bus voltage. The current will repeatedly charge and discharge in the LC circuit and the amplitude will continue to increase. This will not only cause voltage waveform distortion and affect voltage regulation accuracy, but may also damage power devices and capacitors due to overvoltage / overcurrent.

[0054] Step 1.2: A bypass resistor R1 is connected in series with the bus capacitor C1. When the topology is unloaded, if the load current Io < the threshold, the control circuit outputs a shutdown signal to open the bypass switch. The damping resistor R1 is connected in series with the bus capacitor branch to form an RLC damping circuit, which consumes resonant energy and rapidly decays the bus voltage oscillation.

[0055] Step 1.3: When the topology is detected to be under load, the control circuit outputs a conduction signal to close the bypass switch. The damping resistor R1 is short-circuited, and the bus current flows directly through the bypass switch, avoiding the resistor from consuming active power and ensuring the topology's load-carrying efficiency.

[0056] Step 1.4, the operating modes of the novel AC voltage regulation circuit in this embodiment are analyzed below: When the input voltage is positive, the circuit has two operating modes in boost mode. The states of the switching devices in each mode are as follows: Figure 2 , Figure 3 As shown.

[0057] Working mode 1: such as Figure 2 As shown, switches S1, S3, and S5 are turned on, while S2, S4, and S6 are turned off. The current flow path is AC source → L1 → D1 → C2 → R1 → D5 and C2 → S3 → L2 → load → S5. At this time, the AC source charges and stores energy for inductor L1 and capacitor C2. The voltage of C2 is approximately equal to that of the AC source, which in turn charges L2 and C3.

[0058] Working mode 2: such as Figure 3 As shown, switches S3, S4, and S5 are turned on, while S1, S2, and S6 are turned off. The current flow path is AC source → L1 → S4 → D5, L2 → load → S5 → D6, C2 → S3 → L2 → load → S5. At this time, the AC source charges L1. The rapid turn-on and turn-off of S1 and S4 causes the voltage of L1 to rise very high, which in turn raises the voltage of C2.

[0059] When the input voltage is negative, the circuit has two operating modes in boost mode. The states of the switching devices in each mode are as follows: Figure 4 , Figure 5 As shown.

[0060] Working mode 3: such as Figure 4 As shown, switches S1, S2, and S6 are turned on, while S3, S4, and S5 are turned off. The current flow path is AC source → D2 → S1 → L1 and S2 → load → L2 → S6. At this time, the AC source and L1 charge C2, and capacitor C2 charges L2 and C3. The voltage of C3 is approximately equal to the voltage of C2, but in the opposite direction.

[0061] Working mode 4: such as Figure 5 As shown, switches S2, S4, and S6 are turned on, while S1, S3, and S5 are turned off. The current flow path is AC source → D2 → load → C2 → R1 → D4 → L2, and S2 → load → L2 → S6 → C2 → R1. At this time, the AC source charges L1. The rapid turn-on and turn-off of S1 and S4 causes the voltage of L1 to rise very high, which in turn raises the voltage of C2.

[0062] When the input voltage is positive, the circuit has two operating modes in buck mode. The states of the switching devices in each mode are as follows: Figure 6 , Figure 7 As shown.

[0063] Working mode 5: such as Figure 6As shown, switches S1, S3, and S5 are turned on, while S2, S4, and S6 are turned off. The current flow path is AC source → L1 → D1 → C2 → R1 → D5 and C2 → S3 → L2 → load → S5. At this time, the AC source charges and stores energy for inductor L1 and capacitor C2. The voltage of C2 is approximately equal to that of the AC source, which in turn charges L2 and C3.

[0064] Working mode 6: such as Figure 7 As shown, switches S1, S5, and S6 are turned on, while S2, S3, and S4 are turned off. The current flow path is AC source → L1 → D1 → C2 → R1 → D5, L2 → load → S5 → D6. At this time, L2 and C3 are connected in series, and there is no input source to charge C3, resulting in a decrease in input voltage.

[0065] When the input voltage is negative, the circuit has two operating modes in buck mode. The states of the switching devices in each mode are as follows: Figure 8 , Figure 9 As shown.

[0066] Working mode 7: such as Figure 8 As shown, switches S2, S4, and S6 are turned on, while S1, S3, and S5 are turned off. The current flow path is AC source → D2 → C2 → R1 → D4 → L1, S2 → load → L2 → S6 → C2 → R1. At this time, the AC source charges L1 and C2. The voltage of C2 is approximately equal to the AC source power supply, but in the opposite direction. C2 charges L2 and C3.

[0067] Working mode 8: such as Figure 9 As shown, switches S2, S3, and S4 are turned on, while S1, S5, and S6 are turned off. The current flow path is AC source → S2 → C2 → R1 → D4 → L1, S2 → load → L2 → D3. At this time, L2 and C3 are connected in series, and there is no input source to charge C3, resulting in a decrease in input voltage.

[0068] Step 2: Based on the single-phase AC voltage regulation topology established in Step 1, it can be applied to a three-phase circuit. The circuit topology diagram is as follows: Figure 10 As shown, since each phase is similar when applied to a three-phase circuit, only the topology and control of a single-phase circuit will be described in detail. Step 3: Based on the single-phase AC voltage regulation topology established in Step 1, to address the issue that the RMS value calculation requires one cycle, which may lead to misjudgment of mode switching, the mode selection is based on the stable and unstable stages of the RMS value. If the RMS value is unstable, it operates in transition mode; if the RMS value is stable, it operates in bypass, boost, or buck mode.

[0069] Step 3.1: The effective values ​​of the current on the input inductor L1 and the output voltage are selected for dual closed-loop control. Therefore, the accuracy of RMS value detection is particularly important. However, RMS value detection requires a detection cycle. During this detection time, it is very likely to cause misjudgment of mode switching.

[0070] Step 3.2, Figure 11 The diagram illustrates the effective value of the input voltage RMS. It shows that the RMS value is unstable for at least one cycle during input voltage switching and at the initial moment. Directly judging the mode switching could lead to misjudgment and malfunction of the switching transistor. Operating in transition mode during periods of unstable RMS value avoids misjudgment during mode switching. If the RMS value is unstable, the control signal is set to 1, and the system operates in transition mode.

[0071] Step 4: Based on the judgment of RMS value described in Step 3, the slope of the RMS value between the previous moment and the next moment is calculated to determine whether the RMS value is stable or unstable.

[0072] Step 4.1, as follows Figure 12 The waveform diagram of slope k shows that if the slope k=0, the RMS value is stable, and vice versa.

[0073] Step 4.2, but the absolute value of k increases from 0, which may lead to some judgment error. Therefore, the initial RMS value is forced to 0 to avoid malfunctions of the switch. The RMS value stability judgment signal is as follows: Figure 13 As shown, if the RMS value is 0, it is unstable and is in transition mode; if the RMS value is 1, it is stable and is in boost / buck mode or bypass mode.

[0074] Step 5, the flowchart of the output mode switching control signal is as follows: Figure 14 As shown, firstly, the effective value is detected, and then the slope k is calculated. If the absolute value of k is greater than 0, the system operates in transition mode, and the control signal output is 1; otherwise, it operates in boost / buck or bypass mode. If the effective value of the input voltage is within the target voltage threshold range, the system operates in bypass mode, and the control signal output is 0; if the effective value of the input voltage is greater than the target voltage upper limit threshold, the system operates in buck mode, and the control signal output is 2; if the effective value of the input voltage is less than the target voltage upper limit threshold, the control signal output is 3. Step 5.1: First, operate the topology in bypass mode, then in buck mode, then in boost mode, and finally in bypass mode, as follows: Figure 15 As shown in the control signal waveform diagram, except for the initial forced setting to 0 which took two power frequency cycles, the other mode switching processes only took one cycle.

[0075] Step 5.2, Figure 16The waveforms of the input and output voltages show that the output voltage is basically stable near the target voltage value, indicating the feasibility of the control signal.

[0076] Step 6: Perform dual closed-loop control and output PWM modulation waveform. The control principle is as follows: Figure 17 As shown; Step 6.1: A dual closed-loop control system is constructed. A cascaded control structure is adopted, with the outer loop being the output voltage loop and the inner loop being the inductor current loop. The outer loop generates and limits the output current reference command based on the error between the output voltage feedback and the target voltage. The inner loop outputs a modulation signal based on the error between the inductor current feedback and the current reference command. Step 6.1.1: Acquire the voltage signal at the output terminal of the AC voltage regulator. U o , serving as a feedback signal for the outer loop; Step 6.1.2: Acquire the current signal flowing through the main power inductor I L , serving as the feedback signal for the inner loop; Step 6.1.3: The outer ring will collect the output voltage feedback value. U o Compared with the preset target voltage reference value By comparison, the voltage error is obtained. ,Right now

[0077] The voltage error After calculation by the outer loop controller, a current reference command signal is generated. ; Step 6.1.4: The inner loop will collect the inductor current feedback value. I L The current reference command signal output by the outer loop By comparison, the current error is obtained. ,Right now

[0078] The current error After calculation by the inner loop controller, the duty cycle signal D for controlling the main power switching transistor is directly generated; Step 6.1.5: The duty cycle signal D is processed by the pulse width modulation (PWM) module to generate a pulse signal G that drives the switching transistor, thereby regulating energy transfer and adjusting the output voltage. U o Stabilize at the target value .

[0079] The current reference command signal output by the outer loop controller An upper limit value is set, which corresponds to the maximum safe current allowed by the system. When the load demand or calculated value exceeds this limit value, the current reference command is clamped, thereby realizing the overload and short-circuit current protection of the system.

[0080] The bandwidth of the inner loop controller is higher than that of the outer loop controller, enabling the inner loop to quickly track commands and suppress current disturbances, thereby allowing the outer loop voltage to be quickly and stably regulated through the cascading relationship.

[0081] When the system needs to switch between boost mode and buck mode according to the input voltage conditions, the dual closed-loop control system automatically adjusts the duty cycle by smoothly changing the target voltage reference value of the outer loop, so that the inductor current and output voltage transition smoothly and achieve shock-free mode switching.

[0082] Step 6.2: Based on the determined operating mode, a corresponding switching transistor control strategy is implemented: In buck mode, complementary PWM modulation based on the modulation signal is applied to fast transistors S5 and S6 to regulate the output voltage; in boost mode, complementary PWM modulation based on the modulation signal is applied to fast transistors S1 and S2. Meanwhile, slow transistors S3 and S4 do not participate in high-frequency chopping; their states are switched at the power frequency according to the instantaneous polarity of the input voltage to construct the correct current loop.

[0083] The control logic of the switching transistors in the buck mode is as follows: when the input voltage is in the positive half-cycle, S1 and S4 are turned on, and S5 and S6 are complementaryly modulated; when the input voltage is in the negative half-cycle, S2 and S3 are turned on, and S5 and S6 are complementaryly modulated.

[0084] The control logic of the switching transistors in the boost mode is as follows: when the input voltage is in the positive half-cycle, S4 and S5 are turned on, and S1 and S2 are complementaryly modulated; when the input voltage is in the negative half-cycle, S3 and S6 are turned on, and S1 and S2 are complementaryly modulated.

[0085] Before the modulation signal output from the inner loop is sent to the PWM modulator, a fixed bias is superimposed to ensure that its value is within a reasonable range of 0 to 1, thus preventing overmodulation.

[0086] This invention provides sufficient damping for the resonant circuit by connecting a damping resistor in series with the DC bus capacitor. When the harmonic current generated by the power switch excites the circuit, this resistor continuously dissipates energy, preventing energy from being exchanged between the inductor and capacitor without attenuation. This results in an exponentially decaying oscillation characteristic, effectively eliminating oscillation spikes and resonant currents in the bus voltage. This not only improves the output voltage waveform quality but also prevents damage to power devices and capacitors due to resonant stress, thus enhancing the system's hardware reliability. The real-time slope of the input voltage's effective value is used as the criterion for mode switching. By calculating the slope and comparing it with a set threshold, the system can reliably distinguish between the transient process and steady-state result of RMS detection. During the unstable transient period, the system is placed in transition mode and maintains the original control state, thus eliminating the problem of mode misjudgment caused by detection delay. By setting the transition mode and combining it with the smooth adjustment of the target reference value, a smooth transition between different operating modes is achieved. Mode decision is made only after the detection stabilizes based on the accurate voltage value, making the change of control command continuous and smooth. This ensures that there are no sudden changes or shocks in the inductor current and output voltage during the switching process, which not only reduces the electrical stress on power devices but also ensures the continuity and stability of power supply to the load. The dual closed-loop control architecture of output voltage outer loop and inductor current inner loop enables the system to have both steady-state accuracy and dynamic response speed. The high bandwidth design of the inner loop can quickly suppress disturbances, while the outer loop ensures that the output voltage accurately tracks the set value. At the same time, the overcurrent self-protection function of the system is realized by limiting the current command, which enhances the overall robustness of operation. In summary, this invention provides a highly reliable and high-performance single-phase AC voltage regulation solution through the synergistic effect of damped resonance design, intelligent mode decision-making, smooth switching strategy, and dual closed-loop control. It effectively solves the technical challenges of resonance suppression and smooth mode switching, and has good practical value.

[0087] Finally, it should be noted that the embodiments listed above are merely one or more specific manifestations of the technical solution of this invention. Their purpose is to clearly illustrate the concept, principle, and application of this invention through specific examples, and is by no means intended to limit the scope of protection of this invention to these specific embodiments. In fact, the true value of this invention lies in its proposed technical ideas and innovations, rather than its manifestations or implementation methods.

[0088] For those skilled in the art, after thoroughly reading and understanding the technical solution of this invention, they are fully capable of making various changes, modifications, or equivalent substitutions to the specific implementation of the invention based on their own professional knowledge and skills. These changes may include, but are not limited to: adjusting the range of technical parameters, optimizing the algorithm flow to improve efficiency, and replacing some technical components to achieve better compatibility or reduce costs. As long as these modified technical solutions substantially retain the technical features claimed by the original invention, that is, they can still achieve the core functions and effects of this invention, then these changes should be considered to fall within the scope of protection of the pending claims of this invention.

[0089] Furthermore, with the continuous progress and development of technology, new technical means and methods are constantly emerging, which provides ample space for further improvement and perfection of this invention. Therefore, the scope of protection of this invention should also include reasonable and foresightful improvements and extensions based on existing technology. As long as these improvements and extensions do not depart from the basic principles and core concepts of this invention, they should be considered equivalents of this invention and are equally protected by patent rights.

Claims

1. A control method for an AC voltage regulating topology, characterized in that, Includes the following steps: The AC side voltage of the AC voltage regulation topology is sampled in real time, and the effective value of the input voltage is calculated based on the root mean square algorithm. Calculate the slope of the change in the effective value of the input voltage, and determine whether the effective value of the input voltage is in a stable state based on the slope of the change; If the judgment result is negative, a mode control signal representing the transition mode is generated. If the judgment result is yes, the effective value of the input voltage in the steady state is compared with the preset target voltage threshold range, and a mode control signal representing the bypass mode, boost mode or buck mode is generated based on the comparison result. A dual closed-loop control system consisting of an outer loop for output voltage and an inner loop for inductor current is constructed and run. The output voltage and inductor current are collected as feedback signals, and a modulation signal for PWM modulation is generated based on the feedback signals. Based on the generated mode control signal and modulation signal, PWM modulation is applied to the fully controlled power electronic devices in the AC voltage regulation topology so that the AC voltage regulation topology operates in the selected mode in steady state and achieves smooth transition through transition mode in unstable state.

2. The control method for an AC voltage regulating topology according to claim 1, characterized in that, Based on the comparison results, a mode control signal representing bypass mode, boost mode, or buck mode is generated, specifically as follows: If the effective value of the input voltage in the steady state is greater than the target voltage upper limit threshold, a mode control signal characterizing the buck mode is generated. If the effective value of the input voltage in the steady state is less than the target voltage lower limit threshold, a mode control signal characterizing the boost mode is generated. If the effective value of the input voltage in the steady state is between the upper and lower threshold values ​​of the target voltage, a mode control signal characterizing the bypass mode is generated.

3. The control method for an AC voltage regulating topology according to claim 1, characterized in that, The modulation signal for PWM modulation is generated based on the feedback signal, specifically as follows: The outer loop is the output voltage loop, which generates and limits the error between the output voltage (used as feedback signal) and the target voltage reference value through a regulator, and then outputs a current reference command. The inner loop is the inductor current loop, which generates a modulation signal for PWM modulation through a high-bandwidth regulator based on the error between the inductor current (used as feedback signal) and the current reference command.

4. The control method for an AC voltage regulating topology according to claim 1, characterized in that, The effective value of the input voltage is calculated based on the root mean square algorithm, specifically as follows: in, This is the effective value of the input voltage; Let N be the instantaneous voltage value of the i-th sampling point within a calculation window; N is the total number of sampling points within the calculation window.

5. The control method for an AC voltage regulating topology according to claim 4, characterized in that, The slope of the change is used to determine whether the effective value of the input voltage is in a stable state. Specifically: Where k is the slope of change; Δt is the time interval between two adjacent sampling points; This is the effective value of the input voltage at the previous sampling point; This is the effective value of the input voltage at the next sampling point.

6. The control method for an AC voltage regulating topology according to claim 1, characterized in that, The AC voltage regulating topology can be a single-phase AC voltage regulating topology or a three-phase AC voltage regulating topology.

7. The control method for an AC voltage regulating topology according to claim 6, characterized in that, When the AC voltage regulation topology is a single-phase AC voltage regulation topology, it includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, a second inductor L2, a first resistor R1, a first fully controlled power electronic device S1 and its anti-parallel first diode D1, a second fully controlled power electronic device S2 and its anti-parallel second diode D2, a third fully controlled power electronic device S3 and its anti-parallel third diode D3, a fourth fully controlled power electronic device S4 and its anti-parallel fourth diode D4, a fifth fully controlled power electronic device S5 and its anti-parallel fifth diode D5, and a sixth fully controlled power electronic device S6 and its anti-parallel sixth diode D6. The single-phase AC voltage regulating topology also includes four ports: a first port, a second port, a third port, and a fourth port; wherein, the first port and the second port are used to connect the two ends of the AC power supply, and the first capacitor C1 is connected in parallel across the two ends of the AC power supply; the third port and the fourth port are used to connect the two ends of the load or the charging power supply, and the third capacitor C3 is connected in parallel across the two ends of the load or the charging power supply. One end of the first inductor L1 is connected to the first port, and the other end is connected to the drain of the first fully controlled power electronic device S1 and the source of the fourth fully controlled power electronic device S4, respectively. The source of the first fully controlled power electronic device S1 is connected to the cathode of the first diode D1 to form a connection terminal A. The connection terminal A is connected to the source of the second fully controlled power electronic device S2, the source of the third fully controlled power electronic device S3, and one end of the series branch of the second capacitor C2 and the first resistor R1. The drain of the second fully controlled power electronic device S2 is connected to the source of the fifth fully controlled power electronic device S5. The drain of the third fully controlled power electronic device S3 is connected to the anode of the third diode D3 and then connected to the source of the sixth fully controlled power electronic device S6 and one end of the second inductor L2. The other end of the second inductor L2 is connected to the third port. The drain of the fourth fully controlled power electronic device S4 is connected to the anode of the fourth diode D4 to form a connection terminal B. The connection terminal B is connected to the drain of the fifth fully controlled power electronic device S5, the drain of the sixth fully controlled power electronic device S6, and the other end of the series branch of the second capacitor C2 and the first resistor R1. The second and fourth ports are directly connected via a power supply line, which has a connection terminal C. The source of the fifth fully controlled power electronic device S5 is connected to the connection terminal C.

8. The control method for an AC voltage regulating topology according to claim 7, characterized in that, Based on the generated mode control signal and modulation signal, PWM modulation drive is applied to the fully controllable power electronic devices in the AC voltage regulation topology, specifically as follows: The third fully controlled power electronic device S3 and the fourth fully controlled power electronic device S4 perform power frequency commutation according to the polarity of the input voltage; When the mode control signal characterizes the buck mode, a modulation signal for PWM modulation based on the feedback signal is applied to the fifth fully controlled power electronic device S5 and the sixth fully controlled power electronic device S6 in the AC voltage regulation topology. When the mode control signal characterizes the boost mode, a modulation signal for PWM modulation based on the feedback signal is applied to the first fully controlled power electronic device S1 and the second fully controlled power electronic device S2 in the AC voltage regulation topology. When the mode control signal indicates bypass mode, the AC input voltage provided by the AC power supply is directly transmitted to the load or charging power supply.

9. The control method for an AC voltage regulating topology according to claim 1, characterized in that, The fully controllable power electronic device is the MOSFET.

10. A control system for an AC voltage regulating topology, characterized in that, A control method for implementing the AC voltage regulating topology as described in any one of claims 1 to 9 includes: The first module is used to sample the AC side voltage of the AC voltage regulation topology in real time and calculate the effective value of the input voltage based on the root mean square algorithm. The second module is used to calculate the slope of the change in the effective value of the input voltage and to determine whether the effective value of the input voltage is in a stable state based on the slope of the change. The third module is used to generate a mode control signal representing the transition mode when the effective value of the input voltage is not in a stable state; when the effective value of the input voltage is in a stable state, it compares the effective value of the input voltage in the stable state with the preset target voltage threshold range, and generates a mode control signal representing the bypass mode, boost mode or buck mode based on the comparison result. The fourth module is used to build and run a dual closed-loop control system with an outer loop of output voltage and an inner loop of inductor current. It collects output voltage and inductor current as feedback signals and generates modulation signals for PWM modulation based on the feedback signals. The fifth module is used to perform PWM modulation drive on the fully controlled power electronic devices in the AC voltage regulation topology according to the generated mode control signal and modulation signal, so that the AC voltage regulation topology operates in the selected mode in steady state and achieves smooth transition through the transition mode in unstable state.

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