Hysteresis current mode buck-boost converter

CN122801780APending Publication Date: 2026-09-22TEXAS INSTRUMENTS INC
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Patent Information

Application Number
CN202610299810.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-03-20
Filing Date
2026-03-12
Publication Date
2026-09-22

AI Technical Summary

Technical Problem

在模式转换期间也会发生电流过冲和输出电压纹波

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Abstract

The present disclosure relates to hysteretic current mode buck-boost converters. One apparatus (100) includes a current source (142) configurable to provide a first current at a predetermined current value. The apparatus (100) further includes a first current comparator (132) configurable to receive a rising current through an inductor (114) as a first input and to receive the first current plus a second current as a second input, and to provide an output to control logic (136) based on a comparison between the two inputs. The apparatus (100) further includes a second current comparator (134) configurable to receive the second current as a first input and to receive a falling current through the inductor as a second input, and to provide an output to the control logic (136) based on a comparison between its two inputs.
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Description

Technical Field

[0001] This disclosure relates to buck-boost converters. Background Technology

[0002] Low-voltage buck-boost converters are widely used in lithium-ion battery-powered devices such as smartphones and tablets. Buck-boost converters are also used in optical module systems that provide an accurate voltage rail when the input DC voltage varies significantly. Buck-boost converters typically contain four switching transistors, such as field-effect transistors (FETs), and have lower efficiency when operating in 4-FET switching buck-boost mode compared to 2-FET switching buck or boost converters. When operating in buck or boost mode, the operation of a buck-boost converter is typically limited by its duty cycle, especially at high switching frequencies. For a non-limiting example, at a switching frequency of 4 MHz, the buck-boost converter has a time period of 250 ns and a duty cycle between 20% and 80%, with a minimum on-time (T0). ON ) and disconnection time (T) OFF Each is 50 ns. Under this duty cycle limitation, for an output voltage V of 3.4 V... out The input voltage V of the buck-boost converter in Between 2.72 V and 4.25 V. Therefore, the buck-boost converter must operate in an inefficient buck-boost mode across almost the entire lithium-ion battery voltage range.

[0003] Furthermore, mode switching between buck / buck-boost / boost modes in buck-boost converters is currently complex and typically requires V. in / V out Voltage information and minimum / maximum duty cycle are used as mode switching conditions. Current overshoot and output voltage ripple can also occur during mode switching. Furthermore, the minimum / maximum duty cycle of the buck-boost converter can be triggered during transient events, resulting in an additional delay time to prevent potentially unexpected mode switching due to the triggered minimum / maximum duty cycle. Summary of the Invention

[0004] In one example, a device includes a current source configured to provide a first current at a predetermined current value. The device further includes a first current comparator configured to receive a rising current through an inductor as a first input and receive the first current plus a second current as a second input, and to provide an output to control logic based on a comparison between the first and second inputs. The device further includes a second current comparator configured to receive the second current as a first input and receive a falling current through the inductor as a second input, and to provide an output to the control logic based on a comparison between the first and second inputs. The device further includes the control logic configured to control the inductor current through the inductor by switching one or more of a plurality of transistors based on the outputs from the first and second current comparators.

[0005] In another example, a method includes generating a first current with a predetermined current value. The method further includes: receiving a rising current through an inductor as a first input to a first current comparator and receiving the first current plus a second current as a second input to the first current comparator; and providing an output to control logic based on a comparison between the first input and the second input of the first current comparator. The method further includes: receiving the second current as a first input to a second current comparator and receiving a falling current through the inductor as a second input to the second current comparator; and providing an output to the control logic based on a comparison between the first input and the second input of the second current comparator. The method further includes controlling the inductor current through the inductor by switching one or more of a plurality of transistors based on the outputs from the first current comparator and the second current comparator. Attached Figure Description

[0006] Figure 1 This is a schematic diagram of a hysteresis current-mode buck-boost converter in an example, which uses a hysteresis current source to control the switching of inductor current.

[0007] Figure 2A In the depiction of the example Figure 1 A schematic diagram of the implementation scheme of the mode controller in the diagram. Figure 2B Describe examples such as the transitions between buck mode, boost mode, and buck-boost mode controlled by a mode controller.

[0008] Figure 3 Examples depicting the waveforms of the inductor current IL over time in buck mode, buck-boost mode, and boost mode, respectively.

[0009] Figure 4A In the depiction of the example Figure 1 A schematic diagram of the implementation scheme for skipping the timer. Figure 4B The second current I in the depiction example EA With skipped time period T SKIP The relationship between them.

[0010] Figure 5 Examples depicting the waveforms of the inductor current IL over time in buck mode, buck-boost mode, and boost mode, respectively, where the timer skips the skip period T. SKIP . Detailed Implementation

[0011] Use the same reference numerals or other reference indicators in the drawings to indicate the same or similar features (functionally and / or structurally).

[0012] Figure 1 This is an illustrative example of a hysteresis current-mode buck-boost converter 100, which utilizes a hysteresis current source 142 to control the switching of inductor current. For example... Figure 1 As shown in the example, the hysteresis current-mode buck-boost converter 100 includes multiple switching FETs, such as four switching FETs 102, 104, 106, and 108. In one example, a first (buck high-side or HS) FET S1 / 102 is coupled between the voltage input terminal 116 and the first terminal 110, and a second (buck low-side or LS) FET S2 / 104 is coupled between the first terminal 110 and the ground terminal, wherein the voltage input terminal 116 is connected to the input voltage V of the hysteresis current-mode buck-boost converter 100. in In one example, a third (boost HS) FET S3 / 106 is coupled between voltage output terminal 118 and second terminal 112, and a fourth (boost LS) FET S4 / 108 is coupled between second terminal 112 and ground terminal, wherein voltage output terminal 118 is connected to the output voltage V of the hysteresis current-mode buck-boost converter 100. out In one example, the gate terminals 122, 124, 126, and 128 of the first FET 102, the second FET 104, the third FET 106, and the fourth FET 108 are controlled by control logic 136 via gate driver 120 to turn the four FETs on and off, as discussed in detail below. In one example, an inductor 114 is coupled between the first terminal 110 and the second terminal 112.

[0013] exist Figure 1 In one example, the hysteresis current-mode buck-boost converter 100 includes a first current comparator 132, which is configurable to receive a current IL flowing from the voltage input terminal 116 through the first transistor 102. rising As its first current input. In one example, the first current comparator 132 can be configured to receive two currents - the first current I HYS Second current I EA The combination of the two current inputs is used as its second current input. The first current comparator 132 can be configured to compare its two current inputs and provide the output to the control logic 136 based on the comparison between its two inputs. In one example, the first current I... HYS Provided by hysteresis current source 142, the hysteresis current source provides a first current I at a value predetermined by the user. HYS The predetermined first current I HYS The range of the inductor current IL flowing through inductor 114 via the current feedback loop is defined / controlled, as discussed in detail below. In one example, from the output voltage V... out Generate a second current I EA Specifically, the output voltage V is divided by a pair of resistors 148 and 150. out A portion is provided as input to error amplifier (EA) 146 to correlate with reference voltage V. ref The comparison is then performed. The output from EA 146 is then converted into a second current I by a voltage-to-current (V / I) converter 144. EA .

[0014] exist Figure 1 In one example, the hysteresis current-mode buck-boost converter 100 includes a second current comparator 134, which is configurable to receive the output voltage V as discussed above. out The generated second current I EA The second current comparator 134 can also be configured to receive the current IL flowing from the voltage output terminal 118 through the third transistor 106 as its first current input. falling As its second current input. The second current comparator 134 can then be configured to compare its two current inputs and provide the output to the control logic 136 based on the comparison between its two inputs.

[0015] exist Figure 1 In one example, the hysteresis current-mode buck-boost converter 100 includes a mode controller 130, which is configurable to accept an input voltage V from the input voltage terminal 116. in And receive the output voltage V from the output voltage terminal 118 outAs its two inputs, and generating an output to control logic 136 to switch one or more of the first FET 102, second FET 104, third FET 106, and fourth FET 108 between buck mode, boost mode, and buck-boost mode, respectively. Specifically, mode controller 130 can be configured to turn on the third FET 106, turn off the fourth FET 108, and allow switching between the first FET 102 and the second FET 104 via control logic 136 during buck mode. In one example, mode controller 130 can be configured to turn on the first FET 102, turn off the second FET 104, and allow switching between the third FET 106 and the fourth FET 108 via control logic 136 during boost mode. In one example, mode controller 130 can be configured to allow switching between all of the first FET 102, second FET 104, third FET 106, and fourth FET 108 via control logic 136 during buck-boost mode.

[0016] Figure 2A Depicting Figure 1 An example of a schematic diagram of an implementation scheme for the mode controller 130, and Figure 2B The description is as follows: the mode controller 130 is based on the input voltage V in and output voltage V out Controlled switching between buck mode, boost mode, and buck-boost mode. For example, by... Figure 2A As shown in the example, the mode controller 130 includes a first voltage comparator 202, which converts the input voltage V... in As its first input and the output voltage V out Plus V1 (e.g., 150 mV or 200 mV) is used as its second input. The mode controller 130 also includes a second voltage comparator 204, which outputs voltage V out As its first input and with input voltage V out Plus V2 (e.g., 150 mV or 200 mV) serves as its second input. In one example, the mode controller 130 can be configured to output three mode signals BUCK, BOOST, and BUCK-BOOST to the control logic 136 for switching to buck mode, boost mode, and buck-boost mode, respectively, wherein one and only one of the three mode signals is high / on at any given time.

[0017] Assuming the hysteresis current-mode buck-boost converter 100 initially starts in buck mode, where V in Greater than V out + V1 (e.g., 150 mV), such as Figure 2B As shown in the diagram. Therefore, the voltage is calculated by the first voltage comparator 202 based on V. in and V out The +150 mV generated BUCK signal turns on, and switch 206 also turns on, as shown. Figure 2A As shown in the figure. When V in Decrease to less than V out At +150 mV, the hysteresis current-mode buck-boost converter 100 enters buck-boost mode when the BUCK signal is off, and the BUCK-BOOST signal is on when both the BUCK and BOOST signals are off (and the NON_BUCK and NON_BOOST signals are on). When in buck-boost mode, if V in Reverse its trend and rise to, for example, greater than V out +200 mV (where switch 208 is on), the BUCK signal turns on again and the hysteresis current-mode buck-boost converter 100 shifts back to buck mode. On the other hand, if V in buck-boost mode... in Continue to descend and descend to, for example, V out Below -200 mV (where switch 212 is on), the BOOST signal generated by the second voltage comparator 204 is turned on and the hysteresis current mode buck-boost converter 100 enters boost mode. If V in Reverse again and rise to, for example, V out Above -150 mV (where switch 210 is on), the BUCK-BOOST signal turns on again, and the hysteresis current-mode buck-boost converter 100 shifts back to buck-boost mode. Therefore, the hysteresis current-mode buck-boost converter 100 can operate solely based on the input voltage V. in and output voltage V out It can switch between buck mode, buck-boost mode, and boost mode without any duty cycle limitations. Therefore, it achieves better control over the operating mode. This better control over the operating mode can be application-based. For example, some optical module customers can now operate the hysteresis current-mode buck-boost converter 100 in buck-boost mode for certain / desired input voltage ranges.

[0018] exist Figure 1 In one example, control logic 136 can be configured to control the inductor current IL through inductor 114 by switching one or more of a plurality of FETs, such as 102, 104, 106 and 108, based on the outputs from a first current comparator 132 and a second current comparator 134 in buck mode, buck-boost mode and boost mode, respectively. Figure 3Examples depicting the waveforms of the inductor current IL over time in buck mode, buck-boost mode, and boost mode, respectively. Specifically, such as... Figure 3 As shown, when Figure 1 When the hysteresis current-mode buck-boost converter 100 operates in buck mode, for example, V in Greater than V out At this time, control logic 136 can be configured to turn on the third FET 106 and turn off the fourth FET 108, and switch between the first FET and the second FET by sending corresponding control signals via driver 120 to the respective gate terminals 126, 128, 122, and 124 of the first FET 102 and the second FET 104. When the first FET 102 is turned on, the hysteresis current-mode buck-boost converter 100 operates at T... ON During this period, the rising inductor current IL is equal to the IL flowing through the first FET 102, inductor 114, and third FET 106. rising , where di / dt=(V in -V out ) / L, where L is the inductance of inductor 114. Once the inductor current IL rising Reaching and exceeding IL PEAK =I EA +I HYS The first current comparator 132 sends a signal to the control logic 136 to turn off the first FET 102 and turn on the second FET 104, and the hysteresis current-mode buck-boost converter 100 enters T... OFF Time period. During this time period, it equals IL. falling The inductor current IL is di / dt = V out / L decreases until it reaches IL VALLEY =I EA This triggers the second current comparator 134 to send a signal to control logic 136 to turn off the second FET 104 and turn on the first FET 102, causing the inductor current IL to start rising again. Therefore, control logic 136 loops to control the ripple (hysteresis) current I generated by the hysteresis current source 142. HYS Range / Peak current IL within the window PEAK With valley current IL VALLEY The inductor current IL ripple between, where the hysteresis current I HYS The hysteresis current mode buck-boost converter 100 is a design / constant value preset by the designer / user. This is achieved by appropriately setting the hysteresis current I. HYS When V in Approaching V out Even when the minimum T is reached OFFDuring the time period, the T of the hysteresis current mode buck-boost converter 100 ON The operating time can also be extended in buck mode, thereby breaking the duty cycle limitation of hysteresis current mode. Without duty cycle limitation, the operating range of buck and boost modes can be extended to achieve higher efficiency.

[0019] When the hysteresis current-mode buck-boost converter 100 operates in boost mode, for example, V in Less than V out At this time, control logic 136 can be configured to turn on the first FET 102, turn off the second FET 104, and switch between the third FET and the fourth FET by sending corresponding control signals via driver 120 to the respective gate terminals 122, 124, 126, and 128 of the third FET 106 and the fourth FET 108. When the fourth FET 108 is turned on, the hysteresis current-mode buck-boost converter 100 is in T... ON During this period, the rising inductor current IL is equal to the current flowing through the first FET 102, inductor 114, and fourth FET 108. rising Where di / dt=V in / L. Once the inductor current IL rising Reaching and exceeding IL PEAK =I EA +I HYS The first current comparator 132 sends a signal to the control logic 136 to turn off the fourth FET 108 and turn on the third FET 106, and the hysteresis current-mode buck-boost converter 100 enters T... OFF Time period. During this time period, it equals IL. falling The inductor current IL is expressed as di / dt = (V out -V in The ratio decreases until it reaches IL. VALLEY =I EA This triggers the second current comparator 134 to send a signal to control logic 136 to turn off the third FET 106 and turn on the fourth FET 108, causing the inductor current IL to start rising again. In buck mode, the control logic 136 loop controls the ripple (hysteresis) current I... HYS Range / Peak current IL within the window PEAK With valley current IL VALLEY The inductor current IL ripple between them. By appropriately setting I... HYS When V in Approaching V out Even when the minimum T is reached ON During the time period, the T of the hysteresis current mode buck-boost converter 100 OFFThe time period can also be extended in boost mode, thereby breaking the duty cycle limitation of hysteresis current mode.

[0020] When the hysteresis current-mode buck-boost converter 100 operates in buck-boost mode, i.e., V in It can be greater than, less than or equal to V. out Control logic 136 can be configured to switch between all of the first FET 102, second FET 104, third FET 106, and fourth FET 108 by sending corresponding control signals via driver 120 to the respective gate terminals 122, 124, 126, and 128 of the fourth FET 108. When the first FET 102 and the fourth FET 108 are turned on, the hysteresis current-mode buck-boost converter 100 is in T... ON During this period, the rising inductor current IL is equal to the current flowing through the first FET 102, inductor 114, and fourth FET 108. rising Where di / dt=V in / L. Once the inductor current IL rising Reaching IL PEAK =I EA +I HYS The first current comparator 132 sends a signal to the control logic 136 to turn off the fourth FET 108 and turn on the third FET 106, and the hysteresis current-mode buck-boost converter 100 enters T... CON During the time period, the first FET 102 and the third FET 106 are turned on. In T... CON During the period, the inductor current IL remains close to its current level (e.g., IL may be equal to its current level or change from its current level with a small slope) because V in and V out The expected approach is in buck-boost mode. In one example, the hysteresis current-mode buck-boost converter 100 includes, for instance... Figure 1 The constant timer 138 shown is configured to provide an output to control logic 136 for a first time period T during which the inductor current IL rises. ON The second time period T during which the inductor current IL decreases OFF A specific time period (T) between CON The inductor current IL is kept close to its current level within the circuit to increase buck-boost efficiency. In one example, T CON It is a design value set by the designer, where T is... CON It can be, but is not limited to, 200~500 ns. In one example, by considering I HYS L, V in V outThe value of T is selected based on one or more values ​​in the given parameters, as well as the desired switching frequency. CON The value (fixed or adaptive). In one example, the constant timer 138 is a fixed timer with no input from any current or voltage source. In T CON After the time period, control logic 136 turns off the first FET 102 and turns on the second FET 104, and the hysteresis current-mode buck-boost converter 100 enters T... OFF During the time period, the inductor current IL is equal to IL falling Where di / dt=V out / L, where the second FET 104 and the third FET 106 are turned on until IL. falling Reaching IL VALLEY =I EA At this point, the second current comparator 134 sends a signal to the control logic 136 to turn off the second FET 104 and the third FET 106 and turn on the first FET 102 and the fourth FET 108, causing the inductor current IL to start rising again. In both buck and boost modes, the control logic 136 loop controls the peak current IL within the range / window of the ripple (hysteresis) current. PEAK With valley current IL VALLEY The inductor current IL ripple between V. For example, when V out Greater than or equal to V in At that time, the ripple current is at T CON During the period, it dropped to I HYS The following or in I HYS The position remains unchanged, while when V out Less than V in At that time, the ripple current can be maintained at I. HYS Plus in T CON Additional increments during the period, such as Figure 3 and 5 As shown.

[0021] In one example, the hysteresis current-mode buck-boost converter 100 includes a skip timer 140, which is configurable to accept input from the output voltage V. out The generated second current I EA As its input, and generated as an output to control logic 136 to maintain the inductor current IL at its current level (e.g., the second current I). EA ) Reaching a specific time period T SKIP . Figure 4A Depicting Figure 1 An example of a schematic diagram of an implementation scheme for skip timer 140, and Figure 4B Depicting the second current I EA With skipped time period TSKIP The relationship between them. For example... Figure 4A As shown in the example, the skip timer 140 includes a voltage comparator 402, which will be controlled by a second current I. EA The voltage V at the charging capacitor C404 during charging. EA As its first input, and with reference voltage V REF As its second input, it generates a skip signal for control logic 136. EA V EA and T SKIP The relationship between them can be expressed as:

[0022] I EA / C =V EA / T SKIP , or T SKIP =V EA C / I EA

[0023] That is, such as Figure 4B As shown, skip time period T SKIP With the output voltage V out The generated second current I EA Inversely proportional. In one instance, when T... SKIP When the time period ends and the inductor current IL rises again, the charging capacitor C 404 is reset via switch 406. Figure 5 Examples depicting the waveforms of the inductor current IL over time in buck mode, buck-boost mode, and boost mode, respectively, where timer 140 skips the skip time period T. SKIP It should be noted that Figure 5 The start and end points of the skip timer shown are examples for illustrative purposes only, as the skip time period T... SKIP It can begin and / or end at any point. For non-restricted instances, in continuous conduction mode (CCM), the time period T is skipped. SKIP Available in T OFF End before it ends.

[0024] In this specification, the term "coupled" may encompass a connection, communication, or signaling path that enables the functional relationship to be consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B via a direct connection; or (b) in a second instance, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.

[0025] Furthermore, in this description, the phrase "based on" means "at least partially based on". Therefore, if X is based on Y, then X can depend on Y and any number of other factors.

[0026] A device that is “configurable to” perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function during manufacturing by the manufacturer, and / or may be configured (or reconfigurable) by the user after manufacturing to perform the function and / or other additional or alternative functions. Configuration may be through firmware and / or software programming of the device, through the construction and / or layout of the device’s hardware components and interconnections, or a combination thereof.

[0027] In this specification, unless otherwise stated, “about,” “approximately,” or “substantially” preceding a parameter means within + / - 10% of the parameter, or, if the parameter is zero, within a reasonable range of values ​​approximately zero.

[0028] Modifications may be made to the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. An apparatus comprising: A current source, which can be configured to provide a first current at a predetermined current value; The first current comparator can be configured to... The first current comparator receives the rising current through the inductor as its first input and receives the first current plus a second current as its second input. The output is provided to the control logic based on the comparison between the first input and the second input of the first current comparator; The second current comparator can be configured to... The second current is received as the first input of the second current comparator, and the decreasing current through the inductor is received as the second input of the second current comparator; and The comparison between the first input and the second input of the second current comparator provides the output to the control logic; as well as The control logic is configurable to control the inductor current through the inductor by switching one or more of a plurality of transistors based on the outputs from the first current comparator and the second current comparator.

2. The device according to claim 1, wherein: The inductor current through the inductor is equal to the rising current or the falling current through the inductor.

3. The device according to claim 1, wherein: The control logic can be configured to define the inductor current within a range between the second current and the first current plus the second current.

4. The device according to claim 1, wherein: The control logic can be configured to control the duty cycle by extending a first time period when the inductor current rises and / or a second time period when the inductor current falls.

5. The device according to claim 4, further comprising: A constant timer, configurable to provide an output to the control logic, to maintain the inductor current close to its current level for a specific time period between a first time period when the inductor current rises and a second time period when the inductor current falls.

6. The device according to claim 1, further comprising: Skip timer, which can be configured to It accepts the second current as its input; as well as The output is generated to the control logic to maintain the inductor current at the level of the second current for a specific time period.

7. The device of claim 1, wherein the plurality of transistors comprises: The first transistor is coupled between the input voltage terminal and the first terminal; The second transistor is coupled between the first terminal and the ground terminal; The third transistor is coupled between the second terminal and the output voltage terminal; as well as A fourth transistor is coupled between the second terminal and the ground terminal.

8. The device according to claim 7, wherein: The inductor is coupled between the first terminal and the second terminal.

9. The device according to claim 7, wherein: The second current is generated based on the output voltage at the output voltage terminal.

10. The device according to claim 7, further comprising: Mode controller, which can be configured to It accepts the input voltage from the input voltage terminal and the output voltage from the output voltage terminal as its two inputs; as well as The output is generated to the control logic to switch one or more of the first transistor, the second transistor, the third transistor, and the fourth transistor between buck mode, boost mode, and buck-boost mode.

11. The device according to claim 10, wherein: The control logic can be configured to operate during the buck mode. Turn on the third transistor; Turn off the fourth transistor; as well as The rising current, the falling current, the first current, and the second current are used to switch between the first transistor and the second transistor.

12. The device according to claim 10, wherein: The control logic can be configured to operate during the boost mode. Turn on the first transistor; Turn off the second transistor; as well as The third transistor and the fourth transistor are switched according to the rising current, the falling current, the first current and the second current.

13. The device according to claim 10, wherein: The control logic can be configured to switch between the first transistor, the second transistor, the third transistor, and the fourth transistor during the buck-boost mode based on the rising current, the falling current, the first current, and the second current.

14. A method comprising: A first current is generated at a predetermined current value; The system receives the rising current through the inductor as the first input of the first current comparator and receives the first current plus the second current as the second input of the first current comparator. The output is provided to the control logic based on the comparison between the first input and the second input of the first current comparator; The second current is received as the first input of the second current comparator, and the decreasing current through the inductor is received as the second input of the second current comparator. The comparison between the first input and the second input of the second current comparator will provide the output to the control logic. as well as The inductor current through the inductor is controlled by switching one or more of a plurality of transistors based on the outputs from the first current comparator and the second current comparator.

15. The method of claim 14, further comprising: The inductor current is defined as being within the range between the second current and the first current plus the second current.

16. The method of claim 14, further comprising: The duty cycle is controlled by extending the first time period (Ton) when the inductor current rises and / or the second time period (Toff) when the inductor current falls.

17. The method of claim 16, further comprising: The inductor current is kept close to its current level during a specific time period between the first time period when the inductor current rises and the second time period when the inductor current falls.

18. The method of claim 14, further comprising: The inductor current is maintained at the level of the second current for a specific time period.

19. The method of claim 14, further comprising: The second current is generated based on the output voltage at the output voltage terminal.

20. The method of claim 14, further comprising: The output generated to the control logic is used to switch one or more of the plurality of transistors between buck mode, boost mode, and buck-boost mode using the input voltage from the input voltage terminal and the output voltage from the output voltage terminal as input.

21. The method of claim 20, further comprising: Turn on one of the plurality of transistors; Turn off one of the plurality of transistors; as well as During the buck mode and the boost mode, switching is performed between two transistors of the plurality of transistors based on the rising current, the falling current, the first current, and the second current.

22. The method of claim 20, further comprising: During the buck-boost mode, the transistors are switched according to the rising current, the falling current, the first current, and the second current.