Bidirectional DC-AC converter circuit and its electromagnetic interference optimization method

Abstract

This application relates to a bidirectional DC-AC converter circuit and its electromagnetic interference optimization method. The bidirectional DC-AC converter circuit includes a DC-side converter circuit, an isolation transformer, and an AC-side converter circuit connected in sequence. At least one arm of the AC-side converter circuit includes at least two power switches connected in parallel. At least some of the power switches connected in parallel in the same arm are configured with different equivalent drain-source capacitances to stagger the switching sequence of the parallel power switches. By differentiating the equivalent drain-source capacitances of the power switches connected in parallel in the same arm, the switching sequence of each switch is naturally staggered, suppressing electromagnetic interference at its source. No additional RC / RCD absorption circuit is needed, avoiding power loss caused by absorption circuits and reducing the peak values ​​of current and voltage change rates during switching. This ensures that the circuit can still stably achieve zero-voltage turn-on under heavy load conditions, maintaining high conversion efficiency.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a bidirectional DC-AC converter circuit and its electromagnetic interference optimization method. Background Technology

[0002] As power electronic equipment rapidly develops towards higher frequencies, higher power densities, and higher integration, the switching speed of power switching transistors in circuits continues to increase. Consequently, electromagnetic interference (EMI) problems are becoming increasingly prominent, becoming a key factor restricting equipment from passing electromagnetic compatibility (EMC) standard certification and affecting the stable operation of the system.

[0003] To meet the current carrying capacity requirements of high-power applications, bidirectional DC-AC converters commonly employ multiple power switches connected in parallel to enhance the current carrying capacity of a single bridge arm. Existing technologies primarily suppress switching noise and ringing by designing and optimizing RC / RCD snubber circuits. However, snubber circuits essentially suppress interference by consuming energy, introducing additional power losses and reducing the overall conversion efficiency of the circuit. Furthermore, snubber circuits have limited effectiveness in suppressing narrowband spike noise, failing to fundamentally solve the problem of high-frequency electromagnetic interference, and increasing the circuit's size, weight, and cost, hindering miniaturization and high-power-density design.

[0004] Therefore, there is an urgent need for a bidirectional DC-AC converter circuit that can suppress electromagnetic interference and reduce switching noise peaks at the source in order to solve the above-mentioned technical problems. Summary of the Invention

[0005] Therefore, it is necessary to provide a bidirectional DC-AC converter circuit and its electromagnetic interference optimization method that can effectively suppress electromagnetic interference and reduce switching noise peaks, in order to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides a bidirectional DC-AC converter circuit, which includes a DC-side converter circuit, an isolation transformer, and an AC-side converter circuit connected in sequence. At least one bridge arm of the AC-side converter circuit includes at least two power switching transistors connected in parallel.

[0007] At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

[0008] Furthermore, each of the power switching transistors connected in parallel in the same bridge arm has an external capacitor of different capacitance value connected in parallel between its drain and source, so that the equivalent drain-source capacitance of each power switching transistor is different.

[0009] Furthermore, the ratio of the external capacitors of the power switches connected in parallel in the same bridge arm ranges from 1:1.2 to 1:1.5.

[0010] Furthermore, all the power switching transistors connected in parallel in the same bridge arm are of the same model.

[0011] Furthermore, the bidirectional DC-AC converter circuit also includes a gate drive sub-circuit, which is used to be electrically connected to each of the power switching transistors through a gate drive path to control the turning on or off of each of the power switching transistors.

[0012] The gate drive paths of the power switches connected in parallel in the same bridge arm are physically symmetrical.

[0013] Furthermore, the bidirectional DC-AC converter circuit is mounted on a circuit board, which includes multiple spaced-apart common heating sections, and the power switching transistors connected in parallel in the same bridge arm are integrated in the same common heating section.

[0014] Furthermore, the AC-side conversion circuit is a first bidirectional switching full-bridge conversion circuit. Each of the two bridge arms of the first bidirectional switching full-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on each bridge arm is configured to have different equivalent drain-source capacitances.

[0015] Alternatively, the AC-side conversion circuit is a bidirectional switching half-bridge conversion circuit, wherein the bridge arm of the bidirectional switching half-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on the bridge arm is configured to have different equivalent drain-source capacitances.

[0016] Furthermore, at least one arm of the DC-side conversion circuit includes at least two power switching transistors connected in parallel;

[0017] At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

[0018] Furthermore, the DC-side conversion circuit is a second bidirectional switching full-bridge conversion circuit. Each of the two bridge arms of the second bidirectional switching full-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on each bridge arm is configured to have different equivalent drain-source capacitances.

[0019] Secondly, this application also provides an electromagnetic interference optimization method for a bidirectional DC-AC converter circuit, the method comprising:

[0020] A simulation model of a bidirectional DC-AC converter circuit is constructed, wherein the simulation model is consistent with the bidirectional DC-AC converter circuit described in the first aspect;

[0021] To meet the requirements of zero-voltage turn-on and preset conversion efficiency of the bidirectional DC-AC converter circuit under heavy load, the equivalent drain-source capacitance of each power switch in parallel in the same bridge arm is configured with multiple different ratios, and the simulation parameters corresponding to each ratio are obtained.

[0022] Based on the simulation model, circuit simulation is performed on each set of simulation parameters to obtain the corresponding time-domain waveform parameters and frequency-domain noise parameters.

[0023] Based on the time-domain waveform parameters and the frequency-domain noise parameters, the optimal ratio of the equivalent drain-source capacitances of each power switch transistor connected in parallel in the same bridge arm is selected.

[0024] Furthermore, the circuit simulation includes full load range operating condition simulation and / or thermal distribution coupling simulation; the full load range operating condition simulation includes at least one of light load, rated load and peak load operating conditions; the thermal distribution coupling simulation is used to obtain the temperature difference parameters of each power switch transistor connected in parallel in the same bridge arm under multiple sets of different ratios of the equivalent drain-source capacitance.

[0025] By differentiating the equivalent drain-source capacitances of the parallel power switches in the same bridge arm, the switching sequence of each switch is naturally staggered, suppressing electromagnetic interference at its source. This eliminates the need for additional RC / RCD absorption circuits, avoiding power losses associated with absorption circuits and effectively reducing the peak values ​​of current and voltage changes during switching. Simultaneously, it ensures stable zero-voltage turn-on under heavy load, maintaining high conversion efficiency. The different equivalent drain-source capacitance configurations alter the circuit's resonant characteristics, dispersing and broadening the originally single, sharp high-frequency noise resonance peak into multiple lower-energy frequency points, significantly reducing the noise peak amplitude. The optimized noise spectrum is easier to suppress with conventional filters, meeting electromagnetic compatibility standards without complex filter designs. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A schematic diagram of a bidirectional DC-AC converter circuit framework provided in one embodiment of this application;

[0028] Figure 2 A schematic diagram of the equivalent circuit of the bidirectional DC-AC converter provided in one embodiment of this application;

[0029] Figure 3 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application;

[0030] Figure 4 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application;

[0031] Figure 5 This is a schematic diagram of the signal before EMC high-frequency optimization.

[0032] Figure 6 A schematic diagram of an EMC high-frequency optimized signal provided in one embodiment of this application;

[0033] Figure 7 A schematic diagram of a circuit board provided in one embodiment of this application;

[0034] Figure 8 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application;

[0035] Figure 9 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application;

[0036] Figure 10 This is a schematic flowchart of an electromagnetic interference optimization method for a bidirectional DC-AC converter circuit provided in one embodiment of this application.

[0037] Explanation of icon numbers:

[0038] Bidirectional DC-AC converter circuit-1; DC-side converter circuit-11; Isolation transformer-12; Primary winding-121; Secondary winding-122; AC-side converter circuit-13; Power frequency switching circuit-131; Circuit board-2; Common heating section-21. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0040] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0041] This application provides a bidirectional DC-AC converter circuit 1. It should be noted that the bidirectional DC-AC converter circuit 1 is a power conversion device capable of bidirectional conversion between DC and AC power, and can be applied to scenarios requiring bidirectional energy flow, such as energy storage systems, electric vehicle charging and discharging equipment, and microgrids. Please refer to the following: Figure 1 and Figure 2 , Figure 1 A schematic diagram of a bidirectional DC-AC converter circuit framework provided in one embodiment of this application; Figure 2 This is a schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in one embodiment of the present application. The bidirectional DC-AC converter circuit 1 includes a DC-side converter circuit 11, an isolation transformer 12, and an AC-side converter circuit 13 connected in sequence. At least one arm of the AC-side converter circuit 13 includes at least two power switching transistors connected in parallel.

[0042] At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

[0043] In this embodiment, such as Figure 1 As shown, the bidirectional DC-AC converter 1 includes a DC-side converter 11, an isolation transformer 12, and an AC-side converter 13 connected in sequence. One end of the DC-side converter 11 is connected to the DC bus of the photovoltaic module or a DC power supply, and the other end is connected to the isolation transformer 12. The isolation transformer 12 is used to achieve electrical isolation and voltage matching between the DC and AC sides. One end of the AC-side converter 13 is connected to the isolation transformer 12, and the other end is connected to the AC power grid or an AC load. Taking power transmission from the DC side to the AC side as an example, the DC-side converter 11 inverts the DC voltage into a high-frequency AC square wave voltage, which is then coupled to the AC-side converter 13 via the isolation transformer 12. The AC-side converter 13 converts this high-frequency AC square wave voltage into AC power with the same frequency and phase as the power grid and integrates it into the grid. When power is transmitted in the reverse direction, the operation process is reversed.

[0044] like Figure 2 As shown, the isolation transformer 12 may include a primary winding 121 and a secondary winding 122, wherein the primary winding 121 and the secondary winding 122 exchange electrical energy through an electromagnetic field. The isolation transformer 12 may also employ other structural configurations, which are not limited in this application. Based on the isolation transformer 12 provided in this embodiment, one end of the DC-side conversion circuit 11 is connected to the primary winding 121, and one end of the AC-side conversion circuit 13 is connected to the secondary winding 122.

[0045] In high-power applications, the current carrying capacity of a single power switch is often insufficient to meet the system's rated current requirements. Therefore, the bidirectional DC-AC converter circuit 1 uses multiple power switches connected in parallel on the bridge arm to distribute the total current, reduce the conduction loss and thermal stress of each power switch, thereby improving the overall power density and reliability. Specifically, as... Figure 2 As shown, the AC-side conversion circuit 13 includes two bridge arms. One end of one bridge arm is connected to one end of the secondary winding 122, and the other end of the bridge arm is connected to the AC power grid. The other bridge arm is connected to the other end of the secondary winding 122, and the other end of the bridge arm is connected to the AC power grid. Each bridge arm can be equipped with two or more power switches connected in parallel according to the current level to expand the current carrying capacity of the circuit and meet the application requirements of high-power bidirectional conversion.

[0046] During the turn-off process of the power switch, the voltage across its equivalent drain-source capacitance cannot change abruptly and requires a certain amount of time to charge. Therefore, the size of the equivalent drain-source capacitance directly affects the rate of rise of the drain-source voltage during turn-off; that is, the larger the equivalent drain-source capacitance, the slower the drain-source voltage rises and the longer the turn-off delay time; conversely, the smaller the equivalent drain-source capacitance, the faster the drain-source voltage rises and the more rapid the turn-off action. Similarly, during zero-voltage turn-on, the charge stored in the equivalent drain-source capacitance needs to be discharged. Different capacitance values ​​result in different discharge times, thus affecting when the power switch reaches the zero-voltage condition. Therefore, the value of the equivalent drain-source capacitance is one of the key parameters determining the switching sequence of the power switch.

[0047] In this embodiment, when the power switches connected in parallel within the same bridge arm are configured with different equivalent drain-source capacitances, the charging and discharging rates of the equivalent drain-source capacitances of each power switch differ during the switching process. Taking the turn-off process as an example, the power switch with a larger equivalent drain-source capacitance has a slower drain-source voltage rise rate and a longer turn-off delay time; the power switch with a smaller equivalent drain-source capacitance has a faster drain-source voltage rise rate and a shorter turn-off delay time. Thus, the originally completely synchronous parallel power switches are naturally staggered in time, meaning some power switches turn off first and some turn off later, avoiding simultaneous current commutation by all power switches. During the turn-on process, the sequential discharge of different equivalent drain-source capacitances also staggers the current commutation process. This temporal staggering disperses the originally synchronously changing current and voltage over time, thereby reducing the peak values ​​of the total current change rate and total voltage change rate of the entire bridge arm at the instant of switching, weakening the intensity of electromagnetic interference at its source. Meanwhile, the introduction of different equivalent drain-source capacitances changes the resonant characteristics of the circuit, dispersing the originally single high-frequency resonant peak into multiple lower-energy frequency points, further reducing the high-frequency noise peak.

[0048] It should be noted that the heavy load condition of the bidirectional DC-AC converter circuit 1 refers to the operating state with high load power and large bridge arm current. In this embodiment, by differentiating the equivalent drain-source capacitance of the parallel power switching transistors in the same bridge arm, the switching sequence of each transistor is naturally staggered. Under heavy load, each power switching transistor completes commutation sequentially, avoiding voltage stress concentration caused by simultaneous commutation. At the same time, under heavy load, the energy stored in the resonant inductor is more sufficient to charge and discharge each equivalent drain-source capacitance sequentially, ensuring that each switching transistor can turn on when the drain-source voltage drops to zero, thereby stably achieving zero-voltage turn-on.

[0049] Understandably, in this embodiment, by differentiating the equivalent drain-source capacitances of the parallel power switches in the same bridge arm, the switching sequence of each switch is naturally staggered, suppressing electromagnetic interference at its source. This eliminates the need for additional RC / RCD absorption circuits, avoiding power losses associated with absorption circuits and effectively reducing the peak values ​​of current and voltage changes during switching. Simultaneously, it ensures stable zero-voltage turn-on under heavy load conditions, maintaining high conversion efficiency. The different equivalent drain-source capacitance configurations alter the circuit's resonant characteristics, dispersing and broadening the originally single, sharp high-frequency noise resonance peak into multiple lower-energy frequency points, significantly reducing the noise peak amplitude. The optimized noise spectrum is easier to suppress with conventional filters, meeting electromagnetic compatibility standard limits without complex filter design.

[0050] In one possible implementation, please refer again. Figure 2 In the same bridge arm, each of the power switching transistors connected in parallel has an external capacitor of different capacitance value connected in parallel between its drain and source, so that the equivalent drain-source capacitance of each power switching transistor is different.

[0051] Specifically, such as Figure 2 As shown, the AC-side conversion circuit 13 is illustrated by using two power switches connected in parallel in one of its bridge arms. It should be noted that, due to manufacturing processes, the power switch (e.g., a field-effect transistor) has a parasitic output capacitance between its drain and source. Therefore, the equivalent drain-source capacitance of the power switch is composed of the parasitic output capacitance and the external capacitor connected in parallel between its drain and source.

[0052] It should be noted that, in this embodiment, the circuit topology of the AC-side conversion circuit 13 is a resonant dual active bridge circuit topology. The AC-side conversion circuit 13 also includes a resonant capacitor C1 and a resonant inductor L1. The resonant capacitor C1 and the resonant inductor L1 constitute an LC resonant cavity. The LC resonant cavity and the leakage inductance of the isolation transformer 12 jointly participate in the circuit's resonance process, so that the drain-source voltage of the power switch can naturally oscillate to near zero potential before and after turning on and before and after turning off, thereby creating zero-voltage turn-on conditions for the power switch.

[0053] In some examples, the AC-side conversion circuit 13 further includes a capacitor bridge arm, which includes capacitors C2 and C3 connected in series. The capacitor bridge arm is connected between the two busbars of the AC-side conversion circuit 13, and one end of the secondary winding 122 is electrically connected to the midpoint of the capacitor bridge arm to provide a midpoint potential reference for the AC side of the secondary winding 122.

[0054] In some examples, the AC-side conversion circuit 13 further includes a filter capacitor C4, which is connected in parallel between the AC-side conversion circuit 13 and the AC power grid or AC load. The filter capacitor C4 filters the high-frequency PWM wave output by the AC-side conversion circuit 13, removing high-frequency switching ripple components, resulting in smooth and continuous voltage and current waveforms output to the power grid or load, meeting the power quality requirements for grid connection or power supply. Simultaneously, the filter capacitor C4 also acts as a buffer, absorbing high-frequency harmonic currents between the AC-side conversion circuit 13 and the power grid, suppressing voltage spikes caused by line parasitic inductance, improving the dynamic response characteristics of the circuit during grid connection, and enhancing the stability of system operation.

[0055] In this embodiment, such as Figure 2As shown, taking the parallel connection of power switches Q1 and Q2 in the same bridge arm as an example, an external capacitor C5 is connected in parallel between the drain and source of power switch Q1, and an external capacitor C6 is connected in parallel between the drain and source of power switch Q2. The equivalent drain-source capacitance of power switch Q1 is equal to the sum of its own parasitic output capacitance and the external capacitor C5; the equivalent drain-source capacitance of power switch Q2 is equal to the sum of its own parasitic output capacitance and the external capacitor C6. By configuring the values ​​of the external capacitors C5 and C6 to be different, even when power switches Q1 and Q2 are selected as the same type of device (i.e., the parasitic output capacitances of power switches Q1 and Q2 are approximately equal), their equivalent drain-source capacitances will not be equal. Since the size of the equivalent drain-source capacitance directly affects the rise rate of the drain-source voltage during the turn-off process and the discharge time of the charge during the zero-voltage turn-on process, two power switches connected in parallel with different equivalent drain-source capacitances will naturally have timing differences in their turn-off and turn-on operations. This achieves a natural staggering of the switching timing of the parallel power switches, avoiding the maximum current and voltage change rates caused by fully synchronous switching.

[0056] It is understood that in this embodiment, by connecting external capacitors of different values ​​in parallel between the drain and source of different power switches, the equivalent drain-source capacitance of each parallel power switch can be flexibly configured without changing the selection of the power switches, so that the switching sequence of each power switch is naturally staggered. By adjusting the capacitance value of the external capacitor, no complex modifications to the circuit topology or drive logic are required, resulting in low cost and high engineering feasibility. Furthermore, since the differentiated configuration of the equivalent drain-source capacitance suppresses electromagnetic interference at its source—the rate of change of voltage and current during switching transients—it can fundamentally reduce the intensity of high-frequency noise excitation in the circuit, which is more efficient than relying on absorption circuits for post-event suppression. In addition, since the capacitance value of the external capacitor can be flexibly selected within a wide range according to actual needs, designers can precisely adjust the degree of difference in the switching sequence between the parallel power switches according to different application scenarios and EMC standard requirements, thereby achieving optimal electromagnetic interference suppression while ensuring zero-voltage turn-on and conversion efficiency.

[0057] It is understood that, in other possible implementations, the arrangement of the parallel power switches in the bidirectional DC-AC converter circuit 1 is not limited to... Figure 2The scenario is illustrated. Each arm of the AC-side converter circuit 13 can be equipped with two or more power switches connected in parallel according to actual current requirements. Each power switch connected in parallel on each arm can be configured with an external capacitor of different capacitance values ​​to achieve differentiation in equivalent drain-source capacitance. The number of power switches connected in parallel on each arm of the AC-side converter circuit 13, whether each arm has power switches connected in parallel, and which arms have power switches configured with differentiated equivalent drain-source capacitances can all be freely combined and configured according to actual power levels, current requirements, and electromagnetic compatibility requirements. This application does not impose any restrictions on this. Alternatively, power switches with different parameters can be connected in parallel. Utilizing the difference in parasitic output capacitance between power switches with different parameters, the equivalent drain-source capacitance of at least some of the parallel power switches can be different, without the need for additional external capacitors, thus simplifying the circuit structure of the bidirectional DC-AC converter circuit 1.

[0058] For example, please refer to the following: Figure 3 and Figure 4 , Figure 3 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application; Figure 4 This is a schematic diagram of the equivalent circuit of a bidirectional DC-AC converter provided in another embodiment of this application. It should be noted that... Figure 2 The diagram shows a schematic of a single-stage converter circuit topology. Figure 3 The diagram shows a 1.5-stage converter circuit topology. Single-stage and 1.5-stage converter circuit topologies are two common power stage architectures in bidirectional DC-AC converter circuit 1. The main difference lies in the number of power conversion stages and the corresponding circuit complexity of the AC-side converter circuit 13. Figure 3 As shown, the power switch Q1 and the power switch Q2 in the same bridge arm are connected in parallel. The external capacitor C5 is connected in parallel between the drain and source of the power switch Q1, and the external capacitor C6 is connected in parallel between the drain and source of the power switch Q2.

[0059] like Figure 4As shown, power switches Q3 and Q4 are connected in parallel. An external capacitor C7 is connected in parallel between the drain and source of power switch Q3, and an external capacitor C8 is connected in parallel between the drain and source of power switch Q4. By configuring the capacitance values ​​of external capacitors C7 and C8 to be different, the equivalent drain-source capacitance of the two parallel power switches on this bridge arm is differentiated. Similarly, power switches Q5 and Q6 are connected in parallel. An external capacitor C9 is connected in parallel between the drain and source of power switch Q5, and an external capacitor C10 is connected in parallel between the drain and source of power switch Q6. By configuring the capacitance values ​​of external capacitors C9 and C10 to be different, the equivalent drain-source capacitance of the two parallel power switches on this bridge arm is differentiated. The power switch Q7 and the power switch Q8 are connected in parallel, and the external capacitor C11 is connected in parallel between the drain and source of the power switch Q7, and the external capacitor C12 is connected in parallel between the drain and source of the power switch Q8. By configuring the external capacitors C11 and C12 to have different values, the equivalent drain-source capacitance of the two parallel power switches on this bridge arm is differentiated.

[0060] It should be noted that, in this embodiment, as Figure 4 As shown, power switch Q1 and power switch Q3 are connected in series, and the diodes of power switch Q1 and power switch Q3 have opposite cutoff directions, thereby preventing AC current from flowing back to DC. Similarly, power switch Q5 and power switch Q7 are connected in series, and the diodes of power switch Q5 and power switch Q7 have opposite cutoff directions.

[0061] In one possible implementation, the ratio of the external capacitors of the power switches connected in parallel in the same bridge arm ranges from 1:1.2 to 1:1.5.

[0062] Furthermore, all the power switching transistors connected in parallel in the same bridge arm are of the same model.

[0063] It should be noted that the ratio of the external capacitors refers to the ratio of the capacitance values ​​of the external capacitors connected to the two parallel power switches in the same bridge arm. In this embodiment, by setting the ratio of the external capacitors of the power switches connected in parallel in the same bridge arm to between 1:1.2 and 1:1.5, a moderate rather than excessive difference is formed between the equivalent drain-source capacitances of the parallel power switches. If the ratio is less than 1:1.2, the difference in the equivalent drain-source capacitance of the parallel power switches is too small, and the degree of staggering of their switching timing is insufficient to effectively disperse the rate of change of current and voltage during switching transients, resulting in insignificant electromagnetic interference suppression. If the ratio is greater than 1:1.5, the difference in the equivalent drain-source capacitance of the parallel power switches is too large, which may cause the switching action of some power switches to be too delayed, affecting the synchronous achievement of the zero-voltage turn-on condition, and even causing uneven current and additional switching losses. Therefore, setting the ratio of the external capacitors to 1:1.2 to 1:1.5 can achieve the best switching timing stagger effect while ensuring that the power switches connected in parallel can still work together to achieve zero-voltage turn-on and maintain high conversion efficiency, thereby achieving the optimal balance between electromagnetic interference suppression and circuit performance.

[0064] Please refer to the following: Figure 5 and Figure 6 , Figure 5 This is a schematic diagram of the signal before EMC high-frequency optimization. Figure 6 This is a schematic diagram of an EMC high-frequency optimized signal provided in one embodiment of this application. Specifically, Figure 5 and Figure 6 The horizontal axis represents frequency, and the vertical axis represents signal strength. For example... Figure 5 As shown, without the differentiated configuration of the equivalent drain-source capacitance of the parallel power switch in this application, the EMC signal exhibits three extremely sharp narrowband noise peaks at approximately 37MHz, 101MHz, and 131MHz. These peaks are highly concentrated and easily exceed the limits of electromagnetic compatibility standards, and are difficult to suppress effectively by conventional filters. Figure 6 As shown, when the ratio of the external capacitors of the power switches connected in parallel in the same bridge arm is set to 1:1.2 to 1:1.5, the three sharp noise peaks at 37MHz, 101MHz, and 131MHz are significantly broadened, their peak amplitudes are greatly reduced, and the spectral energy is dispersed over a wider frequency range, forming a flatter and smoother noise spectrum distribution. This improvement in spectral shape makes it easier for electromagnetic interference signals of the circuit to be suppressed by conventional EMI filters, reducing the difficulty and cost of filter design and helping the equipment to successfully pass electromagnetic compatibility standard certification.

[0065] It should be noted that the power switches connected in parallel in the same bridge arm can be of the same type or different types, as long as it does not affect the fact that the equivalent drain-source capacitance of the power switches connected in parallel in the same bridge arm is configured differently, and this application does not impose any restrictions on this.

[0066] It is understandable that using the same model of power switches connected in parallel within the same bridge arm ensures a high degree of consistency in critical parameters such as threshold voltage, on-resistance, transconductance, and parasitic output capacitance. This helps avoid introducing new current imbalances due to differences in device parameters, preventing reliability issues such as current distribution imbalances and localized overheating during switching. By ensuring consistent basic parameters for all parallel power switches, differentiating the equivalent drain-source capacitance solely through different external capacitor values ​​allows designers to precisely control these differences within the expected range. This results in more accurate and reliable electromagnetic interference suppression through staggered switching timings, without sacrificing current sharing characteristics and long-term operational reliability.

[0067] It is understood that, in this embodiment, by limiting the capacitance ratio of the external capacitors of the power switches connected in parallel in the same bridge arm to a preferred range of 1:1.2 to 1:1.5, an optimal balance can be achieved between effectively suppressing electromagnetic interference and ensuring efficient and stable circuit operation, avoiding various adverse effects caused by excessively large or small differences in equivalent drain-source capacitance. Furthermore, by using the same type of power switch and different capacitance values ​​for the external capacitors, precise differentiation of the equivalent drain-source capacitance is achieved, while ensuring consistency in other key parameters of the parallel devices. This weakens the intensity of electromagnetic interference at its source without introducing new current imbalances, significantly improves the high-frequency noise spectrum, and reduces the design difficulty of the filter and the overall EMC certification cost. Simultaneously, this embodiment has a simple structure, low implementation cost, and requires no significant modifications to the existing circuit topology, possessing high engineering practical value and promising application prospects.

[0068] In one possible implementation, the bidirectional DC-AC converter circuit 1 further includes a gate drive sub-circuit, which is used to be electrically connected to each of the power switching transistors through a gate drive path to control the turning on or off of each of the power switching transistors.

[0069] The gate drive paths of the power switches connected in parallel in the same bridge arm are physically symmetrical.

[0070] The gate drive sub-circuit is used to generate a gate drive voltage signal adapted to the driving requirements of the power switches based on the pulse width modulation (PWM) control signal provided by the external controller, and transmits it to the gate of each power switch through the gate drive path to control the turn-on or turn-off of each power switch. Specifically, when the gate drive sub-circuit outputs a high-level drive signal, the gate-source voltage of the power switch exceeds its threshold voltage, and the power switch is turned on; when the gate drive sub-circuit outputs a low-level drive signal, the gate-source voltage of the power switch is lower than its threshold voltage, and the power switch is turned off. The gate drive sub-circuit can provide sufficient drive current to quickly charge and discharge the gate input capacitance of the power switches, ensuring that the power switches can quickly and reliably switch their operating states during the switching process. It should be noted that in this embodiment, the power switches connected in parallel in the same bridge arm share the same drive signal source. That is, the drive signals received by the power switches connected in parallel in the same bridge arm are completely synchronized in timing. The switching timing of the power switches is not caused by the asynchrony of the drive signals, but is naturally achieved by the fact that each power switch has a different equivalent drain-source capacitance.

[0071] The gate drive path refers to the electrical connection path from the drive signal output terminal of the gate drive sub-circuit to the gate terminal of the power switch. Specifically, the gate drive path includes physical connection structures such as drive traces, gate drive resistors, vias, and pads on the printed circuit board. The gate drive path is physically symmetrical, meaning that for each power switch connected in parallel within the same bridge arm, its corresponding gate drive path has a consistent physical geometry on the printed circuit board layout. For example, when two power switches are connected in parallel within the same bridge arm, the trace length, trace width, number and angle of corners, resistance value and package specifications of the gate drive resistor, and the number and location of vias from the drive signal output point of the gate drive sub-circuit to the gate of the first power switch are completely identical to the corresponding structure to the gate of the second power switch. This symmetrical design in physical structure ensures that the parasitic resistance and parasitic inductance on the gate drive paths of the parallel power switches are basically the same, thereby ensuring that the drive signals arrive at the gates of the parallel power switches at the same time with basically the same amplitude and waveform. This avoids inconsistent arrival times or distortion of drive waveforms due to asymmetrical drive paths, which could introduce additional uneven current factors or uncertain switching timing deviations.

[0072] It is understood that, in this embodiment, by setting the gate drive sub-circuit and providing physically symmetrical gate drive paths for each of the power switches connected in parallel in the same bridge arm, it is possible to ensure that the drive signals of each power switch arrive synchronously and consistently. This guarantees that the switching timing difference of each power switch is uniquely determined by the different equivalent drain-source capacitances of each switch, eliminating the uncertain influence of drive path asymmetry on switching timing, and making the degree of switching timing misalignment of the power switches highly controllable and predictable. At the same time, the physically symmetrical gate drive path can also effectively suppress common-mode noise caused by asynchronous drive signals, avoid introducing additional electromagnetic interference sources, and thus further optimize the electromagnetic compatibility performance of the entire device. In addition, the symmetrical gate drive path design is also conducive to achieving uniform current distribution among the parallel power switches, preventing individual power switches from bearing excessive transient current stress due to drive delay, and improving the reliability and consistency of long-term circuit operation.

[0073] In one possible implementation, please refer to [the relevant documentation / reference]. Figure 7 , Figure 7 This is a schematic diagram of a circuit board provided according to one embodiment of this application. The bidirectional DC-AC converter circuit 1 is disposed on a circuit board 2, which includes a plurality of spaced-apart common heating sections 21. Each of the power switching transistors connected in parallel in the same bridge arm is integrated and disposed in the same common heating section 21.

[0074] The circuit board 2 is a printed circuit board, and the heat exchange section 21 is a metal heat-conducting area disposed on the circuit board 2. Specifically, the heat exchange section 21 can be a copper-plated area on the circuit board 2, a metal thermal pad, a copper-embedded block, or a separately disposed metal heat spreader, which has high thermal conductivity and can quickly conduct and evenly distribute the heat generated by the power switching transistors disposed thereon during operation. The integration of each power switching transistor connected in parallel in the same bridge arm into the same heat exchange section 21 means that each power switching transistor connected in parallel in the same bridge arm is installed in the same continuous metal heat-conducting area on the circuit board 2, so that the power switching transistors form a good thermal coupling path through the heat exchange section 21.

[0075] Understandably, because the equivalent drain-source capacitances of the power switches connected in parallel within the same bridge arm are different, their switching losses during switching also differ, resulting in inconsistent heat generation among the power switches. Without thermal equalization, the power switch with higher heat generation will experience a more significant temperature rise. Since the on-resistance of these power switches has a positive temperature coefficient, increased temperature leads to increased on-resistance, causing them to bear more losses and heat. In severe cases, this can trigger thermal runaway, leading to device damage or system failure.

[0076] Understandably, in this embodiment, by setting up the common heating section 21 and integrating the power switches connected in parallel in the same bridge arm into the same common heating section 21, on the one hand, thermal balance is achieved among the parallel power switches, effectively suppressing the uneven temperature distribution problem that may be caused by the differential configuration of equivalent drain-source capacitance, avoiding the risk of current distribution imbalance and thermal runaway caused by thermal mismatch, and improving the long-term operational reliability of the circuit under high power conditions. On the other hand, the good thermal coupling design makes the junction temperature of each power switch tend to be consistent, which helps to ensure that the key parameters such as the on-resistance and threshold voltage of each parallel power switch change synchronously in the temperature dimension, thereby further stabilizing the current sharing characteristics and avoiding the introduction of new uneven current factors due to temperature differences. In addition, the common heating section 21, as a hub for heat collection and conduction, can effectively reduce the overall temperature rise of each power switch, reduce the design pressure of the heat sink, and help the whole machine achieve higher power density and a more compact structural layout. Combining the electromagnetic interference source suppression effect brought about by the aforementioned differentiated configuration of equivalent drain-source capacitance, this embodiment achieves excellent electromagnetic compatibility performance while also taking into account the reliability of thermal management and the stability of long-term system operation, and has significant engineering practical value.

[0077] In one possible implementation, please refer to [the relevant documentation / reference]. Figure 2 and Figure 8 , Figure 8 This is a schematic diagram of the equivalent circuit of a bidirectional DC-AC converter provided in another embodiment of this application. The AC-side converter 13 is a first bidirectional switching full-bridge converter circuit. Each of the two arms of the first bidirectional switching full-bridge converter circuit is provided with at least two power switches connected in parallel, and each power switch connected in parallel on each arm is configured to have different equivalent drain-source capacitances.

[0078] like Figure 8 As shown, the AC-side conversion circuit 13 is a first bidirectional switching full-bridge conversion circuit. The AC-side conversion circuit 13 also includes a power frequency switching circuit 131. The first bidirectional switching full-bridge conversion circuit includes four power switching transistors, namely... Figure 8The power switches Q9, Q10, Q11, and Q12 constitute a high-frequency full-bridge inverter unit, used to perform high-frequency rectification or high-frequency inversion of the high-frequency AC square wave voltage output from the secondary side of the isolation transformer 12. Power switch Q9 is connected in parallel with power switch Q13, and power switches Q9 and Q13 are respectively connected in parallel with external capacitors C13 and C14. The power frequency reversing circuit 131 is disposed between the first bidirectional full-bridge converter circuit and the AC power grid or AC load, used to reverse the polarity of the voltage output from the first bidirectional full-bridge converter circuit at a certain power frequency (e.g., 50Hz or 60Hz). Specifically, during the positive half-cycle of the AC current, a pair of diagonal power switches in the power frequency reversing circuit 131 are turned on, causing current to flow through the load in the positive direction; during the negative half-cycle of the AC current, the other pair of diagonal power switches are turned on, causing current to flow through the load in the opposite direction. Through the periodic commutation of the power frequency switching circuit 131 at the power frequency, combined with the high-frequency switching action of the first bidirectional full-bridge converter circuit, a sinusoidal AC power with the same frequency and phase as the power grid is finally output on the AC side. This two-stage architecture of "high-frequency full-bridge converter and power frequency switching" allows the high-frequency power switching transistors to only handle high-frequency power conversion, while the low-frequency (power frequency) commutation is handled by the dedicated power frequency switching circuit 131. This is beneficial for optimizing the switching frequency allocation of each power switching transistor, reducing high-frequency switching losses, and simplifying the design and control strategy of the high-frequency transformer.

[0079] Or, such as Figure 2 As shown, the AC-side conversion circuit 13 is a bidirectional switching half-bridge conversion circuit. The bridge arm of the bidirectional switching half-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on the bridge arm is configured to have different equivalent drain-source capacitances.

[0080] It should be noted that full-bridge converters and half-bridge converters are two common bridge converter topologies in power electronics. The main difference between them lies in the number of bridge arms and the number of power switches. Specifically, as... Figure 8As shown, in a full-bridge converter circuit, each bridge arm has a power switch, and the four power switches form a complete H-bridge structure. The load is connected between the midpoints of the two bridge arms. A half-bridge converter circuit, on the other hand, consists of two bridge arms, each with a power switch, and two capacitors connected in series to form a voltage divider arm. The load is connected between the midpoint of the power switch arm and the midpoint of the voltage divider capacitor arm. Therefore, under the same switching current conditions, the output power of the full-bridge converter circuit is twice that of the half-bridge converter circuit, but the number of switches in the full-bridge converter circuit is also twice that of the half-bridge, resulting in increased circuit complexity and cost. The full-bridge topology is suitable for higher power level applications, while the half-bridge topology has advantages such as lower cost, fewer switching devices, and relatively simpler control.

[0081] It is understood that, in this embodiment, the AC-side conversion circuit 13 can be adopted as follows: Figure 2 The bidirectional switching half-bridge converter circuit topology shown can also be adopted as follows: Figure 8 The first bidirectional switching full-bridge converter circuit topology shown can achieve bidirectional power conversion on the AC side in both topologies. Regardless of whether a half-bridge or full-bridge topology is used, two or more power switches can be connected in parallel on the corresponding bridge arm according to the actual power level and current requirements. Different external capacitors of varying values ​​are used to differentiate the equivalent drain-source capacitance of each parallel power switch, thereby staggering the switching sequence of the parallel power switches and suppressing electromagnetic interference at the source. The half-bridge topology has the advantages of fewer switching devices, lower cost, and simpler control, making it suitable for medium-power applications. The full-bridge topology has the advantages of higher output power capability and higher output voltage utilization, making it suitable for higher-power applications. Both topologies can be combined with the differentiated equivalent drain-source capacitance configuration scheme of this application to flexibly adapt to application requirements of different power levels and electromagnetic compatibility requirements, exhibiting a wide range of applicability and good engineering adaptability.

[0082] In one possible implementation, please refer to [the relevant documentation / reference]. Figure 9 , Figure 9 A schematic diagram of the equivalent circuit of a bidirectional DC-AC converter circuit provided in another embodiment of this application. At least one bridge arm of the DC-side converter circuit 11 includes at least two power switching transistors connected in parallel;

[0083] At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

[0084] It should be noted that, similar to the AC-side conversion circuit 13, the DC-side conversion circuit 11 also faces the problem of insufficient current-carrying capacity of a single power switch in high-power applications. For example... Figure 9As shown, the DC-side conversion circuit 11 is a second bidirectional switching full-bridge conversion circuit, equipped with power switches Q14, Q15, Q16, and Q17. To improve the current carrying capacity of the DC-side conversion circuit 11 and meet the current requirements of high-power bidirectional conversion, at least one bridge arm of the DC-side conversion circuit 11 is also equipped with at least two power switches connected in parallel.

[0085] It is understood that the power switches connected in parallel on the bridge arm of the DC-side conversion circuit 11 can also be configured with different equivalent drain-source capacitances, referring to the implementation method of the AC-side conversion circuit 13 described above. Specifically, each power switch connected in parallel in the same bridge arm has an external capacitor of different capacitance value connected in parallel between its drain and source. By configuring the capacitance values ​​of the external capacitors to be different, the power switches connected in parallel have different equivalent drain-source capacitances, which will not be elaborated further in this application.

[0086] In one possible implementation, please refer again. Figure 9 The DC-side conversion circuit 11 is a second bidirectional switching full-bridge conversion circuit. Each of the two bridge arms of the second bidirectional switching full-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on each bridge arm is configured to have different equivalent drain-source capacitances.

[0087] like Figure 9 As shown, the DC-side conversion circuit 11 is a second bidirectional switching full-bridge conversion circuit, which includes four power switching transistors, namely... Figure 9 The power switches Q14, Q15, Q16, and Q17 constitute a high-frequency full-bridge inverter unit, used to invert the DC voltage of the DC bus into a high-frequency AC square wave voltage, and transmit this high-frequency AC square wave voltage to the primary winding 121 of the isolation transformer 12. The isolation transformer 12 is used to achieve electrical isolation and voltage matching between the DC side and the AC side, and to couple the high-frequency AC energy to the AC side conversion circuit 13. Furthermore, power switch Q14 is connected in parallel with power switch Q18, and power switches Q14 and Q18 are respectively connected in parallel with external capacitors C15 and C16. Similarly, other arms of the second bidirectional switching full-bridge conversion circuit can also be equipped with two or more power switches connected in parallel according to actual current requirements, and external capacitors of different values ​​can be configured to differentiate the equivalent drain-source capacitance; these will not be elaborated further here.

[0088] It is understood that in this embodiment, by connecting multiple power switches in parallel on the bridge arm of the DC-side conversion circuit 11, and configuring each power switch in the same bridge arm to have a different equivalent drain-source capacitance, the switching timing on the DC side can also be naturally staggered, suppressing electromagnetic interference generated during the switching process of the DC-side power switches from the source. This scheme is completely consistent with the aforementioned differentiated configuration scheme of equivalent drain-source capacitance in the AC-side conversion circuit 13 in terms of technical principle. The two can be implemented independently or simultaneously on the DC and AC sides, achieving full-range electromagnetic interference source suppression on both the DC and AC sides of the entire bidirectional DC-AC conversion circuit 1. By adopting differentiated configuration of equivalent drain-source capacitance on both the DC and AC sides, the peak current and voltage change rates of the entire converter during switching can be reduced to the greatest extent, effectively dispersing and suppressing the high-frequency noise spectrum across the entire frequency band, thereby significantly improving the electromagnetic compatibility performance of the entire device. Meanwhile, this solution also eliminates the need for additional RC / RCD snubber circuits, avoiding power losses associated with snubber circuits and ensuring stable zero-voltage turn-on under heavy loads, thus maintaining high conversion efficiency. By setting parallel differentiated equivalent drain-source capacitance power switches on each arm of the DC-side full-bridge converter circuit, the current carrying capacity of the DC side can be significantly improved in high-power bidirectional conversion applications, while ensuring excellent electromagnetic interference suppression on the DC side, further enhancing the reliability and electromagnetic compatibility of the circuit under high-power conditions.

[0089] Based on the same inventive concept, this application also provides an electromagnetic interference optimization method for a bidirectional DC-AC converter circuit 1, which is applied to the bidirectional DC-AC converter circuit 1 described above. Please refer to the accompanying text. Figure 10 , Figure 10 This is a schematic flowchart of an electromagnetic interference optimization method for a bidirectional DC-AC converter circuit provided in one embodiment of this application. The method includes steps S1001, S1002, S1003, and S1004, wherein the detailed descriptions of steps S1001, S1002, S1003, and S1004 are as follows.

[0090] S1001, Construct a simulation model of a bidirectional DC-AC converter circuit, wherein the simulation model is consistent with the bidirectional DC-AC converter circuit;

[0091] Specifically, the construction of the simulation model for the bidirectional DC-AC converter circuit 1 refers to building a digital model in a simulation software platform to simulate the electrical behavior of the bidirectional DC-AC converter circuit 1 under actual operating conditions, based on its actual topology, electrical parameters of each component, and control strategy. The simulation model being consistent with the bidirectional DC-AC converter circuit 1 means that the simulation model corresponds to the actual bidirectional DC-AC converter circuit 1 in terms of topology, component selection parameters, power switch models and their equivalent drain-source capacitance configurations, gate drive timing, control strategy, and load conditions. Specifically, the simulation model should completely include all circuit components such as the DC-side converter circuit 11, the isolation transformer 12, the AC-side converter circuit 13, the power switches connected in parallel on each bridge arm and their corresponding external capacitors, the gate drive sub-circuit, the resonant capacitor, the resonant inductor, and the filter capacitor, and the electrical parameter values ​​of each component should match those of the actual circuit. By constructing a simulation model consistent with the bidirectional DC-AC converter circuit 1, the subsequent circuit simulation results can accurately reflect the working characteristics of the actual circuit under different parameter configurations, thereby providing reliable data support for optimization design.

[0092] S1002, to meet the conditions of zero-voltage turn-on and preset conversion efficiency requirements of the bidirectional DC-AC converter circuit under heavy load, configure the equivalent drain-source capacitance of each power switch in parallel in the same bridge arm as multiple different ratios, and obtain the simulation parameters corresponding to each ratio.

[0093] S1003, Based on the simulation model, perform circuit simulation on each set of simulation parameters to obtain the corresponding time-domain waveform parameters and frequency-domain noise parameters;

[0094] The time-domain waveform parameters refer to the electrical quantity waveforms and their characteristic parameters that change with time, directly obtained during circuit simulation. Specifically, the time-domain waveforms include, but are not limited to: the drain-source voltage waveform, drain current waveform, gate-source drive voltage waveform of each power switch, the voltage and current waveforms of the primary and secondary sides of the isolation transformer 12, the voltage and current waveforms of the resonant capacitor and resonant inductor, the midpoint voltage waveform of each bridge arm, and the voltage and current waveforms output to the power grid or load. Furthermore, the time-domain waveform parameters also include key numerical features extracted from the above waveforms, such as the rate of change of voltage and current during switching transients, voltage spike amplitude, current spike amplitude, switching delay time, zero-voltage turn-on achievement, and switching losses of each power switch. These time-domain waveform parameters are used to evaluate the switching behavior, soft-switching implementation, and dynamic response performance of the bidirectional DC-AC converter circuit 1 under different equivalent drain-source capacitance configurations.

[0095] The frequency domain noise parameters refer to the signal frequency domain characteristic parameters obtained by performing Fourier transform or Fast Fourier transform on the voltage or current signal in the time domain waveform. Specifically, the frequency domain noise parameters include, but are not limited to: noise amplitude at each frequency point in the conducted emission spectrum and radiated emission spectrum, noise peak amplitude at specific frequency points (e.g., high-frequency bands such as 30MHz, 50MHz, and 100MHz), the overall envelope shape of the noise spectrum, the frequency distribution characteristics of noise energy, and the amplitude of each harmonic component. The frequency domain noise parameters are used to evaluate the electromagnetic interference intensity and high-frequency noise distribution characteristics of the bidirectional DC-AC converter circuit 1 under different equivalent drain-source capacitance configurations, and are a key basis for determining whether the circuit meets the electromagnetic compatibility standard limit requirements.

[0096] S1004, based on the time-domain waveform parameters and the frequency-domain noise parameters, select the optimal ratio of the equivalent drain-source capacitance of each power switch transistor connected in parallel in the same bridge arm.

[0097] In this embodiment, based on the time-domain waveform parameters and the frequency-domain noise parameters, the optimal ratio of the equivalent drain-source capacitance of each power switch transistor connected in parallel in the same bridge arm is selected. Specifically, this involves analyzing the time-domain waveform parameters under each set of simulation parameters to determine whether the configuration meets the basic performance requirements of the bidirectional DC-AC converter circuit 1, including but not limited to: whether each power switch transistor can reliably achieve zero-voltage turn-on under heavy load conditions (i.e., verifying whether the drain-source voltage has naturally oscillated to near zero potential after turn-off, and confirming that the drain-source voltage has dropped to zero before the arrival of the drive signal), whether the actual conversion efficiency of the circuit reaches the preset efficiency threshold, whether the current distribution of each parallel power switch transistor is balanced, and whether there is excessive voltage or current stress. Based on this, all ratio configuration groups that simultaneously meet the zero-voltage turn-on condition and the preset conversion efficiency requirement are selected. In the configuration groups that meet the above basic performance requirements, the frequency-domain noise parameters are further compared and analyzed, focusing on the noise peak amplitude and spectral distribution in the high-frequency band (e.g., the 30MHz to 300MHz band). The ratio configuration that has the lowest peak amplitude of frequency domain noise, the flattest and most dispersed spectral distribution, and is most easily suppressed by conventional EMI filters is selected as the "optimal ratio" of the equivalent drain-source capacitance of each power switch connected in parallel in the same bridge arm.

[0098] If multiple ratios exhibit similar frequency domain noise performance, it is necessary to comprehensively consider factors such as voltage / current stress, switching losses, and current balance in their respective time domain waveform parameters to ultimately select the ratio with the best overall performance. It should be noted that the selection process for the optimal ratio can be completed manually after simulating multiple ratios, or it can be automated by writing scripts or optimization algorithms, setting the minimum frequency domain noise peak as the objective function, and zero-voltage turn-on conditions and conversion efficiency requirements as constraints, allowing the program to automatically search for and select the optimal solution.

[0099] It is understood that, in this embodiment, by constructing a high-precision simulation model consistent with the bidirectional DC-AC converter circuit 1, the circuit performance under different equivalent drain-source capacitance ratio configurations can be comprehensively evaluated before actual hardware fabrication. The method uses zero-voltage turn-on and conversion efficiency as basic constraints to ensure that the core performance of the circuit is not affected. Based on this, by jointly analyzing time-domain waveform parameters and frequency-domain noise parameters, the optimal equivalent drain-source capacitance ratio for electromagnetic interference suppression is selected from configurations that meet performance requirements, providing scientific and reliable theoretical guidance for actual circuit design. This method eliminates the need for repeated hardware prototype fabrication and testing, significantly shortening the R&D cycle and reducing trial-and-error costs and R&D risks. Simultaneously, this method can systematically evaluate circuit performance under different load conditions, ensuring that the selected optimal ratio has good adaptability across the entire load range. Through this optimization method, differentiated equivalent drain-source capacitance configuration schemes can be accurately applied to actual circuits, achieving the design goal of suppressing electromagnetic interference from the source, combining scientific rigor with engineering practicality.

[0100] In one possible implementation, the circuit simulation includes full-load range operating condition simulation and / or thermal distribution coupling simulation; the full-load range operating condition simulation includes at least one of light load, rated load and peak load operating conditions; the thermal distribution coupling simulation is used to obtain the temperature difference parameters of each power switch transistor connected in parallel in the same bridge arm under multiple sets of different ratios of the equivalent drain-source capacitance.

[0101] Specifically, the full load range simulation refers to setting different load power conditions in the simulation model to comprehensively simulate and evaluate the performance of the bidirectional DC-AC converter circuit 1 under different output power levels. Specifically, the full load range simulation includes, but is not limited to, at least one of the following: light load condition (e.g., 10%~30% of rated load), rated load condition (i.e., full-load operation at the circuit's nominal power), and peak load condition (e.g., 110%~130% of rated load, simulating short-term overload or impulsive load scenarios). By performing simulations under different load conditions, the switching timing staggered effect of the parallel power switches in the same bridge arm under different current stresses, the zero-voltage turn-on sustaining capability, the trend of conversion efficiency changes, and the evolution of electromagnetic interference frequency domain characteristics can be comprehensively examined. Because the circuit's operating state differs significantly under different load conditions, the resonant cavity energy is relatively insufficient under light load, while switching losses and current stress increase significantly under heavy load. Therefore, it is necessary to verify through simulation across the entire load range to ensure that the selected optimal ratio of equivalent drain-source capacitance can meet the zero-voltage turn-on condition, conversion efficiency requirements, and electromagnetic interference suppression index throughout the entire operating range from light load to peak load.

[0102] The thermal distribution coupling simulation refers to the further introduction of a thermal model based on the circuit simulation. The electrical losses (including conduction and switching losses) of the power switches are used as heat sources. Through thermal-electric coupling analysis, the junction temperature distribution and temperature difference parameters of the power switches connected in parallel within the same bridge arm under different equivalent drain-source capacitance ratios are calculated and obtained. Specifically, the thermal distribution coupling simulation considers the power consumption differences of each power switch, package thermal resistance, heat dissipation path, and the thermal equilibrium effect of the common heat sink 21. It can quantitatively provide the temperature differences between the power switches connected in parallel within the same bridge arm under different equivalent drain-source capacitance ratios. Since the differentiated configuration of the equivalent drain-source capacitance leads to different switching losses of each parallel power switch, it causes inconsistencies in the heat generation and operating temperature of each switch. Furthermore, key parameters such as the on-resistance and threshold voltage of the power switches drift with temperature changes. Excessive temperature differences may lead to current distribution imbalances or even thermal runaway. Therefore, the thermal distribution coupling simulation is used to obtain the temperature difference parameters of each power switch in parallel in the same bridge arm under multiple sets of different ratios of equivalent drain-source capacitance, so as to use it as one of the important constraints when screening the optimal ratio, ensuring that the selected ratio not only meets the electrical performance requirements, but also ensures that the temperature distribution of each parallel power switch is within a safe and balanced range.

[0103] Understandably, in this embodiment, by introducing full-load-range simulation, it is possible to ensure that the selected optimal ratio of equivalent drain-source capacitance has good adaptability and robustness under different power output conditions, avoiding the problem of performance degradation under other load conditions due to optimization only under a single load condition. In particular, for the challenge of maintaining zero-voltage turn-on under light load conditions, full-load-range simulation can fully verify the feasibility of the selected ratio under the most stringent conditions. At the same time, by introducing thermal distribution coupling simulation, the thermal imbalance problem that may be caused by the differential configuration of equivalent drain-source capacitance can be evaluated at the design stage, and comprehensive optimization can be carried out in combination with the aforementioned thermal balance design of the common heat unit 21, avoiding reliability risks such as local overheating, uneven current distribution, or thermal runaway caused by excessive temperature differences. By combining full-load-range operating condition simulation with thermal distribution coupled simulation, the advantages and disadvantages of different equivalent drain-source capacitance ratio configurations can be comprehensively evaluated in both electrical and thermal performance dimensions. This allows for the selection of the optimal solution that balances multiple objectives such as electromagnetic interference suppression, full-load-range operating efficiency, zero-voltage turn-on reliability, and thermal uniformity, providing a more complete and reliable design basis for practical engineering applications.

[0104] It should be noted that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0105] Based on the same inventive concept, this application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the electromagnetic interference optimization method for the bidirectional DC-AC converter circuit as described above.

[0106] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0107] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0108] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0109] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A bidirectional DC-AC converter circuit, the bidirectional DC-AC converter circuit comprising a DC-side converter circuit, an isolation transformer, and an AC-side converter circuit connected in sequence, characterized in that, At least one arm of the AC-side conversion circuit includes at least two power switching transistors connected in parallel; At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

2. The bidirectional DC-AC converter circuit according to claim 1, characterized in that, In the same bridge arm, each of the power switching transistors connected in parallel has an external capacitor of different capacitance value connected in parallel between its drain and source, so that the equivalent drain-source capacitance of each power switching transistor is different.

3. The bidirectional DC-AC converter circuit according to claim 2, characterized in that, The ratio of the external capacitors of the power switches connected in parallel in the same bridge arm ranges from 1:1.2 to 1:1.

5.

4. The bidirectional DC-AC converter circuit according to claim 1, characterized in that, The bidirectional DC-AC converter circuit further includes a gate drive sub-circuit, which is used to be electrically connected to each of the power switching transistors through a gate drive path to control the turning on or off of each of the power switching transistors. The gate drive paths of the power switches connected in parallel in the same bridge arm are physically symmetrical.

5. The bidirectional DC-AC converter circuit according to claim 1, characterized in that, The bidirectional DC-AC converter circuit is mounted on a circuit board, which includes multiple spaced-apart common heating sections. The power switching transistors connected in parallel in the same bridge arm are integrated in the same common heating section.

6. The bidirectional DC-AC converter circuit according to claim 1, characterized in that, The AC-side conversion circuit is a first bidirectional switching full-bridge conversion circuit. Each of the two bridge arms of the first bidirectional switching full-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on each bridge arm is configured to have different equivalent drain-source capacitances. Alternatively, the AC-side conversion circuit is a bidirectional switching half-bridge conversion circuit, wherein the bridge arm of the bidirectional switching half-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each of the power switching transistors connected in parallel on the bridge arm is configured to have different equivalent drain-source capacitances.

7. The bidirectional DC-AC converter circuit according to claim 1, characterized in that, At least one arm of the DC-side converter circuit includes at least two power switching transistors connected in parallel. At least some of the power switches connected in parallel in the same bridge arm are configured to have different equivalent drain-source capacitances to stagger the switching timing of the power switches connected in parallel.

8. The bidirectional DC-AC converter circuit according to claim 7, characterized in that, The DC-side conversion circuit is a second bidirectional switching full-bridge conversion circuit. Each of the two bridge arms of the second bidirectional switching full-bridge conversion circuit is provided with at least two power switching transistors connected in parallel, and each power switching transistor connected in parallel on each bridge arm is configured to have different equivalent drain-source capacitances.

9. A method for optimizing electromagnetic interference in a bidirectional DC-AC converter circuit, characterized in that, The method includes: A simulation model of a bidirectional DC-AC converter circuit is constructed, wherein the simulation model is consistent with the bidirectional DC-AC converter circuit described in any one of claims 1-8; To meet the requirements of zero-voltage turn-on and preset conversion efficiency of the bidirectional DC-AC converter circuit under heavy load, the equivalent drain-source capacitance of each power switch in parallel in the same bridge arm is configured with multiple different ratios, and the simulation parameters corresponding to each ratio are obtained. Based on the simulation model, circuit simulation is performed on each set of simulation parameters to obtain the corresponding time-domain waveform parameters and frequency-domain noise parameters. Based on the time-domain waveform parameters and the frequency-domain noise parameters, the optimal ratio of the equivalent drain-source capacitances of each power switch transistor connected in parallel in the same bridge arm is selected.

10. The method according to claim 9, characterized in that, The circuit simulation includes full load range operating condition simulation and / or thermal distribution coupling simulation; the full load range operating condition simulation includes at least one of light load, rated load and peak load operating conditions; the thermal distribution coupling simulation is used to obtain the temperature difference parameters of each power switch transistor connected in parallel in the same bridge arm under multiple sets of different ratios of the equivalent drain-source capacitance.

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