Method, device, equipment, transmitting system, storage medium and program product for calibrating linearity of power amplifier
Patent Information
- Application Number
- CN202510340508.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-21
- Publication Date
- 2026-09-22
AI Technical Summary
因此,在HBF-MIMO发射系统中,一个DPD需要对应多个功率放大器,DPD无法精确补偿每个功率放大器的非线性,导致整体发射机的线性度受到影响
[0044]相比于现有技术,本发明公开的功率放大器的线性度校准方法、装置、设备、发射系统、存储介质和程序产品,能够矫正多通道功率放大器之间线性度的一致性,保证了每一路功率放大器的线性度,以及有效地补偿各个功率放大器之间的非线性差异,确保信号在发射前具有优秀的线性度,从而减少信号失真,提高通信质量。另外,通过计算各功率放大器输出信号与基准功率放大器输出信号之间的差异评估值,并选择最小值对应的偏置电压组合作为目标偏置电压组合来进行线性度校准,可以使每个功率放大器都能在各自最佳的偏置电压下工作,从而提升整个发射系统的线性度,减少信号失真,提高信号质量。并且,以基准功率放大器为参考进行校准,使得参考功率放大器的输出信号尽可能与基准保持一致,减少了不同功率放大器之间的性能差异,有助于提升发射系统的稳定性和可靠性,保证系统在不同工作条件下都能稳定地输出高质量信号。进一步地,相比于采用统一的、固定的偏置电压设置,本发明采用的个性化的校准方式可以充分发挥每个功率放大器的性能潜力,避免了因偏置电压不合适导致的功率浪费或性能受限的问题,提高了功率放大器的工作效率,进而提高了整个发射系统的资源利用效率。
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Figure CN122801912A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communications, and more particularly to a method, apparatus, device, transmission system, storage medium, and program product for calibrating the linearity of a power amplifier. Background Technology
[0002] In 5G and future communication systems, complex communication application scenarios such as multi-user, high bandwidth, and high throughput are becoming increasingly common. Ordinary single-antenna transmitters are no longer sufficient to meet user demands. To achieve higher peak rates and user experience rates, and improve spectral efficiency, more complex modulation schemes and ultra-large-scale multiple-input multiple-output (MIMO) technologies will be used. To reduce device integration complexity and system hardware costs, MIMO transmitters often employ hybrid beamforming (HBF) structures instead of digital beamforming structures. This method significantly reduces the integration complexity of the RF link, but instead of driving a single power amplifier, a single RF link drives a group (or multiple) of power amplifiers. Typically, the linearization of power amplifiers requires digital pre-distortion (DPD) correction to meet channel requirements. In practice, due to packaging and transistor process variations, the nonlinear characteristics of each power amplifier will differ, and the DPD linearization module requires precise adjustment of model parameters to achieve good linearization compensation. Therefore, in an HBF-MIMO transmitter system, one DPD needs to correspond to multiple power amplifiers. The DPD cannot accurately compensate for the nonlinearity of each power amplifier, which affects the linearity of the overall transmitter. Summary of the Invention
[0003] The purpose of this invention is to provide a linearity calibration method, apparatus, device, transmission system, storage medium, and program product for power amplifiers, which can correct the linearity consistency between multi-channel power amplifiers, effectively compensate for nonlinear differences between individual power amplifiers, reduce signal distortion, and improve communication quality.
[0004] To achieve the above objectives, embodiments of the present invention provide a linearity calibration method for a power amplifier, comprising:
[0005] The excitation signal is used to scan at least two power amplifiers in the transmission system to obtain the output signal of each power amplifier under different bias voltage combinations;
[0006] Based on the output signal, a reference power amplifier is selected from all power amplifiers, and the reference bias voltage combination corresponding to the reference power amplifier is obtained;
[0007] Calculate a first difference evaluation value between the first output signal and the second output signal; wherein the first output signal is the output signal of the reference power amplifier under the reference bias voltage combination, and the second output signal is the output signal of the other reference power amplifiers under different bias voltage combinations;
[0008] For each reference power amplifier, the bias voltage combination corresponding to the minimum value among the first difference evaluation values is selected as the target bias voltage combination;
[0009] The linearity of each reference power amplifier is calibrated using the target bias voltage combination.
[0010] As an improvement to the above scheme, the step of selecting a reference power amplifier from all power amplifiers based on the output signal includes:
[0011] A candidate output signal is selected from the output signals corresponding to each power amplifier; wherein, the candidate output signal is the minimum value among the output signals corresponding to each power amplifier.
[0012] The power amplifier corresponding to the maximum value among the candidate output signals is selected as the reference power amplifier.
[0013] As an improvement to the above scheme, obtaining the reference bias voltage combination corresponding to the reference power amplifier includes:
[0014] The bias voltage combination obtained when the reference power amplifier outputs the candidate output signal is the reference bias voltage combination.
[0015] As an improvement to the above scheme, the calculation of the first difference evaluation value between the first output signal and the second output signal includes:
[0016] The first output signal and the second output signal are input into the formula for calculating the mutual normalized mean square error to obtain the first difference evaluation value.
[0017] As an improvement to the above scheme, the linearity calibration of each reference power amplifier using the target bias voltage combination includes:
[0018] The target bias voltage combination is output to the gate of the corresponding reference power amplifier.
[0019] As an improvement to the above scheme, after performing linearity calibration on each reference power amplifier using the target bias voltage combination, the method further includes:
[0020] When a change in the state of any power amplifier is detected, a second difference evaluation value is calculated between the second output signal corresponding to the current power amplifier and the first output signal.
[0021] If the second difference assessment value is greater than the first difference assessment value corresponding to the current power amplifier, update the target bias voltage combination of the current power amplifier;
[0022] Linearity calibration of the current power amplifier is performed using the updated target bias voltage combination.
[0023] As an improvement to the above scheme, after calculating the first difference evaluation value between the first output signal and the second output signal, the method further includes:
[0024] For each reference power amplifier, output a distribution graph of the first difference assessment value as a function of different bias voltage combinations;
[0025] Then, updating the target bias voltage combination of the current power amplifier includes:
[0026] From the distribution map, obtain the candidate bias voltage combination adjacent to the minimum value of the first difference evaluation value;
[0027] The target bias voltage combination of the current power amplifier is updated with the candidate bias voltage combination.
[0028] To achieve the above objectives, embodiments of the present invention also provide a linearity calibration device for a power amplifier, comprising:
[0029] The power control module is used to scan at least two power amplifiers in the transmission system using excitation signals to obtain the output signal of each power amplifier under different bias voltage combinations.
[0030] A consistency evaluation module is used to select a reference power amplifier from all power amplifiers based on the output signal, and obtain the reference bias voltage combination corresponding to the reference power amplifier; calculate a first difference evaluation value between a first output signal and a second output signal; wherein, the first output signal is the output signal of the reference power amplifier under the reference bias voltage combination, and the second output signal is the output signal of the remaining reference power amplifiers under different bias voltage combinations; for each reference power amplifier, the bias voltage combination corresponding to the minimum value of the first difference evaluation value is selected as the target bias voltage combination;
[0031] The power control module is also used to perform linearity calibration on each reference power amplifier using the target bias voltage combination.
[0032] To achieve the above objectives, embodiments of the present invention also provide a launching system, comprising:
[0033] A beamforming module is used to adjust the first baseband signal input to the transmission system in order to perform beamforming operations;
[0034] The digital predistortion module is used to compare the second baseband features of the second baseband signal with the first baseband features of the first baseband signal, and to estimate the parameters of the predistorter based on the comparison results through a parameter identification algorithm in order to compensate for the distortion caused by the power amplifier.
[0035] The first signal processing module is used to convert the first baseband signal into a radio frequency signal;
[0036] A power amplifier array is used to amplify the radio frequency signal;
[0037] The second signal processing module is used to convert the radio frequency signal into a second baseband signal and feed the second baseband signal back to the digital predistortion module;
[0038] A transmitting antenna array is used to perform beamforming based on the radio frequency signal;
[0039] The linearity calibration device for the power amplifier described in the above embodiments.
[0040] As an improvement to the above scheme, the power amplifier group includes at least two power amplifiers, each power amplifier including a first power amplifier transistor disposed on the carrier path and a second power amplifier transistor disposed on the peak path; wherein, the power control module inputs a first bias voltage in the bias voltage combination to the first power amplifier transistor, and inputs a second bias voltage in the bias voltage combination to the second power amplifier transistor.
[0041] To achieve the above objectives, embodiments of the present invention also provide a linearity calibration device for a power amplifier, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the linearity calibration method for the power amplifier as described in any of the above embodiments.
[0042] To achieve the above objectives, embodiments of the present invention also provide a computer-readable storage medium storing a computer program, wherein, when the computer program is executed, it controls the device where the computer-readable storage medium is located to perform the linearity calibration method of the power amplifier as described in any of the above embodiments.
[0043] To achieve the above objectives, embodiments of the present invention also provide a computer program product, including a computer program / instructions, which, when executed by a processor, implement the linearity calibration method for a power amplifier as described in any of the above embodiments.
[0044] Compared to existing technologies, the linearity calibration method, apparatus, device, transmission system, storage medium, and program product for power amplifiers disclosed in this invention can correct the consistency of linearity among multi-channel power amplifiers, ensuring the linearity of each power amplifier and effectively compensating for nonlinear differences between power amplifiers. This ensures excellent linearity of the signal before transmission, thereby reducing signal distortion and improving communication quality. Furthermore, by calculating the difference evaluation value between the output signal of each power amplifier and the output signal of the reference power amplifier, and selecting the bias voltage combination corresponding to the minimum value as the target bias voltage combination for linearity calibration, each power amplifier can operate at its optimal bias voltage, thereby improving the linearity of the entire transmission system, reducing signal distortion, and improving signal quality. Moreover, calibration with a reference power amplifier ensures that the output signal of the reference power amplifier is as consistent as possible with the reference, reducing performance differences between different power amplifiers, contributing to improved stability and reliability of the transmission system, and ensuring that the system can stably output high-quality signals under different operating conditions. Furthermore, compared to using a uniform and fixed bias voltage setting, the personalized calibration method adopted in this invention can fully utilize the performance potential of each power amplifier, avoid power waste or performance limitations caused by inappropriate bias voltage, improve the working efficiency of the power amplifier, and thus improve the resource utilization efficiency of the entire transmission system. Attached Figure Description
[0045] Figure 1 This is a structural block diagram of a launching system provided in an embodiment of the present invention;
[0046] Figure 2 This is a structural block diagram of the power amplifier provided in an embodiment of the present invention;
[0047] Figure 3 This is a flowchart of a linearity calibration method for a power amplifier provided in an embodiment of the present invention;
[0048] Figure 4 This is another flowchart of a linearity calibration method for a power amplifier provided in an embodiment of the present invention;
[0049] Figure 5This is a distribution diagram of the ACPR (Adjacent Channel Power Ratio) of the output signal of the DPA1 (Doherty Power Amplifier) provided in the embodiment of the present invention as a function of bias voltage.
[0050] Figure 6 This is a distribution diagram of the ACPR of the output signal of DPA2 provided in the embodiment of the present invention as a function of bias voltage;
[0051] Figure 7 This is a distribution diagram of the ACPR of the output signal of the DPA3 provided in this embodiment of the invention as a function of the bias voltage;
[0052] Figure 8 This is a distribution diagram of the ACPR of the output signal of the DPA4 provided in this embodiment of the invention as a function of the bias voltage;
[0053] Figure 9 This is a distribution diagram of the first difference assessment value between DPA1 and the reference state as a function of bias voltage, provided in an embodiment of the present invention.
[0054] Figure 10 This is a distribution diagram of the first difference assessment value between DPA2 and the reference state as a function of bias voltage, provided in an embodiment of the present invention.
[0055] Figure 11 This is a distribution diagram of the first difference assessment value between DPA3 and the reference state as a function of bias voltage, provided in an embodiment of the present invention.
[0056] Figure 12 These are the modulation signal response spectra of DPA1 before, after, and after DPD calibration with bias voltage adjustment.
[0057] Figure 13 These are the modulation signal response spectra of DPA2 before, after, and after DPD calibration with bias voltage adjustment.
[0058] Figure 14 These are the modulation signal response spectra of DPA3 before, after, and after DPD calibration with bias voltage adjustment.
[0059] Figure 15 These are the modulation signal response spectra of DPA4 before and after DPD calibration.
[0060] Figure 16 This is a structural block diagram of a power amplifier linearity calibration device provided in an embodiment of the present invention. Detailed Implementation
[0061] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0062] Linearity consistency adjustment of power amplifiers is a crucial technical operation to ensure uniform output characteristics across multiple power amplifiers, particularly in communication and radar systems. In multi-amplifier systems, variations in manufacturing processes and component parameters among the amplifiers result in inconsistent linearity, leading to signal distortion and system performance degradation. Therefore, consistency adjustment is necessary. To address the problem that existing power amplifier calibration methods (DPDs) cannot accurately compensate for the nonlinearity of each power amplifier, thus affecting the overall transmitter linearity, this invention proposes a power amplifier linearity calibration method applied to an HBF-MIMO transmission system.
[0063] See Figure 1 , Figure 1 This is a structural block diagram of a transmission system provided in an embodiment of the present invention. The HBF-MIMO transmission system includes:
[0064] A beamforming module is used to adjust the first baseband signal input to the transmission system in order to perform beamforming operations;
[0065] The digital predistortion module is used to compare the second baseband features of the second baseband signal with the first baseband features of the first baseband signal, and to estimate the parameters of the predistorter based on the comparison results through a parameter identification algorithm in order to compensate for the distortion caused by the power amplifier.
[0066] The first signal processing module is used to convert the first baseband signal into a radio frequency signal;
[0067] A power amplifier array is used to amplify the radio frequency signal;
[0068] The second signal processing module is used to convert the radio frequency signal into a second baseband signal and feed the second baseband signal back to the digital predistortion module;
[0069] A transmitting antenna array is used to perform beamforming based on the radio frequency signal;
[0070] The linearity calibration device for the power amplifier includes a power control module and a conformance evaluation module.
[0071] For example, the beamforming module includes a digital beamforming module and an analog beamforming module. The digital beamforming module performs beamforming in the digital domain by adjusting the amplitude and phase of the input first baseband signal. The analog beamforming module operates in the analog (RF) domain and is typically implemented using a phase shifter to adjust the phase of the RF signal output by the first signal processing module to perform beamforming.
[0072] For example, the digital predistortion (DPD) module uses a feedback path to obtain the second baseband characteristics of the second baseband signal, compares these second baseband characteristics with the first baseband characteristics of the first baseband signal output by the digital beamforming module, and estimates the parameters of the predistorter based on the comparison result using a parameter identification algorithm to compensate for the distortion caused by the power amplifier. The input first baseband characteristics are equivalent to a "standard template," while the second baseband characteristics obtained through the feedback path represent the actual situation after amplification by the power amplifier. By comparing the two, the distortion and changes caused by the power amplifier to the signal can be detected, such as changes in amplitude and phase shifts. Furthermore, a portion of the RF signal output by the power amplifier returns to the digital predistortion module through the feedback path; this feedback path acts like an "information channel," such as... Figure 1 The second signal processing module in the circuit is the feedback path. The feedback path transmits the actual output signal of the power amplifier back, allowing the digital predistortion module to obtain the output radio frequency characteristics, such as the amplitude and phase of the signal.
[0073] For example, the first signal processing module is an up-conversion module, including a digital-to-analog converter (DAC), a mixer, a local oscillator (LO) signal input, and an adder, responsible for converting the first baseband signal into a radio frequency (RF) signal. The first baseband signal is usually a digital signal, which first needs to be converted into an analog signal by the DAC. The DAC outputs a corresponding analog voltage or current signal according to the input digital code. The mixer has two input ports: one is the analog baseband signal output from the DAC, and the other is the local oscillator (LO) signal generated by the DAC. The mixer essentially performs a multiplication operation on the two input signals, and the adder is used to add the signals output from the two mixers to obtain the final RF signal.
[0074] For example, the power amplifier group is a Doherty-based power amplifier group, including m power amplifiers, denoted as DPA1 to DPAm respectively. The output of each power amplifier is connected to a coupler, and each power amplifier is connected to the feedback path through the coupler. The m power amplifiers correspond to m channels, and are connected to the feedback path through the m channels.
[0075] For example, the second signal processing module is a down-conversion module, including a mixer, a local oscillator (LO) signal input, a low-pass filter (LPF), and an analog-to-digital converter (ADC). The second signal processing module is responsible for converting the radio frequency (RF) signal into a second baseband signal. The mixer works based on a multiplier, multiplying the two input signals (RF signal + LO LO signal) to obtain the mixed signal. After the RF signal passes through two mixers, two mixed signals are output. These two mixed signals are then input to the low-pass filters. The function of the low-pass filters is to allow low-frequency signals to pass through while blocking high-frequency signals. The mixed signals are input to the low-pass filters, which are set with appropriate cutoff frequencies so that the frequencies corresponding to the difference frequency components can pass through the filter, while the sum frequency components and other high-frequency noise are filtered out. After passing through the low-pass filters, the resulting signal is mainly a low-frequency signal containing baseband information. It retains the components related to the baseband information in the original RF signal and removes high-frequency interference and unwanted frequency components. An analog-to-digital converter (ADC) converts the analog baseband signal output from a low-pass filter into a digital signal, or a second baseband signal. The ADC achieves this conversion through two processes: sampling and quantization.
[0076] For example, the transmitting antenna array consists of multiple antenna elements. Through specific design and feeding methods, the antenna array can enhance the intensity of radiated or received signals in a specific direction while suppressing signals in other directions, thus achieving beamforming.
[0077] For example, the linearity calibration device of the power amplifier is used to perform linearity calibration on all power amplifiers in the power amplifier group; wherein, the consistency evaluation module collects the output signal of each power amplifier for comparison, evaluates the consistency of linearity between different power amplifiers, finds the bias voltage combination corresponding to the state when the reference power amplifier and the reference power amplifier have the best consistency, and sends it to the power control module. The power control module is responsible for supplying power to each port of the power amplifier, and through program control, it traverses the carrier path and peak path bias voltage combinations of the power amplifier to obtain various output states of the power amplifier.
[0078] It should be noted that in the programmable testing of power amplifiers, the bias voltage combination is an indicator used to show how the performance of the power amplifier can be optimized by adjusting two independent bias voltages: the carrier bias voltage and the peak bias voltage. These two independent bias voltages together form the bias voltage combination. Specifically, the carrier bias voltage (Vbias_carrier) provides the quiescent operating point for the transistors in the main power path (processing continuous carrier signals); the peak bias voltage (Vbias_peak) provides the quiescent operating point for the transistors in the peak compensation path (processing the peak portion of the signal). Dynamic biasing technology for power amplifiers is a method to improve the efficiency and linearity of power amplifiers. Generally, a special dynamic bias circuit is designed so that the gate bias voltage of the power amplifier changes with the input power. The bias voltage at each input power is often determined based on the relationship curves between the power amplifier's output gain and input / output power, and between the power amplifier's efficiency and input / output power. Then, by adjusting the bias voltage in real time, the relationship curve between the power amplifier's gain and output power is flatter, and the efficiency of the power amplifier is improved. However, for traditional dynamic bias adjustment methods, the relationship between input power and bias voltage is based on the output gain and input-output relationship. While adjusting the output gain, the flatness of the output phase often deteriorates, leading to a decrease in the linearity of the power amplifier. Therefore, this invention provides a Doherty-based power amplifier architecture that simultaneously adjusts the gate bias voltages of the carrier and peak paths of the DPA (Doherty-based power amplifier architecture) transistors to find a set of bias voltages that optimizes both the output gain and phase linearity of the power amplifier under different input powers, achieving independent adjustment of the amplitude and phase output characteristics of the power amplifier. For the purpose of power amplifier nonlinearity consistency adjustment, the dual-path gate bias voltage independently adjustable scheme based on the Doherty power amplifier increases the variable range of the power amplifier's nonlinear characteristics, thereby improving the consistency adjustment effect.
[0079] Specifically, the power amplifier group is implemented based on the Doherty power amplifier architecture. The power amplifier group includes at least two power amplifiers, each of which includes a first power amplifier transistor located on the carrier path and a second power amplifier transistor located on the peak path. The power control module inputs a first bias voltage from the bias voltage combination to the first power amplifier transistor and inputs a second bias voltage from the bias voltage combination to the second power amplifier transistor.
[0080] For example, see Figure 2 , Figure 2This is a structural block diagram of a power amplifier provided in an embodiment of the present invention. Each power amplifier in the transmitting system includes an RF input, a first delay microstrip line 1 located at the input end, two input DC blocking capacitors 2, two input matching networks 3, two bias network choke inductors 4, a second power amplifier transistor 5 located in the peak path, a first power amplifier transistor 6 located in the carrier path, two output matching networks 7, two second delay microstrip lines 8 located at the output end, an output phase compensation line 9, and a coupler 10. The main function of this power amplifier architecture is to amplify the input RF signal. Simultaneously, through the synergistic effect of matching networks, capacitors, inductors, and other components, it optimizes signal transmission, reduces loss and reflection, and ensures that the output RF signal meets specific power, frequency, and other performance requirements.
[0081] Furthermore, "RF input" is the port through which RF signals enter the circuit, allowing external RF signals to enter the circuit system for processing; "RF output" indicates that the processed RF signal is output from this port for use by subsequent devices or systems. The first delay microstrip line 1 and the second delay microstrip line 8 are used to transmit RF signals. Microstrip lines of different lengths and widths can achieve impedance matching, signal delay, and other functions. The input DC blocking capacitor 2 is used to block DC and pass AC, preventing DC components from passing through and allowing RF AC signals to be transmitted smoothly. It can also be used for filtering and coupling. The bias network choke inductor 4 can impede current changes and is commonly used in RF circuits for impedance matching, filtering, and forming resonant circuits with capacitors. The second power amplifier transistor 5 and the first power amplifier transistor 6 are the core components of RF amplification, capable of amplifying the power of RF signals. With appropriate bias voltages (VDC1 and VDC2), they are made to operate in the amplification region, enhancing the power of the input RF signal. The circuit contains multiple matching networks, such as input matching network 3 and output matching network 7. Their function is to achieve impedance matching between the signal source, load, and transmission lines, reducing signal reflection and improving signal transmission efficiency. Output phase compensation line 9 can adjust the signal phase to compensate for phase deviations caused by signal transmission delays and parasitic parameters in the circuit, increasing the system's phase margin and ensuring stable operation of the power amplifier system across the entire operating frequency band. Coupler 10 can distribute one output signal from the power amplifier to different branches or ports according to a certain ratio, so that the signal can be transmitted to different devices or modules for subsequent processing.
[0082] See Figure 3 , Figure 3 This is a flowchart of a linearity calibration method for a power amplifier provided in an embodiment of the present invention. The linearity calibration method for the power amplifier includes:
[0083] S1. Use the excitation signal to scan at least two power amplifiers in the transmitting system to obtain the output signal of each power amplifier under different bias voltage combinations;
[0084] S2. Select a reference power amplifier from all power amplifiers according to the output signal, and obtain the reference bias voltage combination corresponding to the reference power amplifier;
[0085] S3. Calculate the first difference evaluation value between the first output signal and the second output signal; wherein, the first output signal is the output signal of the reference power amplifier under the reference bias voltage combination, and the second output signal is the output signal of the other reference power amplifiers under different bias voltage combinations;
[0086] S4. For each reference power amplifier, select the bias voltage combination corresponding to the minimum value among the first difference evaluation values as the target bias voltage combination.
[0087] S5. Perform linearity calibration on each reference power amplifier using the target bias voltage combination.
[0088] For example, the linearity calibration method of the power amplifier is applied to the linearity calibration device of the power amplifier described in the above embodiment, wherein steps S1 and S5 are executed by the power control module, and steps S2 to S4 are executed by the consistency evaluation module.
[0089] Specifically, in step S1, at least two power amplifiers in the transmitting system are scanned using an excitation signal to obtain the output signal of each power amplifier under different bias voltage combinations.
[0090] For example, a power amplifier is selected, and the power control module scans the gate bias voltage of the power amplifier transistors in the carrier path and peak path of the power amplifier respectively. The power amplifier is excited with a signal of target modulation mode and target bandwidth to obtain the modulation signal response of the power amplifier under different bias voltage combinations. Next, the same input signal is used to scan the reference power amplifier to obtain the output signal of the power amplifier under different bias voltage combinations.
[0091] Specifically, in step S2, selecting a reference power amplifier from all power amplifiers based on the output signal includes: selecting a candidate output signal from the output signal corresponding to each power amplifier; wherein the candidate output signal is the minimum value among the output signals corresponding to each power amplifier; and selecting the power amplifier corresponding to the maximum value from the candidate output signal as the reference power amplifier.
[0092] For example, during the scanning process, the modulation signal response of the power amplifier can be acquired at each bias voltage point, including the amplitude, phase, and harmonic components of the output signal. Then, using equipment such as a spectrum analyzer and vector signal analyzer, relevant linearity indicators are calculated based on the acquired data, such as third-order intermodulation distortion (IMD3), adjacent channel power ratio (ACPR), and error vector magnitude (EVM). These indicators quantify the linearity of the power amplifier; the smaller the value, the better the linearity. By comparing the linearity indicators obtained under different bias voltage combinations, the candidate output signal that achieves the optimal (minimum) values for these indicators is found. The bias voltage combination corresponding to this candidate output signal is the bias voltage combination with the best linearity, thus obtaining the optimal bias voltage combination for each power amplifier. It should be noted that ACPR is used to evaluate the linearity of the power amplifier in the following embodiments of the present invention; in other embodiments, IMD3 or EVM can also be used.
[0093] For example, after obtaining the optimal bias voltage combination for linearity for each power amplifier, the power amplifier with the worst linearity among all power amplifiers in the optimal linearity state is selected as the reference power amplifier. Then, the power amplifier corresponding to the maximum value from the candidate output signals is selected as the reference power amplifier. At this point, the reference power amplifier is in its standard state, and the linearity in this state is the optimal linearity that all power amplifiers can achieve under the premise of consistency. It should be noted that the "optimal linearity that all power amplifiers can achieve under the premise of consistency" refers to using the standard state of this reference power amplifier as a reference, and all other power amplifiers should be adjusted to a similar operating state as possible, so that all power amplifiers achieve a balance and consistency in linearity overall. In this case, the optimal linearity that the entire power amplifier system can achieve while ensuring consistency is the linearity of the reference power amplifier in its standard state. This is a reference optimal linearity standard determined to ensure the coordinated operation of all power amplifiers in the entire system while pursuing overall performance consistency.
[0094] Specifically, in step S2, obtaining the reference bias voltage combination corresponding to the reference power amplifier includes: obtaining the bias voltage combination of the reference power amplifier when outputting the candidate output signal as the reference bias voltage combination.
[0095] For example, in this embodiment of the invention, the bias voltage combination of the reference power amplifier in the state of best linearity is used as the reference bias voltage combination.
[0096] In this embodiment of the invention, when selecting the reference power amplifier, all power amplifiers that are already at their optimal linearity are first considered. These power amplifiers have undergone certain adjustments or tests and are at their best achievable linearity. Within this specific range, the power amplifier with the worst linearity relative to the other power amplifiers is selected as the reference power amplifier. This selection is likely to ensure that the linearity of the entire system is at a relatively conservative level that all power amplifiers can reach, avoiding the possibility that excessively high linearity of a single power amplifier may make it difficult to match with other power amplifiers, thereby affecting the overall consistency of the system.
[0097] Specifically, in step S3, calculating the first difference evaluation value between the first output signal and the second output signal includes: inputting the first output signal and the second output signal into the mutual normalized mean square error calculation formula to obtain the first difference evaluation value.
[0098] For example, the nonlinear characteristics of a power amplifier are generally displayed using amplitude modulation-amplitude modulation (AM-AM) and amplitude modulation-phase modulation (AM-PM) characteristic curves. However, simply comparing these curves cannot quantitatively determine the consistency of power amplifiers, as judging the differences between curves is complex. It is generally believed that the higher the adjacent channel power ratio (ACPR) of a power amplifier, the stronger its nonlinearity. However, the consistency between power amplifiers still requires a specific scalar as an evaluation standard. Nonlinear consistency can be quantitatively described using specific measurement methods. When all power amplifiers are excited by the same set of signals, the consistency between power amplifiers can be easily measured by comparing the sampled output signals. Therefore, this invention introduces the Crossed Normalized Mean Squared Error (CNMSE) to evaluate the consistency of the nonlinear characteristics of multi-channel power amplifiers. Its expression is as follows:
[0099]
[0100] Where y(n) is the sampled output signal of the power amplifier, n represents the number of input signals, and the length of the input signal is Ns. y1(n) and y2(n) represent the sampled output signals of the first and second power amplifiers, respectively. This formula uses maximum absolute value normalization to uniformly normalize the power amplifier output signal.
[0101] For example, by combining the above formula, the CNMSE between the second output signal of the reference power amplifier under different bias voltage combinations and the first output signal of the reference power amplifier under the standard state (the reference power amplifier under the reference bias voltage combination) is calculated, where y1(n) in the formula is the first output signal under the standard state and y2(n) is the second output signal of the reference power amplifier under different bias voltage combinations. The first difference evaluation value is output by combining the above formula, and the consistency difference between the reference power amplifier and the reference power amplifier is evaluated by using the first difference evaluation value.
[0102] Specifically, in step S4, for each reference power amplifier, the bias voltage combination corresponding to the minimum value among the first difference evaluation values is selected as the target bias voltage combination.
[0103] For example, after obtaining the first difference evaluation value, each reference power amplifier has multiple first difference evaluation values. The minimum value is selected from these values, indicating that the consistency between the current power amplifier and the reference power amplifier is the smallest. The corresponding bias voltage combination is the target bias voltage combination.
[0104] Specifically, in step S5, the linearity calibration of each reference power amplifier using the target bias voltage combination includes: outputting the target bias voltage combination to the gate of the corresponding reference power amplifier.
[0105] For example, for each reference power amplifier, including a first power amplifier transistor disposed on the carrier path and a second power amplifier transistor disposed on the peak path, the power control module inputs a first bias voltage (i.e., carrier path bias voltage) in the bias voltage combination to the gate of the first power amplifier transistor, and inputs a second bias voltage (i.e., peak path bias voltage) in the bias voltage combination to the gate of the second power amplifier transistor.
[0106] In this embodiment of the invention, by calculating the difference evaluation value between the output signal of each power amplifier and the output signal of the reference power amplifier, and selecting the bias voltage combination corresponding to the minimum value as the target bias voltage combination for linearity calibration, each power amplifier can operate at its optimal bias voltage, thereby improving the linearity of the entire transmission system, reducing signal distortion, and improving signal quality. Furthermore, calibration with the reference power amplifier as a reference ensures that the output signal of the reference power amplifier is as consistent as possible with the reference, reducing performance differences between different power amplifiers, which helps improve the stability and reliability of the transmission system, ensuring that the system can stably output high-quality signals under different operating conditions.
[0107] Further, see Figure 4 , Figure 4 This is another flowchart of a power amplifier linearity calibration method provided in an embodiment of the present invention. After performing step S5, the method further includes:
[0108] S6. When a change in the state of any power amplifier is detected, calculate the second difference evaluation value between the second output signal and the first output signal corresponding to the current power amplifier.
[0109] S7. If the second difference evaluation value is greater than the first difference evaluation value corresponding to the current power amplifier, update the target bias voltage combination of the current power amplifier.
[0110] S8. Perform linearity calibration on the current power amplifier using the updated target bias voltage combination.
[0111] For example, when a power amplifier changes state for some reason (such as changes in ambient temperature, changes in input signal, etc.), its CNMSE (Concurrent Numerical Equivalent) relative to the standard state output signal will increase, which means that its linearity consistency with the reference power amplifier deteriorates. Therefore, when a power amplifier changes state and its CNMSE relative to the standard state output signal increases, the bias voltage of the power amplifier needs to be updated to bring it into a state with better linearity consistency.
[0112] Specifically, after performing step S4, the method further includes: for each reference power amplifier, outputting a distribution map showing the variation of the first difference evaluation value with different bias voltage combinations; then, in step S7, updating the target bias voltage combination of the current power amplifier includes: obtaining candidate bias voltage combinations adjacent to the minimum value of the first difference evaluation value from the distribution map; and updating the target bias voltage combination of the current power amplifier with the candidate bias voltage combinations.
[0113] For example, for each reference power amplifier, after obtaining the first difference evaluation value, a distribution map showing how the first difference evaluation value changes with different bias voltage combinations can be output. When the state of a power amplifier changes and its CNMSE with the standard state output signal increases, candidate bias voltage combinations adjacent to (near) the minimum value of the first difference evaluation value are obtained from the distribution map. Here, "candidate bias voltage combinations adjacent to (near) the minimum value" refers to the region close to the current bias voltage combination after the power amplifier's state change, because bias voltage combinations found in this region are more likely to quickly and effectively improve linearity consistency. Then, the target bias voltage combination of the current power amplifier is updated with the candidate bias voltage combination and output to the corresponding power amplifier gate to update the bias voltage of the power amplifier, enabling the power amplifier to adjust to a new operating state, thereby improving its linearity consistency with the reference power amplifier and bringing it back to a state with better linearity consistency.
[0114] In this embodiment of the invention, by continuously updating the target bias voltage combination, the power amplifier can maintain operation at a relatively optimized operating point, avoiding problems such as the power amplifier operating in the nonlinear region due to unsuitable bias voltage, reducing the probability of abnormal situations (such as signal clipping, intermodulation distortion, etc.), and ensuring that the system can work continuously and stably.
[0115] Furthermore, to better explain the working principle of the present invention, the following specific embodiments are provided:
[0116] Taking a Doherty power amplifier with a center frequency of 6.8 GHz as an example, multiple amplifiers of the same model and batch were tested. For each amplifier, the power control module scanned the gate bias voltage of the power amplifier transistors in the carrier and peak paths. A broadband signal with a bandwidth of 200 MHz, a modulation mode of 64QAM, and a peak power equal to the amplifier's saturation power was used as the input signal to drive the amplifier, and the output signal was sampled. Four amplifiers (DPA1, DPA2, DPA3, and DPA4) were driven using the same signal, and the bias voltage of each amplifier was scanned to find the bias voltage with the best linearity.
[0117] See Figure 5 , Figure 5 This is a distribution diagram of the ACPR of the output signal of DPA1 provided in this embodiment of the invention as a function of bias voltage. The candidate output signal (minimum value) of DPA1 is selected as -37.91dBc. At this time, DPA1 is in the optimal linearity state. The corresponding bias voltage combinations include: VDC1 = -2.65V, VDC2 = -4.3V; VDC1 = -2.65V, VDC2 = -4.5V.
[0118] See Figure 6 , Figure 6 This is a distribution diagram of the ACPR of the output signal of DPA2 as a function of bias voltage provided in this embodiment of the invention. The candidate output signal (minimum value) of DPA2 is selected as -37.42dBc. At this time, DPA1 is in the best linearity state. The corresponding bias voltage combination is: VDC1 = -2.95V, VDC2 = -4.9V.
[0119] See Figure 7 , Figure 7 This is a distribution diagram of the ACPR of the output signal of DPA3 as a function of bias voltage provided in this embodiment of the invention. The candidate output signal (minimum value) of DPA3 is selected as -37.25dBc. At this time, DPA1 is in the best linearity state. The corresponding bias voltage combination is: VDC1 = -2.95V, VDC2 = -3.9V.
[0120] See Figure 8 , Figure 8 This is a distribution diagram of the ACPR of the output signal of DPA4 as a function of bias voltage provided in this embodiment of the invention. The candidate output signal (minimum value) of DPA4 is selected as -36.25dBc. At this time, DPA1 is in the best linearity state. The corresponding bias voltage combination is: VDC1 = -3V, VDC2 = -4.1V.
[0121] For the four candidate output signals, the power amplifier with the worst linearity among all power amplifiers in the best linearity state is selected as the reference power amplifier. That is, the power amplifier corresponding to the maximum value of the four candidate output signals is selected as the reference power amplifier. Since the candidate output signal of DPA4 is the largest, DPA4 is the reference power amplifier. Its corresponding reference bias voltage is VDC1 = -3V and VDC2 = -4.1V, while DPA1 to 3 are reference power amplifiers.
[0122] By calculating the first difference evaluation value (CNMSE) between the reference power amplifier DPA4 and the reference power amplifiers DPA1-3, the optimal bias voltage of the reference power amplifier is determined. The distribution of CNMSE between DPA1, DPA2, DPA3 and the reference power amplifier DPA4 under different bias voltage combinations is plotted, as follows: Figures 9-11 As shown.
[0123] See Figure 9 , Figure 9The figure shows the distribution of the first difference assessment value between DPA1 and the reference state as a function of the bias voltage, as provided in the embodiment of the present invention. As shown in the figure, the minimum value of the first difference assessment CNMSE between DPA1 and the reference state is -28.72dBc. At this time, the corresponding target bias voltage combination is: VDC1 = -2.65V, VDC2 = -4.1V.
[0124] See Figure 10 , Figure 10 The figure shows the distribution of the first difference assessment value between DPA2 and the reference state as a function of the bias voltage, provided by the embodiment of the present invention. As shown in the figure, the minimum value of the first difference assessment CNMSE between DPA2 and the reference state is -27dBc. At this time, the corresponding target bias voltage combination is: VDC1 = -2.95V, VDC2 = -4.7V.
[0125] See Figure 11 , Figure 11 The figure shows the distribution of the first difference assessment value between DPA3 and the reference state as a function of the bias voltage, provided by the embodiment of the present invention. As shown in the figure, the minimum value of the first difference assessment CNMSE between DPA3 and the reference state is -27.89dBc. At this time, the corresponding target bias voltage combination is: VDC1 = -2.95V, VDC2 = -3.9V.
[0126] After obtaining the target bias voltage combination of DPA1 to 3, the power control module inputs the first bias voltage VDC1 in the target bias voltage combination to the gate of the first power amplifier transistor located in the carrier path, and inputs the second bias voltage VDC2 in the target bias voltage combination to the gate of the second power amplifier transistor located in the peak path.
[0127] Furthermore, the modulation signal responses of DPA1 to DPA4 were tested under conditions of no DPD calibration (represented by W / O DPD in the figure), DPD calibration (represented by DPD in the figure), and DPD calibration after bias voltage adjustment (represented by Bias-Adjust-DPD in the figure), respectively, and their linearization effect was observed. Figures 12-15 As shown in the figure, the horizontal axis represents Frequency, in GHz; the vertical axis represents Power Spectral Density (PSD), in dBm / MHz. According to... Figures 12-15 The data can be obtained as shown in Table 1 below, where "ACPR_L" represents the power ratio of the lower neighboring channel and "ACPR_R" represents the power ratio of the upper neighboring channel.
[0128] Table 1. Measured Results of Power Amplifier
[0129]
[0130]
[0131] Combining Table 1 and Figures 12-15 It can be seen that for each DPA, the modulation signal response after DPD calibration after bias voltage adjustment has the best linearization effect, followed by the modulation signal response after DPD calibration, and finally the modulation signal response without DPD calibration.
[0132] And from Table 1 and Figures 12-15 As can be seen, after bias voltage adjustment and DPD calibration, the ACPR_L / ACPR_R of DPA1 is -43.01 / -43.02 dBc, the ACPR_L / ACPR_R of DPA2 is -42.13 / -39.13 dBc, and the ACPR_L / ACPR_R of DPA3 is -42.12 / -42.12 dBc. The linearization effect of DPA1 is better than that of DPA3, and that of DPA3 is better than that of DPA2. In the process of determining the optimal bias voltage point of each power amplifier, the CNMSE between each power amplifier and the reference state is as follows: DPA1 is -28.72 dBc, DPA2 is -27 dBc, and DPA3 is -27.89 dBc. That is, the consistency adjustment effect of DPA1 is better than that of DPA3, and that of DPA3 is better than that of DPA2. There is a positive correlation between this and the linearization effect of each power amplifier after adjustment, which proves that CNMSE can effectively evaluate the consistency between power amplifiers.
[0133] See Figure 16 , Figure 16 This is a structural block diagram of a power amplifier linearity calibration device 100 provided in an embodiment of the present invention. The power amplifier linearity calibration device 100 includes a processor 11, a memory 12, and a computer program stored in the memory 12 and executable on the processor 11. When the processor 11 executes the computer program, it implements the steps in the above embodiments of the power amplifier linearity calibration methods, such as steps S1 to S8.
[0134] For example, the computer program may be divided into one or more modules / units, which are stored in the memory 12 and executed by the processor 11 to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the linearity calibration device 100 of the power amplifier.
[0135] The power amplifier linearity calibration device 100 may include, but is not limited to, a processor 11 and a memory 12. Those skilled in the art will understand that the schematic diagram is merely an example of the power amplifier linearity calibration device 100 and does not constitute a limitation on the power amplifier linearity calibration device 100. It may include more or fewer components than illustrated, or combine certain components, or different components. For example, the power amplifier linearity calibration device 100 may also include input / output devices, network access devices, buses, etc.
[0136] The processor 11 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. The processor 11 is the control center of the power amplifier linearity calibration device 100, connecting various parts of the power amplifier linearity calibration device 100 via various interfaces and lines.
[0137] The memory 12 can be used to store the computer program and / or modules. The processor 11 implements various functions of the power amplifier linearity calibration device 100 by running or executing the computer program and / or modules stored in the memory 12 and calling the data stored in the memory 12. The memory 12 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 12 may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.
[0138] The linearity calibration device 100 for the power amplifier, if integrated into a module / unit and implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by the processor 11, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.
[0139] This invention also provides a computer program product, including computer instructions, which, when executed by a processor, implement the linearity calibration method for a power amplifier as described in the above embodiments.
[0140] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.
Claims
1. A method for calibrating the linearity of a power amplifier, characterized in that, include: The excitation signal is used to scan at least two power amplifiers in the transmission system to obtain the output signal of each power amplifier under different bias voltage combinations; Based on the output signal, a reference power amplifier is selected from all power amplifiers, and the reference bias voltage combination corresponding to the reference power amplifier is obtained; Calculate a first difference evaluation value between the first output signal and the second output signal; wherein the first output signal is the output signal of the reference power amplifier under the reference bias voltage combination, and the second output signal is the output signal of the other reference power amplifiers under different bias voltage combinations; For each reference power amplifier, the bias voltage combination corresponding to the minimum value among the first difference evaluation values is selected as the target bias voltage combination; The linearity of each reference power amplifier is calibrated using the target bias voltage combination.
2. The linearity calibration method for a power amplifier as described in claim 1, characterized in that, The step of selecting a reference power amplifier from all power amplifiers based on the output signal includes: A candidate output signal is selected from the output signals corresponding to each power amplifier; wherein, the candidate output signal is the minimum value among the output signals corresponding to each power amplifier. The power amplifier corresponding to the maximum value among the candidate output signals is selected as the reference power amplifier.
3. The linearity calibration method for a power amplifier as described in claim 2, characterized in that, The step of obtaining the reference bias voltage combination corresponding to the reference power amplifier includes: The bias voltage combination obtained when the reference power amplifier outputs the candidate output signal is the reference bias voltage combination.
4. The linearity calibration method for a power amplifier as described in claim 1, characterized in that, The calculation of the first difference evaluation value between the first output signal and the second output signal includes: The first output signal and the second output signal are input into the formula for calculating the mutual normalized mean square error to obtain the first difference evaluation value.
5. The linearity calibration method for a power amplifier as described in claim 1, characterized in that, The linearity calibration of each reference power amplifier using the target bias voltage combination includes: The target bias voltage combination is output to the gate of the corresponding reference power amplifier.
6. The linearity calibration method for a power amplifier as described in claim 1, characterized in that, After performing linearity calibration on each reference power amplifier using the target bias voltage combination, the method further includes: When a change in the state of any power amplifier is detected, a second difference evaluation value is calculated between the second output signal corresponding to the current power amplifier and the first output signal. If the second difference assessment value is greater than the first difference assessment value corresponding to the current power amplifier, update the target bias voltage combination of the current power amplifier; Linearity calibration of the current power amplifier is performed using the updated target bias voltage combination.
7. The linearity calibration method for a power amplifier as described in claim 6, characterized in that, After calculating the first difference evaluation value between the first output signal and the second output signal, the method further includes: For each reference power amplifier, output a distribution graph of the first difference assessment value as a function of different bias voltage combinations; Then, updating the target bias voltage combination of the current power amplifier includes: From the distribution map, obtain the candidate bias voltage combination adjacent to the minimum value of the first difference evaluation value; The target bias voltage combination of the current power amplifier is updated with the candidate bias voltage combination.
8. A linearity calibration device for a power amplifier, characterized in that, include: The power control module is used to scan at least two power amplifiers in the transmission system using excitation signals to obtain the output signal of each power amplifier under different bias voltage combinations. The consistency evaluation module is used to select a reference power amplifier from all power amplifiers based on the output signal and obtain the reference bias voltage combination corresponding to the reference power amplifier; calculate a first difference evaluation value between the first output signal and the second output signal; wherein, the first output signal is the output signal of the reference power amplifier under the reference bias voltage combination, and the second output signal is the output signal of the remaining reference power amplifiers under different bias voltage combinations; For each reference power amplifier, the bias voltage combination corresponding to the minimum value among the first difference evaluation values is selected as the target bias voltage combination; The power control module is also used to perform linearity calibration on each reference power amplifier using the target bias voltage combination.
9. A launching system, characterized in that, include: A beamforming module is used to adjust the first baseband signal input to the transmission system in order to perform beamforming operations; The digital predistortion module is used to compare the second baseband features of the second baseband signal with the first baseband features of the first baseband signal, and to estimate the parameters of the predistorter based on the comparison results through a parameter identification algorithm in order to compensate for the distortion caused by the power amplifier. The first signal processing module is used to convert the first baseband signal into a radio frequency signal; A power amplifier array is used to amplify the radio frequency signal; The second signal processing module is used to convert the radio frequency signal into a second baseband signal and feed the second baseband signal back to the digital predistortion module; A transmitting antenna array is used to perform beamforming based on the radio frequency signal; The linearity calibration device for the power amplifier as described in claim 8.
10. The launching system as described in claim 9, characterized in that, The power amplifier group includes at least two power amplifiers, each power amplifier including a first power amplifier transistor disposed in the carrier path and a second power amplifier transistor disposed in the peak path; wherein... The power control module inputs the first bias voltage from the bias voltage combination to the first power amplifier transistor, and inputs the second bias voltage from the bias voltage combination to the second power amplifier transistor.
11. A linearity calibration device for a power amplifier, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the linearity calibration method for a power amplifier as described in any one of claims 1 to 7.
12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the linearity calibration method for the power amplifier as described in any one of claims 1 to 7.
13. A computer program product, characterized in that, Includes a computer program / instruction that, when executed by a processor, implements the linearity calibration method for a power amplifier as described in any one of claims 1 to 7.