Voltage compensation circuit and phase-locked loop

Abstract

A voltage compensation circuit and a phase-locked loop are disclosed. The voltage compensation circuit is used to compensate a voltage on a node. The voltage compensation circuit includes a metal-oxide-semiconductor (MOS) capacitor and a current mirror. The MOS capacitor has a first end coupled to a system voltage and a second end. The current mirror is coupled to the node and includes a first branch unit and a second branch unit. The first branch unit generates a first current according to a voltage of the second end of the first MOS capacitor. The second branch unit generates a second current having a multiple relationship with the first current to adjust the voltage of the node.

Description

Technical Field

[0001] This disclosure relates to a voltage compensation circuit, and more particularly to a voltage compensation circuit for a phase-locked loop. Background Technology

[0002] Phase-locked loops (PLLs) are widely used in communication, radar, and timing systems to generate precise and stable signals. PLLs use a feedback mechanism to track the frequency and phase of the output and input signals, thus synchronizing their frequencies and phases.

[0003] Generally, a phase-locked loop (PLL) includes a phase frequency detector (PFD), a charge pump, a low-pass filter, a voltage-controlled oscillator (VCO), and a frequency divider. The frequency divider divides the PLL's output signal to generate a feedback signal, while the phase frequency detector generates a control signal based on the phase and frequency differences between the feedback signal and the reference signal, thereby adjusting the control voltage generated by the charge pump. In this way, the VCO can adjust the frequency of its output signal according to the magnitude of the control voltage generated by the charge pump. Furthermore, to prevent noise in the control voltage from causing output instability in the VCO, the PLL also uses a low-pass filter to remove high-frequency components and interference signals from the control voltage.

[0004] In existing technologies, the capacitors in low-pass filters are metal-oxide-semiconductor (MOS) capacitors, typically fabricated using high-voltage processes to reduce leakage. However, MOS capacitors fabricated using high-voltage processes have a large area, potentially occupying up to two-thirds of the total area of ​​the phase-locked loop (PLL). If a smaller, non-high-voltage process, such as a core device process, is used to fabricate the MOS capacitor, leakage problems may arise. Therefore, reducing the required circuit area of ​​the PLL while maintaining its stability has become a pressing issue in this field. Summary of the Invention

[0005] One embodiment of this disclosure provides a voltage compensation circuit for compensating voltage at a node. The voltage compensation circuit includes a first metal-oxide-semiconductor (MOS) capacitor and a current mirror. The first MOS capacitor has a first terminal and a second terminal, the first terminal of which is coupled to the system voltage. The current mirror is coupled to the node and includes a first branch unit and a second branch unit. The first branch unit generates a first current based on the voltage at the second terminal of the first MOS capacitor, and the second branch unit generates a second current that is a multiple of the first current to adjust the node voltage.

[0006] Another embodiment disclosed herein provides a phase-locked loop (PLL). The PLL includes the aforementioned voltage compensation circuit, a phase-frequency detector, a charge pump, a voltage-controlled oscillator (VCO), a frequency divider, and a low-pass filter. The phase-frequency detector generates at least one control signal based on the phase and frequency difference between a feedback signal and a reference signal. The charge pump generates a control voltage based on the control signal and outputs the control voltage through a node. The VCO generates an output signal based on the control voltage. The frequency divider divides the output signal to generate a feedback signal. The low-pass filter performs low-pass filtering on the control voltage. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a phase-locked loop according to a comparative embodiment disclosed herein;

[0008] Figure 2 This is a waveform diagram of the control voltage of a comparative embodiment disclosed herein;

[0009] Figure 3 This is a waveform diagram of the control voltage of a comparative embodiment disclosed herein;

[0010] Figure 4 This is a schematic diagram of a phase-locked loop according to an embodiment of the present disclosure;

[0011] Figure 5 yes Figure 4 A schematic diagram of the voltage compensation circuit;

[0012] Figure 6 yes Figure 4 The waveform diagram of the control voltage;

[0013] Figure 7 This is a schematic diagram of a voltage compensation circuit according to another embodiment of the present disclosure;

[0014] Figure 8 yes Figure 7 The waveform diagram of the control voltage;

[0015] Figure 9 This is a schematic diagram of a voltage compensation circuit according to another embodiment of the present disclosure;

[0016] Figure 10 This is a schematic diagram of a voltage compensation circuit according to another embodiment of the present disclosure. Detailed Implementation

[0017] Figure 1 This is a schematic diagram of a phase-locked loop 100 according to a comparative embodiment of the present invention. The phase-locked loop 100 includes a phase frequency detector 110, a charge pump 120, a voltage-controlled oscillator 130, a frequency divider 140, and a low-pass filter 150. The phase frequency detector 110 can detect based on the feedback signal SIG. FB With reference signal SIG REF The phase and frequency differences between them generate at least one control signal, such as the control signal SIG. UP and control signal SIG DN The charge pump 120 can operate based on the control signal SIG generated by the phase frequency detector 110. UP and control signal SIG DN Generate control voltage V CTRL And output control voltage V through node N1 CTRL The voltage-controlled oscillator 130 can operate according to the control voltage V. CTRL Generate output signal SIG OUT The frequency divider 140 can divide the output signal SIGOUT by frequency (that is, divide the output signal SIG...). OUT The frequency is divided by a specific value to generate the feedback signal SIG. FB .

[0018] For example, when the reference signal SIG REF The frequency is less than the feedback signal SIG FB When the frequency is specified, the phase frequency detector 110 can output a control signal SIG. UP To increase the control voltage V CTRL This increases the oscillation frequency of the voltage-controlled oscillator 130, thereby outputting a higher frequency output signal SIG. OUT Conversely, when the reference signal SIG... REF The frequency is greater than the feedback signal SIG FB When the frequency is specified, the phase frequency detector 110 can output a control signal SIG. DN To reduce the control voltage V CTRL This causes the voltage-controlled oscillator 130 to reduce its oscillation frequency, thereby outputting a lower frequency output signal SIG. OUT Through the feedback mechanism, the phase-locked loop 100 can generate accurate and stable signals.

[0019] In addition, to avoid controlling voltage V CTRLHigh-frequency noise in the circuit causes instability in the oscillation frequency of the voltage-controlled oscillator 130. The phase-locked loop 100 can control the voltage V through the low-pass filter 150. CTRL Low-pass filtering is used to eliminate high-frequency noise. For example... Figure 1 As shown, the low-pass filter 150 may include metal-oxide-semiconductor (MOS) capacitors 152 and 154 and resistor 156. MOS capacitor 152 has a first terminal and a second terminal, with the first terminal coupled to a system voltage, such as the power supply voltage VDD. Resistor 156 has a first terminal and a second terminal, with the first terminal coupled to the second terminal of MOS capacitor 152 and the second terminal coupled to node N1. MOS capacitor 154 has a first terminal and a second terminal, with the first terminal coupled to a system voltage, such as the power supply voltage VDD, and the second terminal coupled to node N1.

[0020] In some embodiments, MOS capacitors 152 and 154 can be fabricated using processes for low-voltage components. In this case, the low-pass filter 150 can have a smaller circuit area compared to MOS capacitors fabricated using high-voltage component processes. However, MOS capacitors fabricated using low-voltage component processes are generally more prone to leakage current, which may also affect the control voltage V. CTRL The offset. Figure 2 The control voltage V of this comparative embodiment is disclosed. CTRL The waveform diagram. In Figure 2 During time period T1, due to leakage current generated by capacitors 152 and 154, the control voltage V... CTRL It will be pulled up to near the power supply voltage VDD, causing the output signal SIG generated by the voltage-controlled oscillator 130 to... OUT The frequency is too high. In this case, through the feedback mechanism of the phase-locked loop 100, the phase frequency detector 110 will output a control signal SIG. DN The control voltage V generated by the pull-down charge pump 120 CTRL Therefore, during time period T2, the control voltage V CTRL It can then return to a level close to its original value. For example... Figure 2 As shown, the leakage current generated by capacitors 152 and 154 will affect the control voltage V. CTRL The drastic changes caused the stability of the phase-locked loop 100 to decrease.

[0021] Furthermore, in some embodiments, the first terminals of MOS capacitor 152 and MOS capacitor 154 may be coupled to a reference voltage VSS (e.g., ground) in the system voltage instead of the power supply voltage VDD. In this case, leakage current in MOS capacitors 152 and 154 may affect the control voltage VDD. CTRLShift towards the reference voltage VSS. Figure 3 The control voltage V of this comparative embodiment is disclosed. CTRL The waveform diagram. In Figure 4 During time period T1', due to leakage current generated by capacitors 152 and 154, the control voltage V... CTRL It will be pulled down to near the reference voltage VSS, causing the output signal SIG generated by the voltage-controlled oscillator 130 to... OUT The frequency is too low. In this case, through the feedback mechanism of the phase-locked loop 100, the phase frequency detector 110 will output a control signal SIG. UP The control voltage V generated by the pull-up charge pump 120 CTRL Therefore, during time period T2', the control voltage V CTRL It can then return to a level close to its original value. For example... Figure 3 As shown, the leakage current generated by capacitors 152 and 154 will affect the control voltage V. CTRL The drastic changes caused the stability of the phase-locked loop 100 to decrease.

[0022] Figure 4 This is a schematic diagram of a phase-locked loop 200 according to an embodiment of the present disclosure. In this embodiment, the difference between phase-locked loop 200 and phase-locked loop 100 is that phase-locked loop 200 may additionally include a voltage compensation circuit 260. The voltage compensation circuit 260 can compensate for the voltage at node N1 (which is the control voltage V in this embodiment) when capacitors 152 and 154 leak. CTRL The influence of ) can therefore make the control voltage V CTRL The voltage change is relatively gradual, thus making the output signal SIG of the phase-locked loop 200 more stable. OUT Relatively stable.

[0023] Figure 5 This is a schematic diagram of a voltage compensation circuit 260 according to an embodiment of the present disclosure. (As shown...) Figure 5 As shown, the voltage compensation circuit 260 may include a MOS capacitor C1A and a current mirror 262. The MOS capacitor C1A has a first terminal and a second terminal, and the first terminal of the MOS capacitor C1A is coupled to the system voltage, such as the power supply voltage VDD. The current mirror 262 is coupled to node N1, and the current mirror 262 may include a first branch unit 2621 and a second branch unit 2622. The first branch unit 2621 can generate a first current I1 based on the voltage of the second terminal of the MOS capacitor C1A, while the second branch unit 2622 can generate a second current I2 that is a multiple of the first current I1 to adjust the voltage of node N1.

[0024] In this embodiment, the MOS capacitor C1A and the MOS capacitor 152 in the low-pass filter 150 coupled to node N1 can be of the same type, thus simulating leakage of the MOS capacitor 152. In some embodiments, both the MOS capacitor 152 and the MOS capacitor C1A can be implemented as P-type transistors, and the first terminals of the MOS capacitor 152 and the first terminals of the MOS capacitor C1A can correspond to the source / drain of the P-type transistor, while the second terminals of the MOS capacitor 152 and the second terminals of the MOS capacitor C1A can correspond to the gate of the P-type transistor; however, this disclosure is not limited thereto.

[0025] When MOS capacitor 152 leaks current, the control voltage V will be reduced. CTRL During the pull-up process, MOS capacitor C1A may also experience leakage, pulling up the voltage at the second terminal of MOS capacitor C1A. At this time, the first branch unit 2621 will enhance the first current I1, and the second branch unit 2622 will also enhance the second current I2 drawn from node N1, thereby increasing the voltage at node N1 (which is the control voltage V in this embodiment). CTRL Pull down to achieve the effect of voltage compensation. Figure 6 The control voltage V is one embodiment disclosed herein. CTRL The waveform diagram. In Figure 6 In the diagram, the solid line L1 represents the control voltage V when the voltage compensation circuit 260 is used. CTRL The waveform, with dashed line L2 representing the control voltage V when no voltage compensation circuit is used. CTRL Waveform (i.e. equivalent to) Figure 2 (The waveform shown). Figure 6 As shown, since the voltage compensation circuit 260 can increase the current drawn from node N1 when leakage occurs in the MOS capacitors 152 and 154 in the low-pass filter 150, it can reduce the control voltage V. CTRL The variation range is adjusted to increase the stability of the phase-locked loop 200.

[0026] exist Figure 5In the first branch unit 2621, an N-type transistor N1A may be included. The N-type transistor N1A has a first terminal and a second terminal. The first terminal of the N-type transistor N1A is coupled to a reference voltage VSS (which may be, for example, ground voltage) that is less than the power supply voltage VDD. The second terminal of the N-type transistor N1A is coupled to the second terminal of the MOS capacitor C1A, and the control terminal of the N-type transistor N1A is coupled to the second terminal of the N-type transistor N1A. The second branch unit 2622 may include an N-type transistor N2A. The N-type transistor N2A has a first terminal and a second terminal. The first terminal of the N-type transistor N2A is coupled to the reference voltage VSS. The second terminal of the N-type transistor N2A is coupled to node N1, and the control terminal of the N-type transistor N2A is coupled to the control terminal of the N-type transistor N1A. In the description of this disclosure, the first terminal, second terminal, and control terminal of the transistor may, for example, be the source, drain, and gate of the transistor, respectively. However, this disclosure is not limited thereto.

[0027] Furthermore, in some embodiments, the area of ​​MOS capacitor 152 can be N times the area of ​​MOS capacitor C1A, and by adjusting the width-to-length ratio of N-type transistors N1A and N2A, the second current I2 can be M times the first current I1 (for example, the width-to-length ratio of N-type transistor N2A can be M times the width-to-length ratio of N-type transistor N1A), where N and M are greater than 1. In this way, a smaller area of ​​MOS capacitor C1A can be used to simulate the leakage current of MOS capacitor 152. In some embodiments, N and M can be equal; however, this disclosure is not limited to this.

[0028] Furthermore, in Figure 5 In some embodiments, the low-pass filter 150 is coupled to the power supply voltage VDD via MOS capacitors 152 and 154; however, this disclosure is not limited thereto. In some embodiments, the low-pass filter 150 may also be coupled to the reference voltage VSS via a MOS capacitor.

[0029] Figure 7 This is a schematic diagram of a voltage compensation circuit 360 according to an embodiment of the present disclosure. In this embodiment, the charge pump 120 can output a control voltage V through node N1. CTRL , Figure 7 and Figure 5 The main difference is that, Figure 7 The low-pass filter 150' can be coupled to the reference voltage VSS through MOS capacitors 152' and 154', and Figure 7 The voltage compensation circuit 360 can replace Figure 5A voltage compensation circuit 260 is provided. The voltage compensation circuit 360 may include a MOS capacitor C1B and a current mirror 362. The MOS capacitor C1B has a first terminal and a second terminal, and the first terminal of the MOS capacitor C1B is coupled to the system voltage, for example, a reference voltage VSS. The current mirror 362 is coupled to node N1, and the current mirror 362 may include a first branch unit 3621 and a second branch unit 3622. The first branch unit 3621 can generate a first current I1 based on the voltage at the second terminal of the MOS capacitor C1B, while the second branch unit 3622 can generate a second current I2 that is a multiple of the first current I1 to adjust the voltage at node N1.

[0030] Specifically, when the MOS capacitor C1B leaks current, the voltage at the second terminal of the MOS capacitor will be pulled down. At this time, the first branch unit 3621 will correspondingly increase the first current I1, and the second branch unit 3622 will correspondingly increase the second current I2 flowing into node N1, thereby pulling up the voltage of node N1 (which is the control voltage V in this embodiment). CTRL ). Figure 8 The control voltage V is one embodiment disclosed herein. CTRL The waveform diagram. In Figure 8 In the diagram, the solid line L1' represents the control voltage V when the voltage compensation circuit is used at 360 degrees. CTRL The waveform, with the dashed line L2' representing the control voltage V when no voltage compensation circuit is used. CTRL Waveform (i.e. equivalent to) Figure 3 (The waveform shown). Figure 8 As shown, since the voltage compensation circuit 360 can increase the current flowing into node N1 when leakage occurs in the MOS capacitors 152' and 154' in the low-pass filter 150', it can reduce the control voltage V. CTRL The variation range is adjusted to increase the stability of the phase-locked loop 200.

[0031] In this embodiment, the first branch unit 3621 may include a P-type transistor P1B. The P-type transistor P1B has a first terminal, a second terminal, and a control terminal. The first terminal of the P-type transistor P1B is coupled to the power supply voltage VDD, the second terminal of the P-type transistor P1B is coupled to the second terminal of the MOS capacitor C1B, and the control terminal of the P-type transistor P1B is coupled to the second terminal of the P-type transistor P1B. The second branch unit 3622 may include a P-type transistor P2B. The P-type transistor P2B has a first terminal and a second terminal. The first terminal of the P-type transistor P2B is coupled to the power supply voltage VDD, the second terminal of the P-type transistor P2B is coupled to node N1, and the control terminal of the P-type transistor P2B is coupled to the control terminal of the P-type transistor P1B.

[0032] Furthermore, in some embodiments, both MOS capacitor 152' and MOS capacitor C1B may be capacitors implemented using N-type transistors, and the first terminal of MOS capacitor 152' and the first terminal of MOS capacitor C1B may correspond to the source / drain of the N-type transistor, while the second terminal of MOS capacitor 152' and the second terminal of MOS capacitor C1B may correspond to the gate of the N-type transistor. However, this disclosure is not limited thereto.

[0033] Figure 9 This is a schematic diagram of a voltage compensation circuit 460 according to another embodiment of the present disclosure. Figure 9 and Figure 5 The main difference is that, Figure 9 The voltage compensation circuit 460 can replace Figure 5 Voltage compensation circuit 260. Voltage compensation circuit 460 may include current mirror 262, MOS capacitor C1A and control unit 464.

[0034] Specifically, the control unit 464 may include a P-type transistor P3C, an N-type transistor N3C, a resistor R1C, and a current source CS1. The P-type transistor P3C has a first terminal, a second terminal, and a control terminal. The first terminal of the P-type transistor P3C is coupled to the second terminal of the MOS capacitor C1A, and the second terminal of the P-type transistor P3C is coupled to the current mirror 262. In this embodiment, the second terminal of the P-type transistor P3C may be coupled to the second terminal of the N-type transistor N1A in the current mirror 262. The N-type transistor N3C has a first terminal, a second terminal, and a control terminal. The first terminal of the N-type transistor N3C is coupled to the control terminal of the P-type transistor P3C, and the control terminal of the N-type transistor N3C is coupled to node N1. The resistor R1C has a first terminal and a second terminal. The first terminal of the resistor R1C is coupled to the power supply voltage VDD, and the second terminal of the resistor R1C is coupled to the second terminal of the N-type transistor N3C. The current source CS1 is coupled to the first terminal of the N-type transistor N3C.

[0035] In this embodiment, when the MOS capacitor 152 leaks current, the control voltage V... CTRL The circuit will be pulled up, at which point the N-type transistor N3C and the P-type transistor P3C will be turned on, thereby activating the current mirror 262. This causes the first branch unit 2621 to generate the first current I1, and the second branch unit 2622 to draw the second current I2 from node N1, thereby adjusting the control voltage V. CTRL Drag down to the original level.

[0036] In this embodiment, the control unit 464 can make the voltage VC at the second terminal of the MOS capacitor C1A approach the voltage of node N1 (which is the control voltage V in this embodiment). CTRLThis helps the voltage compensation circuit 460 to more accurately compensate for the leakage current generated by the MOS capacitors 152 and 154. In addition, the control unit 464 also helps to eliminate the second-order effect caused by the mismatch between the N-type transistors N1A and N2A in the current mirror 262, thus also helping to improve the accuracy of compensation.

[0037] Figure 10 This is a schematic diagram of a voltage compensation circuit 560 according to another embodiment of the present disclosure. Figure 10 and Figure 7 The main difference is that, Figure 10 The voltage compensation circuit 560 can replace Figure 7 The voltage compensation circuit 560 may include a current mirror 362, a MOS capacitor C1B, and a control unit 564.

[0038] Specifically, the control unit 564 may include a P-type transistor P3D, an N-type transistor N3D, a resistor R1D, and a current source CS2. The N-type transistor N3D has a first terminal, a second terminal, and a control terminal. The first terminal of the N-type transistor N3D is coupled to the second terminal of the MOS capacitor C1B, and the second terminal of the N-type transistor N3D is coupled to the current mirror 362. In this embodiment, the second terminal of the N-type transistor N3D may be coupled to the second terminal of the P-type transistor P1B in the current mirror 262. The P-type transistor P3D has a first terminal, a second terminal, and a control terminal. The second terminal of the P-type transistor P3D is coupled to the control terminal of the N-type transistor N3D, and the control terminal of the P-type transistor P3D is coupled to node N1. The resistor R1D has a first terminal and a second terminal. The first terminal of the resistor R1D is coupled to the reference voltage VSS, and the second terminal of the resistor R1D is coupled to the second terminal of the P-type transistor P3D. The current source CS2 is coupled to the first terminal of the P-type transistor P3D.

[0039] In this embodiment, when the MOS capacitor 152' leaks current, the control voltage V... CTRL The current will be pulled down, at which point the P-type transistor P3D and the N-type transistor N3D will be turned on, thereby activating the current mirror 362. This causes the first branch unit 3621 to generate the first current I1, and the second branch unit 3622 to generate the second current I2, which flows into node N1, thereby controlling the voltage V. CTRL Pull up to the original level.

[0040] In the foregoing embodiments, voltage compensation circuits 260, 360, 460, and 560 can be applied to phase-locked loops; however, this disclosure is not limited thereto. In some embodiments, voltage compensation circuits 260, 360, 460, and 560 can also be applied to other circuits that include MOS capacitors or low-pass filters, and can similarly be used to compensate the voltage at nodes coupled to MOS capacitors or low-pass filters.

[0041] In summary, the voltage compensation circuit and phase-locked loop provided in the embodiments disclosed herein can compensate for voltage changes caused by leakage current in the MOS capacitor. Therefore, even if a low-voltage component process is used to fabricate the MOS capacitor in the low-pass filter to reduce the circuit area, the circuit output can still remain stable. Furthermore, the voltage compensation circuit provided in the embodiments disclosed herein requires only a small number of electronic components to achieve the voltage compensation effect, thus avoiding excessive increase in the overall circuit complexity and making it widely applicable in various circuits.

[0042] Symbol Explanation

[0043] 100, 200: Phase-locked loop

[0044] 110: Phase and frequency detector

[0045] 120: Charge Pump

[0046] 130: Voltage-controlled oscillator

[0047] 140: Frequency divider

[0048] 150,150': Low-pass filter

[0049] 152, 154, 152', 154': MOS capacitors

[0050] 156, 156', R1C, R1D: Resistors

[0051] N1A, N2A, N3C, N3D: N-type transistors

[0052] SIGREF: Reference signal

[0053] SIGFB: Feedback Signal

[0054] SIGUP, SIGDN: Control signals

[0055] SIGOUT: Output signal

[0056] VCTRL: Control voltage

[0057] N1: Node

[0058] VDD: Power supply voltage

[0059] T1, T2, T1', T2': Time period

[0060] 260, 360, 460, 560: Voltage compensation circuit

[0061] 262,362: Current mirror

[0062] C1A, C1B: MOS capacitors

[0063] 2621, 2622, 3621, 3622: Branch units

[0064] I1, I2: Current

[0065] VSS: Reference voltage

[0066] L1, L1': Solid lines

[0067] L2, L2': Dashed lines

[0068] P1B, P2B, P3C, P3D: N-type transistors

[0069] 464, 564: Control Unit

[0070] CS1, CS2: Current sources

[0071] VC: Voltage

Claims

1. A voltage compensation circuit for compensating the voltage at a node, comprising: A first MOS capacitor has a first terminal coupled to a system voltage and a second terminal; and A current mirror, coupled to the node, comprises: A first branch unit is configured to generate a first current based on the voltage at the second terminal of the first MOS capacitor; and A second branch unit is used to generate a second current that is a multiple of the first current to adjust the voltage of the node.

2. The voltage compensation circuit of claim 1, wherein the node is coupled to the system voltage via a filter including a second MOS capacitor, and the first MOS capacitor and the second MOS capacitor are capacitors of the same type.

3. The voltage compensation circuit as described in claim 2, wherein the system voltage is a power supply voltage, and when the voltage at the second terminal of the first MOS capacitor is pulled up, the first branch unit enhances the first current, and the second branch unit enhances the second current drawn from the node, thereby pulling down the voltage of the node.

4. The voltage compensation circuit as described in claim 3, wherein: The first branch unit includes a first N-type transistor, having a first terminal coupled to a reference voltage less than the power supply voltage, a second terminal coupled to the second terminal of the first MOS capacitor, and a control terminal coupled to the second terminal of the first N-type transistor; and The second branch unit includes a second N-type transistor having a first terminal coupled to the reference voltage, a second terminal coupled to the node, and a control terminal coupled to the control terminal of the first N-type transistor.

5. The voltage compensation circuit as claimed in claim 2, wherein the system voltage is a reference voltage, and when the voltage at the second terminal of the first MOS capacitor is pulled down, the first branch unit enhances the first current, and the second branch unit enhances the second current flowing into the node, thereby pulling up the voltage of the node.

6. The voltage compensation circuit as described in claim 5, wherein: The first branch unit includes a first P-type transistor, having a first terminal coupled to a power supply voltage greater than the reference voltage, a second terminal coupled to the second terminal of the first MOS capacitor, and a control terminal coupled to the second terminal of the first P-type transistor; and The second branch unit includes a second P-type transistor having a first terminal coupled to the power supply voltage, a second terminal coupled to the node, and a control terminal coupled to the control terminal of the first P-type transistor.

7. The voltage compensation circuit as claimed in claim 2 further includes a control unit for making the voltage at the second terminal of the first MOS capacitor approach the voltage of the node.

8. The voltage compensation circuit of claim 7, wherein the system voltage is a power supply voltage, and the control unit comprises: A third P-type transistor has a first terminal coupled to the second terminal of the first MOS capacitor, a second terminal coupled to the current mirror, and a control terminal. A third N-type transistor has a first terminal coupled to the control terminal of the third P-type transistor, a second terminal, and a control terminal coupled to the node. A resistor having a first terminal coupled to the power supply voltage and a second terminal coupled to the second terminal of the third N-type transistor; and A current source is coupled to the first terminal of the second N transistor.

9. The voltage compensation circuit as described in claim 8, wherein: The first branch unit includes a first N-type transistor, having a first terminal coupled to a reference voltage less than the power supply voltage, a second terminal coupled to the second terminal of the third P-type transistor, and a control terminal coupled to the second terminal of the first N-type transistor; and The second branch unit includes a second N-type transistor having a first terminal coupled to the reference voltage, a second terminal coupled to the node, and a control terminal coupled to the control terminal of the first N-type transistor.

10. The voltage compensation circuit of claim 7, wherein the system voltage is a reference voltage, and the control unit comprises: A third N-type transistor has a first terminal coupled to the second terminal of the first MOS capacitor, a second terminal coupled to the current mirror, and a control terminal. A third P-type transistor has a first terminal, a second terminal coupled to the control terminal of the third N-type transistor, and a control terminal coupled to the node. A resistor having a first terminal coupled to the reference voltage and a second terminal coupled to the second terminal of the third P-type transistor; and A current source is coupled to the first terminal of the second P transistor.

11. The voltage compensation circuit as described in claim 10, wherein: The first branch unit includes a first P-type transistor, having a first terminal coupled to a power supply voltage greater than the reference voltage, a second terminal coupled to the second terminal of the third N-type transistor, and a control terminal coupled to the second terminal of the first P-type transistor; and The second branch unit includes a second P-type transistor having a first terminal coupled to the power supply voltage, a second terminal coupled to the node, and a control terminal coupled to the control terminal of the first P-type transistor.

12. The voltage compensation circuit as claimed in claim 2, wherein the area of ​​the second MOS capacitor is N times the area of ​​the first MOS capacitor, and the second current is M times the first current, wherein N and M are greater than 1.

13. A phase-locked loop, comprising: The voltage compensation circuit as described in claim 1; A phase-frequency detector for generating at least one control signal based on the phase and frequency difference between a feedback signal and a reference signal; A charge pump is used to generate a control voltage based on the control signal and output the control voltage through the node; A voltage-controlled oscillator is used to generate an output signal based on the control voltage; A frequency divider is used to divide the output signal to generate the feedback signal; A low-pass filter is used to perform low-pass filtering on the control voltage.

14. The phase-locked loop of claim 13, wherein the low-pass filter includes a second MOS capacitor, and the first MOS capacitor and the second MOS capacitor are capacitors of the same type.

15. The phase-locked loop of claim 14, wherein the first MOS capacitor and the second MOS capacitor are manufactured using a process for manufacturing low-voltage components.

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