Communication method of bus type fire linkage control system

Abstract

The application discloses a communication method of a bus type fire linkage control system, which comprises the following steps: a host computer generates and sends a control instruction frame to a bus; the control instruction frame comprises a start bit, an address identification bit, control data and an end bit; the start bit is a first logic bit, which is used for identifying the start of the control instruction frame; the address identification bit is a second logic bit, the ratio of the high-level duration to the low-level duration of the second logic bit is a preset discrete ratio value, and different ratio values correspond to different continuous address start numbers; the control data comprises a plurality of third logic bits, the ratio of the high-level duration to the period of each third logic bit is a preset discrete ratio value, and different ratio values correspond to different action state of the controlled equipment; the end bit is a fourth logic bit, which is used for identifying the end of the control instruction frame; a slave computer synchronously receives the whole frame of control instruction and identifies the action state instruction sent by the host computer and needed to be executed by the slave computer. The application realizes the multi-state control of the plurality of slaves of the continuous address and efficient communication.

Description

Technical Field

[0001] This application relates to the technical field of fire protection communication, specifically to a communication method for a bus-type fire linkage control system. Background Technology

[0002] In the field of fire control, fire alarm systems, due to their complexity and importance, have strictly standardized system structures. This requires alarm systems and control systems to use different products or different bus loops to ensure the safety and reliability of each system. The fire linkage control system plays a crucial role. It receives signals from the alarm system and, based on the area where the fire alarm signal is located, controls the actions of related equipment according to predetermined logic. This includes emergency lighting indicators, fire broadcasts, and various field control devices such as fans, valves, smoke exhaust valves, and fresh air units, all of which require control by the linkage control system during a fire. With the continuous development of building systems, the scale of fire alarm systems is expanding, and the types and numbers of equipment involved in the linkage control system are becoming increasingly complex. To ensure the normal operation of all linked equipment, the linkage control system needs to monitor the operating status of each linked device during normal operation.

[0003] In existing technologies, a bus system architecture is typically used to address the issues of monitoring the status of linked devices and transmitting control commands. This means that the monitoring status of linked devices is transmitted via a bus, and control commands are also transmitted via the bus to start or stop specific devices. In bus communication, all slave devices / nodes on the bus must have a unique address code. This address code is used to identify whether a control command is addressed to them, and then to respond to or execute the control command. When a fire occurs in a large-scale facility, it is often necessary to control several linked devices simultaneously. These devices are often located in relatively concentrated areas and may belong to the same control host or even the same control loop. In this situation, if the controlled devices need to execute different control commands, the linked control system can only issue control commands to each of the controlled slave devices / nodes one by one to control the predetermined slave devices / nodes to perform the relevant actions.

[0004] Fire protection systems have two dedicated bus lines that simultaneously provide power and facilitate data communication. This differs from conventional byte-based bus communication (such as RS485), requiring specific data structures on the bus. Typically, the master unit uses voltage transitions to send information, while the slave unit uses current-based responses. Due to these unique application requirements, the communication speed of the fire protection two-bus system is generally low. When a large number of devices need to be controlled on the same bus, the communication mode of issuing control commands one by one exhibits significant lag, sometimes lasting several seconds. For high-risk locations or locations with special requirements and stringent control performance, conventional communication technologies are insufficient. Summary of the Invention

[0005] To address the delay caused by sending control commands one by one when a large number of control demands are concentrated in fire-fighting linkage control, and to realize multi-state control of multiple slave devices with consecutive addresses and improve transmission efficiency, this application provides a communication method for a bus-type fire-fighting linkage control system.

[0006] Firstly, this application provides a communication method for a bus-type fire alarm linkage control system, applied to a host computer, comprising: Generate and send multiple control instruction frames for slave devices with consecutive addresses to the bus; the control instruction frame includes: a start bit, an address identification bit, control data, and an end bit; The control data consists of several logical bits: a start bit (first logic bit) indicating the beginning of the control command frame and distinguishing between control commands and other communication commands; an address identification bit (second logic bit) indicating N consecutive slave addresses; the ratio of the high-level duration to the low-level duration of the address identification bit is a preset first discrete ratio, with different preset first discrete ratios corresponding to different starting numbers of consecutive addresses; N third logic bits, each with the same and fixed period, arranged in a specific order to correspond one-to-one with the N consecutive slave addresses identified by the address identification bit; the ratio of the high-level duration to the period of each third logic bit is a preset second discrete ratio, with different preset second discrete ratios corresponding to different operating states of the controlled device; and an end bit (fourth logic bit) indicating the end of the control command frame. The transmission of the control command frame enables all slave devices on the bus to synchronously receive the entire frame of control commands. Each slave device determines its logical bit sequence number in the control data based on the difference between its own address code and the starting number indicated by the address identification bit. Based on the high level ratio of the third logical bit corresponding to the logical bit sequence number, it identifies the action status command sent by the master that it needs to execute and executes the corresponding output control.

[0007] By adopting the above scheme, control command frames for multiple slave devices with consecutive addresses are generated. The start and end bits effectively identify the start and end of the command frame. By using the correspondence between the discrete ratio of the address identification bits and the starting number of the consecutive addresses, and the correspondence between the discrete ratio of each third logic bit of the control data and the action status of the controlled device, the slave devices on the bus can quickly and accurately identify the action status commands sent by the master that they need to execute. This enables multi-state control of multiple slave devices with consecutive addresses using a single command frame, improving the communication efficiency and response speed of fire linkage control.

[0008] Preferred options also include: When the host output port is high, the start bit is the time that remains low after a high-to-low transition, and the duration is an integer multiple of the third logic bit period; the end bit is the time that remains high after a low-to-high transition, and the duration is an integer multiple of the third logic bit period; each logic bit in the address identification bit and control data starts with a high level and ends with a low level, and the period length of each third logic bit in the control data is equal; When the host output port is low, the start bit is the time that the host remains high after a transition from low to high, and the end bit is the time that the host remains low after a transition from high to low. In addition, each logic bit in the address identification bit and control data starts with a low level and ends with a high level. The host is connected to the bus through hardware circuitry, and selects different initial level states for the host port output according to the hardware circuitry. The different initial level states for the host port output include: the host output port is at a high level or the host output port is at a low level.

[0009] By adopting the above scheme, the level changes and durations of each part of the control command frame can be flexibly set according to the default level of the host output port, ensuring the correct transmission and reception of control command frames under different hardware circuit conditions, and improving the compatibility and stability of the communication method.

[0010] Preferably, the start bit, address identification bit, control data, and end bit are output sequentially and continuously without interval pulses, and the high and low levels of the second and third logic bits are both non-zero durations.

[0011] By adopting the above scheme, the continuity and stability of control command frame transmission are ensured, interference caused by interval pulses is avoided, and the constant logic bit period and the duration of non-zero high and low levels ensure that the slave device accurately identifies command information, thereby improving the accuracy and reliability of communication.

[0012] Preferred options also include: The two systems are connected to the bus via the same hardware circuit, and generate and send control command frames for controlling the slave device's actions and inspection command frames for querying the slave device's status. The control command frames and inspection command frames are distinguished by the duration of the start bit.

[0013] By adopting the above scheme, the same hardware circuit generates and sends control command frames and inspection command frames separately through software timing. The two command frames are distinguished by the duration of the start bit level, thus realizing the integration of control and inspection functions without affecting the original inspection function, thereby improving overall efficiency and resource utilization.

[0014] Preferably, the preset first discrete ratio is selected from a set of predefined, distinct first discrete ratios, and each first discrete ratio uniquely corresponds to the starting number of a continuous address.

[0015] By adopting the above scheme, the first discrete ratio is determined to be a predefined and distinct discrete value, and each discrete value corresponds to the starting number of a continuous address, so that the host can accurately control the slave devices within the corresponding address range, thereby improving the accuracy and efficiency of control command transmission.

[0016] Preferably, the preset second discrete ratio is selected from a set of predefined, distinct second discrete ratios, each second discrete ratio uniquely corresponding to an action state of the controlled device.

[0017] By adopting the above scheme, the second discrete ratio is determined to be a predefined and distinct discrete value, and each discrete value corresponds to an action state. This enables richer and more diverse device action control in a single frame of control instructions, improving the control efficiency and targeting of multiple slave devices with consecutive addresses.

[0018] Preferably, all slave addresses on the same bus are divided into multiple consecutive address groups, each address group containing the same number of addresses as the number of third logic bits in the control data, and each group is covered by an independent control instruction frame.

[0019] By adopting the above scheme, all slave addresses on the bus are grouped and managed using independent control command frames, thereby achieving efficient control of multiple slave addresses with consecutive addresses.

[0020] Preferably, the number of action states represented by any third logic bit in the control data is not less than 2, and the difference between the high-level duration representing each action state and the period of the third logic bit is not less than 1 / 10 of the period of the third logic bit.

[0021] By adopting the above scheme, any third logic bit in the control data can represent no less than two action states, meeting the diverse control requirements of different controlled devices and improving control efficiency; the difference between the high-level duration representing each action state and the period of the third logic bit is not less than 1 / 10 of the period of the third logic bit, ensuring sufficient time difference between different action states, enabling bus communication and slave devices to accurately identify each action state, avoiding state identification errors due to excessively small time differences, and improving the accuracy and reliability of control.

[0022] Preferably, the method further includes a closed-loop response step, the closed-loop response step comprising: While sending control command frames to the bus, the host synchronously monitors the current changes on the bus. The host is configured to: for the Mth third logical bit of the control data in the control instruction frame it sends, when At that time, the host expects to detect a pull-up current signal on the bus within the period of the (M+1)th third logic bit it transmits; for the Nth third logic bit in the control data it transmits, the host expects to detect a pull-up current signal on the bus within the period of the end bit transmitted immediately following the control data; the signal width of the pull-up current is less than the period of the third logic bit. If the host does not detect a pull-up current signal during the period of sending the (M+1)th third logic bit, it determines that the slave device with address number M has an abnormal response and executes a preset abnormality handling strategy; if the host does not detect a pull-up current signal during the period of sending the end bit, it determines that the slave device with address number N has an abnormal response and executes a preset abnormality handling strategy; the preset abnormality handling strategy includes: retransmitting the control command frame once, or exempting it from retransmission based on the known fault status of the corresponding slave device.

[0023] By adopting the above scheme, based on the communication method where the master sends control command frames and the slave quickly and accurately identifies the action status command sent by the master that needs to be executed by itself, a slave response pull current is further set up to build a joint architecture of basic communication method and response closed-loop control. In the bit structure communication mode, it can quickly identify whether the corresponding address has been effectively received and executed as a control command, thus ensuring the accuracy of the communication process.

[0024] In summary, this application has the following beneficial effects: 1. By generating and sending multiple slave control command frames to two buses with consecutive addresses, all slaves on the bus can synchronously receive the entire frame of control commands. Each slave determines its logical bit sequence number in the control data based on the difference between its own address code and the starting number indicated by the address identification bit. Based on the high level ratio of the third logical bit corresponding to the logical bit sequence number, it identifies the action status command sent by the master that it needs to execute and executes the corresponding control action. This efficiently completes the transmission of multi-state control commands to multiple slaves with consecutive addresses in one frame of command, meeting the rapid communication requirements of fire protection joint control. 2. The host selects and sets the initial level of the control command frame according to its own hardware circuit requirements. It continuously outputs the start bit, address identification bit, control data, and end bit through uninterrupted pulses. It generates and sends control command frames and inspection command frames respectively using the same hardware circuit. It sets the high level ratio of the corresponding logic bits of the address identification bit and control data, divides all slave addresses on the same bus into multiple consecutive address groups, and ensures the number of action states and the difference between states represented by the third logic bit in the control data. This ensures the stable transmission and accurate identification of the control command frame under different conditions, improves the reliability and efficiency of communication, and relies entirely on the existing hardware circuit without the need for hardware modifications. 3. Based on the communication method where the master sends control command frames and the slave on the bus quickly and accurately identifies the action status commands sent by the master that need to be executed by itself, a slave response pull current is further designed to realize the joint protection of basic communication and response closed-loop control, thereby further ensuring the accuracy of the communication process. Attached Figure Description

[0025] Figure 1 This is a flowchart illustrating the communication method of the bus-type fire alarm linkage control system described in a specific embodiment; Figure 2 This is a timing diagram of the control command frame in the communication method of the bus-type fire linkage control system described in a specific embodiment; Figure 3 This is a schematic diagram illustrating the timing of the state representation of control data in the control command frame in the communication method of the bus-type fire linkage control system described in a specific embodiment; Figure 4 This is a timing diagram of the closed-loop response step in the communication method of the bus-type fire linkage control system described in a specific embodiment. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0027] To improve the communication effectiveness of fire alarm linkage control and reduce lag, the current fire alarm linkage control system is constrained by the special application requirements of the two-bus fire alarm system. It needs to provide power and achieve data communication simultaneously, with long distances and numerous devices. Improving the communication speed to overcome the lag phenomenon described in the background technology is difficult or would require high costs, thus ruling out solutions that increase speed. Considering that the linkage control is an independent bus, dedicated communication control commands can be set to distinguish it from regular inspection commands. In the absence of a fire alarm, regular inspection commands are used to send commands to the host to inspect the status of slave devices, collecting their status data. When a fire alarm occurs, the host issues dedicated control commands. Through action control status bits constructed from logical bits, multiple slave devices can be controlled simultaneously within a single command frame, ensuring that the controlled devices can perform various actions. This improves transmission efficiency, avoids the lag problem caused by sending control commands one by one, and does not affect normal inspection functions. It should be noted that this application only improves the communication protocol based on the existing bus communication circuit, without involving hardware modifications. The communication waveforms are directly related to the corresponding ports of the host or slave processor to illustrate the implementation of this method.

[0028] Example 1 Based on the above analysis, such as Figure 1 As shown in the illustration, this application discloses a communication method for a bus-type fire alarm linkage control system, including steps such as generating and sending control command frames, and all slave devices on the bus receiving and executing commands. Specifically, the master unit generates and sends control command frames to multiple slave devices with consecutive addresses on both buses. All slave devices on the bus synchronously receive the entire control command frame, and each slave device identifies the action status command sent by the master unit that it needs to execute, and performs the corresponding control action. This embodiment mainly uses the generation of special control command frames, which can control multiple slave devices with consecutive addresses through a single command frame, thereby improving the communication efficiency of fire alarm linkage control and reducing latency. The following is a further detailed description of this embodiment.

[0029] S1. The host generates and sends multiple slave control command frames to the bus, which are directed to consecutive addresses.

[0030] like Figure 2 As shown, the control command frame is composed of multiple logic bits sequentially. Each logic bit is a signal unit that is continuous in time and has a specific level change pattern to carry different information. Specifically, it includes: a start bit (TS), an address identification bit (TA), control data (TD), and an end bit (TP). The command structure adopts an ultra-short mode to save transmission time. Furthermore, to ensure the integrity and accuracy of the control command frame and avoid information transmission errors caused by intermittent pulses or abnormal levels, the start bit, address identification bit, control data, and end bit of the control command frame are output sequentially and continuously without intermittent pulses. The period of all logic bits is constant, and the high and low levels of the logic bits for the address identification bit and the control data are both non-zero durations.

[0031] For ease of explanation, it is stipulated here that the microprocessor's output port is high when the bus is at rest, so as to keep the output bus in a high voltage state, which is conducive to the bus supplying power to the slave end; if the bus achieves a high voltage state when the control port outputs a low level, which is conducive to the bus supplying power to the slave end, then it is only necessary to invert all the above logic. Hardware inversion measures or software inversion measures can be used.

[0032] The start bit TS is a single logic bit, designated as the first logic bit, used to identify the start of the control command frame. Based on the aforementioned rules, the host output port defaults to a high level. The start bit is the duration of the transition from a high level in the idle state to a low level, denoted by TS. The duration of the start bit TS is an integer multiple of the logic bit period in the control data. For example, TS can be set to 5 times the logic bit period T in the control data, i.e., TS = 5T. It is important to note that the duration of the period T is related to the specific hardware circuit used to ensure normal communication and cannot be increased indefinitely.

[0033] The address identification bit TA is used to set the corresponding address range, representing the starting address number of that range. Specifically, the address identification bit TA is a single logic bit, referred to as the second logic bit. Based on the aforementioned rules, the second logic bit starts with a high level and ends with a low level. The ratio of the high level duration to the low level duration is a preset first discrete ratio, and different preset first discrete ratios correspond to different consecutive address starting numbers.

[0034] A typical two-bus architecture supports no more than 256 slave devices. To ensure the efficiency of control commands and prevent them from being verbose and susceptible to interference, this embodiment pre-defines the control data TD of the control commands as 8 bytes, which can constitute 64 logical bits, denoted as the third logical bit. This means that each frame of control commands controls 64 slave devices. The 256 slave addresses are divided into four groups, corresponding to slave address numbers: 0–63, 64–127, 128–191, and 192–255. The address identification bits represent address numbers 0, 64, 128, and 192, respectively, and each address identification bit must consist of four states. Thus, all slave addresses on the same bus are divided into multiple consecutive address groups, each containing the same number of addresses as the number of third logical bits in the control data. Each group is covered by an independent control command frame.

[0035] Specifically, the address identifier bit TA can be set to 5 times the period of the third logic bit T, i.e., TA = 5T. The ratio of the high-level duration to the low-level duration of the address identifier bit (the preset first discrete ratio) is taken from the set {1:4, 2:3, 3:2, 4:1}, which correspond to the consecutive address starting numbers 0, 64, 128, and 192, respectively. That is, a high-level percentage of 1 / 5 represents address number 0, a high-level percentage of 2 / 5 represents address number 64, a high-level percentage of 3 / 5 represents address number 128, and a high-level percentage of 4 / 5 represents address number 192, with the high level preceding the low level.

[0036] The control data TD consists of action control status bits of several linked devices with consecutive addresses. The sequence number of the action control status bits in the control data is the address number of the controlled device (which can be obtained by combining the address identification bit representing the start address number of the control instruction in this frame). Each controlled device's action control status bit occupies only one third logic bit. In actual controlled devices, some linked devices only require two status bits to achieve control, such as fan start / stop, while other devices require multiple status bits for control. For example, bidirectional evacuation indicator lights need four control states: all off, left on, right on, and all on, to correctly indicate evacuation; roller shutters need to be controlled to descend to 1 / 4, 2 / 4, 3 / 4 positions, and fully closed. Therefore, the action control status bit composed of one third logic bit needs to meet the requirements of multiple action states. Conventional "binary" logic cannot meet the design requirements, so to improve communication efficiency, the action control status bit is composed of one third logic bit containing multiple action states. The number of action states represented by any third logic bit in the control data is not less than 2, and the difference between the high-level duration representing each action state and the period of the third logic bit is not less than 1 / 10 of the period of the third logic bit. This ensures that there is sufficient time difference between different action states, so that bus communication and slave devices can clearly and accurately identify each action state, avoid state identification errors due to too small time difference, and improve the accuracy and reliability of system control.

[0037] The following example, using an action control status bit that occupies one third logic bit in the control data, illustrates how one third logic bit can represent multiple action states to control the device to execute multiple action state controls.

[0038] In fire protection systems, the buses used to connect to field equipment are generally two-wire buses, providing power and enabling data communication simultaneously. Therefore, the data structure for this communication has specific requirements. To allow a single third logic bit to represent multiple states, saving transmission time while maintaining the basic configuration of the third logic bit, the proportion of the high-level signal is changed while keeping the third logic bit period constant, thus using only one third logic bit to constitute multiple states. Sufficient time difference exists between each state to meet the requirements of bus communication and the recognition by the slave processor. The specific third logic bit period T and the high-level time t can be adjusted according to the specific bus circuit to obtain a reasonably allocated set of logic states to meet engineering needs. Specifically, the control data TD contains several third logic bits, each with the same and fixed period (based on the aforementioned rules, each third logic bit starts with a high level and ends with a low level); for example... Figure 3As shown, the ratio of the high-level duration to the period of each logic bit in the control data (the second preset discrete value) is taken from the set {1:5, 2:5, 3:5, 4:5}, which correspond to four different action states, from state 1 to state 4. This realizes the use of one third logic bit to obtain four states, each state corresponding to a control requirement. The meanings of these four different action states vary depending on the type of linkage device.

[0039] In this embodiment, the control data is 8 bytes, containing 64 third logic bits, corresponding to 64 consecutive slave addresses. The period of each logic bit is marked T, with high level first and low level last. Taking the commonly used communication rate of 2000bps as an example, the period T of the third logic bit is T=500us. It can be represented as T1=100 / 500=1 / 5, T2=200 / 500=2 / 5, T3=300 / 500=3 / 5, T4=400 / 500=4 / 5, corresponding to four states. The specific required states depend on the actual equipment type. For example, the four states correspond to four control states for two-way evacuation indication: all off (T1: 1 / 5), left on (T2: 2 / 5), right on (T3: 3 / 5), and all on (T4: 4 / 5). Alternatively, if the control equipment only requires two control states, two of them can be selected, such as setting T1: 1 / 5 for fan start and T2: 2 / 5 for fan start. The control states for linked equipment can be defined by the user according to their needs.

[0040] The end bit TP is a single logic bit, designated as the fourth logic bit, used to indicate the end of the control command frame. Based on the aforementioned rules, the host output port defaults to a high level. The end bit TP transitions from low to high and remains high for a duration that is an integer multiple of the logic bit period in the control data. Here, TP is set to 5 times the T period, i.e., TP = 5T.

[0041] Based on the above-mentioned control command frame structure, in practical applications, the host generates and sends control command frames based on the control requirements of the corresponding slave devices on the bus.

[0042] For example, the host computer, based on the acquired fire alarm information, such as the fire alarm signal, and combined with its internally preset control logic (e.g., activating the fan and activating the bidirectional evacuation indicator when a fire alarm signal is present), and the device type of each address (slave address code) (the type of slave-controlled device), generates control data TD. Then, it generates control commands and outputs these commands to the control port according to a predetermined timing logic, which is then sent to the bus. This means sending multiple slave control command frames to the bus, oriented towards consecutive addresses. For example: address 00# shuts down the fan, address 01# closes the valve, address 02# activates the right indicator, address 03# activates the left indicator, address 04# activates the bidirectional indicator, etc., corresponding to control output signals of 1 / 5, 1 / 5, 2 / 5, 3 / 5, 4 / 5, etc. For easier internal processor storage, this can be simplified to 01, 01, 02, 03, 04, etc., stored in corresponding arrays. The host computer's control port, based on the internally stored data, outputs control command frames according to a predetermined timing logic.

[0043] S2. The slave device on the bus synchronously receives the entire frame of control commands, parses them, and executes the corresponding control actions.

[0044] After the master control command frame is sent, all slave devices on the bus synchronously receive the entire frame of control commands. Subsequently, all slave devices receive the address identification bit. Assuming the address identification bit represents 64, this indicates that the command in this frame is valid for slave addresses 64 to 127. Next, each slave device receives the control data field one by one and determines whether it is its own logical control based on the sequence number of the received logical bits. Specifically, it determines its logical bit sequence number in the control data field by the difference between its own address code and the starting number indicated by the address identification bit. For example, for slave address 88, subtracting the address identification code from 64 gives 24, thus determining its logical bit sequence number in the control data to be 24. Therefore, the third logical bit corresponding to sequence number 24 is the control command sent by the master to slave 88. Finally, slave 88 executes the control according to the control command expressed in the received third logical bit.

[0045] By implementing the above scheme, multi-state control of 64 slave devices can be achieved simultaneously within a single instruction frame. This process is repeated to control 256 slave devices. In practical applications, for slave devices that do not require action, the master only sends a control command to perform a non-control action once, and the slave only refreshes its control once for the "non-control action control command," still significantly improving the efficiency of large-scale control communication. The transmission efficiency is illustrated below with specific calculations: According to the aforementioned instruction frame structure, the length of one control instruction frame is 5T + 5T + 64T + 5T = 79T. As per the previous convention, the period T of the third logic bit, taking the conventional communication rate of 2000bps in fire communication as an example, is T = 500us. Therefore, one control instruction frame takes 39.5ms, and four control instruction frames take 160ms. This means that control of 256 slave devices can be completed within 160ms. In contrast, conventional methods, with each communication instruction being 8 bytes, require 32ms per instruction frame at the same communication rate. Adding a 4ms pause between each communication frame, each communication takes 36ms. Controlling 100 slave devices requires 3.6 seconds, and the more devices controlled, the longer the time required. The method of this application has obvious advantages and can be applied to high-risk locations with stringent control requirements or locations with special needs.

[0046] Example 2 The difference from Embodiment 1 above is that the linkage control system is considered, which consists of a master unit and multiple slave units. The slave units are installed in the linkage equipment on site and communicate with the master unit through a two-bus method, and each slave unit has a unique address in the bus. The master unit collects the status information data of the slave units through the two buses, and can also issue control commands to control the corresponding slave units to perform different control actions. That is, the master unit issues inspection commands or control commands to the slave units, and the slave units execute the corresponding commands.

[0047] Specifically, the host has two operating modes: normal inspection mode and linkage control mode. The host is connected to the bus through the same hardware circuit, and generates and sends control command frames for controlling the actions of the slave devices and inspection command frames for querying the status of the slave devices according to the current operating mode.

[0048] In normal inspection mode (i.e., when no fire alarm occurs), the host sends inspection command frames to each slave address on the bus in a predetermined sequence to collect their status information. For example, in the case of a linkage control host, when no fire alarm occurs, it inspects the status of all slave devices on the bus one by one according to a predetermined design and displays their status on the monitor to achieve application management of the linkage control equipment. The inspection commands provide information such as device type, installation location, and current linkage control status. Specifically, the host sends an inspection command frame to a specific slave address, the corresponding slave responds, the host processes the response data, modifies the inspection address, and continues inspecting the next slave, repeating this process continuously.

[0049] In the linkage control mode (i.e., when a fire alarm occurs), the host generates preset linkage logic based on the fire alarm information, generates control command frames containing the addresses of the controlled devices and control data, and sends them to the bus in logical order. For example, when the host receives a fire alarm signal, according to the internal preset control logic, it generates an array of the execution action requirements of all controlled devices on the same bus loop according to the bus channel. The contents of this array are related to the type of controlled device. Then, the host stops normal inspection and, according to the preset control command timing rules, sequentially outputs the start bit, address identification bit, control data, and end bit to the control port and sends them to the bus. If multiple control commands need to be sent, the previous process is repeated until all controlled devices have been sent.

[0050] When a slave device receives a command frame, it first needs to determine the type of command. The control command frame and the inspection command frame can be distinguished by the duration of the start bit's level, allowing the device to identify the command type and respond accordingly.

[0051] Specifically, the distinction is based on the level transition characteristics of the start bit: the start bit is the first logic bit. When the initial level is high, it usually starts from the high level and then changes to the low level, maintaining the low level. The instruction type is distinguished by identifying the duration of the low level.

[0052] For example, the start bit characteristic of the inspection command frame: Definition: When the bus is initially at a high level, a falling edge (from high to low) appears. The duration of the low level after this falling edge is M1 (e.g., M1=2) standard bit times. In this embodiment, one standard bit time is set as the period T of the third logic bit. The corresponding waveforms of the front end are: high level, falling edge, low level (one standard bit time), high level (high level of the address recognition bit), ... Slave identification: The slave continuously monitors the bus. When it detects a falling edge after the bus is at a high level, and then samples a low level for one standard bit time, and the rising edge after the low level ends (i.e., the rising edge when the low level of the start bit changes to the high level of the address recognition bit), it determines that the current master has sent an inspection command frame, and then decodes it according to the preset rules of the inspection command frame. The start bit characteristics of the control command frame are defined as follows: When the bus is initially high, a falling edge (from high to low) occurs, and the duration of the low level after this falling edge is M2 (M2 is greater than M1, e.g., M2=5) standard bit times. The corresponding waveforms at the front end are: high level, falling edge, low level (2 standard bit times), high level (high level of the address recognition bit), ... Slave identification: When a falling edge is detected after the bus is high, followed by sampling of a low level for 2 standard bit times, and then a rising edge after the low level ends (i.e., the rising edge when the low level of the start bit changes to the high level of the address recognition bit), it is determined that the current master is sending a control command frame. Subsequently, it is decoded according to the preset rules of the control command frame, that is, there is a significant time difference between M1 and M2 to distinguish between inspection commands and control commands.

[0053] Example 3 The difference from embodiments 1 and 2 above is that, in order to avoid the slave device executing erroneous instructions due to frame transmission errors and to improve the accuracy and reliability of communication in the bus-type fire linkage control system, the method further includes: the control instruction frame also includes a check field, and this check field is located between the control data and the end bit.

[0054] When generating a control command frame, the host calculates a single-byte checksum based on the address identification bits and the data content of the control data (i.e., reducing the first and second discrete values, for example, by multiplying them by a certain value to obtain an integer value for verification). This checksum is then filled into the verification field. The preset checksum algorithm can be a CRC checksum. The data to be sent (the reduced data after address identification bits and control data) is treated as a binary polynomial. Dividing it by the generator polynomial, the remainder is the CRC checksum, which is appended to the control data and transmitted in binary encoding. The encoding format can be customized according to user requirements. Furthermore, to ensure that each slave device accurately executes the host's commands, multiple consecutive transmissions (e.g., twice) can be used. This ensures that even if a control command frame is discarded due to a checksum error, there is still a means to control the corresponding device, preventing any control commands from being missed.

[0055] After receiving a control command frame, the slave device recalculates the checksum for the received address identification bits and control data using the same preset verification algorithm. It then compares the recalculated checksum with the checksum in the received verification field. If they match, the frame transmission is considered complete, and command parsing and control actions continue. If they do not match, the frame transmission is considered faulty, and the frame is discarded. In other words, the frame structure can be extended based on the method provided in this application to ensure the accuracy of command transmission.

[0056] It should be further noted that this example is generally applied to output control scenarios with strict timing requirements, that is, only when the slave device has completely received a frame of control instructions, it outputs control uniformly within a relatively concentrated short time interval. This embodiment is different from the scheme described in Embodiment 1 above, in which the slave device outputs control immediately after receiving each logic bit.

[0057] Example 4 The difference between this method and embodiments 1, 2, and 3 above is that, to further ensure the accuracy of communication, the method further includes a closed-loop response step. This closed-loop response step includes: like Figure 4As shown, during the transmission of the control command frame by the master, after each slave device fully receives and parses the third logic bit in the control data corresponding to its own address, it is expected to output an acknowledgment current signal to the bus within a specific time period immediately following the logic bit cycle. This is the basic design based on the slave devices pulling current to acknowledge the master, and the master can identify the signal formed by the slave device pulling current. Therefore, only after the slave device has fully received its own status bit can it respond to its status in the next transmitted status. Thus, the logic bit of the acknowledgment current signal generated by the slave device is one logic bit later in the logical bit sequence than the third logic bit used by the slave device to execute the master control command.

[0058] The response current signal is a pull-up current pulse whose duration is less than the period T of a third logic bit. The specific time period is located immediately after the rising edge of the following logic bit period, but not adjacent to it, and its duration is less than the third logic bit period T. In this embodiment, the specific time period can be generated with a 3 / 5T width to produce the pull-up current signal, with no pull-up current in the preceding and following 1 / 5T segments, thus forming an intermittent response current signal on the bus, facilitating host detection. Figure 4 The dashed lines shown illustrate the timing relationship between the master's transmission and the slave's response.

[0059] While sending the control command frame, the host synchronously monitors the current changes on the bus to detect the presence of the response current signal. If the host does not detect the response current signal corresponding to a certain slave address within the expected time, it determines that the slave response is abnormal and executes the abnormal handling strategy. Therefore, the slave response can be judged simultaneously with the sending of control commands, forming a closed-loop control.

[0060] The preset anomaly handling strategy includes: resending the control command frame once, or exempting it from resending based on the known fault status of the corresponding slave device. Specifically, the known fault status of the slave device is obtained by analyzing and determining that the slave device itself has a fault, based on the inspection status obtained from executing the inspection command, in the absence of a fire alarm.

[0061] For example, suppose the slave device with address number 00# outputs a 00# acknowledgment current signal to the bus within the second third logic bit cycle immediately following the first third logic bit cycle after parsing the first third logic bit of the control command frame sent by the master. If the master detects the acknowledgment current signal within the second third logic bit cycle, it is the acknowledgment information sent by the slave device 00#, indicating that the slave device 00# has correctly received and executed the control command. If no acknowledgment current signal is received, it means that the slave device 00# has not sent an acknowledgment information, and 00# may be malfunctioning.

[0062] This application also discloses a computer-readable storage medium.

[0063] Specifically, the computer-readable storage medium stores a computer program that can be loaded by a processor and executed, such as the communication method of the bus-type fire linkage control system described above. The computer-readable storage medium includes, for example, various media that can store program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0064] This application also discloses a computer device.

[0065] Specifically, the computer device includes a memory and a processor, and the memory stores a computer program that can be loaded by the processor and executed to implement the communication method of the aforementioned bus-type fire linkage control system.

[0066] The above are all preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any feature disclosed in this specification (including the abstract and drawings) may be replaced by other equivalent or similar features unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is only one example of a series of equivalent or similar features.

Claims

1. A communication method for a bus-type fire alarm linkage control system, characterized in that, Applied to the host, including: Generate and send multiple control instruction frames for slave devices with consecutive addresses to the bus; the control instruction frame includes: a start bit, an address identification bit, control data, and an end bit; The control data consists of several logical bits: a start bit (first logic bit) indicating the beginning of the control command frame and distinguishing between control commands and other communication commands; an address identification bit (second logic bit) indicating N consecutive slave addresses; a high-level duration to a low-level duration ratio of the address identification bit being a preset first discrete ratio, with different preset first discrete ratios corresponding to different starting numbers of consecutive addresses; N third logic bits, each with the same and fixed period, arranged in a specific order corresponding to the N consecutive slave addresses identified by the address identification bit; a high-level duration to a period of each third logic bit being a preset second discrete ratio, with different preset second discrete ratios corresponding to different operating states of the controlled device; and an end bit (fourth logic bit) indicating the end of the control command frame. The transmission of the control command frame enables all slave devices on the bus to synchronously receive the entire frame of control commands. Each slave device determines its logical bit sequence number in the control data based on the difference between its own address code and the starting number indicated by the address identification bit. Based on the high level ratio of the third logical bit corresponding to the logical bit sequence number, it identifies the action status command sent by the master that it needs to execute and executes the corresponding output control.

2. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, Also includes: When the host output port is high, the start bit is the time that remains low after a high-to-low transition, and the duration is an integer multiple of the third logic bit period; the end bit is the time that remains high after a low-to-high transition, and the duration is an integer multiple of the third logic bit period; each logic bit in the address identification bit and control data starts with a high level and ends with a low level, and the period length of each third logic bit in the control data is equal; When the host output port is low, the start bit is the time that the host remains high after a transition from low to high, and the end bit is the time that the host remains low after a transition from high to low. In addition, each logic bit in the address identification bit and control data starts with a low level and ends with a high level. The host is connected to the bus through hardware circuitry, and selects different initial level states for the host port output according to the hardware circuitry. The different initial level states for the host port output include: the host output port is at a high level or the host output port is at a low level.

3. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, The start bit, address identification bit, control data, and end bit are output sequentially and continuously without interval pulses, and the high and low levels of the second and third logic bits are both non-zero durations.

4. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, Also includes: Connected to the bus via the same hardware circuit, control command frames for controlling slave actions and inspection command frames for querying slave status are generated and sent respectively. The control command frame and the inspection command frame are distinguished by the duration of the start bit level.

5. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, The preset first discrete ratio is selected from a set of predefined, distinct first discrete ratios, and each first discrete ratio uniquely corresponds to the starting number of a continuous address.

6. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, The preset second discrete ratio is selected from a set of predefined, distinct second discrete ratios, and each second discrete ratio uniquely corresponds to an action state of the controlled device.

7. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, Also includes: All slave addresses on the same bus are divided into multiple consecutive address groups. The number of addresses in each address group is equal to the number of third logic bits in the control data. Each group is covered by an independent control instruction frame.

8. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, The number of action states represented by any third logic bit in the control data is not less than 2, and the difference between the high-level duration representing each action state and the period of the third logic bit is not less than 1 / 10 of the period of the third logic bit.

9. The communication method of the bus-type fire linkage control system according to claim 1, characterized in that, The method further includes a closed-loop response step, which includes: While sending control command frames to the bus, the host synchronously monitors the current changes on the bus. The host is configured to: for the Mth third logical bit of the control data in the control instruction frame it sends, when At that time, the host expects to detect a pull-up current signal on the bus within the period of the (M+1)th third logic bit it transmits; for the Nth third logic bit in the control data it transmits, the host expects to detect a pull-up current signal on the bus within the period of the end bit transmitted immediately following the control data; the signal width of the pull-up current is less than the period of the third logic bit. If the host does not detect a pull-up current signal during the period of sending the (M+1)th third logic bit, it determines that the slave device with address number M has an abnormal response and executes a preset abnormality handling strategy; if the host does not detect a pull-up current signal during the period of sending the end bit, it determines that the slave device with address number N has an abnormal response and executes a preset abnormality handling strategy; the preset abnormality handling strategy includes: retransmitting the control command frame once, or exempting it from retransmission based on the known fault status of the corresponding slave device.

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